Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cooloney...
[linux-2.6] / arch / ia64 / kernel / mca.c
1 /*
2  * File:        mca.c
3  * Purpose:     Generic MCA handling layer
4  *
5  * Copyright (C) 2003 Hewlett-Packard Co
6  *      David Mosberger-Tang <davidm@hpl.hp.com>
7  *
8  * Copyright (C) 2002 Dell Inc.
9  * Copyright (C) Matt Domsch <Matt_Domsch@dell.com>
10  *
11  * Copyright (C) 2002 Intel
12  * Copyright (C) Jenna Hall <jenna.s.hall@intel.com>
13  *
14  * Copyright (C) 2001 Intel
15  * Copyright (C) Fred Lewis <frederick.v.lewis@intel.com>
16  *
17  * Copyright (C) 2000 Intel
18  * Copyright (C) Chuck Fleckenstein <cfleck@co.intel.com>
19  *
20  * Copyright (C) 1999, 2004-2008 Silicon Graphics, Inc.
21  * Copyright (C) Vijay Chander <vijay@engr.sgi.com>
22  *
23  * Copyright (C) 2006 FUJITSU LIMITED
24  * Copyright (C) Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
25  *
26  * 2000-03-29 Chuck Fleckenstein <cfleck@co.intel.com>
27  *            Fixed PAL/SAL update issues, began MCA bug fixes, logging issues,
28  *            added min save state dump, added INIT handler.
29  *
30  * 2001-01-03 Fred Lewis <frederick.v.lewis@intel.com>
31  *            Added setup of CMCI and CPEI IRQs, logging of corrected platform
32  *            errors, completed code for logging of corrected & uncorrected
33  *            machine check errors, and updated for conformance with Nov. 2000
34  *            revision of the SAL 3.0 spec.
35  *
36  * 2002-01-04 Jenna Hall <jenna.s.hall@intel.com>
37  *            Aligned MCA stack to 16 bytes, added platform vs. CPU error flag,
38  *            set SAL default return values, changed error record structure to
39  *            linked list, added init call to sal_get_state_info_size().
40  *
41  * 2002-03-25 Matt Domsch <Matt_Domsch@dell.com>
42  *            GUID cleanups.
43  *
44  * 2003-04-15 David Mosberger-Tang <davidm@hpl.hp.com>
45  *            Added INIT backtrace support.
46  *
47  * 2003-12-08 Keith Owens <kaos@sgi.com>
48  *            smp_call_function() must not be called from interrupt context
49  *            (can deadlock on tasklist_lock).
50  *            Use keventd to call smp_call_function().
51  *
52  * 2004-02-01 Keith Owens <kaos@sgi.com>
53  *            Avoid deadlock when using printk() for MCA and INIT records.
54  *            Delete all record printing code, moved to salinfo_decode in user
55  *            space.  Mark variables and functions static where possible.
56  *            Delete dead variables and functions.  Reorder to remove the need
57  *            for forward declarations and to consolidate related code.
58  *
59  * 2005-08-12 Keith Owens <kaos@sgi.com>
60  *            Convert MCA/INIT handlers to use per event stacks and SAL/OS
61  *            state.
62  *
63  * 2005-10-07 Keith Owens <kaos@sgi.com>
64  *            Add notify_die() hooks.
65  *
66  * 2006-09-15 Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
67  *            Add printing support for MCA/INIT.
68  *
69  * 2007-04-27 Russ Anderson <rja@sgi.com>
70  *            Support multiple cpus going through OS_MCA in the same event.
71  */
72 #include <linux/types.h>
73 #include <linux/init.h>
74 #include <linux/sched.h>
75 #include <linux/interrupt.h>
76 #include <linux/irq.h>
77 #include <linux/bootmem.h>
78 #include <linux/acpi.h>
79 #include <linux/timer.h>
80 #include <linux/module.h>
81 #include <linux/kernel.h>
82 #include <linux/smp.h>
83 #include <linux/workqueue.h>
84 #include <linux/cpumask.h>
85 #include <linux/kdebug.h>
86 #include <linux/cpu.h>
87
88 #include <asm/delay.h>
89 #include <asm/machvec.h>
90 #include <asm/meminit.h>
91 #include <asm/page.h>
92 #include <asm/ptrace.h>
93 #include <asm/system.h>
94 #include <asm/sal.h>
95 #include <asm/mca.h>
96 #include <asm/kexec.h>
97
98 #include <asm/irq.h>
99 #include <asm/hw_irq.h>
100
101 #include "mca_drv.h"
102 #include "entry.h"
103
104 #if defined(IA64_MCA_DEBUG_INFO)
105 # define IA64_MCA_DEBUG(fmt...) printk(fmt)
106 #else
107 # define IA64_MCA_DEBUG(fmt...)
108 #endif
109
110 /* Used by mca_asm.S */
111 DEFINE_PER_CPU(u64, ia64_mca_data); /* == __per_cpu_mca[smp_processor_id()] */
112 DEFINE_PER_CPU(u64, ia64_mca_per_cpu_pte); /* PTE to map per-CPU area */
113 DEFINE_PER_CPU(u64, ia64_mca_pal_pte);      /* PTE to map PAL code */
114 DEFINE_PER_CPU(u64, ia64_mca_pal_base);    /* vaddr PAL code granule */
115
116 unsigned long __per_cpu_mca[NR_CPUS];
117
118 /* In mca_asm.S */
119 extern void                     ia64_os_init_dispatch_monarch (void);
120 extern void                     ia64_os_init_dispatch_slave (void);
121
122 static int monarch_cpu = -1;
123
124 static ia64_mc_info_t           ia64_mc_info;
125
126 #define MAX_CPE_POLL_INTERVAL (15*60*HZ) /* 15 minutes */
127 #define MIN_CPE_POLL_INTERVAL (2*60*HZ)  /* 2 minutes */
128 #define CMC_POLL_INTERVAL     (1*60*HZ)  /* 1 minute */
129 #define CPE_HISTORY_LENGTH    5
130 #define CMC_HISTORY_LENGTH    5
131
132 #ifdef CONFIG_ACPI
133 static struct timer_list cpe_poll_timer;
134 #endif
135 static struct timer_list cmc_poll_timer;
136 /*
137  * This variable tells whether we are currently in polling mode.
138  * Start with this in the wrong state so we won't play w/ timers
139  * before the system is ready.
140  */
141 static int cmc_polling_enabled = 1;
142
143 /*
144  * Clearing this variable prevents CPE polling from getting activated
145  * in mca_late_init.  Use it if your system doesn't provide a CPEI,
146  * but encounters problems retrieving CPE logs.  This should only be
147  * necessary for debugging.
148  */
149 static int cpe_poll_enabled = 1;
150
151 extern void salinfo_log_wakeup(int type, u8 *buffer, u64 size, int irqsafe);
152
153 static int mca_init __initdata;
154
155 /*
156  * limited & delayed printing support for MCA/INIT handler
157  */
158
159 #define mprintk(fmt...) ia64_mca_printk(fmt)
160
161 #define MLOGBUF_SIZE (512+256*NR_CPUS)
162 #define MLOGBUF_MSGMAX 256
163 static char mlogbuf[MLOGBUF_SIZE];
164 static DEFINE_SPINLOCK(mlogbuf_wlock);  /* mca context only */
165 static DEFINE_SPINLOCK(mlogbuf_rlock);  /* normal context only */
166 static unsigned long mlogbuf_start;
167 static unsigned long mlogbuf_end;
168 static unsigned int mlogbuf_finished = 0;
169 static unsigned long mlogbuf_timestamp = 0;
170
171 static int loglevel_save = -1;
172 #define BREAK_LOGLEVEL(__console_loglevel)              \
173         oops_in_progress = 1;                           \
174         if (loglevel_save < 0)                          \
175                 loglevel_save = __console_loglevel;     \
176         __console_loglevel = 15;
177
178 #define RESTORE_LOGLEVEL(__console_loglevel)            \
179         if (loglevel_save >= 0) {                       \
180                 __console_loglevel = loglevel_save;     \
181                 loglevel_save = -1;                     \
182         }                                               \
183         mlogbuf_finished = 0;                           \
184         oops_in_progress = 0;
185
186 /*
187  * Push messages into buffer, print them later if not urgent.
188  */
189 void ia64_mca_printk(const char *fmt, ...)
190 {
191         va_list args;
192         int printed_len;
193         char temp_buf[MLOGBUF_MSGMAX];
194         char *p;
195
196         va_start(args, fmt);
197         printed_len = vscnprintf(temp_buf, sizeof(temp_buf), fmt, args);
198         va_end(args);
199
200         /* Copy the output into mlogbuf */
201         if (oops_in_progress) {
202                 /* mlogbuf was abandoned, use printk directly instead. */
203                 printk(temp_buf);
204         } else {
205                 spin_lock(&mlogbuf_wlock);
206                 for (p = temp_buf; *p; p++) {
207                         unsigned long next = (mlogbuf_end + 1) % MLOGBUF_SIZE;
208                         if (next != mlogbuf_start) {
209                                 mlogbuf[mlogbuf_end] = *p;
210                                 mlogbuf_end = next;
211                         } else {
212                                 /* buffer full */
213                                 break;
214                         }
215                 }
216                 mlogbuf[mlogbuf_end] = '\0';
217                 spin_unlock(&mlogbuf_wlock);
218         }
219 }
220 EXPORT_SYMBOL(ia64_mca_printk);
221
222 /*
223  * Print buffered messages.
224  *  NOTE: call this after returning normal context. (ex. from salinfod)
225  */
226 void ia64_mlogbuf_dump(void)
227 {
228         char temp_buf[MLOGBUF_MSGMAX];
229         char *p;
230         unsigned long index;
231         unsigned long flags;
232         unsigned int printed_len;
233
234         /* Get output from mlogbuf */
235         while (mlogbuf_start != mlogbuf_end) {
236                 temp_buf[0] = '\0';
237                 p = temp_buf;
238                 printed_len = 0;
239
240                 spin_lock_irqsave(&mlogbuf_rlock, flags);
241
242                 index = mlogbuf_start;
243                 while (index != mlogbuf_end) {
244                         *p = mlogbuf[index];
245                         index = (index + 1) % MLOGBUF_SIZE;
246                         if (!*p)
247                                 break;
248                         p++;
249                         if (++printed_len >= MLOGBUF_MSGMAX - 1)
250                                 break;
251                 }
252                 *p = '\0';
253                 if (temp_buf[0])
254                         printk(temp_buf);
255                 mlogbuf_start = index;
256
257                 mlogbuf_timestamp = 0;
258                 spin_unlock_irqrestore(&mlogbuf_rlock, flags);
259         }
260 }
261 EXPORT_SYMBOL(ia64_mlogbuf_dump);
262
263 /*
264  * Call this if system is going to down or if immediate flushing messages to
265  * console is required. (ex. recovery was failed, crash dump is going to be
266  * invoked, long-wait rendezvous etc.)
267  *  NOTE: this should be called from monarch.
268  */
269 static void ia64_mlogbuf_finish(int wait)
270 {
271         BREAK_LOGLEVEL(console_loglevel);
272
273         spin_lock_init(&mlogbuf_rlock);
274         ia64_mlogbuf_dump();
275         printk(KERN_EMERG "mlogbuf_finish: printing switched to urgent mode, "
276                 "MCA/INIT might be dodgy or fail.\n");
277
278         if (!wait)
279                 return;
280
281         /* wait for console */
282         printk("Delaying for 5 seconds...\n");
283         udelay(5*1000000);
284
285         mlogbuf_finished = 1;
286 }
287
288 /*
289  * Print buffered messages from INIT context.
290  */
291 static void ia64_mlogbuf_dump_from_init(void)
292 {
293         if (mlogbuf_finished)
294                 return;
295
296         if (mlogbuf_timestamp && (mlogbuf_timestamp + 30*HZ > jiffies)) {
297                 printk(KERN_ERR "INIT: mlogbuf_dump is interrupted by INIT "
298                         " and the system seems to be messed up.\n");
299                 ia64_mlogbuf_finish(0);
300                 return;
301         }
302
303         if (!spin_trylock(&mlogbuf_rlock)) {
304                 printk(KERN_ERR "INIT: mlogbuf_dump is interrupted by INIT. "
305                         "Generated messages other than stack dump will be "
306                         "buffered to mlogbuf and will be printed later.\n");
307                 printk(KERN_ERR "INIT: If messages would not printed after "
308                         "this INIT, wait 30sec and assert INIT again.\n");
309                 if (!mlogbuf_timestamp)
310                         mlogbuf_timestamp = jiffies;
311                 return;
312         }
313         spin_unlock(&mlogbuf_rlock);
314         ia64_mlogbuf_dump();
315 }
316
317 static void inline
318 ia64_mca_spin(const char *func)
319 {
320         if (monarch_cpu == smp_processor_id())
321                 ia64_mlogbuf_finish(0);
322         mprintk(KERN_EMERG "%s: spinning here, not returning to SAL\n", func);
323         while (1)
324                 cpu_relax();
325 }
326 /*
327  * IA64_MCA log support
328  */
329 #define IA64_MAX_LOGS           2       /* Double-buffering for nested MCAs */
330 #define IA64_MAX_LOG_TYPES      4   /* MCA, INIT, CMC, CPE */
331
332 typedef struct ia64_state_log_s
333 {
334         spinlock_t      isl_lock;
335         int             isl_index;
336         unsigned long   isl_count;
337         ia64_err_rec_t  *isl_log[IA64_MAX_LOGS]; /* need space to store header + error log */
338 } ia64_state_log_t;
339
340 static ia64_state_log_t ia64_state_log[IA64_MAX_LOG_TYPES];
341
342 #define IA64_LOG_ALLOCATE(it, size) \
343         {ia64_state_log[it].isl_log[IA64_LOG_CURR_INDEX(it)] = \
344                 (ia64_err_rec_t *)alloc_bootmem(size); \
345         ia64_state_log[it].isl_log[IA64_LOG_NEXT_INDEX(it)] = \
346                 (ia64_err_rec_t *)alloc_bootmem(size);}
347 #define IA64_LOG_LOCK_INIT(it) spin_lock_init(&ia64_state_log[it].isl_lock)
348 #define IA64_LOG_LOCK(it)      spin_lock_irqsave(&ia64_state_log[it].isl_lock, s)
349 #define IA64_LOG_UNLOCK(it)    spin_unlock_irqrestore(&ia64_state_log[it].isl_lock,s)
350 #define IA64_LOG_NEXT_INDEX(it)    ia64_state_log[it].isl_index
351 #define IA64_LOG_CURR_INDEX(it)    1 - ia64_state_log[it].isl_index
352 #define IA64_LOG_INDEX_INC(it) \
353     {ia64_state_log[it].isl_index = 1 - ia64_state_log[it].isl_index; \
354     ia64_state_log[it].isl_count++;}
355 #define IA64_LOG_INDEX_DEC(it) \
356     ia64_state_log[it].isl_index = 1 - ia64_state_log[it].isl_index
357 #define IA64_LOG_NEXT_BUFFER(it)   (void *)((ia64_state_log[it].isl_log[IA64_LOG_NEXT_INDEX(it)]))
358 #define IA64_LOG_CURR_BUFFER(it)   (void *)((ia64_state_log[it].isl_log[IA64_LOG_CURR_INDEX(it)]))
359 #define IA64_LOG_COUNT(it)         ia64_state_log[it].isl_count
360
361 /*
362  * ia64_log_init
363  *      Reset the OS ia64 log buffer
364  * Inputs   :   info_type   (SAL_INFO_TYPE_{MCA,INIT,CMC,CPE})
365  * Outputs      :       None
366  */
367 static void __init
368 ia64_log_init(int sal_info_type)
369 {
370         u64     max_size = 0;
371
372         IA64_LOG_NEXT_INDEX(sal_info_type) = 0;
373         IA64_LOG_LOCK_INIT(sal_info_type);
374
375         // SAL will tell us the maximum size of any error record of this type
376         max_size = ia64_sal_get_state_info_size(sal_info_type);
377         if (!max_size)
378                 /* alloc_bootmem() doesn't like zero-sized allocations! */
379                 return;
380
381         // set up OS data structures to hold error info
382         IA64_LOG_ALLOCATE(sal_info_type, max_size);
383         memset(IA64_LOG_CURR_BUFFER(sal_info_type), 0, max_size);
384         memset(IA64_LOG_NEXT_BUFFER(sal_info_type), 0, max_size);
385 }
386
387 /*
388  * ia64_log_get
389  *
390  *      Get the current MCA log from SAL and copy it into the OS log buffer.
391  *
392  *  Inputs  :   info_type   (SAL_INFO_TYPE_{MCA,INIT,CMC,CPE})
393  *              irq_safe    whether you can use printk at this point
394  *  Outputs :   size        (total record length)
395  *              *buffer     (ptr to error record)
396  *
397  */
398 static u64
399 ia64_log_get(int sal_info_type, u8 **buffer, int irq_safe)
400 {
401         sal_log_record_header_t     *log_buffer;
402         u64                         total_len = 0;
403         unsigned long               s;
404
405         IA64_LOG_LOCK(sal_info_type);
406
407         /* Get the process state information */
408         log_buffer = IA64_LOG_NEXT_BUFFER(sal_info_type);
409
410         total_len = ia64_sal_get_state_info(sal_info_type, (u64 *)log_buffer);
411
412         if (total_len) {
413                 IA64_LOG_INDEX_INC(sal_info_type);
414                 IA64_LOG_UNLOCK(sal_info_type);
415                 if (irq_safe) {
416                         IA64_MCA_DEBUG("%s: SAL error record type %d retrieved. Record length = %ld\n",
417                                        __func__, sal_info_type, total_len);
418                 }
419                 *buffer = (u8 *) log_buffer;
420                 return total_len;
421         } else {
422                 IA64_LOG_UNLOCK(sal_info_type);
423                 return 0;
424         }
425 }
426
427 /*
428  *  ia64_mca_log_sal_error_record
429  *
430  *  This function retrieves a specified error record type from SAL
431  *  and wakes up any processes waiting for error records.
432  *
433  *  Inputs  :   sal_info_type   (Type of error record MCA/CMC/CPE)
434  *              FIXME: remove MCA and irq_safe.
435  */
436 static void
437 ia64_mca_log_sal_error_record(int sal_info_type)
438 {
439         u8 *buffer;
440         sal_log_record_header_t *rh;
441         u64 size;
442         int irq_safe = sal_info_type != SAL_INFO_TYPE_MCA;
443 #ifdef IA64_MCA_DEBUG_INFO
444         static const char * const rec_name[] = { "MCA", "INIT", "CMC", "CPE" };
445 #endif
446
447         size = ia64_log_get(sal_info_type, &buffer, irq_safe);
448         if (!size)
449                 return;
450
451         salinfo_log_wakeup(sal_info_type, buffer, size, irq_safe);
452
453         if (irq_safe)
454                 IA64_MCA_DEBUG("CPU %d: SAL log contains %s error record\n",
455                         smp_processor_id(),
456                         sal_info_type < ARRAY_SIZE(rec_name) ? rec_name[sal_info_type] : "UNKNOWN");
457
458         /* Clear logs from corrected errors in case there's no user-level logger */
459         rh = (sal_log_record_header_t *)buffer;
460         if (rh->severity == sal_log_severity_corrected)
461                 ia64_sal_clear_state_info(sal_info_type);
462 }
463
464 /*
465  * search_mca_table
466  *  See if the MCA surfaced in an instruction range
467  *  that has been tagged as recoverable.
468  *
469  *  Inputs
470  *      first   First address range to check
471  *      last    Last address range to check
472  *      ip      Instruction pointer, address we are looking for
473  *
474  * Return value:
475  *      1 on Success (in the table)/ 0 on Failure (not in the  table)
476  */
477 int
478 search_mca_table (const struct mca_table_entry *first,
479                 const struct mca_table_entry *last,
480                 unsigned long ip)
481 {
482         const struct mca_table_entry *curr;
483         u64 curr_start, curr_end;
484
485         curr = first;
486         while (curr <= last) {
487                 curr_start = (u64) &curr->start_addr + curr->start_addr;
488                 curr_end = (u64) &curr->end_addr + curr->end_addr;
489
490                 if ((ip >= curr_start) && (ip <= curr_end)) {
491                         return 1;
492                 }
493                 curr++;
494         }
495         return 0;
496 }
497
498 /* Given an address, look for it in the mca tables. */
499 int mca_recover_range(unsigned long addr)
500 {
501         extern struct mca_table_entry __start___mca_table[];
502         extern struct mca_table_entry __stop___mca_table[];
503
504         return search_mca_table(__start___mca_table, __stop___mca_table-1, addr);
505 }
506 EXPORT_SYMBOL_GPL(mca_recover_range);
507
508 #ifdef CONFIG_ACPI
509
510 int cpe_vector = -1;
511 int ia64_cpe_irq = -1;
512
513 static irqreturn_t
514 ia64_mca_cpe_int_handler (int cpe_irq, void *arg)
515 {
516         static unsigned long    cpe_history[CPE_HISTORY_LENGTH];
517         static int              index;
518         static DEFINE_SPINLOCK(cpe_history_lock);
519
520         IA64_MCA_DEBUG("%s: received interrupt vector = %#x on CPU %d\n",
521                        __func__, cpe_irq, smp_processor_id());
522
523         /* SAL spec states this should run w/ interrupts enabled */
524         local_irq_enable();
525
526         spin_lock(&cpe_history_lock);
527         if (!cpe_poll_enabled && cpe_vector >= 0) {
528
529                 int i, count = 1; /* we know 1 happened now */
530                 unsigned long now = jiffies;
531
532                 for (i = 0; i < CPE_HISTORY_LENGTH; i++) {
533                         if (now - cpe_history[i] <= HZ)
534                                 count++;
535                 }
536
537                 IA64_MCA_DEBUG(KERN_INFO "CPE threshold %d/%d\n", count, CPE_HISTORY_LENGTH);
538                 if (count >= CPE_HISTORY_LENGTH) {
539
540                         cpe_poll_enabled = 1;
541                         spin_unlock(&cpe_history_lock);
542                         disable_irq_nosync(local_vector_to_irq(IA64_CPE_VECTOR));
543
544                         /*
545                          * Corrected errors will still be corrected, but
546                          * make sure there's a log somewhere that indicates
547                          * something is generating more than we can handle.
548                          */
549                         printk(KERN_WARNING "WARNING: Switching to polling CPE handler; error records may be lost\n");
550
551                         mod_timer(&cpe_poll_timer, jiffies + MIN_CPE_POLL_INTERVAL);
552
553                         /* lock already released, get out now */
554                         goto out;
555                 } else {
556                         cpe_history[index++] = now;
557                         if (index == CPE_HISTORY_LENGTH)
558                                 index = 0;
559                 }
560         }
561         spin_unlock(&cpe_history_lock);
562 out:
563         /* Get the CPE error record and log it */
564         ia64_mca_log_sal_error_record(SAL_INFO_TYPE_CPE);
565
566         return IRQ_HANDLED;
567 }
568
569 #endif /* CONFIG_ACPI */
570
571 #ifdef CONFIG_ACPI
572 /*
573  * ia64_mca_register_cpev
574  *
575  *  Register the corrected platform error vector with SAL.
576  *
577  *  Inputs
578  *      cpev        Corrected Platform Error Vector number
579  *
580  *  Outputs
581  *      None
582  */
583 void
584 ia64_mca_register_cpev (int cpev)
585 {
586         /* Register the CPE interrupt vector with SAL */
587         struct ia64_sal_retval isrv;
588
589         isrv = ia64_sal_mc_set_params(SAL_MC_PARAM_CPE_INT, SAL_MC_PARAM_MECHANISM_INT, cpev, 0, 0);
590         if (isrv.status) {
591                 printk(KERN_ERR "Failed to register Corrected Platform "
592                        "Error interrupt vector with SAL (status %ld)\n", isrv.status);
593                 return;
594         }
595
596         IA64_MCA_DEBUG("%s: corrected platform error "
597                        "vector %#x registered\n", __func__, cpev);
598 }
599 #endif /* CONFIG_ACPI */
600
601 /*
602  * ia64_mca_cmc_vector_setup
603  *
604  *  Setup the corrected machine check vector register in the processor.
605  *  (The interrupt is masked on boot. ia64_mca_late_init unmask this.)
606  *  This function is invoked on a per-processor basis.
607  *
608  * Inputs
609  *      None
610  *
611  * Outputs
612  *      None
613  */
614 void __cpuinit
615 ia64_mca_cmc_vector_setup (void)
616 {
617         cmcv_reg_t      cmcv;
618
619         cmcv.cmcv_regval        = 0;
620         cmcv.cmcv_mask          = 1;        /* Mask/disable interrupt at first */
621         cmcv.cmcv_vector        = IA64_CMC_VECTOR;
622         ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
623
624         IA64_MCA_DEBUG("%s: CPU %d corrected machine check vector %#x registered.\n",
625                        __func__, smp_processor_id(), IA64_CMC_VECTOR);
626
627         IA64_MCA_DEBUG("%s: CPU %d CMCV = %#016lx\n",
628                        __func__, smp_processor_id(), ia64_getreg(_IA64_REG_CR_CMCV));
629 }
630
631 /*
632  * ia64_mca_cmc_vector_disable
633  *
634  *  Mask the corrected machine check vector register in the processor.
635  *  This function is invoked on a per-processor basis.
636  *
637  * Inputs
638  *      dummy(unused)
639  *
640  * Outputs
641  *      None
642  */
643 static void
644 ia64_mca_cmc_vector_disable (void *dummy)
645 {
646         cmcv_reg_t      cmcv;
647
648         cmcv.cmcv_regval = ia64_getreg(_IA64_REG_CR_CMCV);
649
650         cmcv.cmcv_mask = 1; /* Mask/disable interrupt */
651         ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
652
653         IA64_MCA_DEBUG("%s: CPU %d corrected machine check vector %#x disabled.\n",
654                        __func__, smp_processor_id(), cmcv.cmcv_vector);
655 }
656
657 /*
658  * ia64_mca_cmc_vector_enable
659  *
660  *  Unmask the corrected machine check vector register in the processor.
661  *  This function is invoked on a per-processor basis.
662  *
663  * Inputs
664  *      dummy(unused)
665  *
666  * Outputs
667  *      None
668  */
669 static void
670 ia64_mca_cmc_vector_enable (void *dummy)
671 {
672         cmcv_reg_t      cmcv;
673
674         cmcv.cmcv_regval = ia64_getreg(_IA64_REG_CR_CMCV);
675
676         cmcv.cmcv_mask = 0; /* Unmask/enable interrupt */
677         ia64_setreg(_IA64_REG_CR_CMCV, cmcv.cmcv_regval);
678
679         IA64_MCA_DEBUG("%s: CPU %d corrected machine check vector %#x enabled.\n",
680                        __func__, smp_processor_id(), cmcv.cmcv_vector);
681 }
682
683 /*
684  * ia64_mca_cmc_vector_disable_keventd
685  *
686  * Called via keventd (smp_call_function() is not safe in interrupt context) to
687  * disable the cmc interrupt vector.
688  */
689 static void
690 ia64_mca_cmc_vector_disable_keventd(struct work_struct *unused)
691 {
692         on_each_cpu(ia64_mca_cmc_vector_disable, NULL, 1, 0);
693 }
694
695 /*
696  * ia64_mca_cmc_vector_enable_keventd
697  *
698  * Called via keventd (smp_call_function() is not safe in interrupt context) to
699  * enable the cmc interrupt vector.
700  */
701 static void
702 ia64_mca_cmc_vector_enable_keventd(struct work_struct *unused)
703 {
704         on_each_cpu(ia64_mca_cmc_vector_enable, NULL, 1, 0);
705 }
706
707 /*
708  * ia64_mca_wakeup
709  *
710  *      Send an inter-cpu interrupt to wake-up a particular cpu.
711  *
712  *  Inputs  :   cpuid
713  *  Outputs :   None
714  */
715 static void
716 ia64_mca_wakeup(int cpu)
717 {
718         platform_send_ipi(cpu, IA64_MCA_WAKEUP_VECTOR, IA64_IPI_DM_INT, 0);
719 }
720
721 /*
722  * ia64_mca_wakeup_all
723  *
724  *      Wakeup all the slave cpus which have rendez'ed previously.
725  *
726  *  Inputs  :   None
727  *  Outputs :   None
728  */
729 static void
730 ia64_mca_wakeup_all(void)
731 {
732         int cpu;
733
734         /* Clear the Rendez checkin flag for all cpus */
735         for_each_online_cpu(cpu) {
736                 if (ia64_mc_info.imi_rendez_checkin[cpu] == IA64_MCA_RENDEZ_CHECKIN_DONE)
737                         ia64_mca_wakeup(cpu);
738         }
739
740 }
741
742 /*
743  * ia64_mca_rendez_interrupt_handler
744  *
745  *      This is handler used to put slave processors into spinloop
746  *      while the monarch processor does the mca handling and later
747  *      wake each slave up once the monarch is done.  The state
748  *      IA64_MCA_RENDEZ_CHECKIN_DONE indicates the cpu is rendez'ed
749  *      in SAL.  The state IA64_MCA_RENDEZ_CHECKIN_NOTDONE indicates
750  *      the cpu has come out of OS rendezvous.
751  *
752  *  Inputs  :   None
753  *  Outputs :   None
754  */
755 static irqreturn_t
756 ia64_mca_rendez_int_handler(int rendez_irq, void *arg)
757 {
758         unsigned long flags;
759         int cpu = smp_processor_id();
760         struct ia64_mca_notify_die nd =
761                 { .sos = NULL, .monarch_cpu = &monarch_cpu };
762
763         /* Mask all interrupts */
764         local_irq_save(flags);
765         if (notify_die(DIE_MCA_RENDZVOUS_ENTER, "MCA", get_irq_regs(),
766                        (long)&nd, 0, 0) == NOTIFY_STOP)
767                 ia64_mca_spin(__func__);
768
769         ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_DONE;
770         /* Register with the SAL monarch that the slave has
771          * reached SAL
772          */
773         ia64_sal_mc_rendez();
774
775         if (notify_die(DIE_MCA_RENDZVOUS_PROCESS, "MCA", get_irq_regs(),
776                        (long)&nd, 0, 0) == NOTIFY_STOP)
777                 ia64_mca_spin(__func__);
778
779         /* Wait for the monarch cpu to exit. */
780         while (monarch_cpu != -1)
781                cpu_relax();     /* spin until monarch leaves */
782
783         if (notify_die(DIE_MCA_RENDZVOUS_LEAVE, "MCA", get_irq_regs(),
784                        (long)&nd, 0, 0) == NOTIFY_STOP)
785                 ia64_mca_spin(__func__);
786
787         ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
788         /* Enable all interrupts */
789         local_irq_restore(flags);
790         return IRQ_HANDLED;
791 }
792
793 /*
794  * ia64_mca_wakeup_int_handler
795  *
796  *      The interrupt handler for processing the inter-cpu interrupt to the
797  *      slave cpu which was spinning in the rendez loop.
798  *      Since this spinning is done by turning off the interrupts and
799  *      polling on the wakeup-interrupt bit in the IRR, there is
800  *      nothing useful to be done in the handler.
801  *
802  *  Inputs  :   wakeup_irq  (Wakeup-interrupt bit)
803  *      arg             (Interrupt handler specific argument)
804  *  Outputs :   None
805  *
806  */
807 static irqreturn_t
808 ia64_mca_wakeup_int_handler(int wakeup_irq, void *arg)
809 {
810         return IRQ_HANDLED;
811 }
812
813 /* Function pointer for extra MCA recovery */
814 int (*ia64_mca_ucmc_extension)
815         (void*,struct ia64_sal_os_state*)
816         = NULL;
817
818 int
819 ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *))
820 {
821         if (ia64_mca_ucmc_extension)
822                 return 1;
823
824         ia64_mca_ucmc_extension = fn;
825         return 0;
826 }
827
828 void
829 ia64_unreg_MCA_extension(void)
830 {
831         if (ia64_mca_ucmc_extension)
832                 ia64_mca_ucmc_extension = NULL;
833 }
834
835 EXPORT_SYMBOL(ia64_reg_MCA_extension);
836 EXPORT_SYMBOL(ia64_unreg_MCA_extension);
837
838
839 static inline void
840 copy_reg(const u64 *fr, u64 fnat, u64 *tr, u64 *tnat)
841 {
842         u64 fslot, tslot, nat;
843         *tr = *fr;
844         fslot = ((unsigned long)fr >> 3) & 63;
845         tslot = ((unsigned long)tr >> 3) & 63;
846         *tnat &= ~(1UL << tslot);
847         nat = (fnat >> fslot) & 1;
848         *tnat |= (nat << tslot);
849 }
850
851 /* Change the comm field on the MCA/INT task to include the pid that
852  * was interrupted, it makes for easier debugging.  If that pid was 0
853  * (swapper or nested MCA/INIT) then use the start of the previous comm
854  * field suffixed with its cpu.
855  */
856
857 static void
858 ia64_mca_modify_comm(const struct task_struct *previous_current)
859 {
860         char *p, comm[sizeof(current->comm)];
861         if (previous_current->pid)
862                 snprintf(comm, sizeof(comm), "%s %d",
863                         current->comm, previous_current->pid);
864         else {
865                 int l;
866                 if ((p = strchr(previous_current->comm, ' ')))
867                         l = p - previous_current->comm;
868                 else
869                         l = strlen(previous_current->comm);
870                 snprintf(comm, sizeof(comm), "%s %*s %d",
871                         current->comm, l, previous_current->comm,
872                         task_thread_info(previous_current)->cpu);
873         }
874         memcpy(current->comm, comm, sizeof(current->comm));
875 }
876
877 /* On entry to this routine, we are running on the per cpu stack, see
878  * mca_asm.h.  The original stack has not been touched by this event.  Some of
879  * the original stack's registers will be in the RBS on this stack.  This stack
880  * also contains a partial pt_regs and switch_stack, the rest of the data is in
881  * PAL minstate.
882  *
883  * The first thing to do is modify the original stack to look like a blocked
884  * task so we can run backtrace on the original task.  Also mark the per cpu
885  * stack as current to ensure that we use the correct task state, it also means
886  * that we can do backtrace on the MCA/INIT handler code itself.
887  */
888
889 static struct task_struct *
890 ia64_mca_modify_original_stack(struct pt_regs *regs,
891                 const struct switch_stack *sw,
892                 struct ia64_sal_os_state *sos,
893                 const char *type)
894 {
895         char *p;
896         ia64_va va;
897         extern char ia64_leave_kernel[];        /* Need asm address, not function descriptor */
898         const pal_min_state_area_t *ms = sos->pal_min_state;
899         struct task_struct *previous_current;
900         struct pt_regs *old_regs;
901         struct switch_stack *old_sw;
902         unsigned size = sizeof(struct pt_regs) +
903                         sizeof(struct switch_stack) + 16;
904         u64 *old_bspstore, *old_bsp;
905         u64 *new_bspstore, *new_bsp;
906         u64 old_unat, old_rnat, new_rnat, nat;
907         u64 slots, loadrs = regs->loadrs;
908         u64 r12 = ms->pmsa_gr[12-1], r13 = ms->pmsa_gr[13-1];
909         u64 ar_bspstore = regs->ar_bspstore;
910         u64 ar_bsp = regs->ar_bspstore + (loadrs >> 16);
911         const u64 *bank;
912         const char *msg;
913         int cpu = smp_processor_id();
914
915         previous_current = curr_task(cpu);
916         set_curr_task(cpu, current);
917         if ((p = strchr(current->comm, ' ')))
918                 *p = '\0';
919
920         /* Best effort attempt to cope with MCA/INIT delivered while in
921          * physical mode.
922          */
923         regs->cr_ipsr = ms->pmsa_ipsr;
924         if (ia64_psr(regs)->dt == 0) {
925                 va.l = r12;
926                 if (va.f.reg == 0) {
927                         va.f.reg = 7;
928                         r12 = va.l;
929                 }
930                 va.l = r13;
931                 if (va.f.reg == 0) {
932                         va.f.reg = 7;
933                         r13 = va.l;
934                 }
935         }
936         if (ia64_psr(regs)->rt == 0) {
937                 va.l = ar_bspstore;
938                 if (va.f.reg == 0) {
939                         va.f.reg = 7;
940                         ar_bspstore = va.l;
941                 }
942                 va.l = ar_bsp;
943                 if (va.f.reg == 0) {
944                         va.f.reg = 7;
945                         ar_bsp = va.l;
946                 }
947         }
948
949         /* mca_asm.S ia64_old_stack() cannot assume that the dirty registers
950          * have been copied to the old stack, the old stack may fail the
951          * validation tests below.  So ia64_old_stack() must restore the dirty
952          * registers from the new stack.  The old and new bspstore probably
953          * have different alignments, so loadrs calculated on the old bsp
954          * cannot be used to restore from the new bsp.  Calculate a suitable
955          * loadrs for the new stack and save it in the new pt_regs, where
956          * ia64_old_stack() can get it.
957          */
958         old_bspstore = (u64 *)ar_bspstore;
959         old_bsp = (u64 *)ar_bsp;
960         slots = ia64_rse_num_regs(old_bspstore, old_bsp);
961         new_bspstore = (u64 *)((u64)current + IA64_RBS_OFFSET);
962         new_bsp = ia64_rse_skip_regs(new_bspstore, slots);
963         regs->loadrs = (new_bsp - new_bspstore) * 8 << 16;
964
965         /* Verify the previous stack state before we change it */
966         if (user_mode(regs)) {
967                 msg = "occurred in user space";
968                 /* previous_current is guaranteed to be valid when the task was
969                  * in user space, so ...
970                  */
971                 ia64_mca_modify_comm(previous_current);
972                 goto no_mod;
973         }
974
975         if (r13 != sos->prev_IA64_KR_CURRENT) {
976                 msg = "inconsistent previous current and r13";
977                 goto no_mod;
978         }
979
980         if (!mca_recover_range(ms->pmsa_iip)) {
981                 if ((r12 - r13) >= KERNEL_STACK_SIZE) {
982                         msg = "inconsistent r12 and r13";
983                         goto no_mod;
984                 }
985                 if ((ar_bspstore - r13) >= KERNEL_STACK_SIZE) {
986                         msg = "inconsistent ar.bspstore and r13";
987                         goto no_mod;
988                 }
989                 va.p = old_bspstore;
990                 if (va.f.reg < 5) {
991                         msg = "old_bspstore is in the wrong region";
992                         goto no_mod;
993                 }
994                 if ((ar_bsp - r13) >= KERNEL_STACK_SIZE) {
995                         msg = "inconsistent ar.bsp and r13";
996                         goto no_mod;
997                 }
998                 size += (ia64_rse_skip_regs(old_bspstore, slots) - old_bspstore) * 8;
999                 if (ar_bspstore + size > r12) {
1000                         msg = "no room for blocked state";
1001                         goto no_mod;
1002                 }
1003         }
1004
1005         ia64_mca_modify_comm(previous_current);
1006
1007         /* Make the original task look blocked.  First stack a struct pt_regs,
1008          * describing the state at the time of interrupt.  mca_asm.S built a
1009          * partial pt_regs, copy it and fill in the blanks using minstate.
1010          */
1011         p = (char *)r12 - sizeof(*regs);
1012         old_regs = (struct pt_regs *)p;
1013         memcpy(old_regs, regs, sizeof(*regs));
1014         /* If ipsr.ic then use pmsa_{iip,ipsr,ifs}, else use
1015          * pmsa_{xip,xpsr,xfs}
1016          */
1017         if (ia64_psr(regs)->ic) {
1018                 old_regs->cr_iip = ms->pmsa_iip;
1019                 old_regs->cr_ipsr = ms->pmsa_ipsr;
1020                 old_regs->cr_ifs = ms->pmsa_ifs;
1021         } else {
1022                 old_regs->cr_iip = ms->pmsa_xip;
1023                 old_regs->cr_ipsr = ms->pmsa_xpsr;
1024                 old_regs->cr_ifs = ms->pmsa_xfs;
1025         }
1026         old_regs->pr = ms->pmsa_pr;
1027         old_regs->b0 = ms->pmsa_br0;
1028         old_regs->loadrs = loadrs;
1029         old_regs->ar_rsc = ms->pmsa_rsc;
1030         old_unat = old_regs->ar_unat;
1031         copy_reg(&ms->pmsa_gr[1-1], ms->pmsa_nat_bits, &old_regs->r1, &old_unat);
1032         copy_reg(&ms->pmsa_gr[2-1], ms->pmsa_nat_bits, &old_regs->r2, &old_unat);
1033         copy_reg(&ms->pmsa_gr[3-1], ms->pmsa_nat_bits, &old_regs->r3, &old_unat);
1034         copy_reg(&ms->pmsa_gr[8-1], ms->pmsa_nat_bits, &old_regs->r8, &old_unat);
1035         copy_reg(&ms->pmsa_gr[9-1], ms->pmsa_nat_bits, &old_regs->r9, &old_unat);
1036         copy_reg(&ms->pmsa_gr[10-1], ms->pmsa_nat_bits, &old_regs->r10, &old_unat);
1037         copy_reg(&ms->pmsa_gr[11-1], ms->pmsa_nat_bits, &old_regs->r11, &old_unat);
1038         copy_reg(&ms->pmsa_gr[12-1], ms->pmsa_nat_bits, &old_regs->r12, &old_unat);
1039         copy_reg(&ms->pmsa_gr[13-1], ms->pmsa_nat_bits, &old_regs->r13, &old_unat);
1040         copy_reg(&ms->pmsa_gr[14-1], ms->pmsa_nat_bits, &old_regs->r14, &old_unat);
1041         copy_reg(&ms->pmsa_gr[15-1], ms->pmsa_nat_bits, &old_regs->r15, &old_unat);
1042         if (ia64_psr(old_regs)->bn)
1043                 bank = ms->pmsa_bank1_gr;
1044         else
1045                 bank = ms->pmsa_bank0_gr;
1046         copy_reg(&bank[16-16], ms->pmsa_nat_bits, &old_regs->r16, &old_unat);
1047         copy_reg(&bank[17-16], ms->pmsa_nat_bits, &old_regs->r17, &old_unat);
1048         copy_reg(&bank[18-16], ms->pmsa_nat_bits, &old_regs->r18, &old_unat);
1049         copy_reg(&bank[19-16], ms->pmsa_nat_bits, &old_regs->r19, &old_unat);
1050         copy_reg(&bank[20-16], ms->pmsa_nat_bits, &old_regs->r20, &old_unat);
1051         copy_reg(&bank[21-16], ms->pmsa_nat_bits, &old_regs->r21, &old_unat);
1052         copy_reg(&bank[22-16], ms->pmsa_nat_bits, &old_regs->r22, &old_unat);
1053         copy_reg(&bank[23-16], ms->pmsa_nat_bits, &old_regs->r23, &old_unat);
1054         copy_reg(&bank[24-16], ms->pmsa_nat_bits, &old_regs->r24, &old_unat);
1055         copy_reg(&bank[25-16], ms->pmsa_nat_bits, &old_regs->r25, &old_unat);
1056         copy_reg(&bank[26-16], ms->pmsa_nat_bits, &old_regs->r26, &old_unat);
1057         copy_reg(&bank[27-16], ms->pmsa_nat_bits, &old_regs->r27, &old_unat);
1058         copy_reg(&bank[28-16], ms->pmsa_nat_bits, &old_regs->r28, &old_unat);
1059         copy_reg(&bank[29-16], ms->pmsa_nat_bits, &old_regs->r29, &old_unat);
1060         copy_reg(&bank[30-16], ms->pmsa_nat_bits, &old_regs->r30, &old_unat);
1061         copy_reg(&bank[31-16], ms->pmsa_nat_bits, &old_regs->r31, &old_unat);
1062
1063         /* Next stack a struct switch_stack.  mca_asm.S built a partial
1064          * switch_stack, copy it and fill in the blanks using pt_regs and
1065          * minstate.
1066          *
1067          * In the synthesized switch_stack, b0 points to ia64_leave_kernel,
1068          * ar.pfs is set to 0.
1069          *
1070          * unwind.c::unw_unwind() does special processing for interrupt frames.
1071          * It checks if the PRED_NON_SYSCALL predicate is set, if the predicate
1072          * is clear then unw_unwind() does _not_ adjust bsp over pt_regs.  Not
1073          * that this is documented, of course.  Set PRED_NON_SYSCALL in the
1074          * switch_stack on the original stack so it will unwind correctly when
1075          * unwind.c reads pt_regs.
1076          *
1077          * thread.ksp is updated to point to the synthesized switch_stack.
1078          */
1079         p -= sizeof(struct switch_stack);
1080         old_sw = (struct switch_stack *)p;
1081         memcpy(old_sw, sw, sizeof(*sw));
1082         old_sw->caller_unat = old_unat;
1083         old_sw->ar_fpsr = old_regs->ar_fpsr;
1084         copy_reg(&ms->pmsa_gr[4-1], ms->pmsa_nat_bits, &old_sw->r4, &old_unat);
1085         copy_reg(&ms->pmsa_gr[5-1], ms->pmsa_nat_bits, &old_sw->r5, &old_unat);
1086         copy_reg(&ms->pmsa_gr[6-1], ms->pmsa_nat_bits, &old_sw->r6, &old_unat);
1087         copy_reg(&ms->pmsa_gr[7-1], ms->pmsa_nat_bits, &old_sw->r7, &old_unat);
1088         old_sw->b0 = (u64)ia64_leave_kernel;
1089         old_sw->b1 = ms->pmsa_br1;
1090         old_sw->ar_pfs = 0;
1091         old_sw->ar_unat = old_unat;
1092         old_sw->pr = old_regs->pr | (1UL << PRED_NON_SYSCALL);
1093         previous_current->thread.ksp = (u64)p - 16;
1094
1095         /* Finally copy the original stack's registers back to its RBS.
1096          * Registers from ar.bspstore through ar.bsp at the time of the event
1097          * are in the current RBS, copy them back to the original stack.  The
1098          * copy must be done register by register because the original bspstore
1099          * and the current one have different alignments, so the saved RNAT
1100          * data occurs at different places.
1101          *
1102          * mca_asm does cover, so the old_bsp already includes all registers at
1103          * the time of MCA/INIT.  It also does flushrs, so all registers before
1104          * this function have been written to backing store on the MCA/INIT
1105          * stack.
1106          */
1107         new_rnat = ia64_get_rnat(ia64_rse_rnat_addr(new_bspstore));
1108         old_rnat = regs->ar_rnat;
1109         while (slots--) {
1110                 if (ia64_rse_is_rnat_slot(new_bspstore)) {
1111                         new_rnat = ia64_get_rnat(new_bspstore++);
1112                 }
1113                 if (ia64_rse_is_rnat_slot(old_bspstore)) {
1114                         *old_bspstore++ = old_rnat;
1115                         old_rnat = 0;
1116                 }
1117                 nat = (new_rnat >> ia64_rse_slot_num(new_bspstore)) & 1UL;
1118                 old_rnat &= ~(1UL << ia64_rse_slot_num(old_bspstore));
1119                 old_rnat |= (nat << ia64_rse_slot_num(old_bspstore));
1120                 *old_bspstore++ = *new_bspstore++;
1121         }
1122         old_sw->ar_bspstore = (unsigned long)old_bspstore;
1123         old_sw->ar_rnat = old_rnat;
1124
1125         sos->prev_task = previous_current;
1126         return previous_current;
1127
1128 no_mod:
1129         printk(KERN_INFO "cpu %d, %s %s, original stack not modified\n",
1130                         smp_processor_id(), type, msg);
1131         return previous_current;
1132 }
1133
1134 /* The monarch/slave interaction is based on monarch_cpu and requires that all
1135  * slaves have entered rendezvous before the monarch leaves.  If any cpu has
1136  * not entered rendezvous yet then wait a bit.  The assumption is that any
1137  * slave that has not rendezvoused after a reasonable time is never going to do
1138  * so.  In this context, slave includes cpus that respond to the MCA rendezvous
1139  * interrupt, as well as cpus that receive the INIT slave event.
1140  */
1141
1142 static void
1143 ia64_wait_for_slaves(int monarch, const char *type)
1144 {
1145         int c, i , wait;
1146
1147         /*
1148          * wait 5 seconds total for slaves (arbitrary)
1149          */
1150         for (i = 0; i < 5000; i++) {
1151                 wait = 0;
1152                 for_each_online_cpu(c) {
1153                         if (c == monarch)
1154                                 continue;
1155                         if (ia64_mc_info.imi_rendez_checkin[c]
1156                                         == IA64_MCA_RENDEZ_CHECKIN_NOTDONE) {
1157                                 udelay(1000);           /* short wait */
1158                                 wait = 1;
1159                                 break;
1160                         }
1161                 }
1162                 if (!wait)
1163                         goto all_in;
1164         }
1165
1166         /*
1167          * Maybe slave(s) dead. Print buffered messages immediately.
1168          */
1169         ia64_mlogbuf_finish(0);
1170         mprintk(KERN_INFO "OS %s slave did not rendezvous on cpu", type);
1171         for_each_online_cpu(c) {
1172                 if (c == monarch)
1173                         continue;
1174                 if (ia64_mc_info.imi_rendez_checkin[c] == IA64_MCA_RENDEZ_CHECKIN_NOTDONE)
1175                         mprintk(" %d", c);
1176         }
1177         mprintk("\n");
1178         return;
1179
1180 all_in:
1181         mprintk(KERN_INFO "All OS %s slaves have reached rendezvous\n", type);
1182         return;
1183 }
1184
1185 /*
1186  * ia64_mca_handler
1187  *
1188  *      This is uncorrectable machine check handler called from OS_MCA
1189  *      dispatch code which is in turn called from SAL_CHECK().
1190  *      This is the place where the core of OS MCA handling is done.
1191  *      Right now the logs are extracted and displayed in a well-defined
1192  *      format. This handler code is supposed to be run only on the
1193  *      monarch processor. Once the monarch is done with MCA handling
1194  *      further MCA logging is enabled by clearing logs.
1195  *      Monarch also has the duty of sending wakeup-IPIs to pull the
1196  *      slave processors out of rendezvous spinloop.
1197  *
1198  *      If multiple processors call into OS_MCA, the first will become
1199  *      the monarch.  Subsequent cpus will be recorded in the mca_cpu
1200  *      bitmask.  After the first monarch has processed its MCA, it
1201  *      will wake up the next cpu in the mca_cpu bitmask and then go
1202  *      into the rendezvous loop.  When all processors have serviced
1203  *      their MCA, the last monarch frees up the rest of the processors.
1204  */
1205 void
1206 ia64_mca_handler(struct pt_regs *regs, struct switch_stack *sw,
1207                  struct ia64_sal_os_state *sos)
1208 {
1209         int recover, cpu = smp_processor_id();
1210         struct task_struct *previous_current;
1211         struct ia64_mca_notify_die nd =
1212                 { .sos = sos, .monarch_cpu = &monarch_cpu };
1213         static atomic_t mca_count;
1214         static cpumask_t mca_cpu;
1215
1216         if (atomic_add_return(1, &mca_count) == 1) {
1217                 monarch_cpu = cpu;
1218                 sos->monarch = 1;
1219         } else {
1220                 cpu_set(cpu, mca_cpu);
1221                 sos->monarch = 0;
1222         }
1223         mprintk(KERN_INFO "Entered OS MCA handler. PSP=%lx cpu=%d "
1224                 "monarch=%ld\n", sos->proc_state_param, cpu, sos->monarch);
1225
1226         previous_current = ia64_mca_modify_original_stack(regs, sw, sos, "MCA");
1227
1228         if (notify_die(DIE_MCA_MONARCH_ENTER, "MCA", regs, (long)&nd, 0, 0)
1229                         == NOTIFY_STOP)
1230                 ia64_mca_spin(__func__);
1231
1232         ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_CONCURRENT_MCA;
1233         if (sos->monarch) {
1234                 ia64_wait_for_slaves(cpu, "MCA");
1235
1236                 /* Wakeup all the processors which are spinning in the
1237                  * rendezvous loop.  They will leave SAL, then spin in the OS
1238                  * with interrupts disabled until this monarch cpu leaves the
1239                  * MCA handler.  That gets control back to the OS so we can
1240                  * backtrace the other cpus, backtrace when spinning in SAL
1241                  * does not work.
1242                  */
1243                 ia64_mca_wakeup_all();
1244                 if (notify_die(DIE_MCA_MONARCH_PROCESS, "MCA", regs, (long)&nd, 0, 0)
1245                                 == NOTIFY_STOP)
1246                         ia64_mca_spin(__func__);
1247         } else {
1248                 while (cpu_isset(cpu, mca_cpu))
1249                         cpu_relax();    /* spin until monarch wakes us */
1250         }
1251
1252         /* Get the MCA error record and log it */
1253         ia64_mca_log_sal_error_record(SAL_INFO_TYPE_MCA);
1254
1255         /* MCA error recovery */
1256         recover = (ia64_mca_ucmc_extension
1257                 && ia64_mca_ucmc_extension(
1258                         IA64_LOG_CURR_BUFFER(SAL_INFO_TYPE_MCA),
1259                         sos));
1260
1261         if (recover) {
1262                 sal_log_record_header_t *rh = IA64_LOG_CURR_BUFFER(SAL_INFO_TYPE_MCA);
1263                 rh->severity = sal_log_severity_corrected;
1264                 ia64_sal_clear_state_info(SAL_INFO_TYPE_MCA);
1265                 sos->os_status = IA64_MCA_CORRECTED;
1266         } else {
1267                 /* Dump buffered message to console */
1268                 ia64_mlogbuf_finish(1);
1269 #ifdef CONFIG_KEXEC
1270                 atomic_set(&kdump_in_progress, 1);
1271                 monarch_cpu = -1;
1272 #endif
1273         }
1274         if (notify_die(DIE_MCA_MONARCH_LEAVE, "MCA", regs, (long)&nd, 0, recover)
1275                         == NOTIFY_STOP)
1276                 ia64_mca_spin(__func__);
1277
1278
1279         if (atomic_dec_return(&mca_count) > 0) {
1280                 int i;
1281
1282                 /* wake up the next monarch cpu,
1283                  * and put this cpu in the rendez loop.
1284                  */
1285                 for_each_online_cpu(i) {
1286                         if (cpu_isset(i, mca_cpu)) {
1287                                 monarch_cpu = i;
1288                                 cpu_clear(i, mca_cpu);  /* wake next cpu */
1289                                 while (monarch_cpu != -1)
1290                                         cpu_relax();    /* spin until last cpu leaves */
1291                                 set_curr_task(cpu, previous_current);
1292                                 ia64_mc_info.imi_rendez_checkin[cpu]
1293                                                 = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
1294                                 return;
1295                         }
1296                 }
1297         }
1298         set_curr_task(cpu, previous_current);
1299         ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
1300         monarch_cpu = -1;       /* This frees the slaves and previous monarchs */
1301 }
1302
1303 static DECLARE_WORK(cmc_disable_work, ia64_mca_cmc_vector_disable_keventd);
1304 static DECLARE_WORK(cmc_enable_work, ia64_mca_cmc_vector_enable_keventd);
1305
1306 /*
1307  * ia64_mca_cmc_int_handler
1308  *
1309  *  This is corrected machine check interrupt handler.
1310  *      Right now the logs are extracted and displayed in a well-defined
1311  *      format.
1312  *
1313  * Inputs
1314  *      interrupt number
1315  *      client data arg ptr
1316  *
1317  * Outputs
1318  *      None
1319  */
1320 static irqreturn_t
1321 ia64_mca_cmc_int_handler(int cmc_irq, void *arg)
1322 {
1323         static unsigned long    cmc_history[CMC_HISTORY_LENGTH];
1324         static int              index;
1325         static DEFINE_SPINLOCK(cmc_history_lock);
1326
1327         IA64_MCA_DEBUG("%s: received interrupt vector = %#x on CPU %d\n",
1328                        __func__, cmc_irq, smp_processor_id());
1329
1330         /* SAL spec states this should run w/ interrupts enabled */
1331         local_irq_enable();
1332
1333         spin_lock(&cmc_history_lock);
1334         if (!cmc_polling_enabled) {
1335                 int i, count = 1; /* we know 1 happened now */
1336                 unsigned long now = jiffies;
1337
1338                 for (i = 0; i < CMC_HISTORY_LENGTH; i++) {
1339                         if (now - cmc_history[i] <= HZ)
1340                                 count++;
1341                 }
1342
1343                 IA64_MCA_DEBUG(KERN_INFO "CMC threshold %d/%d\n", count, CMC_HISTORY_LENGTH);
1344                 if (count >= CMC_HISTORY_LENGTH) {
1345
1346                         cmc_polling_enabled = 1;
1347                         spin_unlock(&cmc_history_lock);
1348                         /* If we're being hit with CMC interrupts, we won't
1349                          * ever execute the schedule_work() below.  Need to
1350                          * disable CMC interrupts on this processor now.
1351                          */
1352                         ia64_mca_cmc_vector_disable(NULL);
1353                         schedule_work(&cmc_disable_work);
1354
1355                         /*
1356                          * Corrected errors will still be corrected, but
1357                          * make sure there's a log somewhere that indicates
1358                          * something is generating more than we can handle.
1359                          */
1360                         printk(KERN_WARNING "WARNING: Switching to polling CMC handler; error records may be lost\n");
1361
1362                         mod_timer(&cmc_poll_timer, jiffies + CMC_POLL_INTERVAL);
1363
1364                         /* lock already released, get out now */
1365                         goto out;
1366                 } else {
1367                         cmc_history[index++] = now;
1368                         if (index == CMC_HISTORY_LENGTH)
1369                                 index = 0;
1370                 }
1371         }
1372         spin_unlock(&cmc_history_lock);
1373 out:
1374         /* Get the CMC error record and log it */
1375         ia64_mca_log_sal_error_record(SAL_INFO_TYPE_CMC);
1376
1377         return IRQ_HANDLED;
1378 }
1379
1380 /*
1381  *  ia64_mca_cmc_int_caller
1382  *
1383  *      Triggered by sw interrupt from CMC polling routine.  Calls
1384  *      real interrupt handler and either triggers a sw interrupt
1385  *      on the next cpu or does cleanup at the end.
1386  *
1387  * Inputs
1388  *      interrupt number
1389  *      client data arg ptr
1390  * Outputs
1391  *      handled
1392  */
1393 static irqreturn_t
1394 ia64_mca_cmc_int_caller(int cmc_irq, void *arg)
1395 {
1396         static int start_count = -1;
1397         unsigned int cpuid;
1398
1399         cpuid = smp_processor_id();
1400
1401         /* If first cpu, update count */
1402         if (start_count == -1)
1403                 start_count = IA64_LOG_COUNT(SAL_INFO_TYPE_CMC);
1404
1405         ia64_mca_cmc_int_handler(cmc_irq, arg);
1406
1407         for (++cpuid ; cpuid < NR_CPUS && !cpu_online(cpuid) ; cpuid++);
1408
1409         if (cpuid < NR_CPUS) {
1410                 platform_send_ipi(cpuid, IA64_CMCP_VECTOR, IA64_IPI_DM_INT, 0);
1411         } else {
1412                 /* If no log record, switch out of polling mode */
1413                 if (start_count == IA64_LOG_COUNT(SAL_INFO_TYPE_CMC)) {
1414
1415                         printk(KERN_WARNING "Returning to interrupt driven CMC handler\n");
1416                         schedule_work(&cmc_enable_work);
1417                         cmc_polling_enabled = 0;
1418
1419                 } else {
1420
1421                         mod_timer(&cmc_poll_timer, jiffies + CMC_POLL_INTERVAL);
1422                 }
1423
1424                 start_count = -1;
1425         }
1426
1427         return IRQ_HANDLED;
1428 }
1429
1430 /*
1431  *  ia64_mca_cmc_poll
1432  *
1433  *      Poll for Corrected Machine Checks (CMCs)
1434  *
1435  * Inputs   :   dummy(unused)
1436  * Outputs  :   None
1437  *
1438  */
1439 static void
1440 ia64_mca_cmc_poll (unsigned long dummy)
1441 {
1442         /* Trigger a CMC interrupt cascade  */
1443         platform_send_ipi(first_cpu(cpu_online_map), IA64_CMCP_VECTOR, IA64_IPI_DM_INT, 0);
1444 }
1445
1446 /*
1447  *  ia64_mca_cpe_int_caller
1448  *
1449  *      Triggered by sw interrupt from CPE polling routine.  Calls
1450  *      real interrupt handler and either triggers a sw interrupt
1451  *      on the next cpu or does cleanup at the end.
1452  *
1453  * Inputs
1454  *      interrupt number
1455  *      client data arg ptr
1456  * Outputs
1457  *      handled
1458  */
1459 #ifdef CONFIG_ACPI
1460
1461 static irqreturn_t
1462 ia64_mca_cpe_int_caller(int cpe_irq, void *arg)
1463 {
1464         static int start_count = -1;
1465         static int poll_time = MIN_CPE_POLL_INTERVAL;
1466         unsigned int cpuid;
1467
1468         cpuid = smp_processor_id();
1469
1470         /* If first cpu, update count */
1471         if (start_count == -1)
1472                 start_count = IA64_LOG_COUNT(SAL_INFO_TYPE_CPE);
1473
1474         ia64_mca_cpe_int_handler(cpe_irq, arg);
1475
1476         for (++cpuid ; cpuid < NR_CPUS && !cpu_online(cpuid) ; cpuid++);
1477
1478         if (cpuid < NR_CPUS) {
1479                 platform_send_ipi(cpuid, IA64_CPEP_VECTOR, IA64_IPI_DM_INT, 0);
1480         } else {
1481                 /*
1482                  * If a log was recorded, increase our polling frequency,
1483                  * otherwise, backoff or return to interrupt mode.
1484                  */
1485                 if (start_count != IA64_LOG_COUNT(SAL_INFO_TYPE_CPE)) {
1486                         poll_time = max(MIN_CPE_POLL_INTERVAL, poll_time / 2);
1487                 } else if (cpe_vector < 0) {
1488                         poll_time = min(MAX_CPE_POLL_INTERVAL, poll_time * 2);
1489                 } else {
1490                         poll_time = MIN_CPE_POLL_INTERVAL;
1491
1492                         printk(KERN_WARNING "Returning to interrupt driven CPE handler\n");
1493                         enable_irq(local_vector_to_irq(IA64_CPE_VECTOR));
1494                         cpe_poll_enabled = 0;
1495                 }
1496
1497                 if (cpe_poll_enabled)
1498                         mod_timer(&cpe_poll_timer, jiffies + poll_time);
1499                 start_count = -1;
1500         }
1501
1502         return IRQ_HANDLED;
1503 }
1504
1505 /*
1506  *  ia64_mca_cpe_poll
1507  *
1508  *      Poll for Corrected Platform Errors (CPEs), trigger interrupt
1509  *      on first cpu, from there it will trickle through all the cpus.
1510  *
1511  * Inputs   :   dummy(unused)
1512  * Outputs  :   None
1513  *
1514  */
1515 static void
1516 ia64_mca_cpe_poll (unsigned long dummy)
1517 {
1518         /* Trigger a CPE interrupt cascade  */
1519         platform_send_ipi(first_cpu(cpu_online_map), IA64_CPEP_VECTOR, IA64_IPI_DM_INT, 0);
1520 }
1521
1522 #endif /* CONFIG_ACPI */
1523
1524 static int
1525 default_monarch_init_process(struct notifier_block *self, unsigned long val, void *data)
1526 {
1527         int c;
1528         struct task_struct *g, *t;
1529         if (val != DIE_INIT_MONARCH_PROCESS)
1530                 return NOTIFY_DONE;
1531 #ifdef CONFIG_KEXEC
1532         if (atomic_read(&kdump_in_progress))
1533                 return NOTIFY_DONE;
1534 #endif
1535
1536         /*
1537          * FIXME: mlogbuf will brim over with INIT stack dumps.
1538          * To enable show_stack from INIT, we use oops_in_progress which should
1539          * be used in real oops. This would cause something wrong after INIT.
1540          */
1541         BREAK_LOGLEVEL(console_loglevel);
1542         ia64_mlogbuf_dump_from_init();
1543
1544         printk(KERN_ERR "Processes interrupted by INIT -");
1545         for_each_online_cpu(c) {
1546                 struct ia64_sal_os_state *s;
1547                 t = __va(__per_cpu_mca[c] + IA64_MCA_CPU_INIT_STACK_OFFSET);
1548                 s = (struct ia64_sal_os_state *)((char *)t + MCA_SOS_OFFSET);
1549                 g = s->prev_task;
1550                 if (g) {
1551                         if (g->pid)
1552                                 printk(" %d", g->pid);
1553                         else
1554                                 printk(" %d (cpu %d task 0x%p)", g->pid, task_cpu(g), g);
1555                 }
1556         }
1557         printk("\n\n");
1558         if (read_trylock(&tasklist_lock)) {
1559                 do_each_thread (g, t) {
1560                         printk("\nBacktrace of pid %d (%s)\n", t->pid, t->comm);
1561                         show_stack(t, NULL);
1562                 } while_each_thread (g, t);
1563                 read_unlock(&tasklist_lock);
1564         }
1565         /* FIXME: This will not restore zapped printk locks. */
1566         RESTORE_LOGLEVEL(console_loglevel);
1567         return NOTIFY_DONE;
1568 }
1569
1570 /*
1571  * C portion of the OS INIT handler
1572  *
1573  * Called from ia64_os_init_dispatch
1574  *
1575  * Inputs: pointer to pt_regs where processor info was saved.  SAL/OS state for
1576  * this event.  This code is used for both monarch and slave INIT events, see
1577  * sos->monarch.
1578  *
1579  * All INIT events switch to the INIT stack and change the previous process to
1580  * blocked status.  If one of the INIT events is the monarch then we are
1581  * probably processing the nmi button/command.  Use the monarch cpu to dump all
1582  * the processes.  The slave INIT events all spin until the monarch cpu
1583  * returns.  We can also get INIT slave events for MCA, in which case the MCA
1584  * process is the monarch.
1585  */
1586
1587 void
1588 ia64_init_handler(struct pt_regs *regs, struct switch_stack *sw,
1589                   struct ia64_sal_os_state *sos)
1590 {
1591         static atomic_t slaves;
1592         static atomic_t monarchs;
1593         struct task_struct *previous_current;
1594         int cpu = smp_processor_id();
1595         struct ia64_mca_notify_die nd =
1596                 { .sos = sos, .monarch_cpu = &monarch_cpu };
1597
1598         (void) notify_die(DIE_INIT_ENTER, "INIT", regs, (long)&nd, 0, 0);
1599
1600         mprintk(KERN_INFO "Entered OS INIT handler. PSP=%lx cpu=%d monarch=%ld\n",
1601                 sos->proc_state_param, cpu, sos->monarch);
1602         salinfo_log_wakeup(SAL_INFO_TYPE_INIT, NULL, 0, 0);
1603
1604         previous_current = ia64_mca_modify_original_stack(regs, sw, sos, "INIT");
1605         sos->os_status = IA64_INIT_RESUME;
1606
1607         /* FIXME: Workaround for broken proms that drive all INIT events as
1608          * slaves.  The last slave that enters is promoted to be a monarch.
1609          * Remove this code in September 2006, that gives platforms a year to
1610          * fix their proms and get their customers updated.
1611          */
1612         if (!sos->monarch && atomic_add_return(1, &slaves) == num_online_cpus()) {
1613                 mprintk(KERN_WARNING "%s: Promoting cpu %d to monarch.\n",
1614                         __func__, cpu);
1615                 atomic_dec(&slaves);
1616                 sos->monarch = 1;
1617         }
1618
1619         /* FIXME: Workaround for broken proms that drive all INIT events as
1620          * monarchs.  Second and subsequent monarchs are demoted to slaves.
1621          * Remove this code in September 2006, that gives platforms a year to
1622          * fix their proms and get their customers updated.
1623          */
1624         if (sos->monarch && atomic_add_return(1, &monarchs) > 1) {
1625                 mprintk(KERN_WARNING "%s: Demoting cpu %d to slave.\n",
1626                                __func__, cpu);
1627                 atomic_dec(&monarchs);
1628                 sos->monarch = 0;
1629         }
1630
1631         if (!sos->monarch) {
1632                 ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_INIT;
1633                 while (monarch_cpu == -1)
1634                        cpu_relax();     /* spin until monarch enters */
1635                 if (notify_die(DIE_INIT_SLAVE_ENTER, "INIT", regs, (long)&nd, 0, 0)
1636                                 == NOTIFY_STOP)
1637                         ia64_mca_spin(__func__);
1638                 if (notify_die(DIE_INIT_SLAVE_PROCESS, "INIT", regs, (long)&nd, 0, 0)
1639                                 == NOTIFY_STOP)
1640                         ia64_mca_spin(__func__);
1641                 while (monarch_cpu != -1)
1642                        cpu_relax();     /* spin until monarch leaves */
1643                 if (notify_die(DIE_INIT_SLAVE_LEAVE, "INIT", regs, (long)&nd, 0, 0)
1644                                 == NOTIFY_STOP)
1645                         ia64_mca_spin(__func__);
1646                 mprintk("Slave on cpu %d returning to normal service.\n", cpu);
1647                 set_curr_task(cpu, previous_current);
1648                 ia64_mc_info.imi_rendez_checkin[cpu] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
1649                 atomic_dec(&slaves);
1650                 return;
1651         }
1652
1653         monarch_cpu = cpu;
1654         if (notify_die(DIE_INIT_MONARCH_ENTER, "INIT", regs, (long)&nd, 0, 0)
1655                         == NOTIFY_STOP)
1656                 ia64_mca_spin(__func__);
1657
1658         /*
1659          * Wait for a bit.  On some machines (e.g., HP's zx2000 and zx6000, INIT can be
1660          * generated via the BMC's command-line interface, but since the console is on the
1661          * same serial line, the user will need some time to switch out of the BMC before
1662          * the dump begins.
1663          */
1664         mprintk("Delaying for 5 seconds...\n");
1665         udelay(5*1000000);
1666         ia64_wait_for_slaves(cpu, "INIT");
1667         /* If nobody intercepts DIE_INIT_MONARCH_PROCESS then we drop through
1668          * to default_monarch_init_process() above and just print all the
1669          * tasks.
1670          */
1671         if (notify_die(DIE_INIT_MONARCH_PROCESS, "INIT", regs, (long)&nd, 0, 0)
1672                         == NOTIFY_STOP)
1673                 ia64_mca_spin(__func__);
1674         if (notify_die(DIE_INIT_MONARCH_LEAVE, "INIT", regs, (long)&nd, 0, 0)
1675                         == NOTIFY_STOP)
1676                 ia64_mca_spin(__func__);
1677         mprintk("\nINIT dump complete.  Monarch on cpu %d returning to normal service.\n", cpu);
1678         atomic_dec(&monarchs);
1679         set_curr_task(cpu, previous_current);
1680         monarch_cpu = -1;
1681         return;
1682 }
1683
1684 static int __init
1685 ia64_mca_disable_cpe_polling(char *str)
1686 {
1687         cpe_poll_enabled = 0;
1688         return 1;
1689 }
1690
1691 __setup("disable_cpe_poll", ia64_mca_disable_cpe_polling);
1692
1693 static struct irqaction cmci_irqaction = {
1694         .handler =      ia64_mca_cmc_int_handler,
1695         .flags =        IRQF_DISABLED,
1696         .name =         "cmc_hndlr"
1697 };
1698
1699 static struct irqaction cmcp_irqaction = {
1700         .handler =      ia64_mca_cmc_int_caller,
1701         .flags =        IRQF_DISABLED,
1702         .name =         "cmc_poll"
1703 };
1704
1705 static struct irqaction mca_rdzv_irqaction = {
1706         .handler =      ia64_mca_rendez_int_handler,
1707         .flags =        IRQF_DISABLED,
1708         .name =         "mca_rdzv"
1709 };
1710
1711 static struct irqaction mca_wkup_irqaction = {
1712         .handler =      ia64_mca_wakeup_int_handler,
1713         .flags =        IRQF_DISABLED,
1714         .name =         "mca_wkup"
1715 };
1716
1717 #ifdef CONFIG_ACPI
1718 static struct irqaction mca_cpe_irqaction = {
1719         .handler =      ia64_mca_cpe_int_handler,
1720         .flags =        IRQF_DISABLED,
1721         .name =         "cpe_hndlr"
1722 };
1723
1724 static struct irqaction mca_cpep_irqaction = {
1725         .handler =      ia64_mca_cpe_int_caller,
1726         .flags =        IRQF_DISABLED,
1727         .name =         "cpe_poll"
1728 };
1729 #endif /* CONFIG_ACPI */
1730
1731 /* Minimal format of the MCA/INIT stacks.  The pseudo processes that run on
1732  * these stacks can never sleep, they cannot return from the kernel to user
1733  * space, they do not appear in a normal ps listing.  So there is no need to
1734  * format most of the fields.
1735  */
1736
1737 static void __cpuinit
1738 format_mca_init_stack(void *mca_data, unsigned long offset,
1739                 const char *type, int cpu)
1740 {
1741         struct task_struct *p = (struct task_struct *)((char *)mca_data + offset);
1742         struct thread_info *ti;
1743         memset(p, 0, KERNEL_STACK_SIZE);
1744         ti = task_thread_info(p);
1745         ti->flags = _TIF_MCA_INIT;
1746         ti->preempt_count = 1;
1747         ti->task = p;
1748         ti->cpu = cpu;
1749         p->stack = ti;
1750         p->state = TASK_UNINTERRUPTIBLE;
1751         cpu_set(cpu, p->cpus_allowed);
1752         INIT_LIST_HEAD(&p->tasks);
1753         p->parent = p->real_parent = p->group_leader = p;
1754         INIT_LIST_HEAD(&p->children);
1755         INIT_LIST_HEAD(&p->sibling);
1756         strncpy(p->comm, type, sizeof(p->comm)-1);
1757 }
1758
1759 /* Caller prevents this from being called after init */
1760 static void * __init_refok mca_bootmem(void)
1761 {
1762         return __alloc_bootmem(sizeof(struct ia64_mca_cpu),
1763                             KERNEL_STACK_SIZE, 0);
1764 }
1765
1766 /* Do per-CPU MCA-related initialization.  */
1767 void __cpuinit
1768 ia64_mca_cpu_init(void *cpu_data)
1769 {
1770         void *pal_vaddr;
1771         void *data;
1772         long sz = sizeof(struct ia64_mca_cpu);
1773         int cpu = smp_processor_id();
1774         static int first_time = 1;
1775
1776         /*
1777          * Structure will already be allocated if cpu has been online,
1778          * then offlined.
1779          */
1780         if (__per_cpu_mca[cpu]) {
1781                 data = __va(__per_cpu_mca[cpu]);
1782         } else {
1783                 if (first_time) {
1784                         data = mca_bootmem();
1785                         first_time = 0;
1786                 } else
1787                         data = page_address(alloc_pages_node(numa_node_id(),
1788                                         GFP_KERNEL, get_order(sz)));
1789                 if (!data)
1790                         panic("Could not allocate MCA memory for cpu %d\n",
1791                                         cpu);
1792         }
1793         format_mca_init_stack(data, offsetof(struct ia64_mca_cpu, mca_stack),
1794                 "MCA", cpu);
1795         format_mca_init_stack(data, offsetof(struct ia64_mca_cpu, init_stack),
1796                 "INIT", cpu);
1797         __get_cpu_var(ia64_mca_data) = __per_cpu_mca[cpu] = __pa(data);
1798
1799         /*
1800          * Stash away a copy of the PTE needed to map the per-CPU page.
1801          * We may need it during MCA recovery.
1802          */
1803         __get_cpu_var(ia64_mca_per_cpu_pte) =
1804                 pte_val(mk_pte_phys(__pa(cpu_data), PAGE_KERNEL));
1805
1806         /*
1807          * Also, stash away a copy of the PAL address and the PTE
1808          * needed to map it.
1809          */
1810         pal_vaddr = efi_get_pal_addr();
1811         if (!pal_vaddr)
1812                 return;
1813         __get_cpu_var(ia64_mca_pal_base) =
1814                 GRANULEROUNDDOWN((unsigned long) pal_vaddr);
1815         __get_cpu_var(ia64_mca_pal_pte) = pte_val(mk_pte_phys(__pa(pal_vaddr),
1816                                                               PAGE_KERNEL));
1817 }
1818
1819 static void __cpuinit ia64_mca_cmc_vector_adjust(void *dummy)
1820 {
1821         unsigned long flags;
1822
1823         local_irq_save(flags);
1824         if (!cmc_polling_enabled)
1825                 ia64_mca_cmc_vector_enable(NULL);
1826         local_irq_restore(flags);
1827 }
1828
1829 static int __cpuinit mca_cpu_callback(struct notifier_block *nfb,
1830                                       unsigned long action,
1831                                       void *hcpu)
1832 {
1833         int hotcpu = (unsigned long) hcpu;
1834
1835         switch (action) {
1836         case CPU_ONLINE:
1837         case CPU_ONLINE_FROZEN:
1838                 smp_call_function_single(hotcpu, ia64_mca_cmc_vector_adjust,
1839                                          NULL, 1, 0);
1840                 break;
1841         }
1842         return NOTIFY_OK;
1843 }
1844
1845 static struct notifier_block mca_cpu_notifier __cpuinitdata = {
1846         .notifier_call = mca_cpu_callback
1847 };
1848
1849 /*
1850  * ia64_mca_init
1851  *
1852  *  Do all the system level mca specific initialization.
1853  *
1854  *      1. Register spinloop and wakeup request interrupt vectors
1855  *
1856  *      2. Register OS_MCA handler entry point
1857  *
1858  *      3. Register OS_INIT handler entry point
1859  *
1860  *  4. Initialize MCA/CMC/INIT related log buffers maintained by the OS.
1861  *
1862  *  Note that this initialization is done very early before some kernel
1863  *  services are available.
1864  *
1865  *  Inputs  :   None
1866  *
1867  *  Outputs :   None
1868  */
1869 void __init
1870 ia64_mca_init(void)
1871 {
1872         ia64_fptr_t *init_hldlr_ptr_monarch = (ia64_fptr_t *)ia64_os_init_dispatch_monarch;
1873         ia64_fptr_t *init_hldlr_ptr_slave = (ia64_fptr_t *)ia64_os_init_dispatch_slave;
1874         ia64_fptr_t *mca_hldlr_ptr = (ia64_fptr_t *)ia64_os_mca_dispatch;
1875         int i;
1876         s64 rc;
1877         struct ia64_sal_retval isrv;
1878         u64 timeout = IA64_MCA_RENDEZ_TIMEOUT;  /* platform specific */
1879         static struct notifier_block default_init_monarch_nb = {
1880                 .notifier_call = default_monarch_init_process,
1881                 .priority = 0/* we need to notified last */
1882         };
1883
1884         IA64_MCA_DEBUG("%s: begin\n", __func__);
1885
1886         /* Clear the Rendez checkin flag for all cpus */
1887         for(i = 0 ; i < NR_CPUS; i++)
1888                 ia64_mc_info.imi_rendez_checkin[i] = IA64_MCA_RENDEZ_CHECKIN_NOTDONE;
1889
1890         /*
1891          * Register the rendezvous spinloop and wakeup mechanism with SAL
1892          */
1893
1894         /* Register the rendezvous interrupt vector with SAL */
1895         while (1) {
1896                 isrv = ia64_sal_mc_set_params(SAL_MC_PARAM_RENDEZ_INT,
1897                                               SAL_MC_PARAM_MECHANISM_INT,
1898                                               IA64_MCA_RENDEZ_VECTOR,
1899                                               timeout,
1900                                               SAL_MC_PARAM_RZ_ALWAYS);
1901                 rc = isrv.status;
1902                 if (rc == 0)
1903                         break;
1904                 if (rc == -2) {
1905                         printk(KERN_INFO "Increasing MCA rendezvous timeout from "
1906                                 "%ld to %ld milliseconds\n", timeout, isrv.v0);
1907                         timeout = isrv.v0;
1908                         (void) notify_die(DIE_MCA_NEW_TIMEOUT, "MCA", NULL, timeout, 0, 0);
1909                         continue;
1910                 }
1911                 printk(KERN_ERR "Failed to register rendezvous interrupt "
1912                        "with SAL (status %ld)\n", rc);
1913                 return;
1914         }
1915
1916         /* Register the wakeup interrupt vector with SAL */
1917         isrv = ia64_sal_mc_set_params(SAL_MC_PARAM_RENDEZ_WAKEUP,
1918                                       SAL_MC_PARAM_MECHANISM_INT,
1919                                       IA64_MCA_WAKEUP_VECTOR,
1920                                       0, 0);
1921         rc = isrv.status;
1922         if (rc) {
1923                 printk(KERN_ERR "Failed to register wakeup interrupt with SAL "
1924                        "(status %ld)\n", rc);
1925                 return;
1926         }
1927
1928         IA64_MCA_DEBUG("%s: registered MCA rendezvous spinloop and wakeup mech.\n", __func__);
1929
1930         ia64_mc_info.imi_mca_handler        = ia64_tpa(mca_hldlr_ptr->fp);
1931         /*
1932          * XXX - disable SAL checksum by setting size to 0; should be
1933          *      ia64_tpa(ia64_os_mca_dispatch_end) - ia64_tpa(ia64_os_mca_dispatch);
1934          */
1935         ia64_mc_info.imi_mca_handler_size       = 0;
1936
1937         /* Register the os mca handler with SAL */
1938         if ((rc = ia64_sal_set_vectors(SAL_VECTOR_OS_MCA,
1939                                        ia64_mc_info.imi_mca_handler,
1940                                        ia64_tpa(mca_hldlr_ptr->gp),
1941                                        ia64_mc_info.imi_mca_handler_size,
1942                                        0, 0, 0)))
1943         {
1944                 printk(KERN_ERR "Failed to register OS MCA handler with SAL "
1945                        "(status %ld)\n", rc);
1946                 return;
1947         }
1948
1949         IA64_MCA_DEBUG("%s: registered OS MCA handler with SAL at 0x%lx, gp = 0x%lx\n", __func__,
1950                        ia64_mc_info.imi_mca_handler, ia64_tpa(mca_hldlr_ptr->gp));
1951
1952         /*
1953          * XXX - disable SAL checksum by setting size to 0, should be
1954          * size of the actual init handler in mca_asm.S.
1955          */
1956         ia64_mc_info.imi_monarch_init_handler           = ia64_tpa(init_hldlr_ptr_monarch->fp);
1957         ia64_mc_info.imi_monarch_init_handler_size      = 0;
1958         ia64_mc_info.imi_slave_init_handler             = ia64_tpa(init_hldlr_ptr_slave->fp);
1959         ia64_mc_info.imi_slave_init_handler_size        = 0;
1960
1961         IA64_MCA_DEBUG("%s: OS INIT handler at %lx\n", __func__,
1962                        ia64_mc_info.imi_monarch_init_handler);
1963
1964         /* Register the os init handler with SAL */
1965         if ((rc = ia64_sal_set_vectors(SAL_VECTOR_OS_INIT,
1966                                        ia64_mc_info.imi_monarch_init_handler,
1967                                        ia64_tpa(ia64_getreg(_IA64_REG_GP)),
1968                                        ia64_mc_info.imi_monarch_init_handler_size,
1969                                        ia64_mc_info.imi_slave_init_handler,
1970                                        ia64_tpa(ia64_getreg(_IA64_REG_GP)),
1971                                        ia64_mc_info.imi_slave_init_handler_size)))
1972         {
1973                 printk(KERN_ERR "Failed to register m/s INIT handlers with SAL "
1974                        "(status %ld)\n", rc);
1975                 return;
1976         }
1977         if (register_die_notifier(&default_init_monarch_nb)) {
1978                 printk(KERN_ERR "Failed to register default monarch INIT process\n");
1979                 return;
1980         }
1981
1982         IA64_MCA_DEBUG("%s: registered OS INIT handler with SAL\n", __func__);
1983
1984         /*
1985          *  Configure the CMCI/P vector and handler. Interrupts for CMC are
1986          *  per-processor, so AP CMC interrupts are setup in smp_callin() (smpboot.c).
1987          */
1988         register_percpu_irq(IA64_CMC_VECTOR, &cmci_irqaction);
1989         register_percpu_irq(IA64_CMCP_VECTOR, &cmcp_irqaction);
1990         ia64_mca_cmc_vector_setup();       /* Setup vector on BSP */
1991
1992         /* Setup the MCA rendezvous interrupt vector */
1993         register_percpu_irq(IA64_MCA_RENDEZ_VECTOR, &mca_rdzv_irqaction);
1994
1995         /* Setup the MCA wakeup interrupt vector */
1996         register_percpu_irq(IA64_MCA_WAKEUP_VECTOR, &mca_wkup_irqaction);
1997
1998 #ifdef CONFIG_ACPI
1999         /* Setup the CPEI/P handler */
2000         register_percpu_irq(IA64_CPEP_VECTOR, &mca_cpep_irqaction);
2001 #endif
2002
2003         /* Initialize the areas set aside by the OS to buffer the
2004          * platform/processor error states for MCA/INIT/CMC
2005          * handling.
2006          */
2007         ia64_log_init(SAL_INFO_TYPE_MCA);
2008         ia64_log_init(SAL_INFO_TYPE_INIT);
2009         ia64_log_init(SAL_INFO_TYPE_CMC);
2010         ia64_log_init(SAL_INFO_TYPE_CPE);
2011
2012         mca_init = 1;
2013         printk(KERN_INFO "MCA related initialization done\n");
2014 }
2015
2016 /*
2017  * ia64_mca_late_init
2018  *
2019  *      Opportunity to setup things that require initialization later
2020  *      than ia64_mca_init.  Setup a timer to poll for CPEs if the
2021  *      platform doesn't support an interrupt driven mechanism.
2022  *
2023  *  Inputs  :   None
2024  *  Outputs :   Status
2025  */
2026 static int __init
2027 ia64_mca_late_init(void)
2028 {
2029         if (!mca_init)
2030                 return 0;
2031
2032         register_hotcpu_notifier(&mca_cpu_notifier);
2033
2034         /* Setup the CMCI/P vector and handler */
2035         init_timer(&cmc_poll_timer);
2036         cmc_poll_timer.function = ia64_mca_cmc_poll;
2037
2038         /* Unmask/enable the vector */
2039         cmc_polling_enabled = 0;
2040         schedule_work(&cmc_enable_work);
2041
2042         IA64_MCA_DEBUG("%s: CMCI/P setup and enabled.\n", __func__);
2043
2044 #ifdef CONFIG_ACPI
2045         /* Setup the CPEI/P vector and handler */
2046         cpe_vector = acpi_request_vector(ACPI_INTERRUPT_CPEI);
2047         init_timer(&cpe_poll_timer);
2048         cpe_poll_timer.function = ia64_mca_cpe_poll;
2049
2050         {
2051                 irq_desc_t *desc;
2052                 unsigned int irq;
2053
2054                 if (cpe_vector >= 0) {
2055                         /* If platform supports CPEI, enable the irq. */
2056                         irq = local_vector_to_irq(cpe_vector);
2057                         if (irq > 0) {
2058                                 cpe_poll_enabled = 0;
2059                                 desc = irq_desc + irq;
2060                                 desc->status |= IRQ_PER_CPU;
2061                                 setup_irq(irq, &mca_cpe_irqaction);
2062                                 ia64_cpe_irq = irq;
2063                                 ia64_mca_register_cpev(cpe_vector);
2064                                 IA64_MCA_DEBUG("%s: CPEI/P setup and enabled.\n",
2065                                         __func__);
2066                                 return 0;
2067                         }
2068                         printk(KERN_ERR "%s: Failed to find irq for CPE "
2069                                         "interrupt handler, vector %d\n",
2070                                         __func__, cpe_vector);
2071                 }
2072                 /* If platform doesn't support CPEI, get the timer going. */
2073                 if (cpe_poll_enabled) {
2074                         ia64_mca_cpe_poll(0UL);
2075                         IA64_MCA_DEBUG("%s: CPEP setup and enabled.\n", __func__);
2076                 }
2077         }
2078 #endif
2079
2080         return 0;
2081 }
2082
2083 device_initcall(ia64_mca_late_init);