git.oblomov.eu Git - linux-2.6/blob - drivers/ide/pci/cmd640.c

   1 /*
   2  *  Copyright (C) 1995-1996  Linus Torvalds & authors (see below)
   3  */
   4
   5 /*
   6  *  Original authors:   abramov@cecmow.enet.dec.com (Igor Abramov)
   7  *                      mlord@pobox.com (Mark Lord)
   8  *
   9  *  See linux/MAINTAINERS for address of current maintainer.
  10  *
  11  *  This file provides support for the advanced features and bugs
  12  *  of IDE interfaces using the CMD Technologies 0640 IDE interface chip.
  13  *
  14  *  These chips are basically fucked by design, and getting this driver
  15  *  to work on every motherboard design that uses this screwed chip seems
  16  *  bloody well impossible.  However, we're still trying.
  17  *
  18  *  Version 0.97 worked for everybody.
  19  *
  20  *  User feedback is essential.  Many thanks to the beta test team:
  21  *
  22  *  A.Hartgers@stud.tue.nl, JZDQC@CUNYVM.CUNY.edu, abramov@cecmow.enet.dec.com,
  23  *  bardj@utopia.ppp.sn.no, bart@gaga.tue.nl, bbol001@cs.auckland.ac.nz,
  24  *  chrisc@dbass.demon.co.uk, dalecki@namu26.Num.Math.Uni-Goettingen.de,
  25  *  derekn@vw.ece.cmu.edu, florian@btp2x3.phy.uni-bayreuth.de,
  26  *  flynn@dei.unipd.it, gadio@netvision.net.il, godzilla@futuris.net,
  27  *  j@pobox.com, jkemp1@mises.uni-paderborn.de, jtoppe@hiwaay.net,
  28  *  kerouac@ssnet.com, meskes@informatik.rwth-aachen.de, hzoli@cs.elte.hu,
  29  *  peter@udgaard.isgtec.com, phil@tazenda.demon.co.uk, roadcapw@cfw.com,
  30  *  s0033las@sun10.vsz.bme.hu, schaffer@tam.cornell.edu, sjd@slip.net,
  31  *  steve@ei.org, ulrpeg@bigcomm.gun.de, ism@tardis.ed.ac.uk, mack@cray.com
  32  *  liug@mama.indstate.edu, and others.
  33  *
  34  *  Version 0.01        Initial version, hacked out of ide.c,
  35  *                      and #include'd rather than compiled separately.
  36  *                      This will get cleaned up in a subsequent release.
  37  *
  38  *  Version 0.02        Fixes for vlb initialization code, enable prefetch
  39  *                      for versions 'B' and 'C' of chip by default,
  40  *                      some code cleanup.
  41  *
  42  *  Version 0.03        Added reset of secondary interface,
  43  *                      and black list for devices which are not compatible
  44  *                      with prefetch mode. Separate function for setting
  45  *                      prefetch is added, possibly it will be called some
  46  *                      day from ioctl processing code.
  47  *
  48  *  Version 0.04        Now configs/compiles separate from ide.c
  49  *
  50  *  Version 0.05        Major rewrite of interface timing code.
  51  *                      Added new function cmd640_set_mode to set PIO mode
  52  *                      from ioctl call. New drives added to black list.
  53  *
  54  *  Version 0.06        More code cleanup. Prefetch is enabled only for
  55  *                      detected hard drives, not included in prefetch
  56  *                      black list.
  57  *
  58  *  Version 0.07        Changed to more conservative drive tuning policy.
  59  *                      Unknown drives, which report PIO < 4 are set to
  60  *                      (reported_PIO - 1) if it is supported, or to PIO0.
  61  *                      List of known drives extended by info provided by
  62  *                      CMD at their ftp site.
  63  *
  64  *  Version 0.08        Added autotune/noautotune support.
  65  *
  66  *  Version 0.09        Try to be smarter about 2nd port enabling.
  67  *  Version 0.10        Be nice and don't reset 2nd port.
  68  *  Version 0.11        Try to handle more weird situations.
  69  *
  70  *  Version 0.12        Lots of bug fixes from Laszlo Peter
  71  *                      irq unmasking disabled for reliability.
  72  *                      try to be even smarter about the second port.
  73  *                      tidy up source code formatting.
  74  *  Version 0.13        permit irq unmasking again.
  75  *  Version 0.90        massive code cleanup, some bugs fixed.
  76  *                      defaults all drives to PIO mode0, prefetch off.
  77  *                      autotune is OFF by default, with compile time flag.
  78  *                      prefetch can be turned OFF/ON using "hdparm -p8/-p9"
  79  *                       (requires hdparm-3.1 or newer)
  80  *  Version 0.91        first release to linux-kernel list.
  81  *  Version 0.92        move initial reg dump to separate callable function
  82  *                      change "readahead" to "prefetch" to avoid confusion
  83  *  Version 0.95        respect original BIOS timings unless autotuning.
  84  *                      tons of code cleanup and rearrangement.
  85  *                      added CONFIG_BLK_DEV_CMD640_ENHANCED option
  86  *                      prevent use of unmask when prefetch is on
  87  *  Version 0.96        prevent use of io_32bit when prefetch is off
  88  *  Version 0.97        fix VLB secondary interface for sjd@slip.net
  89  *                      other minor tune-ups:  0.96 was very good.
  90  *  Version 0.98        ignore PCI version when disabled by BIOS
  91  *  Version 0.99        display setup/active/recovery clocks with PIO mode
  92  *  Version 1.00        Mmm.. cannot depend on PCMD_ENA in all systems
  93  *  Version 1.01        slow/fast devsel can be selected with "hdparm -p6/-p7"
  94  *                       ("fast" is necessary for 32bit I/O in some systems)
  95  *  Version 1.02        fix bug that resulted in slow "setup times"
  96  *                       (patch courtesy of Zoltan Hidvegi)
  97  */
  98
  99 #define CMD640_PREFETCH_MASKS 1
 100
 101 /*#define CMD640_DUMP_REGS */
 102
 103 #include <linux/types.h>
 104 #include <linux/kernel.h>
 105 #include <linux/delay.h>
 106 #include <linux/hdreg.h>
 107 #include <linux/ide.h>
 108 #include <linux/init.h>
 109
 110 #include <asm/io.h>
 111
 112 /*
 113  * This flag is set in ide.c by the parameter:  ide0=cmd640_vlb
 114  */
 115 int cmd640_vlb;
 116
 117 /*
 118  * CMD640 specific registers definition.
 119  */
 120
 121 #define VID             0x00
 122 #define DID             0x02
 123 #define PCMD            0x04
 124 #define   PCMD_ENA      0x01
 125 #define PSTTS           0x06
 126 #define REVID           0x08
 127 #define PROGIF          0x09
 128 #define SUBCL           0x0a
 129 #define BASCL           0x0b
 130 #define BaseA0          0x10
 131 #define BaseA1          0x14
 132 #define BaseA2          0x18
 133 #define BaseA3          0x1c
 134 #define INTLINE         0x3c
 135 #define INPINE          0x3d
 136
 137 #define CFR             0x50
 138 #define   CFR_DEVREV            0x03
 139 #define   CFR_IDE01INTR         0x04
 140 #define   CFR_DEVID             0x18
 141 #define   CFR_AT_VESA_078h      0x20
 142 #define   CFR_DSA1              0x40
 143 #define   CFR_DSA0              0x80
 144
 145 #define CNTRL           0x51
 146 #define   CNTRL_DIS_RA0         0x40
 147 #define   CNTRL_DIS_RA1         0x80
 148 #define   CNTRL_ENA_2ND         0x08
 149
 150 #define CMDTIM          0x52
 151 #define ARTTIM0         0x53
 152 #define DRWTIM0         0x54
 153 #define ARTTIM1         0x55
 154 #define DRWTIM1         0x56
 155 #define ARTTIM23        0x57
 156 #define   ARTTIM23_DIS_RA2      0x04
 157 #define   ARTTIM23_DIS_RA3      0x08
 158 #define DRWTIM23        0x58
 159 #define BRST            0x59
 160
 161 /*
 162  * Registers and masks for easy access by drive index:
 163  */
 164 static u8 prefetch_regs[4]  = {CNTRL, CNTRL, ARTTIM23, ARTTIM23};
 165 static u8 prefetch_masks[4] = {CNTRL_DIS_RA0, CNTRL_DIS_RA1, ARTTIM23_DIS_RA2, ARTTIM23_DIS_RA3};
 166
 167 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
 168
 169 static u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23};
 170 static u8 drwtim_regs[4] = {DRWTIM0, DRWTIM1, DRWTIM23, DRWTIM23};
 171
 172 /*
 173  * Current cmd640 timing values for each drive.
 174  * The defaults for each are the slowest possible timings.
 175  */
 176 static u8 setup_counts[4]    = {4, 4, 4, 4};     /* Address setup count (in clocks) */
 177 static u8 active_counts[4]   = {16, 16, 16, 16}; /* Active count   (encoded) */
 178 static u8 recovery_counts[4] = {16, 16, 16, 16}; /* Recovery count (encoded) */
 179
 180 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
 181
 182 static DEFINE_SPINLOCK(cmd640_lock);
 183
 184 /*
 185  * These are initialized to point at the devices we control
 186  */
 187 static ide_hwif_t  *cmd_hwif0, *cmd_hwif1;
 188
 189 /*
 190  * Interface to access cmd640x registers
 191  */
 192 static unsigned int cmd640_key;
 193 static void (*__put_cmd640_reg)(u16 reg, u8 val);
 194 static u8 (*__get_cmd640_reg)(u16 reg);
 195
 196 /*
 197  * This is read from the CFR reg, and is used in several places.
 198  */
 199 static unsigned int cmd640_chip_version;
 200
 201 /*
 202  * The CMD640x chip does not support DWORD config write cycles, but some
 203  * of the BIOSes use them to implement the config services.
 204  * Therefore, we must use direct IO instead.
 205  */
 206
 207 /* PCI method 1 access */
 208
 209 static void put_cmd640_reg_pci1(u16 reg, u8 val)
 210 {
 211         outl_p((reg & 0xfc) | cmd640_key, 0xcf8);
 212         outb_p(val, (reg & 3) | 0xcfc);
 213 }
 214
 215 static u8 get_cmd640_reg_pci1(u16 reg)
 216 {
 217         outl_p((reg & 0xfc) | cmd640_key, 0xcf8);
 218         return inb_p((reg & 3) | 0xcfc);
 219 }
 220
 221 /* PCI method 2 access (from CMD datasheet) */
 222
 223 static void put_cmd640_reg_pci2(u16 reg, u8 val)
 224 {
 225         outb_p(0x10, 0xcf8);
 226         outb_p(val, cmd640_key + reg);
 227         outb_p(0, 0xcf8);
 228 }
 229
 230 static u8 get_cmd640_reg_pci2(u16 reg)
 231 {
 232         u8 b;
 233
 234         outb_p(0x10, 0xcf8);
 235         b = inb_p(cmd640_key + reg);
 236         outb_p(0, 0xcf8);
 237         return b;
 238 }
 239
 240 /* VLB access */
 241
 242 static void put_cmd640_reg_vlb(u16 reg, u8 val)
 243 {
 244         outb_p(reg, cmd640_key);
 245         outb_p(val, cmd640_key + 4);
 246 }
 247
 248 static u8 get_cmd640_reg_vlb(u16 reg)
 249 {
 250         outb_p(reg, cmd640_key);
 251         return inb_p(cmd640_key + 4);
 252 }
 253
 254 static u8 get_cmd640_reg(u16 reg)
 255 {
 256         unsigned long flags;
 257         u8 b;
 258
 259         spin_lock_irqsave(&cmd640_lock, flags);
 260         b = __get_cmd640_reg(reg);
 261         spin_unlock_irqrestore(&cmd640_lock, flags);
 262         return b;
 263 }
 264
 265 static void put_cmd640_reg(u16 reg, u8 val)
 266 {
 267         unsigned long flags;
 268
 269         spin_lock_irqsave(&cmd640_lock, flags);
 270         __put_cmd640_reg(reg, val);
 271         spin_unlock_irqrestore(&cmd640_lock, flags);
 272 }
 273
 274 static int __init match_pci_cmd640_device(void)
 275 {
 276         const u8 ven_dev[4] = {0x95, 0x10, 0x40, 0x06};
 277         unsigned int i;
 278         for (i = 0; i < 4; i++) {
 279                 if (get_cmd640_reg(i) != ven_dev[i])
 280                         return 0;
 281         }
 282 #ifdef STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT
 283         if ((get_cmd640_reg(PCMD) & PCMD_ENA) == 0) {
 284                 printk("ide: cmd640 on PCI disabled by BIOS\n");
 285                 return 0;
 286         }
 287 #endif /* STUPIDLY_TRUST_BROKEN_PCMD_ENA_BIT */
 288         return 1; /* success */
 289 }
 290
 291 /*
 292  * Probe for CMD640x -- pci method 1
 293  */
 294 static int __init probe_for_cmd640_pci1(void)
 295 {
 296         __get_cmd640_reg = get_cmd640_reg_pci1;
 297         __put_cmd640_reg = put_cmd640_reg_pci1;
 298         for (cmd640_key = 0x80000000;
 299              cmd640_key <= 0x8000f800;
 300              cmd640_key += 0x800) {
 301                 if (match_pci_cmd640_device())
 302                         return 1; /* success */
 303         }
 304         return 0;
 305 }
 306
 307 /*
 308  * Probe for CMD640x -- pci method 2
 309  */
 310 static int __init probe_for_cmd640_pci2(void)
 311 {
 312         __get_cmd640_reg = get_cmd640_reg_pci2;
 313         __put_cmd640_reg = put_cmd640_reg_pci2;
 314         for (cmd640_key = 0xc000; cmd640_key <= 0xcf00; cmd640_key += 0x100) {
 315                 if (match_pci_cmd640_device())
 316                         return 1; /* success */
 317         }
 318         return 0;
 319 }
 320
 321 /*
 322  * Probe for CMD640x -- vlb
 323  */
 324 static int __init probe_for_cmd640_vlb(void)
 325 {
 326         u8 b;
 327
 328         __get_cmd640_reg = get_cmd640_reg_vlb;
 329         __put_cmd640_reg = put_cmd640_reg_vlb;
 330         cmd640_key = 0x178;
 331         b = get_cmd640_reg(CFR);
 332         if (b == 0xff || b == 0x00 || (b & CFR_AT_VESA_078h)) {
 333                 cmd640_key = 0x78;
 334                 b = get_cmd640_reg(CFR);
 335                 if (b == 0xff || b == 0x00 || !(b & CFR_AT_VESA_078h))
 336                         return 0;
 337         }
 338         return 1; /* success */
 339 }
 340
 341 /*
 342  *  Returns 1 if an IDE interface/drive exists at 0x170,
 343  *  Returns 0 otherwise.
 344  */
 345 static int __init secondary_port_responding(void)
 346 {
 347         unsigned long flags;
 348
 349         spin_lock_irqsave(&cmd640_lock, flags);
 350
 351         outb_p(0x0a, 0x170 + IDE_SELECT_OFFSET);        /* select drive0 */
 352         udelay(100);
 353         if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x0a) {
 354                 outb_p(0x1a, 0x170 + IDE_SELECT_OFFSET); /* select drive1 */
 355                 udelay(100);
 356                 if ((inb_p(0x170 + IDE_SELECT_OFFSET) & 0x1f) != 0x1a) {
 357                         spin_unlock_irqrestore(&cmd640_lock, flags);
 358                         return 0; /* nothing responded */
 359                 }
 360         }
 361         spin_unlock_irqrestore(&cmd640_lock, flags);
 362         return 1; /* success */
 363 }
 364
 365 #ifdef CMD640_DUMP_REGS
 366 /*
 367  * Dump out all cmd640 registers.  May be called from ide.c
 368  */
 369 static void cmd640_dump_regs(void)
 370 {
 371         unsigned int reg = cmd640_vlb ? 0x50 : 0x00;
 372
 373         /* Dump current state of chip registers */
 374         printk("ide: cmd640 internal register dump:");
 375         for (; reg <= 0x59; reg++) {
 376                 if (!(reg & 0x0f))
 377                         printk("\n%04x:", reg);
 378                 printk(" %02x", get_cmd640_reg(reg));
 379         }
 380         printk("\n");
 381 }
 382 #endif
 383
 384 /*
 385  * Check whether prefetch is on for a drive,
 386  * and initialize the unmask flags for safe operation.
 387  */
 388 static void __init check_prefetch(ide_drive_t *drive, unsigned int index)
 389 {
 390         u8 b = get_cmd640_reg(prefetch_regs[index]);
 391
 392         if (b & prefetch_masks[index]) {        /* is prefetch off? */
 393                 drive->no_unmask = 0;
 394                 drive->no_io_32bit = 1;
 395                 drive->io_32bit = 0;
 396         } else {
 397 #if CMD640_PREFETCH_MASKS
 398                 drive->no_unmask = 1;
 399                 drive->unmask = 0;
 400 #endif
 401                 drive->no_io_32bit = 0;
 402         }
 403 }
 404
 405 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
 406
 407 /*
 408  * Sets prefetch mode for a drive.
 409  */
 410 static void set_prefetch_mode(ide_drive_t *drive, unsigned int index, int mode)
 411 {
 412         unsigned long flags;
 413         int reg = prefetch_regs[index];
 414         u8 b;
 415
 416         spin_lock_irqsave(&cmd640_lock, flags);
 417         b = __get_cmd640_reg(reg);
 418         if (mode) {     /* want prefetch on? */
 419 #if CMD640_PREFETCH_MASKS
 420                 drive->no_unmask = 1;
 421                 drive->unmask = 0;
 422 #endif
 423                 drive->no_io_32bit = 0;
 424                 b &= ~prefetch_masks[index];    /* enable prefetch */
 425         } else {
 426                 drive->no_unmask = 0;
 427                 drive->no_io_32bit = 1;
 428                 drive->io_32bit = 0;
 429                 b |= prefetch_masks[index];     /* disable prefetch */
 430         }
 431         __put_cmd640_reg(reg, b);
 432         spin_unlock_irqrestore(&cmd640_lock, flags);
 433 }
 434
 435 /*
 436  * Dump out current drive clocks settings
 437  */
 438 static void display_clocks(unsigned int index)
 439 {
 440         u8 active_count, recovery_count;
 441
 442         active_count = active_counts[index];
 443         if (active_count == 1)
 444                 ++active_count;
 445         recovery_count = recovery_counts[index];
 446         if (active_count > 3 && recovery_count == 1)
 447                 ++recovery_count;
 448         if (cmd640_chip_version > 1)
 449                 recovery_count += 1;  /* cmd640b uses (count + 1)*/
 450         printk(", clocks=%d/%d/%d\n", setup_counts[index], active_count, recovery_count);
 451 }
 452
 453 /*
 454  * Pack active and recovery counts into single byte representation
 455  * used by controller
 456  */
 457 static inline u8 pack_nibbles(u8 upper, u8 lower)
 458 {
 459         return ((upper & 0x0f) << 4) | (lower & 0x0f);
 460 }
 461
 462 /*
 463  * This routine retrieves the initial drive timings from the chipset.
 464  */
 465 static void __init retrieve_drive_counts(unsigned int index)
 466 {
 467         u8 b;
 468
 469         /*
 470          * Get the internal setup timing, and convert to clock count
 471          */
 472         b = get_cmd640_reg(arttim_regs[index]) & ~0x3f;
 473         switch (b) {
 474         case 0x00: b = 4; break;
 475         case 0x80: b = 3; break;
 476         case 0x40: b = 2; break;
 477         default:   b = 5; break;
 478         }
 479         setup_counts[index] = b;
 480
 481         /*
 482          * Get the active/recovery counts
 483          */
 484         b = get_cmd640_reg(drwtim_regs[index]);
 485         active_counts[index]   = (b >> 4)   ? (b >> 4)   : 0x10;
 486         recovery_counts[index] = (b & 0x0f) ? (b & 0x0f) : 0x10;
 487 }
 488
 489
 490 /*
 491  * This routine writes the prepared setup/active/recovery counts
 492  * for a drive into the cmd640 chipset registers to active them.
 493  */
 494 static void program_drive_counts(ide_drive_t *drive, unsigned int index)
 495 {
 496         unsigned long flags;
 497         u8 setup_count    = setup_counts[index];
 498         u8 active_count   = active_counts[index];
 499         u8 recovery_count = recovery_counts[index];
 500
 501         /*
 502          * Set up address setup count and drive read/write timing registers.
 503          * Primary interface has individual count/timing registers for
 504          * each drive.  Secondary interface has one common set of registers,
 505          * so we merge the timings, using the slowest value for each timing.
 506          */
 507         if (index > 1) {
 508                 ide_hwif_t *hwif = drive->hwif;
 509                 ide_drive_t *peer = &hwif->drives[!drive->select.b.unit];
 510                 unsigned int mate = index ^ 1;
 511
 512                 if (peer->present) {
 513                         if (setup_count < setup_counts[mate])
 514                                 setup_count = setup_counts[mate];
 515                         if (active_count < active_counts[mate])
 516                                 active_count = active_counts[mate];
 517                         if (recovery_count < recovery_counts[mate])
 518                                 recovery_count = recovery_counts[mate];
 519                 }
 520         }
 521
 522         /*
 523          * Convert setup_count to internal chipset representation
 524          */
 525         switch (setup_count) {
 526         case 4:  setup_count = 0x00; break;
 527         case 3:  setup_count = 0x80; break;
 528         case 1:
 529         case 2:  setup_count = 0x40; break;
 530         default: setup_count = 0xc0; /* case 5 */
 531         }
 532
 533         /*
 534          * Now that everything is ready, program the new timings
 535          */
 536         spin_lock_irqsave(&cmd640_lock, flags);
 537         /*
 538          * Program the address_setup clocks into ARTTIM reg,
 539          * and then the active/recovery counts into the DRWTIM reg
 540          * (this converts counts of 16 into counts of zero -- okay).
 541          */
 542         setup_count |= __get_cmd640_reg(arttim_regs[index]) & 0x3f;
 543         __put_cmd640_reg(arttim_regs[index], setup_count);
 544         __put_cmd640_reg(drwtim_regs[index], pack_nibbles(active_count, recovery_count));
 545         spin_unlock_irqrestore(&cmd640_lock, flags);
 546 }
 547
 548 /*
 549  * Set a specific pio_mode for a drive
 550  */
 551 static void cmd640_set_mode(ide_drive_t *drive, unsigned int index,
 552                             u8 pio_mode, unsigned int cycle_time)
 553 {
 554         int setup_time, active_time, recovery_time, clock_time;
 555         u8 setup_count, active_count, recovery_count, recovery_count2, cycle_count;
 556         int bus_speed = system_bus_clock();
 557
 558         if (pio_mode > 5)
 559                 pio_mode = 5;
 560         setup_time  = ide_pio_timings[pio_mode].setup_time;
 561         active_time = ide_pio_timings[pio_mode].active_time;
 562         recovery_time = cycle_time - (setup_time + active_time);
 563         clock_time = 1000 / bus_speed;
 564         cycle_count = DIV_ROUND_UP(cycle_time, clock_time);
 565
 566         setup_count = DIV_ROUND_UP(setup_time, clock_time);
 567
 568         active_count = DIV_ROUND_UP(active_time, clock_time);
 569         if (active_count < 2)
 570                 active_count = 2; /* minimum allowed by cmd640 */
 571
 572         recovery_count = DIV_ROUND_UP(recovery_time, clock_time);
 573         recovery_count2 = cycle_count - (setup_count + active_count);
 574         if (recovery_count2 > recovery_count)
 575                 recovery_count = recovery_count2;
 576         if (recovery_count < 2)
 577                 recovery_count = 2; /* minimum allowed by cmd640 */
 578         if (recovery_count > 17) {
 579                 active_count += recovery_count - 17;
 580                 recovery_count = 17;
 581         }
 582         if (active_count > 16)
 583                 active_count = 16; /* maximum allowed by cmd640 */
 584         if (cmd640_chip_version > 1)
 585                 recovery_count -= 1;  /* cmd640b uses (count + 1)*/
 586         if (recovery_count > 16)
 587                 recovery_count = 16; /* maximum allowed by cmd640 */
 588
 589         setup_counts[index]    = setup_count;
 590         active_counts[index]   = active_count;
 591         recovery_counts[index] = recovery_count;
 592
 593         /*
 594          * In a perfect world, we might set the drive pio mode here
 595          * (using WIN_SETFEATURE) before continuing.
 596          *
 597          * But we do not, because:
 598          *      1) this is the wrong place to do it (proper is do_special() in ide.c)
 599          *      2) in practice this is rarely, if ever, necessary
 600          */
 601         program_drive_counts(drive, index);
 602 }
 603
 604 static void cmd640_set_pio_mode(ide_drive_t *drive, const u8 pio)
 605 {
 606         unsigned int index = 0, cycle_time;
 607         u8 b;
 608
 609         switch (pio) {
 610         case 6: /* set fast-devsel off */
 611         case 7: /* set fast-devsel on */
 612                 b = get_cmd640_reg(CNTRL) & ~0x27;
 613                 if (pio & 1)
 614                         b |= 0x27;
 615                 put_cmd640_reg(CNTRL, b);
 616                 printk("%s: %sabled cmd640 fast host timing (devsel)\n",
 617                         drive->name, (pio & 1) ? "en" : "dis");
 618                 return;
 619         case 8: /* set prefetch off */
 620         case 9: /* set prefetch on */
 621                 set_prefetch_mode(drive, index, pio & 1);
 622                 printk("%s: %sabled cmd640 prefetch\n",
 623                         drive->name, (pio & 1) ? "en" : "dis");
 624                 return;
 625         }
 626
 627         cycle_time = ide_pio_cycle_time(drive, pio);
 628         cmd640_set_mode(drive, index, pio, cycle_time);
 629
 630         printk("%s: selected cmd640 PIO mode%d (%dns)",
 631                 drive->name, pio, cycle_time);
 632
 633         display_clocks(index);
 634 }
 635
 636 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
 637
 638 static int pci_conf1(void)
 639 {
 640         unsigned long flags;
 641         u32 tmp;
 642
 643         spin_lock_irqsave(&cmd640_lock, flags);
 644         outb(0x01, 0xCFB);
 645         tmp = inl(0xCF8);
 646         outl(0x80000000, 0xCF8);
 647         if (inl(0xCF8) == 0x80000000) {
 648                 outl(tmp, 0xCF8);
 649                 spin_unlock_irqrestore(&cmd640_lock, flags);
 650                 return 1;
 651         }
 652         outl(tmp, 0xCF8);
 653         spin_unlock_irqrestore(&cmd640_lock, flags);
 654         return 0;
 655 }
 656
 657 static int pci_conf2(void)
 658 {
 659         unsigned long flags;
 660
 661         spin_lock_irqsave(&cmd640_lock, flags);
 662         outb(0x00, 0xCFB);
 663         outb(0x00, 0xCF8);
 664         outb(0x00, 0xCFA);
 665         if (inb(0xCF8) == 0x00 && inb(0xCF8) == 0x00) {
 666                 spin_unlock_irqrestore(&cmd640_lock, flags);
 667                 return 1;
 668         }
 669         spin_unlock_irqrestore(&cmd640_lock, flags);
 670         return 0;
 671 }
 672
 673 static const struct ide_port_info cmd640_port_info __initdata = {
 674         .chipset                = ide_cmd640,
 675         .host_flags             = IDE_HFLAG_SERIALIZE |
 676                                   IDE_HFLAG_NO_DMA |
 677                                   IDE_HFLAG_NO_AUTOTUNE |
 678                                   IDE_HFLAG_ABUSE_PREFETCH |
 679                                   IDE_HFLAG_ABUSE_FAST_DEVSEL,
 680 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
 681         .pio_mask               = ATA_PIO5,
 682 #endif
 683 };
 684
 685 /*
 686  * Probe for a cmd640 chipset, and initialize it if found.
 687  */
 688 static int __init cmd640x_init(void)
 689 {
 690 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
 691         int second_port_toggled = 0;
 692 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
 693         int second_port_cmd640 = 0;
 694         const char *bus_type, *port2;
 695         unsigned int index;
 696         u8 b, cfr;
 697         u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
 698         hw_regs_t hw[2];
 699
 700         if (cmd640_vlb && probe_for_cmd640_vlb()) {
 701                 bus_type = "VLB";
 702         } else {
 703                 cmd640_vlb = 0;
 704                 /* Find out what kind of PCI probing is supported otherwise
 705                    Justin Gibbs will sulk.. */
 706                 if (pci_conf1() && probe_for_cmd640_pci1())
 707                         bus_type = "PCI (type1)";
 708                 else if (pci_conf2() && probe_for_cmd640_pci2())
 709                         bus_type = "PCI (type2)";
 710                 else
 711                         return 0;
 712         }
 713         /*
 714          * Undocumented magic (there is no 0x5b reg in specs)
 715          */
 716         put_cmd640_reg(0x5b, 0xbd);
 717         if (get_cmd640_reg(0x5b) != 0xbd) {
 718                 printk(KERN_ERR "ide: cmd640 init failed: wrong value in reg 0x5b\n");
 719                 return 0;
 720         }
 721         put_cmd640_reg(0x5b, 0);
 722
 723 #ifdef CMD640_DUMP_REGS
 724         cmd640_dump_regs();
 725 #endif
 726
 727         /*
 728          * Documented magic begins here
 729          */
 730         cfr = get_cmd640_reg(CFR);
 731         cmd640_chip_version = cfr & CFR_DEVREV;
 732         if (cmd640_chip_version == 0) {
 733                 printk("ide: bad cmd640 revision: %d\n", cmd640_chip_version);
 734                 return 0;
 735         }
 736
 737         memset(&hw, 0, sizeof(hw));
 738
 739         ide_std_init_ports(&hw[0], 0x1f0, 0x3f6);
 740         hw[0].irq = 14;
 741
 742         ide_std_init_ports(&hw[1], 0x170, 0x376);
 743         hw[1].irq = 15;
 744
 745         printk(KERN_INFO "cmd640: buggy cmd640%c interface on %s, config=0x%02x"
 746                          "\n", 'a' + cmd640_chip_version - 1, bus_type, cfr);
 747
 748         cmd_hwif0 = ide_find_port();
 749
 750         /*
 751          * Initialize data for primary port
 752          */
 753         if (cmd_hwif0) {
 754                 ide_init_port_hw(cmd_hwif0, &hw[0]);
 755 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
 756                 cmd_hwif0->set_pio_mode = &cmd640_set_pio_mode;
 757 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
 758
 759                 idx[0] = cmd_hwif0->index;
 760         }
 761
 762         /*
 763          * Ensure compatibility by always using the slowest timings
 764          * for access to the drive's command register block,
 765          * and reset the prefetch burstsize to default (512 bytes).
 766          *
 767          * Maybe we need a way to NOT do these on *some* systems?
 768          */
 769         put_cmd640_reg(CMDTIM, 0);
 770         put_cmd640_reg(BRST, 0x40);
 771
 772         cmd_hwif1 = ide_find_port();
 773
 774         /*
 775          * Try to enable the secondary interface, if not already enabled
 776          */
 777         if (cmd_hwif1 &&
 778             cmd_hwif1->drives[0].noprobe && cmd_hwif1->drives[1].noprobe) {
 779                 port2 = "not probed";
 780         } else {
 781                 b = get_cmd640_reg(CNTRL);
 782                 if (secondary_port_responding()) {
 783                         if ((b & CNTRL_ENA_2ND)) {
 784                                 second_port_cmd640 = 1;
 785                                 port2 = "okay";
 786                         } else if (cmd640_vlb) {
 787                                 second_port_cmd640 = 1;
 788                                 port2 = "alive";
 789                         } else
 790                                 port2 = "not cmd640";
 791                 } else {
 792                         put_cmd640_reg(CNTRL, b ^ CNTRL_ENA_2ND); /* toggle the bit */
 793                         if (secondary_port_responding()) {
 794                                 second_port_cmd640 = 1;
 795 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
 796                                 second_port_toggled = 1;
 797 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
 798                                 port2 = "enabled";
 799                         } else {
 800                                 put_cmd640_reg(CNTRL, b); /* restore original setting */
 801                                 port2 = "not responding";
 802                         }
 803                 }
 804         }
 805
 806         /*
 807          * Initialize data for secondary cmd640 port, if enabled
 808          */
 809         if (second_port_cmd640 && cmd_hwif1) {
 810                 ide_init_port_hw(cmd_hwif1, &hw[1]);
 811 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
 812                 cmd_hwif1->set_pio_mode = &cmd640_set_pio_mode;
 813 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
 814
 815                 idx[1] = cmd_hwif1->index;
 816         }
 817         printk(KERN_INFO "cmd640: %sserialized, secondary interface %s\n",
 818                          second_port_cmd640 ? "" : "not ", port2);
 819
 820         /*
 821          * Establish initial timings/prefetch for all drives.
 822          * Do not unnecessarily disturb any prior BIOS setup of these.
 823          */
 824         for (index = 0; index < (2 + (second_port_cmd640 << 1)); index++) {
 825                 ide_drive_t *drive;
 826
 827                 if (index > 1) {
 828                         if (cmd_hwif1 == NULL)
 829                                 continue;
 830                         drive = &cmd_hwif1->drives[index & 1];
 831                 } else  {
 832                         if (cmd_hwif0 == NULL)
 833                                 continue;
 834                         drive = &cmd_hwif0->drives[index & 1];
 835                 }
 836
 837 #ifdef CONFIG_BLK_DEV_CMD640_ENHANCED
 838                 if (drive->autotune || ((index > 1) && second_port_toggled)) {
 839                         /*
 840                          * Reset timing to the slowest speed and turn off
 841                          * prefetch.  This way, the drive identify code has
 842                          * a better chance.
 843                          */
 844                         setup_counts    [index] = 4;    /* max possible */
 845                         active_counts   [index] = 16;   /* max possible */
 846                         recovery_counts [index] = 16;   /* max possible */
 847                         program_drive_counts(drive, index);
 848                         set_prefetch_mode(drive, index, 0);
 849                         printk("cmd640: drive%d timings/prefetch cleared\n", index);
 850                 } else {
 851                         /*
 852                          * Record timings/prefetch without changing them.
 853                          * This preserves any prior BIOS setup.
 854                          */
 855                         retrieve_drive_counts (index);
 856                         check_prefetch(drive, index);
 857                         printk("cmd640: drive%d timings/prefetch(%s) preserved",
 858                                 index, drive->no_io_32bit ? "off" : "on");
 859                         display_clocks(index);
 860                 }
 861 #else
 862                 /*
 863                  * Set the drive unmask flags to match the prefetch setting
 864                  */
 865                 check_prefetch(drive, index);
 866                 printk("cmd640: drive%d timings/prefetch(%s) preserved\n",
 867                         index, drive->no_io_32bit ? "off" : "on");
 868 #endif /* CONFIG_BLK_DEV_CMD640_ENHANCED */
 869         }
 870
 871 #ifdef CMD640_DUMP_REGS
 872         cmd640_dump_regs();
 873 #endif
 874
 875         ide_device_add(idx, &cmd640_port_info);
 876
 877         return 1;
 878 }
 879
 880 module_param_named(probe_vlb, cmd640_vlb, bool, 0);
 881 MODULE_PARM_DESC(probe_vlb, "probe for VLB version of CMD640 chipset");
 882
 883 module_init(cmd640x_init);
 884
 885 MODULE_LICENSE("GPL");