Merge branch 'linus' into release
[linux-2.6] / drivers / char / agp / via-agp.c
1 /*
2  * VIA AGPGART routines.
3  */
4
5 #include <linux/types.h>
6 #include <linux/module.h>
7 #include <linux/pci.h>
8 #include <linux/init.h>
9 #include <linux/agp_backend.h>
10 #include "agp.h"
11
12 static const struct pci_device_id agp_via_pci_table[];
13
14 #define VIA_GARTCTRL    0x80
15 #define VIA_APSIZE      0x84
16 #define VIA_ATTBASE     0x88
17
18 #define VIA_AGP3_GARTCTRL       0x90
19 #define VIA_AGP3_APSIZE         0x94
20 #define VIA_AGP3_ATTBASE        0x98
21 #define VIA_AGPSEL              0xfd
22
23 static int via_fetch_size(void)
24 {
25         int i;
26         u8 temp;
27         struct aper_size_info_8 *values;
28
29         values = A_SIZE_8(agp_bridge->driver->aperture_sizes);
30         pci_read_config_byte(agp_bridge->dev, VIA_APSIZE, &temp);
31         for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
32                 if (temp == values[i].size_value) {
33                         agp_bridge->previous_size =
34                             agp_bridge->current_size = (void *) (values + i);
35                         agp_bridge->aperture_size_idx = i;
36                         return values[i].size;
37                 }
38         }
39         printk(KERN_ERR PFX "Unknown aperture size from AGP bridge (0x%x)\n", temp);
40         return 0;
41 }
42
43
44 static int via_configure(void)
45 {
46         u32 temp;
47         struct aper_size_info_8 *current_size;
48
49         current_size = A_SIZE_8(agp_bridge->current_size);
50         /* aperture size */
51         pci_write_config_byte(agp_bridge->dev, VIA_APSIZE,
52                               current_size->size_value);
53         /* address to map too */
54         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
55         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
56
57         /* GART control register */
58         pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, 0x0000000f);
59
60         /* attbase - aperture GATT base */
61         pci_write_config_dword(agp_bridge->dev, VIA_ATTBASE,
62                             (agp_bridge->gatt_bus_addr & 0xfffff000) | 3);
63         return 0;
64 }
65
66
67 static void via_cleanup(void)
68 {
69         struct aper_size_info_8 *previous_size;
70
71         previous_size = A_SIZE_8(agp_bridge->previous_size);
72         pci_write_config_byte(agp_bridge->dev, VIA_APSIZE,
73                               previous_size->size_value);
74         /* Do not disable by writing 0 to VIA_ATTBASE, it screws things up
75          * during reinitialization.
76          */
77 }
78
79
80 static void via_tlbflush(struct agp_memory *mem)
81 {
82         u32 temp;
83
84         pci_read_config_dword(agp_bridge->dev, VIA_GARTCTRL, &temp);
85         temp |= (1<<7);
86         pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, temp);
87         temp &= ~(1<<7);
88         pci_write_config_dword(agp_bridge->dev, VIA_GARTCTRL, temp);
89 }
90
91
92 static const struct aper_size_info_8 via_generic_sizes[9] =
93 {
94         {256, 65536, 6, 0},
95         {128, 32768, 5, 128},
96         {64, 16384, 4, 192},
97         {32, 8192, 3, 224},
98         {16, 4096, 2, 240},
99         {8, 2048, 1, 248},
100         {4, 1024, 0, 252},
101         {2, 512, 0, 254},
102         {1, 256, 0, 255}
103 };
104
105
106 static int via_fetch_size_agp3(void)
107 {
108         int i;
109         u16 temp;
110         struct aper_size_info_16 *values;
111
112         values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
113         pci_read_config_word(agp_bridge->dev, VIA_AGP3_APSIZE, &temp);
114         temp &= 0xfff;
115
116         for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
117                 if (temp == values[i].size_value) {
118                         agp_bridge->previous_size =
119                                 agp_bridge->current_size = (void *) (values + i);
120                         agp_bridge->aperture_size_idx = i;
121                         return values[i].size;
122                 }
123         }
124         return 0;
125 }
126
127
128 static int via_configure_agp3(void)
129 {
130         u32 temp;
131         struct aper_size_info_16 *current_size;
132
133         current_size = A_SIZE_16(agp_bridge->current_size);
134
135         /* address to map too */
136         pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
137         agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
138
139         /* attbase - aperture GATT base */
140         pci_write_config_dword(agp_bridge->dev, VIA_AGP3_ATTBASE,
141                 agp_bridge->gatt_bus_addr & 0xfffff000);
142
143         /* 1. Enable GTLB in RX90<7>, all AGP aperture access needs to fetch
144          *    translation table first.
145          * 2. Enable AGP aperture in RX91<0>. This bit controls the enabling of the
146          *    graphics AGP aperture for the AGP3.0 port.
147          */
148         pci_read_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, &temp);
149         pci_write_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, temp | (3<<7));
150         return 0;
151 }
152
153
154 static void via_cleanup_agp3(void)
155 {
156         struct aper_size_info_16 *previous_size;
157
158         previous_size = A_SIZE_16(agp_bridge->previous_size);
159         pci_write_config_byte(agp_bridge->dev, VIA_APSIZE, previous_size->size_value);
160 }
161
162
163 static void via_tlbflush_agp3(struct agp_memory *mem)
164 {
165         u32 temp;
166
167         pci_read_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, &temp);
168         pci_write_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, temp & ~(1<<7));
169         pci_write_config_dword(agp_bridge->dev, VIA_AGP3_GARTCTRL, temp);
170 }
171
172
173 static const struct agp_bridge_driver via_agp3_driver = {
174         .owner                  = THIS_MODULE,
175         .aperture_sizes         = agp3_generic_sizes,
176         .size_type              = U8_APER_SIZE,
177         .num_aperture_sizes     = 10,
178         .configure              = via_configure_agp3,
179         .fetch_size             = via_fetch_size_agp3,
180         .cleanup                = via_cleanup_agp3,
181         .tlb_flush              = via_tlbflush_agp3,
182         .mask_memory            = agp_generic_mask_memory,
183         .masks                  = NULL,
184         .agp_enable             = agp_generic_enable,
185         .cache_flush            = global_cache_flush,
186         .create_gatt_table      = agp_generic_create_gatt_table,
187         .free_gatt_table        = agp_generic_free_gatt_table,
188         .insert_memory          = agp_generic_insert_memory,
189         .remove_memory          = agp_generic_remove_memory,
190         .alloc_by_type          = agp_generic_alloc_by_type,
191         .free_by_type           = agp_generic_free_by_type,
192         .agp_alloc_page         = agp_generic_alloc_page,
193         .agp_alloc_pages        = agp_generic_alloc_pages,
194         .agp_destroy_page       = agp_generic_destroy_page,
195         .agp_destroy_pages      = agp_generic_destroy_pages,
196         .agp_type_to_mask_type  = agp_generic_type_to_mask_type,
197 };
198
199 static const struct agp_bridge_driver via_driver = {
200         .owner                  = THIS_MODULE,
201         .aperture_sizes         = via_generic_sizes,
202         .size_type              = U8_APER_SIZE,
203         .num_aperture_sizes     = 9,
204         .configure              = via_configure,
205         .fetch_size             = via_fetch_size,
206         .cleanup                = via_cleanup,
207         .tlb_flush              = via_tlbflush,
208         .mask_memory            = agp_generic_mask_memory,
209         .masks                  = NULL,
210         .agp_enable             = agp_generic_enable,
211         .cache_flush            = global_cache_flush,
212         .create_gatt_table      = agp_generic_create_gatt_table,
213         .free_gatt_table        = agp_generic_free_gatt_table,
214         .insert_memory          = agp_generic_insert_memory,
215         .remove_memory          = agp_generic_remove_memory,
216         .alloc_by_type          = agp_generic_alloc_by_type,
217         .free_by_type           = agp_generic_free_by_type,
218         .agp_alloc_page         = agp_generic_alloc_page,
219         .agp_alloc_pages        = agp_generic_alloc_pages,
220         .agp_destroy_page       = agp_generic_destroy_page,
221         .agp_destroy_pages      = agp_generic_destroy_pages,
222         .agp_type_to_mask_type  = agp_generic_type_to_mask_type,
223 };
224
225 static struct agp_device_ids via_agp_device_ids[] __devinitdata =
226 {
227         {
228                 .device_id      = PCI_DEVICE_ID_VIA_82C597_0,
229                 .chipset_name   = "Apollo VP3",
230         },
231
232         {
233                 .device_id      = PCI_DEVICE_ID_VIA_82C598_0,
234                 .chipset_name   = "Apollo MVP3",
235         },
236
237         {
238                 .device_id      = PCI_DEVICE_ID_VIA_8501_0,
239                 .chipset_name   = "Apollo MVP4",
240         },
241
242         /* VT8601 */
243         {
244                 .device_id      = PCI_DEVICE_ID_VIA_8601_0,
245                 .chipset_name   = "Apollo ProMedia/PLE133Ta",
246         },
247
248         /* VT82C693A / VT28C694T */
249         {
250                 .device_id      = PCI_DEVICE_ID_VIA_82C691_0,
251                 .chipset_name   = "Apollo Pro 133",
252         },
253
254         {
255                 .device_id      = PCI_DEVICE_ID_VIA_8371_0,
256                 .chipset_name   = "KX133",
257         },
258
259         /* VT8633 */
260         {
261                 .device_id      = PCI_DEVICE_ID_VIA_8633_0,
262                 .chipset_name   = "Pro 266",
263         },
264
265         {
266                 .device_id      = PCI_DEVICE_ID_VIA_XN266,
267                 .chipset_name   = "Apollo Pro266",
268         },
269
270         /* VT8361 */
271         {
272                 .device_id      = PCI_DEVICE_ID_VIA_8361,
273                 .chipset_name   = "KLE133",
274         },
275
276         /* VT8365 / VT8362 */
277         {
278                 .device_id      = PCI_DEVICE_ID_VIA_8363_0,
279                 .chipset_name   = "Twister-K/KT133x/KM133",
280         },
281
282         /* VT8753A */
283         {
284                 .device_id      = PCI_DEVICE_ID_VIA_8753_0,
285                 .chipset_name   = "P4X266",
286         },
287
288         /* VT8366 */
289         {
290                 .device_id      = PCI_DEVICE_ID_VIA_8367_0,
291                 .chipset_name   = "KT266/KY266x/KT333",
292         },
293
294         /* VT8633 (for CuMine/ Celeron) */
295         {
296                 .device_id      = PCI_DEVICE_ID_VIA_8653_0,
297                 .chipset_name   = "Pro266T",
298         },
299
300         /* KM266 / PM266 */
301         {
302                 .device_id      = PCI_DEVICE_ID_VIA_XM266,
303                 .chipset_name   = "PM266/KM266",
304         },
305
306         /* CLE266 */
307         {
308                 .device_id      = PCI_DEVICE_ID_VIA_862X_0,
309                 .chipset_name   = "CLE266",
310         },
311
312         {
313                 .device_id      = PCI_DEVICE_ID_VIA_8377_0,
314                 .chipset_name   = "KT400/KT400A/KT600",
315         },
316
317         /* VT8604 / VT8605 / VT8603
318          * (Apollo Pro133A chipset with S3 Savage4) */
319         {
320                 .device_id      = PCI_DEVICE_ID_VIA_8605_0,
321                 .chipset_name   = "ProSavage PM133/PL133/PN133"
322         },
323
324         /* P4M266x/P4N266 */
325         {
326                 .device_id      = PCI_DEVICE_ID_VIA_8703_51_0,
327                 .chipset_name   = "P4M266x/P4N266",
328         },
329
330         /* VT8754 */
331         {
332                 .device_id      = PCI_DEVICE_ID_VIA_8754C_0,
333                 .chipset_name   = "PT800",
334         },
335
336         /* P4X600 */
337         {
338                 .device_id      = PCI_DEVICE_ID_VIA_8763_0,
339                 .chipset_name   = "P4X600"
340         },
341
342         /* KM400 */
343         {
344                 .device_id      = PCI_DEVICE_ID_VIA_8378_0,
345                 .chipset_name   = "KM400/KM400A",
346         },
347
348         /* PT880 */
349         {
350                 .device_id      = PCI_DEVICE_ID_VIA_PT880,
351                 .chipset_name   = "PT880",
352         },
353
354         /* PT880 Ultra */
355         {
356                 .device_id      = PCI_DEVICE_ID_VIA_PT880ULTRA,
357                 .chipset_name   = "PT880 Ultra",
358         },
359
360         /* PT890 */
361         {
362                 .device_id      = PCI_DEVICE_ID_VIA_8783_0,
363                 .chipset_name   = "PT890",
364         },
365
366         /* PM800/PN800/PM880/PN880 */
367         {
368                 .device_id      = PCI_DEVICE_ID_VIA_PX8X0_0,
369                 .chipset_name   = "PM800/PN800/PM880/PN880",
370         },
371         /* KT880 */
372         {
373                 .device_id      = PCI_DEVICE_ID_VIA_3269_0,
374                 .chipset_name   = "KT880",
375         },
376         /* KTxxx/Px8xx */
377         {
378                 .device_id      = PCI_DEVICE_ID_VIA_83_87XX_1,
379                 .chipset_name   = "VT83xx/VT87xx/KTxxx/Px8xx",
380         },
381         /* P4M800 */
382         {
383                 .device_id      = PCI_DEVICE_ID_VIA_3296_0,
384                 .chipset_name   = "P4M800",
385         },
386         /* P4M800CE */
387         {
388                 .device_id      = PCI_DEVICE_ID_VIA_P4M800CE,
389                 .chipset_name   = "VT3314",
390         },
391         /* VT3324 / CX700 */
392         {
393                 .device_id  = PCI_DEVICE_ID_VIA_VT3324,
394                 .chipset_name   = "CX700",
395         },
396         /* VT3336 - this is a chipset for AMD Athlon/K8 CPU. Due to K8's unique
397          * architecture, the AGP resource and behavior are different from
398          * the traditional AGP which resides only in chipset. AGP is used
399          * by 3D driver which wasn't available for the VT3336 and VT3364
400          * generation until now.  Unfortunately, by testing, VT3364 works
401          * but VT3336 doesn't. - explaination from via, just leave this as
402          * as a placeholder to avoid future patches adding it back in.
403          */
404 #if 0
405         {
406                 .device_id  = PCI_DEVICE_ID_VIA_VT3336,
407                 .chipset_name   = "VT3336",
408         },
409 #endif
410         /* P4M890 */
411         {
412                 .device_id  = PCI_DEVICE_ID_VIA_P4M890,
413                 .chipset_name   = "P4M890",
414         },
415         /* P4M900 */
416         {
417                 .device_id  = PCI_DEVICE_ID_VIA_VT3364,
418                 .chipset_name   = "P4M900",
419         },
420         { }, /* dummy final entry, always present */
421 };
422
423
424 /*
425  * VIA's AGP3 chipsets do magick to put the AGP bridge compliant
426  * with the same standards version as the graphics card.
427  */
428 static void check_via_agp3 (struct agp_bridge_data *bridge)
429 {
430         u8 reg;
431
432         pci_read_config_byte(bridge->dev, VIA_AGPSEL, &reg);
433         /* Check AGP 2.0 compatibility mode. */
434         if ((reg & (1<<1))==0)
435                 bridge->driver = &via_agp3_driver;
436 }
437
438
439 static int __devinit agp_via_probe(struct pci_dev *pdev,
440                                    const struct pci_device_id *ent)
441 {
442         struct agp_device_ids *devs = via_agp_device_ids;
443         struct agp_bridge_data *bridge;
444         int j = 0;
445         u8 cap_ptr;
446
447         cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
448         if (!cap_ptr)
449                 return -ENODEV;
450
451         j = ent - agp_via_pci_table;
452         printk (KERN_INFO PFX "Detected VIA %s chipset\n", devs[j].chipset_name);
453
454         bridge = agp_alloc_bridge();
455         if (!bridge)
456                 return -ENOMEM;
457
458         bridge->dev = pdev;
459         bridge->capndx = cap_ptr;
460         bridge->driver = &via_driver;
461
462         /*
463          * Garg, there are KT400s with KT266 IDs.
464          */
465         if (pdev->device == PCI_DEVICE_ID_VIA_8367_0) {
466                 /* Is there a KT400 subsystem ? */
467                 if (pdev->subsystem_device == PCI_DEVICE_ID_VIA_8377_0) {
468                         printk(KERN_INFO PFX "Found KT400 in disguise as a KT266.\n");
469                         check_via_agp3(bridge);
470                 }
471         }
472
473         /* If this is an AGP3 bridge, check which mode its in and adjust. */
474         get_agp_version(bridge);
475         if (bridge->major_version >= 3)
476                 check_via_agp3(bridge);
477
478         /* Fill in the mode register */
479         pci_read_config_dword(pdev,
480                         bridge->capndx+PCI_AGP_STATUS, &bridge->mode);
481
482         pci_set_drvdata(pdev, bridge);
483         return agp_add_bridge(bridge);
484 }
485
486 static void __devexit agp_via_remove(struct pci_dev *pdev)
487 {
488         struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
489
490         agp_remove_bridge(bridge);
491         agp_put_bridge(bridge);
492 }
493
494 #ifdef CONFIG_PM
495
496 static int agp_via_suspend(struct pci_dev *pdev, pm_message_t state)
497 {
498         pci_save_state (pdev);
499         pci_set_power_state (pdev, PCI_D3hot);
500
501         return 0;
502 }
503
504 static int agp_via_resume(struct pci_dev *pdev)
505 {
506         struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
507
508         pci_set_power_state (pdev, PCI_D0);
509         pci_restore_state(pdev);
510
511         if (bridge->driver == &via_agp3_driver)
512                 return via_configure_agp3();
513         else if (bridge->driver == &via_driver)
514                 return via_configure();
515
516         return 0;
517 }
518
519 #endif /* CONFIG_PM */
520
521 /* must be the same order as name table above */
522 static const struct pci_device_id agp_via_pci_table[] = {
523 #define ID(x) \
524         {                                               \
525         .class          = (PCI_CLASS_BRIDGE_HOST << 8), \
526         .class_mask     = ~0,                           \
527         .vendor         = PCI_VENDOR_ID_VIA,            \
528         .device         = x,                            \
529         .subvendor      = PCI_ANY_ID,                   \
530         .subdevice      = PCI_ANY_ID,                   \
531         }
532         ID(PCI_DEVICE_ID_VIA_82C597_0),
533         ID(PCI_DEVICE_ID_VIA_82C598_0),
534         ID(PCI_DEVICE_ID_VIA_8501_0),
535         ID(PCI_DEVICE_ID_VIA_8601_0),
536         ID(PCI_DEVICE_ID_VIA_82C691_0),
537         ID(PCI_DEVICE_ID_VIA_8371_0),
538         ID(PCI_DEVICE_ID_VIA_8633_0),
539         ID(PCI_DEVICE_ID_VIA_XN266),
540         ID(PCI_DEVICE_ID_VIA_8361),
541         ID(PCI_DEVICE_ID_VIA_8363_0),
542         ID(PCI_DEVICE_ID_VIA_8753_0),
543         ID(PCI_DEVICE_ID_VIA_8367_0),
544         ID(PCI_DEVICE_ID_VIA_8653_0),
545         ID(PCI_DEVICE_ID_VIA_XM266),
546         ID(PCI_DEVICE_ID_VIA_862X_0),
547         ID(PCI_DEVICE_ID_VIA_8377_0),
548         ID(PCI_DEVICE_ID_VIA_8605_0),
549         ID(PCI_DEVICE_ID_VIA_8703_51_0),
550         ID(PCI_DEVICE_ID_VIA_8754C_0),
551         ID(PCI_DEVICE_ID_VIA_8763_0),
552         ID(PCI_DEVICE_ID_VIA_8378_0),
553         ID(PCI_DEVICE_ID_VIA_PT880),
554         ID(PCI_DEVICE_ID_VIA_PT880ULTRA),
555         ID(PCI_DEVICE_ID_VIA_8783_0),
556         ID(PCI_DEVICE_ID_VIA_PX8X0_0),
557         ID(PCI_DEVICE_ID_VIA_3269_0),
558         ID(PCI_DEVICE_ID_VIA_83_87XX_1),
559         ID(PCI_DEVICE_ID_VIA_3296_0),
560         ID(PCI_DEVICE_ID_VIA_P4M800CE),
561         ID(PCI_DEVICE_ID_VIA_VT3324),
562         ID(PCI_DEVICE_ID_VIA_P4M890),
563         ID(PCI_DEVICE_ID_VIA_VT3364),
564         { }
565 };
566
567 MODULE_DEVICE_TABLE(pci, agp_via_pci_table);
568
569
570 static struct pci_driver agp_via_pci_driver = {
571         .name           = "agpgart-via",
572         .id_table       = agp_via_pci_table,
573         .probe          = agp_via_probe,
574         .remove         = agp_via_remove,
575 #ifdef CONFIG_PM
576         .suspend        = agp_via_suspend,
577         .resume         = agp_via_resume,
578 #endif
579 };
580
581
582 static int __init agp_via_init(void)
583 {
584         if (agp_off)
585                 return -EINVAL;
586         return pci_register_driver(&agp_via_pci_driver);
587 }
588
589 static void __exit agp_via_cleanup(void)
590 {
591         pci_unregister_driver(&agp_via_pci_driver);
592 }
593
594 module_init(agp_via_init);
595 module_exit(agp_via_cleanup);
596
597 MODULE_LICENSE("GPL");
598 MODULE_AUTHOR("Dave Jones <davej@redhat.com>");