Merge branch 'for-linus' of git://linux-arm.org/linux-2.6
[linux-2.6] / drivers / ide / icside.c
1 /*
2  * Copyright (c) 1996-2004 Russell King.
3  *
4  * Please note that this platform does not support 32-bit IDE IO.
5  */
6
7 #include <linux/string.h>
8 #include <linux/module.h>
9 #include <linux/ioport.h>
10 #include <linux/slab.h>
11 #include <linux/blkdev.h>
12 #include <linux/errno.h>
13 #include <linux/ide.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/device.h>
16 #include <linux/init.h>
17 #include <linux/scatterlist.h>
18 #include <linux/io.h>
19
20 #include <asm/dma.h>
21 #include <asm/ecard.h>
22
23 #define DRV_NAME "icside"
24
25 #define ICS_IDENT_OFFSET                0x2280
26
27 #define ICS_ARCIN_V5_INTRSTAT           0x0000
28 #define ICS_ARCIN_V5_INTROFFSET         0x0004
29 #define ICS_ARCIN_V5_IDEOFFSET          0x2800
30 #define ICS_ARCIN_V5_IDEALTOFFSET       0x2b80
31 #define ICS_ARCIN_V5_IDESTEPPING        6
32
33 #define ICS_ARCIN_V6_IDEOFFSET_1        0x2000
34 #define ICS_ARCIN_V6_INTROFFSET_1       0x2200
35 #define ICS_ARCIN_V6_INTRSTAT_1         0x2290
36 #define ICS_ARCIN_V6_IDEALTOFFSET_1     0x2380
37 #define ICS_ARCIN_V6_IDEOFFSET_2        0x3000
38 #define ICS_ARCIN_V6_INTROFFSET_2       0x3200
39 #define ICS_ARCIN_V6_INTRSTAT_2         0x3290
40 #define ICS_ARCIN_V6_IDEALTOFFSET_2     0x3380
41 #define ICS_ARCIN_V6_IDESTEPPING        6
42
43 struct cardinfo {
44         unsigned int dataoffset;
45         unsigned int ctrloffset;
46         unsigned int stepping;
47 };
48
49 static struct cardinfo icside_cardinfo_v5 = {
50         .dataoffset     = ICS_ARCIN_V5_IDEOFFSET,
51         .ctrloffset     = ICS_ARCIN_V5_IDEALTOFFSET,
52         .stepping       = ICS_ARCIN_V5_IDESTEPPING,
53 };
54
55 static struct cardinfo icside_cardinfo_v6_1 = {
56         .dataoffset     = ICS_ARCIN_V6_IDEOFFSET_1,
57         .ctrloffset     = ICS_ARCIN_V6_IDEALTOFFSET_1,
58         .stepping       = ICS_ARCIN_V6_IDESTEPPING,
59 };
60
61 static struct cardinfo icside_cardinfo_v6_2 = {
62         .dataoffset     = ICS_ARCIN_V6_IDEOFFSET_2,
63         .ctrloffset     = ICS_ARCIN_V6_IDEALTOFFSET_2,
64         .stepping       = ICS_ARCIN_V6_IDESTEPPING,
65 };
66
67 struct icside_state {
68         void __iomem *irq_port;
69         void __iomem *ioc_base;
70         unsigned int sel;
71         unsigned int type;
72         struct ide_host *host;
73 };
74
75 #define ICS_TYPE_A3IN   0
76 #define ICS_TYPE_A3USER 1
77 #define ICS_TYPE_V6     3
78 #define ICS_TYPE_V5     15
79 #define ICS_TYPE_NOTYPE ((unsigned int)-1)
80
81 /* ---------------- Version 5 PCB Support Functions --------------------- */
82 /* Prototype: icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr)
83  * Purpose  : enable interrupts from card
84  */
85 static void icside_irqenable_arcin_v5 (struct expansion_card *ec, int irqnr)
86 {
87         struct icside_state *state = ec->irq_data;
88
89         writeb(0, state->irq_port + ICS_ARCIN_V5_INTROFFSET);
90 }
91
92 /* Prototype: icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr)
93  * Purpose  : disable interrupts from card
94  */
95 static void icside_irqdisable_arcin_v5 (struct expansion_card *ec, int irqnr)
96 {
97         struct icside_state *state = ec->irq_data;
98
99         readb(state->irq_port + ICS_ARCIN_V5_INTROFFSET);
100 }
101
102 static const expansioncard_ops_t icside_ops_arcin_v5 = {
103         .irqenable      = icside_irqenable_arcin_v5,
104         .irqdisable     = icside_irqdisable_arcin_v5,
105 };
106
107
108 /* ---------------- Version 6 PCB Support Functions --------------------- */
109 /* Prototype: icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr)
110  * Purpose  : enable interrupts from card
111  */
112 static void icside_irqenable_arcin_v6 (struct expansion_card *ec, int irqnr)
113 {
114         struct icside_state *state = ec->irq_data;
115         void __iomem *base = state->irq_port;
116
117         writeb(0, base + ICS_ARCIN_V6_INTROFFSET_1);
118         readb(base + ICS_ARCIN_V6_INTROFFSET_2);
119
120         writeb(0, base + ICS_ARCIN_V6_INTROFFSET_2);
121         readb(base + ICS_ARCIN_V6_INTROFFSET_1);
122 }
123
124 /* Prototype: icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr)
125  * Purpose  : disable interrupts from card
126  */
127 static void icside_irqdisable_arcin_v6 (struct expansion_card *ec, int irqnr)
128 {
129         struct icside_state *state = ec->irq_data;
130
131         readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_1);
132         readb(state->irq_port + ICS_ARCIN_V6_INTROFFSET_2);
133 }
134
135 /* Prototype: icside_irqprobe(struct expansion_card *ec)
136  * Purpose  : detect an active interrupt from card
137  */
138 static int icside_irqpending_arcin_v6(struct expansion_card *ec)
139 {
140         struct icside_state *state = ec->irq_data;
141
142         return readb(state->irq_port + ICS_ARCIN_V6_INTRSTAT_1) & 1 ||
143                readb(state->irq_port + ICS_ARCIN_V6_INTRSTAT_2) & 1;
144 }
145
146 static const expansioncard_ops_t icside_ops_arcin_v6 = {
147         .irqenable      = icside_irqenable_arcin_v6,
148         .irqdisable     = icside_irqdisable_arcin_v6,
149         .irqpending     = icside_irqpending_arcin_v6,
150 };
151
152 #ifdef CONFIG_BLK_DEV_IDEDMA_ICS
153 /*
154  * SG-DMA support.
155  *
156  * Similar to the BM-DMA, but we use the RiscPCs IOMD DMA controllers.
157  * There is only one DMA controller per card, which means that only
158  * one drive can be accessed at one time.  NOTE! We do not enforce that
159  * here, but we rely on the main IDE driver spotting that both
160  * interfaces use the same IRQ, which should guarantee this.
161  */
162
163 /*
164  * Configure the IOMD to give the appropriate timings for the transfer
165  * mode being requested.  We take the advice of the ATA standards, and
166  * calculate the cycle time based on the transfer mode, and the EIDE
167  * MW DMA specs that the drive provides in the IDENTIFY command.
168  *
169  * We have the following IOMD DMA modes to choose from:
170  *
171  *      Type    Active          Recovery        Cycle
172  *      A       250 (250)       312 (550)       562 (800)
173  *      B       187             250             437
174  *      C       125 (125)       125 (375)       250 (500)
175  *      D       62              125             187
176  *
177  * (figures in brackets are actual measured timings)
178  *
179  * However, we also need to take care of the read/write active and
180  * recovery timings:
181  *
182  *                      Read    Write
183  *      Mode    Active  -- Recovery --  Cycle   IOMD type
184  *      MW0     215     50      215     480     A
185  *      MW1     80      50      50      150     C
186  *      MW2     70      25      25      120     C
187  */
188 static void icside_set_dma_mode(ide_drive_t *drive, const u8 xfer_mode)
189 {
190         int cycle_time, use_dma_info = 0;
191
192         switch (xfer_mode) {
193         case XFER_MW_DMA_2:
194                 cycle_time = 250;
195                 use_dma_info = 1;
196                 break;
197
198         case XFER_MW_DMA_1:
199                 cycle_time = 250;
200                 use_dma_info = 1;
201                 break;
202
203         case XFER_MW_DMA_0:
204                 cycle_time = 480;
205                 break;
206
207         case XFER_SW_DMA_2:
208         case XFER_SW_DMA_1:
209         case XFER_SW_DMA_0:
210                 cycle_time = 480;
211                 break;
212         }
213
214         /*
215          * If we're going to be doing MW_DMA_1 or MW_DMA_2, we should
216          * take care to note the values in the ID...
217          */
218         if (use_dma_info && drive->id[ATA_ID_EIDE_DMA_TIME] > cycle_time)
219                 cycle_time = drive->id[ATA_ID_EIDE_DMA_TIME];
220
221         drive->drive_data = cycle_time;
222
223         printk("%s: %s selected (peak %dMB/s)\n", drive->name,
224                 ide_xfer_verbose(xfer_mode), 2000 / drive->drive_data);
225 }
226
227 static const struct ide_port_ops icside_v6_port_ops = {
228         .set_dma_mode           = icside_set_dma_mode,
229 };
230
231 static void icside_dma_host_set(ide_drive_t *drive, int on)
232 {
233 }
234
235 static int icside_dma_end(ide_drive_t *drive)
236 {
237         ide_hwif_t *hwif = drive->hwif;
238         struct expansion_card *ec = ECARD_DEV(hwif->dev);
239
240         disable_dma(ec->dma);
241
242         return get_dma_residue(ec->dma) != 0;
243 }
244
245 static void icside_dma_start(ide_drive_t *drive)
246 {
247         ide_hwif_t *hwif = drive->hwif;
248         struct expansion_card *ec = ECARD_DEV(hwif->dev);
249
250         /* We can not enable DMA on both channels simultaneously. */
251         BUG_ON(dma_channel_active(ec->dma));
252         enable_dma(ec->dma);
253 }
254
255 static int icside_dma_setup(ide_drive_t *drive, struct ide_cmd *cmd)
256 {
257         ide_hwif_t *hwif = drive->hwif;
258         struct expansion_card *ec = ECARD_DEV(hwif->dev);
259         struct icside_state *state = ecard_get_drvdata(ec);
260         unsigned int dma_mode;
261
262         if (cmd->tf_flags & IDE_TFLAG_WRITE)
263                 dma_mode = DMA_MODE_WRITE;
264         else
265                 dma_mode = DMA_MODE_READ;
266
267         /*
268          * We can not enable DMA on both channels.
269          */
270         BUG_ON(dma_channel_active(ec->dma));
271
272         /*
273          * Route the DMA signals to the correct interface.
274          */
275         writeb(state->sel | hwif->channel, state->ioc_base);
276
277         /*
278          * Select the correct timing for this drive.
279          */
280         set_dma_speed(ec->dma, drive->drive_data);
281
282         /*
283          * Tell the DMA engine about the SG table and
284          * data direction.
285          */
286         set_dma_sg(ec->dma, hwif->sg_table, cmd->sg_nents);
287         set_dma_mode(ec->dma, dma_mode);
288
289         return 0;
290 }
291
292 static int icside_dma_test_irq(ide_drive_t *drive)
293 {
294         ide_hwif_t *hwif = drive->hwif;
295         struct expansion_card *ec = ECARD_DEV(hwif->dev);
296         struct icside_state *state = ecard_get_drvdata(ec);
297
298         return readb(state->irq_port +
299                      (hwif->channel ?
300                         ICS_ARCIN_V6_INTRSTAT_2 :
301                         ICS_ARCIN_V6_INTRSTAT_1)) & 1;
302 }
303
304 static int icside_dma_init(ide_hwif_t *hwif, const struct ide_port_info *d)
305 {
306         hwif->dmatable_cpu      = NULL;
307         hwif->dmatable_dma      = 0;
308
309         return 0;
310 }
311
312 static const struct ide_dma_ops icside_v6_dma_ops = {
313         .dma_host_set           = icside_dma_host_set,
314         .dma_setup              = icside_dma_setup,
315         .dma_start              = icside_dma_start,
316         .dma_end                = icside_dma_end,
317         .dma_test_irq           = icside_dma_test_irq,
318         .dma_lost_irq           = ide_dma_lost_irq,
319 };
320 #else
321 #define icside_v6_dma_ops NULL
322 #endif
323
324 static int icside_dma_off_init(ide_hwif_t *hwif, const struct ide_port_info *d)
325 {
326         return -EOPNOTSUPP;
327 }
328
329 static void icside_setup_ports(struct ide_hw *hw, void __iomem *base,
330                                struct cardinfo *info, struct expansion_card *ec)
331 {
332         unsigned long port = (unsigned long)base + info->dataoffset;
333
334         hw->io_ports.data_addr   = port;
335         hw->io_ports.error_addr  = port + (1 << info->stepping);
336         hw->io_ports.nsect_addr  = port + (2 << info->stepping);
337         hw->io_ports.lbal_addr   = port + (3 << info->stepping);
338         hw->io_ports.lbam_addr   = port + (4 << info->stepping);
339         hw->io_ports.lbah_addr   = port + (5 << info->stepping);
340         hw->io_ports.device_addr = port + (6 << info->stepping);
341         hw->io_ports.status_addr = port + (7 << info->stepping);
342         hw->io_ports.ctl_addr    = (unsigned long)base + info->ctrloffset;
343
344         hw->irq = ec->irq;
345         hw->dev = &ec->dev;
346 }
347
348 static const struct ide_port_info icside_v5_port_info = {
349         .host_flags             = IDE_HFLAG_NO_DMA,
350         .chipset                = ide_acorn,
351 };
352
353 static int __devinit
354 icside_register_v5(struct icside_state *state, struct expansion_card *ec)
355 {
356         void __iomem *base;
357         struct ide_host *host;
358         struct ide_hw hw, *hws[] = { &hw };
359         int ret;
360
361         base = ecardm_iomap(ec, ECARD_RES_MEMC, 0, 0);
362         if (!base)
363                 return -ENOMEM;
364
365         state->irq_port = base;
366
367         ec->irqaddr  = base + ICS_ARCIN_V5_INTRSTAT;
368         ec->irqmask  = 1;
369
370         ecard_setirq(ec, &icside_ops_arcin_v5, state);
371
372         /*
373          * Be on the safe side - disable interrupts
374          */
375         icside_irqdisable_arcin_v5(ec, 0);
376
377         icside_setup_ports(&hw, base, &icside_cardinfo_v5, ec);
378
379         host = ide_host_alloc(&icside_v5_port_info, hws, 1);
380         if (host == NULL)
381                 return -ENODEV;
382
383         state->host = host;
384
385         ecard_set_drvdata(ec, state);
386
387         ret = ide_host_register(host, &icside_v5_port_info, hws);
388         if (ret)
389                 goto err_free;
390
391         return 0;
392 err_free:
393         ide_host_free(host);
394         ecard_set_drvdata(ec, NULL);
395         return ret;
396 }
397
398 static const struct ide_port_info icside_v6_port_info __initdata = {
399         .init_dma               = icside_dma_off_init,
400         .dma_ops                = &icside_v6_dma_ops,
401         .host_flags             = IDE_HFLAG_SERIALIZE | IDE_HFLAG_MMIO,
402         .mwdma_mask             = ATA_MWDMA2,
403         .swdma_mask             = ATA_SWDMA2,
404         .chipset                = ide_acorn,
405 };
406
407 static int __devinit
408 icside_register_v6(struct icside_state *state, struct expansion_card *ec)
409 {
410         void __iomem *ioc_base, *easi_base;
411         struct ide_host *host;
412         unsigned int sel = 0;
413         int ret;
414         struct ide_hw hw[2], *hws[] = { &hw[0], &hw[1] };
415         struct ide_port_info d = icside_v6_port_info;
416
417         ioc_base = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
418         if (!ioc_base) {
419                 ret = -ENOMEM;
420                 goto out;
421         }
422
423         easi_base = ioc_base;
424
425         if (ecard_resource_flags(ec, ECARD_RES_EASI)) {
426                 easi_base = ecardm_iomap(ec, ECARD_RES_EASI, 0, 0);
427                 if (!easi_base) {
428                         ret = -ENOMEM;
429                         goto out;
430                 }
431
432                 /*
433                  * Enable access to the EASI region.
434                  */
435                 sel = 1 << 5;
436         }
437
438         writeb(sel, ioc_base);
439
440         ecard_setirq(ec, &icside_ops_arcin_v6, state);
441
442         state->irq_port   = easi_base;
443         state->ioc_base   = ioc_base;
444         state->sel        = sel;
445
446         /*
447          * Be on the safe side - disable interrupts
448          */
449         icside_irqdisable_arcin_v6(ec, 0);
450
451         icside_setup_ports(&hw[0], easi_base, &icside_cardinfo_v6_1, ec);
452         icside_setup_ports(&hw[1], easi_base, &icside_cardinfo_v6_2, ec);
453
454         host = ide_host_alloc(&d, hws, 2);
455         if (host == NULL)
456                 return -ENODEV;
457
458         state->host = host;
459
460         ecard_set_drvdata(ec, state);
461
462         if (ec->dma != NO_DMA && !request_dma(ec->dma, DRV_NAME)) {
463                 d.init_dma = icside_dma_init;
464                 d.port_ops = &icside_v6_port_ops;
465                 d.dma_ops = NULL;
466         }
467
468         ret = ide_host_register(host, &d, hws);
469         if (ret)
470                 goto err_free;
471
472         return 0;
473 err_free:
474         ide_host_free(host);
475         if (d.dma_ops)
476                 free_dma(ec->dma);
477         ecard_set_drvdata(ec, NULL);
478 out:
479         return ret;
480 }
481
482 static int __devinit
483 icside_probe(struct expansion_card *ec, const struct ecard_id *id)
484 {
485         struct icside_state *state;
486         void __iomem *idmem;
487         int ret;
488
489         ret = ecard_request_resources(ec);
490         if (ret)
491                 goto out;
492
493         state = kzalloc(sizeof(struct icside_state), GFP_KERNEL);
494         if (!state) {
495                 ret = -ENOMEM;
496                 goto release;
497         }
498
499         state->type     = ICS_TYPE_NOTYPE;
500
501         idmem = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0);
502         if (idmem) {
503                 unsigned int type;
504
505                 type = readb(idmem + ICS_IDENT_OFFSET) & 1;
506                 type |= (readb(idmem + ICS_IDENT_OFFSET + 4) & 1) << 1;
507                 type |= (readb(idmem + ICS_IDENT_OFFSET + 8) & 1) << 2;
508                 type |= (readb(idmem + ICS_IDENT_OFFSET + 12) & 1) << 3;
509                 ecardm_iounmap(ec, idmem);
510
511                 state->type = type;
512         }
513
514         switch (state->type) {
515         case ICS_TYPE_A3IN:
516                 dev_warn(&ec->dev, "A3IN unsupported\n");
517                 ret = -ENODEV;
518                 break;
519
520         case ICS_TYPE_A3USER:
521                 dev_warn(&ec->dev, "A3USER unsupported\n");
522                 ret = -ENODEV;
523                 break;
524
525         case ICS_TYPE_V5:
526                 ret = icside_register_v5(state, ec);
527                 break;
528
529         case ICS_TYPE_V6:
530                 ret = icside_register_v6(state, ec);
531                 break;
532
533         default:
534                 dev_warn(&ec->dev, "unknown interface type\n");
535                 ret = -ENODEV;
536                 break;
537         }
538
539         if (ret == 0)
540                 goto out;
541
542         kfree(state);
543  release:
544         ecard_release_resources(ec);
545  out:
546         return ret;
547 }
548
549 static void __devexit icside_remove(struct expansion_card *ec)
550 {
551         struct icside_state *state = ecard_get_drvdata(ec);
552
553         switch (state->type) {
554         case ICS_TYPE_V5:
555                 /* FIXME: tell IDE to stop using the interface */
556
557                 /* Disable interrupts */
558                 icside_irqdisable_arcin_v5(ec, 0);
559                 break;
560
561         case ICS_TYPE_V6:
562                 /* FIXME: tell IDE to stop using the interface */
563                 if (ec->dma != NO_DMA)
564                         free_dma(ec->dma);
565
566                 /* Disable interrupts */
567                 icside_irqdisable_arcin_v6(ec, 0);
568
569                 /* Reset the ROM pointer/EASI selection */
570                 writeb(0, state->ioc_base);
571                 break;
572         }
573
574         ecard_set_drvdata(ec, NULL);
575
576         kfree(state);
577         ecard_release_resources(ec);
578 }
579
580 static void icside_shutdown(struct expansion_card *ec)
581 {
582         struct icside_state *state = ecard_get_drvdata(ec);
583         unsigned long flags;
584
585         /*
586          * Disable interrupts from this card.  We need to do
587          * this before disabling EASI since we may be accessing
588          * this register via that region.
589          */
590         local_irq_save(flags);
591         ec->ops->irqdisable(ec, 0);
592         local_irq_restore(flags);
593
594         /*
595          * Reset the ROM pointer so that we can read the ROM
596          * after a soft reboot.  This also disables access to
597          * the IDE taskfile via the EASI region.
598          */
599         if (state->ioc_base)
600                 writeb(0, state->ioc_base);
601 }
602
603 static const struct ecard_id icside_ids[] = {
604         { MANU_ICS,  PROD_ICS_IDE  },
605         { MANU_ICS2, PROD_ICS2_IDE },
606         { 0xffff, 0xffff }
607 };
608
609 static struct ecard_driver icside_driver = {
610         .probe          = icside_probe,
611         .remove         = __devexit_p(icside_remove),
612         .shutdown       = icside_shutdown,
613         .id_table       = icside_ids,
614         .drv = {
615                 .name   = "icside",
616         },
617 };
618
619 static int __init icside_init(void)
620 {
621         return ecard_register_driver(&icside_driver);
622 }
623
624 static void __exit icside_exit(void)
625 {
626         ecard_remove_driver(&icside_driver);
627 }
628
629 MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
630 MODULE_LICENSE("GPL");
631 MODULE_DESCRIPTION("ICS IDE driver");
632
633 module_init(icside_init);
634 module_exit(icside_exit);