2 * Xilinx SystemACE device driver
4 * Copyright 2007 Secret Lab Technologies Ltd.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
12 * The SystemACE chip is designed to configure FPGAs by loading an FPGA
13 * bitstream from a file on a CF card and squirting it into FPGAs connected
14 * to the SystemACE JTAG chain. It also has the advantage of providing an
15 * MPU interface which can be used to control the FPGA configuration process
16 * and to use the attached CF card for general purpose storage.
18 * This driver is a block device driver for the SystemACE.
21 * The driver registers itself as a platform_device driver at module
22 * load time. The platform bus will take care of calling the
23 * ace_probe() method for all SystemACE instances in the system. Any
24 * number of SystemACE instances are supported. ace_probe() calls
25 * ace_setup() which initialized all data structures, reads the CF
26 * id structure and registers the device.
29 * Just about all of the heavy lifting in this driver is performed by
30 * a Finite State Machine (FSM). The driver needs to wait on a number
31 * of events; some raised by interrupts, some which need to be polled
32 * for. Describing all of the behaviour in a FSM seems to be the
33 * easiest way to keep the complexity low and make it easy to
34 * understand what the driver is doing. If the block ops or the
35 * request function need to interact with the hardware, then they
36 * simply need to flag the request and kick of FSM processing.
38 * The FSM itself is atomic-safe code which can be run from any
39 * context. The general process flow is:
40 * 1. obtain the ace->lock spinlock.
41 * 2. loop on ace_fsm_dostate() until the ace->fsm_continue flag is
43 * 3. release the lock.
45 * Individual states do not sleep in any way. If a condition needs to
46 * be waited for then the state much clear the fsm_continue flag and
47 * either schedule the FSM to be run again at a later time, or expect
48 * an interrupt to call the FSM when the desired condition is met.
50 * In normal operation, the FSM is processed at interrupt context
51 * either when the driver's tasklet is scheduled, or when an irq is
52 * raised by the hardware. The tasklet can be scheduled at any time.
53 * The request method in particular schedules the tasklet when a new
54 * request has been indicated by the block layer. Once started, the
55 * FSM proceeds as far as it can processing the request until it
56 * needs on a hardware event. At this point, it must yield execution.
58 * A state has two options when yielding execution:
60 * - Call if need to poll for event.
61 * - clears the fsm_continue flag to exit the processing loop
62 * - reschedules the tasklet to run again as soon as possible
63 * 2. ace_fsm_yieldirq()
64 * - Call if an irq is expected from the HW
65 * - clears the fsm_continue flag to exit the processing loop
66 * - does not reschedule the tasklet so the FSM will not be processed
67 * again until an irq is received.
68 * After calling a yield function, the state must return control back
69 * to the FSM main loop.
71 * Additionally, the driver maintains a kernel timer which can process
72 * the FSM. If the FSM gets stalled, typically due to a missed
73 * interrupt, then the kernel timer will expire and the driver can
74 * continue where it left off.
77 * - Add FPGA configuration control interface.
78 * - Request major number from lanana
83 #include <linux/module.h>
84 #include <linux/ctype.h>
85 #include <linux/init.h>
86 #include <linux/interrupt.h>
87 #include <linux/errno.h>
88 #include <linux/kernel.h>
89 #include <linux/delay.h>
90 #include <linux/slab.h>
91 #include <linux/blkdev.h>
92 #include <linux/ata.h>
93 #include <linux/hdreg.h>
94 #include <linux/platform_device.h>
95 #if defined(CONFIG_OF)
96 #include <linux/of_device.h>
97 #include <linux/of_platform.h>
100 MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
101 MODULE_DESCRIPTION("Xilinx SystemACE device driver");
102 MODULE_LICENSE("GPL");
104 /* SystemACE register definitions */
105 #define ACE_BUSMODE (0x00)
107 #define ACE_STATUS (0x04)
108 #define ACE_STATUS_CFGLOCK (0x00000001)
109 #define ACE_STATUS_MPULOCK (0x00000002)
110 #define ACE_STATUS_CFGERROR (0x00000004) /* config controller error */
111 #define ACE_STATUS_CFCERROR (0x00000008) /* CF controller error */
112 #define ACE_STATUS_CFDETECT (0x00000010)
113 #define ACE_STATUS_DATABUFRDY (0x00000020)
114 #define ACE_STATUS_DATABUFMODE (0x00000040)
115 #define ACE_STATUS_CFGDONE (0x00000080)
116 #define ACE_STATUS_RDYFORCFCMD (0x00000100)
117 #define ACE_STATUS_CFGMODEPIN (0x00000200)
118 #define ACE_STATUS_CFGADDR_MASK (0x0000e000)
119 #define ACE_STATUS_CFBSY (0x00020000)
120 #define ACE_STATUS_CFRDY (0x00040000)
121 #define ACE_STATUS_CFDWF (0x00080000)
122 #define ACE_STATUS_CFDSC (0x00100000)
123 #define ACE_STATUS_CFDRQ (0x00200000)
124 #define ACE_STATUS_CFCORR (0x00400000)
125 #define ACE_STATUS_CFERR (0x00800000)
127 #define ACE_ERROR (0x08)
128 #define ACE_CFGLBA (0x0c)
129 #define ACE_MPULBA (0x10)
131 #define ACE_SECCNTCMD (0x14)
132 #define ACE_SECCNTCMD_RESET (0x0100)
133 #define ACE_SECCNTCMD_IDENTIFY (0x0200)
134 #define ACE_SECCNTCMD_READ_DATA (0x0300)
135 #define ACE_SECCNTCMD_WRITE_DATA (0x0400)
136 #define ACE_SECCNTCMD_ABORT (0x0600)
138 #define ACE_VERSION (0x16)
139 #define ACE_VERSION_REVISION_MASK (0x00FF)
140 #define ACE_VERSION_MINOR_MASK (0x0F00)
141 #define ACE_VERSION_MAJOR_MASK (0xF000)
143 #define ACE_CTRL (0x18)
144 #define ACE_CTRL_FORCELOCKREQ (0x0001)
145 #define ACE_CTRL_LOCKREQ (0x0002)
146 #define ACE_CTRL_FORCECFGADDR (0x0004)
147 #define ACE_CTRL_FORCECFGMODE (0x0008)
148 #define ACE_CTRL_CFGMODE (0x0010)
149 #define ACE_CTRL_CFGSTART (0x0020)
150 #define ACE_CTRL_CFGSEL (0x0040)
151 #define ACE_CTRL_CFGRESET (0x0080)
152 #define ACE_CTRL_DATABUFRDYIRQ (0x0100)
153 #define ACE_CTRL_ERRORIRQ (0x0200)
154 #define ACE_CTRL_CFGDONEIRQ (0x0400)
155 #define ACE_CTRL_RESETIRQ (0x0800)
156 #define ACE_CTRL_CFGPROG (0x1000)
157 #define ACE_CTRL_CFGADDR_MASK (0xe000)
159 #define ACE_FATSTAT (0x1c)
161 #define ACE_NUM_MINORS 16
162 #define ACE_SECTOR_SIZE (512)
163 #define ACE_FIFO_SIZE (32)
164 #define ACE_BUF_PER_SECTOR (ACE_SECTOR_SIZE / ACE_FIFO_SIZE)
166 #define ACE_BUS_WIDTH_8 0
167 #define ACE_BUS_WIDTH_16 1
172 /* driver state data */
176 struct list_head list;
178 /* finite state machine data */
179 struct tasklet_struct fsm_tasklet;
180 uint fsm_task; /* Current activity (ACE_TASK_*) */
181 uint fsm_state; /* Current state (ACE_FSM_STATE_*) */
182 uint fsm_continue_flag; /* cleared to exit FSM mainloop */
184 struct timer_list stall_timer;
186 /* Transfer state/result, use for both id and block request */
187 struct request *req; /* request being processed */
188 void *data_ptr; /* pointer to I/O buffer */
189 int data_count; /* number of buffers remaining */
190 int data_result; /* Result of transfer; 0 := success */
192 int id_req_count; /* count of id requests */
194 struct completion id_completion; /* used when id req finishes */
197 /* Details of hardware device */
198 resource_size_t physaddr;
199 void __iomem *baseaddr;
201 int bus_width; /* 0 := 8 bit; 1 := 16 bit */
202 struct ace_reg_ops *reg_ops;
205 /* Block device data structures */
208 struct request_queue *queue;
211 /* Inserted CF card parameters */
212 u16 cf_id[ATA_ID_WORDS];
215 static int ace_major;
217 /* ---------------------------------------------------------------------
218 * Low level register access
222 u16(*in) (struct ace_device * ace, int reg);
223 void (*out) (struct ace_device * ace, int reg, u16 val);
224 void (*datain) (struct ace_device * ace);
225 void (*dataout) (struct ace_device * ace);
228 /* 8 Bit bus width */
229 static u16 ace_in_8(struct ace_device *ace, int reg)
231 void __iomem *r = ace->baseaddr + reg;
232 return in_8(r) | (in_8(r + 1) << 8);
235 static void ace_out_8(struct ace_device *ace, int reg, u16 val)
237 void __iomem *r = ace->baseaddr + reg;
239 out_8(r + 1, val >> 8);
242 static void ace_datain_8(struct ace_device *ace)
244 void __iomem *r = ace->baseaddr + 0x40;
245 u8 *dst = ace->data_ptr;
246 int i = ACE_FIFO_SIZE;
252 static void ace_dataout_8(struct ace_device *ace)
254 void __iomem *r = ace->baseaddr + 0x40;
255 u8 *src = ace->data_ptr;
256 int i = ACE_FIFO_SIZE;
262 static struct ace_reg_ops ace_reg_8_ops = {
265 .datain = ace_datain_8,
266 .dataout = ace_dataout_8,
269 /* 16 bit big endian bus attachment */
270 static u16 ace_in_be16(struct ace_device *ace, int reg)
272 return in_be16(ace->baseaddr + reg);
275 static void ace_out_be16(struct ace_device *ace, int reg, u16 val)
277 out_be16(ace->baseaddr + reg, val);
280 static void ace_datain_be16(struct ace_device *ace)
282 int i = ACE_FIFO_SIZE / 2;
283 u16 *dst = ace->data_ptr;
285 *dst++ = in_le16(ace->baseaddr + 0x40);
289 static void ace_dataout_be16(struct ace_device *ace)
291 int i = ACE_FIFO_SIZE / 2;
292 u16 *src = ace->data_ptr;
294 out_le16(ace->baseaddr + 0x40, *src++);
298 /* 16 bit little endian bus attachment */
299 static u16 ace_in_le16(struct ace_device *ace, int reg)
301 return in_le16(ace->baseaddr + reg);
304 static void ace_out_le16(struct ace_device *ace, int reg, u16 val)
306 out_le16(ace->baseaddr + reg, val);
309 static void ace_datain_le16(struct ace_device *ace)
311 int i = ACE_FIFO_SIZE / 2;
312 u16 *dst = ace->data_ptr;
314 *dst++ = in_be16(ace->baseaddr + 0x40);
318 static void ace_dataout_le16(struct ace_device *ace)
320 int i = ACE_FIFO_SIZE / 2;
321 u16 *src = ace->data_ptr;
323 out_be16(ace->baseaddr + 0x40, *src++);
327 static struct ace_reg_ops ace_reg_be16_ops = {
330 .datain = ace_datain_be16,
331 .dataout = ace_dataout_be16,
334 static struct ace_reg_ops ace_reg_le16_ops = {
337 .datain = ace_datain_le16,
338 .dataout = ace_dataout_le16,
341 static inline u16 ace_in(struct ace_device *ace, int reg)
343 return ace->reg_ops->in(ace, reg);
346 static inline u32 ace_in32(struct ace_device *ace, int reg)
348 return ace_in(ace, reg) | (ace_in(ace, reg + 2) << 16);
351 static inline void ace_out(struct ace_device *ace, int reg, u16 val)
353 ace->reg_ops->out(ace, reg, val);
356 static inline void ace_out32(struct ace_device *ace, int reg, u32 val)
358 ace_out(ace, reg, val);
359 ace_out(ace, reg + 2, val >> 16);
362 /* ---------------------------------------------------------------------
363 * Debug support functions
367 static void ace_dump_mem(void *base, int len)
369 const char *ptr = base;
372 for (i = 0; i < len; i += 16) {
373 printk(KERN_INFO "%.8x:", i);
374 for (j = 0; j < 16; j++) {
377 printk("%.2x", ptr[i + j]);
380 for (j = 0; j < 16; j++)
381 printk("%c", isprint(ptr[i + j]) ? ptr[i + j] : '.');
386 static inline void ace_dump_mem(void *base, int len)
391 static void ace_dump_regs(struct ace_device *ace)
393 dev_info(ace->dev, " ctrl: %.8x seccnt/cmd: %.4x ver:%.4x\n"
394 KERN_INFO " status:%.8x mpu_lba:%.8x busmode:%4x\n"
395 KERN_INFO " error: %.8x cfg_lba:%.8x fatstat:%.4x\n",
396 ace_in32(ace, ACE_CTRL),
397 ace_in(ace, ACE_SECCNTCMD),
398 ace_in(ace, ACE_VERSION),
399 ace_in32(ace, ACE_STATUS),
400 ace_in32(ace, ACE_MPULBA),
401 ace_in(ace, ACE_BUSMODE),
402 ace_in32(ace, ACE_ERROR),
403 ace_in32(ace, ACE_CFGLBA), ace_in(ace, ACE_FATSTAT));
406 void ace_fix_driveid(u16 *id)
408 #if defined(__BIG_ENDIAN)
411 /* All half words have wrong byte order; swap the bytes */
412 for (i = 0; i < ATA_ID_WORDS; i++, id++)
413 *id = le16_to_cpu(*id);
417 /* ---------------------------------------------------------------------
418 * Finite State Machine (FSM) implementation
421 /* FSM tasks; used to direct state transitions */
422 #define ACE_TASK_IDLE 0
423 #define ACE_TASK_IDENTIFY 1
424 #define ACE_TASK_READ 2
425 #define ACE_TASK_WRITE 3
426 #define ACE_FSM_NUM_TASKS 4
428 /* FSM state definitions */
429 #define ACE_FSM_STATE_IDLE 0
430 #define ACE_FSM_STATE_REQ_LOCK 1
431 #define ACE_FSM_STATE_WAIT_LOCK 2
432 #define ACE_FSM_STATE_WAIT_CFREADY 3
433 #define ACE_FSM_STATE_IDENTIFY_PREPARE 4
434 #define ACE_FSM_STATE_IDENTIFY_TRANSFER 5
435 #define ACE_FSM_STATE_IDENTIFY_COMPLETE 6
436 #define ACE_FSM_STATE_REQ_PREPARE 7
437 #define ACE_FSM_STATE_REQ_TRANSFER 8
438 #define ACE_FSM_STATE_REQ_COMPLETE 9
439 #define ACE_FSM_STATE_ERROR 10
440 #define ACE_FSM_NUM_STATES 11
442 /* Set flag to exit FSM loop and reschedule tasklet */
443 static inline void ace_fsm_yield(struct ace_device *ace)
445 dev_dbg(ace->dev, "ace_fsm_yield()\n");
446 tasklet_schedule(&ace->fsm_tasklet);
447 ace->fsm_continue_flag = 0;
450 /* Set flag to exit FSM loop and wait for IRQ to reschedule tasklet */
451 static inline void ace_fsm_yieldirq(struct ace_device *ace)
453 dev_dbg(ace->dev, "ace_fsm_yieldirq()\n");
455 if (ace->irq == NO_IRQ)
456 /* No IRQ assigned, so need to poll */
457 tasklet_schedule(&ace->fsm_tasklet);
458 ace->fsm_continue_flag = 0;
461 /* Get the next read/write request; ending requests that we don't handle */
462 struct request *ace_get_next_request(struct request_queue * q)
466 while ((req = blk_peek_request(q)) != NULL) {
467 if (blk_fs_request(req))
469 blk_start_request(req);
470 __blk_end_request_all(req, -EIO);
475 static void ace_fsm_dostate(struct ace_device *ace)
483 dev_dbg(ace->dev, "fsm_state=%i, id_req_count=%i\n",
484 ace->fsm_state, ace->id_req_count);
487 /* Verify that there is actually a CF in the slot. If not, then
488 * bail out back to the idle state and wake up all the waiters */
489 status = ace_in32(ace, ACE_STATUS);
490 if ((status & ACE_STATUS_CFDETECT) == 0) {
491 ace->fsm_state = ACE_FSM_STATE_IDLE;
492 ace->media_change = 1;
493 set_capacity(ace->gd, 0);
494 dev_info(ace->dev, "No CF in slot\n");
496 /* Drop all in-flight and pending requests */
498 __blk_end_request_all(ace->req, -EIO);
501 while ((req = blk_fetch_request(ace->queue)) != NULL)
502 __blk_end_request_all(req, -EIO);
504 /* Drop back to IDLE state and notify waiters */
505 ace->fsm_state = ACE_FSM_STATE_IDLE;
506 ace->id_result = -EIO;
507 while (ace->id_req_count) {
508 complete(&ace->id_completion);
513 switch (ace->fsm_state) {
514 case ACE_FSM_STATE_IDLE:
515 /* See if there is anything to do */
516 if (ace->id_req_count || ace_get_next_request(ace->queue)) {
518 ace->fsm_state = ACE_FSM_STATE_REQ_LOCK;
519 mod_timer(&ace->stall_timer, jiffies + HZ);
520 if (!timer_pending(&ace->stall_timer))
521 add_timer(&ace->stall_timer);
524 del_timer(&ace->stall_timer);
525 ace->fsm_continue_flag = 0;
528 case ACE_FSM_STATE_REQ_LOCK:
529 if (ace_in(ace, ACE_STATUS) & ACE_STATUS_MPULOCK) {
530 /* Already have the lock, jump to next state */
531 ace->fsm_state = ACE_FSM_STATE_WAIT_CFREADY;
535 /* Request the lock */
536 val = ace_in(ace, ACE_CTRL);
537 ace_out(ace, ACE_CTRL, val | ACE_CTRL_LOCKREQ);
538 ace->fsm_state = ACE_FSM_STATE_WAIT_LOCK;
541 case ACE_FSM_STATE_WAIT_LOCK:
542 if (ace_in(ace, ACE_STATUS) & ACE_STATUS_MPULOCK) {
543 /* got the lock; move to next state */
544 ace->fsm_state = ACE_FSM_STATE_WAIT_CFREADY;
548 /* wait a bit for the lock */
552 case ACE_FSM_STATE_WAIT_CFREADY:
553 status = ace_in32(ace, ACE_STATUS);
554 if (!(status & ACE_STATUS_RDYFORCFCMD) ||
555 (status & ACE_STATUS_CFBSY)) {
556 /* CF card isn't ready; it needs to be polled */
561 /* Device is ready for command; determine what to do next */
562 if (ace->id_req_count)
563 ace->fsm_state = ACE_FSM_STATE_IDENTIFY_PREPARE;
565 ace->fsm_state = ACE_FSM_STATE_REQ_PREPARE;
568 case ACE_FSM_STATE_IDENTIFY_PREPARE:
569 /* Send identify command */
570 ace->fsm_task = ACE_TASK_IDENTIFY;
571 ace->data_ptr = ace->cf_id;
572 ace->data_count = ACE_BUF_PER_SECTOR;
573 ace_out(ace, ACE_SECCNTCMD, ACE_SECCNTCMD_IDENTIFY);
575 /* As per datasheet, put config controller in reset */
576 val = ace_in(ace, ACE_CTRL);
577 ace_out(ace, ACE_CTRL, val | ACE_CTRL_CFGRESET);
579 /* irq handler takes over from this point; wait for the
580 * transfer to complete */
581 ace->fsm_state = ACE_FSM_STATE_IDENTIFY_TRANSFER;
582 ace_fsm_yieldirq(ace);
585 case ACE_FSM_STATE_IDENTIFY_TRANSFER:
586 /* Check that the sysace is ready to receive data */
587 status = ace_in32(ace, ACE_STATUS);
588 if (status & ACE_STATUS_CFBSY) {
589 dev_dbg(ace->dev, "CFBSY set; t=%i iter=%i dc=%i\n",
590 ace->fsm_task, ace->fsm_iter_num,
595 if (!(status & ACE_STATUS_DATABUFRDY)) {
600 /* Transfer the next buffer */
601 ace->reg_ops->datain(ace);
604 /* If there are still buffers to be transfers; jump out here */
605 if (ace->data_count != 0) {
606 ace_fsm_yieldirq(ace);
610 /* transfer finished; kick state machine */
611 dev_dbg(ace->dev, "identify finished\n");
612 ace->fsm_state = ACE_FSM_STATE_IDENTIFY_COMPLETE;
615 case ACE_FSM_STATE_IDENTIFY_COMPLETE:
616 ace_fix_driveid(ace->cf_id);
617 ace_dump_mem(ace->cf_id, 512); /* Debug: Dump out disk ID */
619 if (ace->data_result) {
620 /* Error occured, disable the disk */
621 ace->media_change = 1;
622 set_capacity(ace->gd, 0);
623 dev_err(ace->dev, "error fetching CF id (%i)\n",
626 ace->media_change = 0;
628 /* Record disk parameters */
629 set_capacity(ace->gd,
630 ata_id_u32(ace->cf_id, ATA_ID_LBA_CAPACITY));
631 dev_info(ace->dev, "capacity: %i sectors\n",
632 ata_id_u32(ace->cf_id, ATA_ID_LBA_CAPACITY));
635 /* We're done, drop to IDLE state and notify waiters */
636 ace->fsm_state = ACE_FSM_STATE_IDLE;
637 ace->id_result = ace->data_result;
638 while (ace->id_req_count) {
639 complete(&ace->id_completion);
644 case ACE_FSM_STATE_REQ_PREPARE:
645 req = ace_get_next_request(ace->queue);
647 ace->fsm_state = ACE_FSM_STATE_IDLE;
650 blk_start_request(req);
652 /* Okay, it's a data request, set it up for transfer */
654 "request: sec=%llx hcnt=%x, ccnt=%x, dir=%i\n",
655 (unsigned long long)blk_rq_pos(req),
656 blk_rq_sectors(req), blk_rq_cur_sectors(req),
660 ace->data_ptr = req->buffer;
661 ace->data_count = blk_rq_cur_sectors(req) * ACE_BUF_PER_SECTOR;
662 ace_out32(ace, ACE_MPULBA, blk_rq_pos(req) & 0x0FFFFFFF);
664 count = blk_rq_sectors(req);
665 if (rq_data_dir(req)) {
666 /* Kick off write request */
667 dev_dbg(ace->dev, "write data\n");
668 ace->fsm_task = ACE_TASK_WRITE;
669 ace_out(ace, ACE_SECCNTCMD,
670 count | ACE_SECCNTCMD_WRITE_DATA);
672 /* Kick off read request */
673 dev_dbg(ace->dev, "read data\n");
674 ace->fsm_task = ACE_TASK_READ;
675 ace_out(ace, ACE_SECCNTCMD,
676 count | ACE_SECCNTCMD_READ_DATA);
679 /* As per datasheet, put config controller in reset */
680 val = ace_in(ace, ACE_CTRL);
681 ace_out(ace, ACE_CTRL, val | ACE_CTRL_CFGRESET);
683 /* Move to the transfer state. The systemace will raise
684 * an interrupt once there is something to do
686 ace->fsm_state = ACE_FSM_STATE_REQ_TRANSFER;
687 if (ace->fsm_task == ACE_TASK_READ)
688 ace_fsm_yieldirq(ace); /* wait for data ready */
691 case ACE_FSM_STATE_REQ_TRANSFER:
692 /* Check that the sysace is ready to receive data */
693 status = ace_in32(ace, ACE_STATUS);
694 if (status & ACE_STATUS_CFBSY) {
696 "CFBSY set; t=%i iter=%i c=%i dc=%i irq=%i\n",
697 ace->fsm_task, ace->fsm_iter_num,
698 blk_rq_cur_sectors(ace->req) * 16,
699 ace->data_count, ace->in_irq);
700 ace_fsm_yield(ace); /* need to poll CFBSY bit */
703 if (!(status & ACE_STATUS_DATABUFRDY)) {
705 "DATABUF not set; t=%i iter=%i c=%i dc=%i irq=%i\n",
706 ace->fsm_task, ace->fsm_iter_num,
707 blk_rq_cur_sectors(ace->req) * 16,
708 ace->data_count, ace->in_irq);
709 ace_fsm_yieldirq(ace);
713 /* Transfer the next buffer */
714 if (ace->fsm_task == ACE_TASK_WRITE)
715 ace->reg_ops->dataout(ace);
717 ace->reg_ops->datain(ace);
720 /* If there are still buffers to be transfers; jump out here */
721 if (ace->data_count != 0) {
722 ace_fsm_yieldirq(ace);
726 /* bio finished; is there another one? */
727 if (__blk_end_request_cur(ace->req, 0)) {
728 /* dev_dbg(ace->dev, "next block; h=%u c=%u\n",
729 * blk_rq_sectors(ace->req),
730 * blk_rq_cur_sectors(ace->req));
732 ace->data_ptr = ace->req->buffer;
733 ace->data_count = blk_rq_cur_sectors(ace->req) * 16;
734 ace_fsm_yieldirq(ace);
738 ace->fsm_state = ACE_FSM_STATE_REQ_COMPLETE;
741 case ACE_FSM_STATE_REQ_COMPLETE:
744 /* Finished request; go to idle state */
745 ace->fsm_state = ACE_FSM_STATE_IDLE;
749 ace->fsm_state = ACE_FSM_STATE_IDLE;
754 static void ace_fsm_tasklet(unsigned long data)
756 struct ace_device *ace = (void *)data;
759 spin_lock_irqsave(&ace->lock, flags);
761 /* Loop over state machine until told to stop */
762 ace->fsm_continue_flag = 1;
763 while (ace->fsm_continue_flag)
764 ace_fsm_dostate(ace);
766 spin_unlock_irqrestore(&ace->lock, flags);
769 static void ace_stall_timer(unsigned long data)
771 struct ace_device *ace = (void *)data;
775 "kicking stalled fsm; state=%i task=%i iter=%i dc=%i\n",
776 ace->fsm_state, ace->fsm_task, ace->fsm_iter_num,
778 spin_lock_irqsave(&ace->lock, flags);
780 /* Rearm the stall timer *before* entering FSM (which may then
781 * delete the timer) */
782 mod_timer(&ace->stall_timer, jiffies + HZ);
784 /* Loop over state machine until told to stop */
785 ace->fsm_continue_flag = 1;
786 while (ace->fsm_continue_flag)
787 ace_fsm_dostate(ace);
789 spin_unlock_irqrestore(&ace->lock, flags);
792 /* ---------------------------------------------------------------------
793 * Interrupt handling routines
795 static int ace_interrupt_checkstate(struct ace_device *ace)
797 u32 sreg = ace_in32(ace, ACE_STATUS);
798 u16 creg = ace_in(ace, ACE_CTRL);
800 /* Check for error occurance */
801 if ((sreg & (ACE_STATUS_CFGERROR | ACE_STATUS_CFCERROR)) &&
802 (creg & ACE_CTRL_ERRORIRQ)) {
803 dev_err(ace->dev, "transfer failure\n");
811 static irqreturn_t ace_interrupt(int irq, void *dev_id)
814 struct ace_device *ace = dev_id;
816 /* be safe and get the lock */
817 spin_lock(&ace->lock);
820 /* clear the interrupt */
821 creg = ace_in(ace, ACE_CTRL);
822 ace_out(ace, ACE_CTRL, creg | ACE_CTRL_RESETIRQ);
823 ace_out(ace, ACE_CTRL, creg);
825 /* check for IO failures */
826 if (ace_interrupt_checkstate(ace))
827 ace->data_result = -EIO;
829 if (ace->fsm_task == 0) {
831 "spurious irq; stat=%.8x ctrl=%.8x cmd=%.4x\n",
832 ace_in32(ace, ACE_STATUS), ace_in32(ace, ACE_CTRL),
833 ace_in(ace, ACE_SECCNTCMD));
834 dev_err(ace->dev, "fsm_task=%i fsm_state=%i data_count=%i\n",
835 ace->fsm_task, ace->fsm_state, ace->data_count);
838 /* Loop over state machine until told to stop */
839 ace->fsm_continue_flag = 1;
840 while (ace->fsm_continue_flag)
841 ace_fsm_dostate(ace);
843 /* done with interrupt; drop the lock */
845 spin_unlock(&ace->lock);
850 /* ---------------------------------------------------------------------
853 static void ace_request(struct request_queue * q)
856 struct ace_device *ace;
858 req = ace_get_next_request(q);
861 ace = req->rq_disk->private_data;
862 tasklet_schedule(&ace->fsm_tasklet);
866 static int ace_media_changed(struct gendisk *gd)
868 struct ace_device *ace = gd->private_data;
869 dev_dbg(ace->dev, "ace_media_changed(): %i\n", ace->media_change);
871 return ace->media_change;
874 static int ace_revalidate_disk(struct gendisk *gd)
876 struct ace_device *ace = gd->private_data;
879 dev_dbg(ace->dev, "ace_revalidate_disk()\n");
881 if (ace->media_change) {
882 dev_dbg(ace->dev, "requesting cf id and scheduling tasklet\n");
884 spin_lock_irqsave(&ace->lock, flags);
886 spin_unlock_irqrestore(&ace->lock, flags);
888 tasklet_schedule(&ace->fsm_tasklet);
889 wait_for_completion(&ace->id_completion);
892 dev_dbg(ace->dev, "revalidate complete\n");
893 return ace->id_result;
896 static int ace_open(struct block_device *bdev, fmode_t mode)
898 struct ace_device *ace = bdev->bd_disk->private_data;
901 dev_dbg(ace->dev, "ace_open() users=%i\n", ace->users + 1);
903 spin_lock_irqsave(&ace->lock, flags);
905 spin_unlock_irqrestore(&ace->lock, flags);
907 check_disk_change(bdev);
911 static int ace_release(struct gendisk *disk, fmode_t mode)
913 struct ace_device *ace = disk->private_data;
917 dev_dbg(ace->dev, "ace_release() users=%i\n", ace->users - 1);
919 spin_lock_irqsave(&ace->lock, flags);
921 if (ace->users == 0) {
922 val = ace_in(ace, ACE_CTRL);
923 ace_out(ace, ACE_CTRL, val & ~ACE_CTRL_LOCKREQ);
925 spin_unlock_irqrestore(&ace->lock, flags);
929 static int ace_getgeo(struct block_device *bdev, struct hd_geometry *geo)
931 struct ace_device *ace = bdev->bd_disk->private_data;
932 u16 *cf_id = ace->cf_id;
934 dev_dbg(ace->dev, "ace_getgeo()\n");
936 geo->heads = cf_id[ATA_ID_HEADS];
937 geo->sectors = cf_id[ATA_ID_SECTORS];
938 geo->cylinders = cf_id[ATA_ID_CYLS];
943 static struct block_device_operations ace_fops = {
944 .owner = THIS_MODULE,
946 .release = ace_release,
947 .media_changed = ace_media_changed,
948 .revalidate_disk = ace_revalidate_disk,
949 .getgeo = ace_getgeo,
952 /* --------------------------------------------------------------------
953 * SystemACE device setup/teardown code
955 static int __devinit ace_setup(struct ace_device *ace)
961 dev_dbg(ace->dev, "ace_setup(ace=0x%p)\n", ace);
962 dev_dbg(ace->dev, "physaddr=0x%llx irq=%i\n",
963 (unsigned long long)ace->physaddr, ace->irq);
965 spin_lock_init(&ace->lock);
966 init_completion(&ace->id_completion);
971 ace->baseaddr = ioremap(ace->physaddr, 0x80);
976 * Initialize the state machine tasklet and stall timer
978 tasklet_init(&ace->fsm_tasklet, ace_fsm_tasklet, (unsigned long)ace);
979 setup_timer(&ace->stall_timer, ace_stall_timer, (unsigned long)ace);
982 * Initialize the request queue
984 ace->queue = blk_init_queue(ace_request, &ace->lock);
985 if (ace->queue == NULL)
987 blk_queue_logical_block_size(ace->queue, 512);
990 * Allocate and initialize GD structure
992 ace->gd = alloc_disk(ACE_NUM_MINORS);
996 ace->gd->major = ace_major;
997 ace->gd->first_minor = ace->id * ACE_NUM_MINORS;
998 ace->gd->fops = &ace_fops;
999 ace->gd->queue = ace->queue;
1000 ace->gd->private_data = ace;
1001 snprintf(ace->gd->disk_name, 32, "xs%c", ace->id + 'a');
1004 if (ace->bus_width == ACE_BUS_WIDTH_16) {
1005 /* 0x0101 should work regardless of endianess */
1006 ace_out_le16(ace, ACE_BUSMODE, 0x0101);
1008 /* read it back to determine endianess */
1009 if (ace_in_le16(ace, ACE_BUSMODE) == 0x0001)
1010 ace->reg_ops = &ace_reg_le16_ops;
1012 ace->reg_ops = &ace_reg_be16_ops;
1014 ace_out_8(ace, ACE_BUSMODE, 0x00);
1015 ace->reg_ops = &ace_reg_8_ops;
1018 /* Make sure version register is sane */
1019 version = ace_in(ace, ACE_VERSION);
1020 if ((version == 0) || (version == 0xFFFF))
1023 /* Put sysace in a sane state by clearing most control reg bits */
1024 ace_out(ace, ACE_CTRL, ACE_CTRL_FORCECFGMODE |
1025 ACE_CTRL_DATABUFRDYIRQ | ACE_CTRL_ERRORIRQ);
1027 /* Now we can hook up the irq handler */
1028 if (ace->irq != NO_IRQ) {
1029 rc = request_irq(ace->irq, ace_interrupt, 0, "systemace", ace);
1031 /* Failure - fall back to polled mode */
1032 dev_err(ace->dev, "request_irq failed\n");
1037 /* Enable interrupts */
1038 val = ace_in(ace, ACE_CTRL);
1039 val |= ACE_CTRL_DATABUFRDYIRQ | ACE_CTRL_ERRORIRQ;
1040 ace_out(ace, ACE_CTRL, val);
1042 /* Print the identification */
1043 dev_info(ace->dev, "Xilinx SystemACE revision %i.%i.%i\n",
1044 (version >> 12) & 0xf, (version >> 8) & 0x0f, version & 0xff);
1045 dev_dbg(ace->dev, "physaddr 0x%llx, mapped to 0x%p, irq=%i\n",
1046 (unsigned long long) ace->physaddr, ace->baseaddr, ace->irq);
1048 ace->media_change = 1;
1049 ace_revalidate_disk(ace->gd);
1051 /* Make the sysace device 'live' */
1059 blk_cleanup_queue(ace->queue);
1061 iounmap(ace->baseaddr);
1063 dev_info(ace->dev, "xsysace: error initializing device at 0x%llx\n",
1064 (unsigned long long) ace->physaddr);
1068 static void __devexit ace_teardown(struct ace_device *ace)
1071 del_gendisk(ace->gd);
1076 blk_cleanup_queue(ace->queue);
1078 tasklet_kill(&ace->fsm_tasklet);
1080 if (ace->irq != NO_IRQ)
1081 free_irq(ace->irq, ace);
1083 iounmap(ace->baseaddr);
1086 static int __devinit
1087 ace_alloc(struct device *dev, int id, resource_size_t physaddr,
1088 int irq, int bus_width)
1090 struct ace_device *ace;
1092 dev_dbg(dev, "ace_alloc(%p)\n", dev);
1099 /* Allocate and initialize the ace device structure */
1100 ace = kzalloc(sizeof(struct ace_device), GFP_KERNEL);
1108 ace->physaddr = physaddr;
1110 ace->bus_width = bus_width;
1112 /* Call the setup code */
1113 rc = ace_setup(ace);
1117 dev_set_drvdata(dev, ace);
1121 dev_set_drvdata(dev, NULL);
1125 dev_err(dev, "could not initialize device, err=%i\n", rc);
1129 static void __devexit ace_free(struct device *dev)
1131 struct ace_device *ace = dev_get_drvdata(dev);
1132 dev_dbg(dev, "ace_free(%p)\n", dev);
1136 dev_set_drvdata(dev, NULL);
1141 /* ---------------------------------------------------------------------
1142 * Platform Bus Support
1145 static int __devinit ace_probe(struct platform_device *dev)
1147 resource_size_t physaddr = 0;
1148 int bus_width = ACE_BUS_WIDTH_16; /* FIXME: should not be hard coded */
1153 dev_dbg(&dev->dev, "ace_probe(%p)\n", dev);
1155 for (i = 0; i < dev->num_resources; i++) {
1156 if (dev->resource[i].flags & IORESOURCE_MEM)
1157 physaddr = dev->resource[i].start;
1158 if (dev->resource[i].flags & IORESOURCE_IRQ)
1159 irq = dev->resource[i].start;
1162 /* Call the bus-independant setup code */
1163 return ace_alloc(&dev->dev, id, physaddr, irq, bus_width);
1167 * Platform bus remove() method
1169 static int __devexit ace_remove(struct platform_device *dev)
1171 ace_free(&dev->dev);
1175 static struct platform_driver ace_platform_driver = {
1177 .remove = __devexit_p(ace_remove),
1179 .owner = THIS_MODULE,
1184 /* ---------------------------------------------------------------------
1185 * OF_Platform Bus Support
1188 #if defined(CONFIG_OF)
1189 static int __devinit
1190 ace_of_probe(struct of_device *op, const struct of_device_id *match)
1192 struct resource res;
1193 resource_size_t physaddr;
1195 int irq, bus_width, rc;
1197 dev_dbg(&op->dev, "ace_of_probe(%p, %p)\n", op, match);
1200 id = of_get_property(op->node, "port-number", NULL);
1203 rc = of_address_to_resource(op->node, 0, &res);
1205 dev_err(&op->dev, "invalid address\n");
1208 physaddr = res.start;
1211 irq = irq_of_parse_and_map(op->node, 0);
1214 bus_width = ACE_BUS_WIDTH_16;
1215 if (of_find_property(op->node, "8-bit", NULL))
1216 bus_width = ACE_BUS_WIDTH_8;
1218 /* Call the bus-independant setup code */
1219 return ace_alloc(&op->dev, id ? *id : 0, physaddr, irq, bus_width);
1222 static int __devexit ace_of_remove(struct of_device *op)
1228 /* Match table for of_platform binding */
1229 static struct of_device_id ace_of_match[] __devinitdata = {
1230 { .compatible = "xlnx,opb-sysace-1.00.b", },
1231 { .compatible = "xlnx,opb-sysace-1.00.c", },
1232 { .compatible = "xlnx,xps-sysace-1.00.a", },
1233 { .compatible = "xlnx,sysace", },
1236 MODULE_DEVICE_TABLE(of, ace_of_match);
1238 static struct of_platform_driver ace_of_driver = {
1239 .owner = THIS_MODULE,
1241 .match_table = ace_of_match,
1242 .probe = ace_of_probe,
1243 .remove = __devexit_p(ace_of_remove),
1249 /* Registration helpers to keep the number of #ifdefs to a minimum */
1250 static inline int __init ace_of_register(void)
1252 pr_debug("xsysace: registering OF binding\n");
1253 return of_register_platform_driver(&ace_of_driver);
1256 static inline void __exit ace_of_unregister(void)
1258 of_unregister_platform_driver(&ace_of_driver);
1260 #else /* CONFIG_OF */
1261 /* CONFIG_OF not enabled; do nothing helpers */
1262 static inline int __init ace_of_register(void) { return 0; }
1263 static inline void __exit ace_of_unregister(void) { }
1264 #endif /* CONFIG_OF */
1266 /* ---------------------------------------------------------------------
1267 * Module init/exit routines
1269 static int __init ace_init(void)
1273 ace_major = register_blkdev(ace_major, "xsysace");
1274 if (ace_major <= 0) {
1279 rc = ace_of_register();
1283 pr_debug("xsysace: registering platform binding\n");
1284 rc = platform_driver_register(&ace_platform_driver);
1288 pr_info("Xilinx SystemACE device driver, major=%i\n", ace_major);
1292 ace_of_unregister();
1294 unregister_blkdev(ace_major, "xsysace");
1296 printk(KERN_ERR "xsysace: registration failed; err=%i\n", rc);
1300 static void __exit ace_exit(void)
1302 pr_debug("Unregistering Xilinx SystemACE driver\n");
1303 platform_driver_unregister(&ace_platform_driver);
1304 ace_of_unregister();
1305 unregister_blkdev(ace_major, "xsysace");
1308 module_init(ace_init);
1309 module_exit(ace_exit);