1 /* zd_rf_al2230.c: Functions for the AL2230 RF controller
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation; either version 2 of the License, or
6 * (at your option) any later version.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 #include <linux/kernel.h>
24 #define IS_AL2230S(chip) ((chip)->al2230s_bit || (chip)->rf.type == AL2230S_RF)
26 static const u32 zd1211_al2230_table[][3] = {
27 RF_CHANNEL( 1) = { 0x03f790, 0x033331, 0x00000d, },
28 RF_CHANNEL( 2) = { 0x03f790, 0x0b3331, 0x00000d, },
29 RF_CHANNEL( 3) = { 0x03e790, 0x033331, 0x00000d, },
30 RF_CHANNEL( 4) = { 0x03e790, 0x0b3331, 0x00000d, },
31 RF_CHANNEL( 5) = { 0x03f7a0, 0x033331, 0x00000d, },
32 RF_CHANNEL( 6) = { 0x03f7a0, 0x0b3331, 0x00000d, },
33 RF_CHANNEL( 7) = { 0x03e7a0, 0x033331, 0x00000d, },
34 RF_CHANNEL( 8) = { 0x03e7a0, 0x0b3331, 0x00000d, },
35 RF_CHANNEL( 9) = { 0x03f7b0, 0x033331, 0x00000d, },
36 RF_CHANNEL(10) = { 0x03f7b0, 0x0b3331, 0x00000d, },
37 RF_CHANNEL(11) = { 0x03e7b0, 0x033331, 0x00000d, },
38 RF_CHANNEL(12) = { 0x03e7b0, 0x0b3331, 0x00000d, },
39 RF_CHANNEL(13) = { 0x03f7c0, 0x033331, 0x00000d, },
40 RF_CHANNEL(14) = { 0x03e7c0, 0x066661, 0x00000d, },
43 static const u32 zd1211b_al2230_table[][3] = {
44 RF_CHANNEL( 1) = { 0x09efc0, 0x8cccc0, 0xb00000, },
45 RF_CHANNEL( 2) = { 0x09efc0, 0x8cccd0, 0xb00000, },
46 RF_CHANNEL( 3) = { 0x09e7c0, 0x8cccc0, 0xb00000, },
47 RF_CHANNEL( 4) = { 0x09e7c0, 0x8cccd0, 0xb00000, },
48 RF_CHANNEL( 5) = { 0x05efc0, 0x8cccc0, 0xb00000, },
49 RF_CHANNEL( 6) = { 0x05efc0, 0x8cccd0, 0xb00000, },
50 RF_CHANNEL( 7) = { 0x05e7c0, 0x8cccc0, 0xb00000, },
51 RF_CHANNEL( 8) = { 0x05e7c0, 0x8cccd0, 0xb00000, },
52 RF_CHANNEL( 9) = { 0x0defc0, 0x8cccc0, 0xb00000, },
53 RF_CHANNEL(10) = { 0x0defc0, 0x8cccd0, 0xb00000, },
54 RF_CHANNEL(11) = { 0x0de7c0, 0x8cccc0, 0xb00000, },
55 RF_CHANNEL(12) = { 0x0de7c0, 0x8cccd0, 0xb00000, },
56 RF_CHANNEL(13) = { 0x03efc0, 0x8cccc0, 0xb00000, },
57 RF_CHANNEL(14) = { 0x03e7c0, 0x866660, 0xb00000, },
60 static const struct zd_ioreq16 zd1211b_ioreqs_shared_1[] = {
61 { CR240, 0x57 }, { CR9, 0xe0 },
64 static const struct zd_ioreq16 ioreqs_init_al2230s[] = {
65 { CR47, 0x1e }, /* MARK_002 */
67 { CR107, 0x2a }, /* MARK_002 */
68 { CR109, 0x13 }, /* MARK_002 */
69 { CR118, 0xf8 }, /* MARK_002 */
70 { CR119, 0x12 }, { CR122, 0xe0 },
71 { CR128, 0x10 }, /* MARK_001 from 0xe->0x10 */
72 { CR129, 0x0e }, /* MARK_001 from 0xd->0x0e */
73 { CR130, 0x10 }, /* MARK_001 from 0xb->0x0d */
76 static int zd1211b_al2230_finalize_rf(struct zd_chip *chip)
79 static const struct zd_ioreq16 ioreqs[] = {
80 { CR80, 0x30 }, { CR81, 0x30 }, { CR79, 0x58 },
81 { CR12, 0xf0 }, { CR77, 0x1b }, { CR78, 0x58 },
88 r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
92 /* related to antenna selection? */
93 if (chip->new_phy_layout) {
94 r = zd_iowrite16_locked(chip, 0xe1, CR9);
99 return zd_iowrite16_locked(chip, 0x06, CR203);
102 static int zd1211_al2230_init_hw(struct zd_rf *rf)
105 struct zd_chip *chip = zd_rf_to_chip(rf);
107 static const struct zd_ioreq16 ioreqs_init[] = {
108 { CR15, 0x20 }, { CR23, 0x40 }, { CR24, 0x20 },
109 { CR26, 0x11 }, { CR28, 0x3e }, { CR29, 0x00 },
110 { CR44, 0x33 }, { CR106, 0x2a }, { CR107, 0x1a },
111 { CR109, 0x09 }, { CR110, 0x27 }, { CR111, 0x2b },
112 { CR112, 0x2b }, { CR119, 0x0a }, { CR10, 0x89 },
113 /* for newest (3rd cut) AL2300 */
115 { CR26, 0x93 }, { CR34, 0x30 },
116 /* for newest (3rd cut) AL2300 */
118 { CR41, 0x24 }, { CR44, 0x32 },
119 /* for newest (3rd cut) AL2300 */
121 { CR47, 0x1e }, { CR79, 0x58 }, { CR80, 0x30 },
122 { CR81, 0x30 }, { CR87, 0x0a }, { CR89, 0x04 },
123 { CR92, 0x0a }, { CR99, 0x28 }, { CR100, 0x00 },
124 { CR101, 0x13 }, { CR102, 0x27 }, { CR106, 0x24 },
125 { CR107, 0x2a }, { CR109, 0x09 }, { CR110, 0x13 },
126 { CR111, 0x1f }, { CR112, 0x1f }, { CR113, 0x27 },
128 /* for newest (3rd cut) AL2300 */
130 { CR116, 0x24 }, { CR117, 0xf4 }, { CR118, 0xfc },
131 { CR119, 0x10 }, { CR120, 0x4f }, { CR121, 0x77 },
132 { CR122, 0xe0 }, { CR137, 0x88 }, { CR252, 0xff },
136 static const struct zd_ioreq16 ioreqs_pll[] = {
137 /* shdnb(PLL_ON)=0 */
139 /* shdnb(PLL_ON)=1 */
141 { CR138, 0x28 }, { CR203, 0x06 },
144 static const u32 rv1[] = {
155 static const u32 rv2[] = {
157 0x0f4dc5, /* fix freq shift, 0x04edc5 */
161 0x0403b9, /* external control TX power (CR31) */
169 static const u32 rv3[] = {
177 r = zd_iowrite16a_locked(chip, ioreqs_init, ARRAY_SIZE(ioreqs_init));
181 if (IS_AL2230S(chip)) {
182 r = zd_iowrite16a_locked(chip, ioreqs_init_al2230s,
183 ARRAY_SIZE(ioreqs_init_al2230s));
188 r = zd_rfwritev_locked(chip, rv1, ARRAY_SIZE(rv1), RF_RV_BITS);
192 /* improve band edge for AL2230S */
193 if (IS_AL2230S(chip))
194 r = zd_rfwrite_locked(chip, 0x000824, RF_RV_BITS);
196 r = zd_rfwrite_locked(chip, 0x0005a4, RF_RV_BITS);
200 r = zd_rfwritev_locked(chip, rv2, ARRAY_SIZE(rv2), RF_RV_BITS);
204 r = zd_iowrite16a_locked(chip, ioreqs_pll, ARRAY_SIZE(ioreqs_pll));
208 r = zd_rfwritev_locked(chip, rv3, ARRAY_SIZE(rv3), RF_RV_BITS);
215 static int zd1211b_al2230_init_hw(struct zd_rf *rf)
218 struct zd_chip *chip = zd_rf_to_chip(rf);
220 static const struct zd_ioreq16 ioreqs1[] = {
221 { CR10, 0x89 }, { CR15, 0x20 },
222 { CR17, 0x2B }, /* for newest(3rd cut) AL2230 */
223 { CR23, 0x40 }, { CR24, 0x20 }, { CR26, 0x93 },
224 { CR28, 0x3e }, { CR29, 0x00 },
225 { CR33, 0x28 }, /* 5621 */
227 { CR35, 0x3e }, /* for newest(3rd cut) AL2230 */
228 { CR41, 0x24 }, { CR44, 0x32 },
229 { CR46, 0x99 }, /* for newest(3rd cut) AL2230 */
232 /* ZD1211B 05.06.10 */
233 { CR48, 0x06 }, { CR49, 0xf9 }, { CR51, 0x01 },
234 { CR52, 0x80 }, { CR53, 0x7e }, { CR65, 0x00 },
235 { CR66, 0x00 }, { CR67, 0x00 }, { CR68, 0x00 },
238 { CR79, 0x58 }, { CR80, 0x30 }, { CR81, 0x30 },
239 { CR87, 0x0a }, { CR89, 0x04 },
240 { CR91, 0x00 }, /* 5621 */
242 { CR98, 0x8d }, /* 4804, for 1212 new algorithm */
243 { CR99, 0x00 }, /* 5621 */
244 { CR101, 0x13 }, { CR102, 0x27 },
245 { CR106, 0x24 }, /* for newest(3rd cut) AL2230 */
247 { CR109, 0x13 }, /* 4804, for 1212 new algorithm */
248 { CR110, 0x1f }, /* 4804, for 1212 new algorithm */
249 { CR111, 0x1f }, { CR112, 0x1f }, { CR113, 0x27 },
251 { CR115, 0x26 }, /* 24->26 at 4902 for newest(3rd cut) AL2230 */
253 { CR117, 0xfa }, /* for 1211b */
254 { CR118, 0xfa }, /* for 1211b */
257 { CR121, 0x6c }, /* for 1211b */
258 { CR122, 0xfc }, /* E0->FC at 4902 */
259 { CR123, 0x57 }, /* 5623 */
260 { CR125, 0xad }, /* 4804, for 1212 new algorithm */
261 { CR126, 0x6c }, /* 5614 */
262 { CR127, 0x03 }, /* 4804, for 1212 new algorithm */
263 { CR137, 0x50 }, /* 5614 */
265 { CR144, 0xac }, /* 5621 */
266 { CR150, 0x0d }, { CR252, 0x34 }, { CR253, 0x34 },
269 static const u32 rv1[] = {
276 static const u32 rv2[] = {
277 /* To improve AL2230 yield, improve phase noise, 4713 */
281 0x6da010, /* Reg6 update for MP versio */
282 0xe36280, /* Modified by jxiao for Bor-Chin on 2004/08/02 */
284 0x9dc020, /* External control TX power (CR31) */
285 0x5ddb00, /* RegA update for MP version */
286 0xd99000, /* RegB update for MP version */
287 0x3ffbd0, /* RegC update for MP version */
288 0xb00000, /* RegD update for MP version */
290 /* improve phase noise and remove phase calibration,4713 */
294 static const struct zd_ioreq16 ioreqs2[] = {
295 { CR251, 0x2f }, /* shdnb(PLL_ON)=0 */
296 { CR251, 0x7f }, /* shdnb(PLL_ON)=1 */
299 static const u32 rv3[] = {
300 /* To improve AL2230 yield, 4713 */
306 static const struct zd_ioreq16 ioreqs3[] = {
307 /* related to 6M band edge patching, happens unconditionally */
308 { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 },
311 r = zd_iowrite16a_locked(chip, zd1211b_ioreqs_shared_1,
312 ARRAY_SIZE(zd1211b_ioreqs_shared_1));
315 r = zd_iowrite16a_locked(chip, ioreqs1, ARRAY_SIZE(ioreqs1));
319 if (IS_AL2230S(chip)) {
320 r = zd_iowrite16a_locked(chip, ioreqs_init_al2230s,
321 ARRAY_SIZE(ioreqs_init_al2230s));
326 r = zd_rfwritev_cr_locked(chip, zd1211b_al2230_table[0], 3);
329 r = zd_rfwritev_cr_locked(chip, rv1, ARRAY_SIZE(rv1));
333 if (IS_AL2230S(chip))
334 r = zd_rfwrite_locked(chip, 0x241000, RF_RV_BITS);
336 r = zd_rfwrite_locked(chip, 0x25a000, RF_RV_BITS);
340 r = zd_rfwritev_cr_locked(chip, rv2, ARRAY_SIZE(rv2));
343 r = zd_iowrite16a_locked(chip, ioreqs2, ARRAY_SIZE(ioreqs2));
346 r = zd_rfwritev_cr_locked(chip, rv3, ARRAY_SIZE(rv3));
349 r = zd_iowrite16a_locked(chip, ioreqs3, ARRAY_SIZE(ioreqs3));
352 return zd1211b_al2230_finalize_rf(chip);
355 static int zd1211_al2230_set_channel(struct zd_rf *rf, u8 channel)
358 const u32 *rv = zd1211_al2230_table[channel-1];
359 struct zd_chip *chip = zd_rf_to_chip(rf);
360 static const struct zd_ioreq16 ioreqs[] = {
365 r = zd_rfwritev_locked(chip, rv, 3, RF_RV_BITS);
368 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
371 static int zd1211b_al2230_set_channel(struct zd_rf *rf, u8 channel)
374 const u32 *rv = zd1211b_al2230_table[channel-1];
375 struct zd_chip *chip = zd_rf_to_chip(rf);
377 r = zd_iowrite16a_locked(chip, zd1211b_ioreqs_shared_1,
378 ARRAY_SIZE(zd1211b_ioreqs_shared_1));
382 r = zd_rfwritev_cr_locked(chip, rv, 3);
386 return zd1211b_al2230_finalize_rf(chip);
389 static int zd1211_al2230_switch_radio_on(struct zd_rf *rf)
391 struct zd_chip *chip = zd_rf_to_chip(rf);
392 static const struct zd_ioreq16 ioreqs[] = {
397 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
400 static int zd1211b_al2230_switch_radio_on(struct zd_rf *rf)
402 struct zd_chip *chip = zd_rf_to_chip(rf);
403 static const struct zd_ioreq16 ioreqs[] = {
408 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
411 static int al2230_switch_radio_off(struct zd_rf *rf)
413 struct zd_chip *chip = zd_rf_to_chip(rf);
414 static const struct zd_ioreq16 ioreqs[] = {
419 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
422 int zd_rf_init_al2230(struct zd_rf *rf)
424 struct zd_chip *chip = zd_rf_to_chip(rf);
426 rf->switch_radio_off = al2230_switch_radio_off;
427 if (zd_chip_is_zd1211b(chip)) {
428 rf->init_hw = zd1211b_al2230_init_hw;
429 rf->set_channel = zd1211b_al2230_set_channel;
430 rf->switch_radio_on = zd1211b_al2230_switch_radio_on;
432 rf->init_hw = zd1211_al2230_init_hw;
433 rf->set_channel = zd1211_al2230_set_channel;
434 rf->switch_radio_on = zd1211_al2230_switch_radio_on;
436 rf->patch_6m_band_edge = zd_rf_generic_patch_6m;
437 rf->patch_cck_gain = 1;