2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
23 struct cpu_spec* cur_cpu_spec = NULL;
24 EXPORT_SYMBOL(cur_cpu_spec);
27 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
28 * the responsibility of the appropriate CPU save/restore functions to
29 * eventually copy these settings over. Those save/restore aren't yet
30 * part of the cputable though. That has to be fixed for both ppc32
34 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
35 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
36 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
37 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
38 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
39 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
42 #endif /* CONFIG_PPC32 */
44 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
46 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
47 extern void __restore_cpu_pa6t(void);
48 extern void __restore_cpu_ppc970(void);
49 #endif /* CONFIG_PPC64 */
51 /* This table only contains "desktop" CPUs, it need to be filled with embedded
54 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
56 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
57 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
58 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
59 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
60 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
61 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
62 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
63 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
65 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
66 PPC_FEATURE_TRUE_LE | \
67 PPC_FEATURE_HAS_ALTIVEC_COMP)
68 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
71 /* We only set the spe features if the kernel was compiled with
75 #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
77 #define PPC_FEATURE_SPE_COMP 0
80 static struct cpu_spec cpu_specs[] = {
83 .pvr_mask = 0xffff0000,
84 .pvr_value = 0x00400000,
85 .cpu_name = "POWER3 (630)",
86 .cpu_features = CPU_FTRS_POWER3,
87 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
91 .pmc_type = PPC_PMC_IBM,
92 .oprofile_cpu_type = "ppc64/power3",
93 .oprofile_type = PPC_OPROFILE_RS64,
97 .pvr_mask = 0xffff0000,
98 .pvr_value = 0x00410000,
99 .cpu_name = "POWER3 (630+)",
100 .cpu_features = CPU_FTRS_POWER3,
101 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
105 .pmc_type = PPC_PMC_IBM,
106 .oprofile_cpu_type = "ppc64/power3",
107 .oprofile_type = PPC_OPROFILE_RS64,
108 .platform = "power3",
111 .pvr_mask = 0xffff0000,
112 .pvr_value = 0x00330000,
113 .cpu_name = "RS64-II (northstar)",
114 .cpu_features = CPU_FTRS_RS64,
115 .cpu_user_features = COMMON_USER_PPC64,
119 .pmc_type = PPC_PMC_IBM,
120 .oprofile_cpu_type = "ppc64/rs64",
121 .oprofile_type = PPC_OPROFILE_RS64,
125 .pvr_mask = 0xffff0000,
126 .pvr_value = 0x00340000,
127 .cpu_name = "RS64-III (pulsar)",
128 .cpu_features = CPU_FTRS_RS64,
129 .cpu_user_features = COMMON_USER_PPC64,
133 .pmc_type = PPC_PMC_IBM,
134 .oprofile_cpu_type = "ppc64/rs64",
135 .oprofile_type = PPC_OPROFILE_RS64,
139 .pvr_mask = 0xffff0000,
140 .pvr_value = 0x00360000,
141 .cpu_name = "RS64-III (icestar)",
142 .cpu_features = CPU_FTRS_RS64,
143 .cpu_user_features = COMMON_USER_PPC64,
147 .pmc_type = PPC_PMC_IBM,
148 .oprofile_cpu_type = "ppc64/rs64",
149 .oprofile_type = PPC_OPROFILE_RS64,
153 .pvr_mask = 0xffff0000,
154 .pvr_value = 0x00370000,
155 .cpu_name = "RS64-IV (sstar)",
156 .cpu_features = CPU_FTRS_RS64,
157 .cpu_user_features = COMMON_USER_PPC64,
161 .pmc_type = PPC_PMC_IBM,
162 .oprofile_cpu_type = "ppc64/rs64",
163 .oprofile_type = PPC_OPROFILE_RS64,
167 .pvr_mask = 0xffff0000,
168 .pvr_value = 0x00350000,
169 .cpu_name = "POWER4 (gp)",
170 .cpu_features = CPU_FTRS_POWER4,
171 .cpu_user_features = COMMON_USER_POWER4,
175 .pmc_type = PPC_PMC_IBM,
176 .oprofile_cpu_type = "ppc64/power4",
177 .oprofile_type = PPC_OPROFILE_POWER4,
178 .platform = "power4",
181 .pvr_mask = 0xffff0000,
182 .pvr_value = 0x00380000,
183 .cpu_name = "POWER4+ (gq)",
184 .cpu_features = CPU_FTRS_POWER4,
185 .cpu_user_features = COMMON_USER_POWER4,
189 .pmc_type = PPC_PMC_IBM,
190 .oprofile_cpu_type = "ppc64/power4",
191 .oprofile_type = PPC_OPROFILE_POWER4,
192 .platform = "power4",
195 .pvr_mask = 0xffff0000,
196 .pvr_value = 0x00390000,
197 .cpu_name = "PPC970",
198 .cpu_features = CPU_FTRS_PPC970,
199 .cpu_user_features = COMMON_USER_POWER4 |
200 PPC_FEATURE_HAS_ALTIVEC_COMP,
204 .pmc_type = PPC_PMC_IBM,
205 .cpu_setup = __setup_cpu_ppc970,
206 .cpu_restore = __restore_cpu_ppc970,
207 .oprofile_cpu_type = "ppc64/970",
208 .oprofile_type = PPC_OPROFILE_POWER4,
209 .platform = "ppc970",
212 .pvr_mask = 0xffff0000,
213 .pvr_value = 0x003c0000,
214 .cpu_name = "PPC970FX",
215 .cpu_features = CPU_FTRS_PPC970,
216 .cpu_user_features = COMMON_USER_POWER4 |
217 PPC_FEATURE_HAS_ALTIVEC_COMP,
221 .pmc_type = PPC_PMC_IBM,
222 .cpu_setup = __setup_cpu_ppc970,
223 .cpu_restore = __restore_cpu_ppc970,
224 .oprofile_cpu_type = "ppc64/970",
225 .oprofile_type = PPC_OPROFILE_POWER4,
226 .platform = "ppc970",
228 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
229 .pvr_mask = 0xffffffff,
230 .pvr_value = 0x00440100,
231 .cpu_name = "PPC970MP",
232 .cpu_features = CPU_FTRS_PPC970,
233 .cpu_user_features = COMMON_USER_POWER4 |
234 PPC_FEATURE_HAS_ALTIVEC_COMP,
238 .cpu_setup = __setup_cpu_ppc970,
239 .cpu_restore = __restore_cpu_ppc970,
240 .oprofile_cpu_type = "ppc64/970MP",
241 .oprofile_type = PPC_OPROFILE_POWER4,
242 .platform = "ppc970",
245 .pvr_mask = 0xffff0000,
246 .pvr_value = 0x00440000,
247 .cpu_name = "PPC970MP",
248 .cpu_features = CPU_FTRS_PPC970,
249 .cpu_user_features = COMMON_USER_POWER4 |
250 PPC_FEATURE_HAS_ALTIVEC_COMP,
254 .cpu_setup = __setup_cpu_ppc970MP,
255 .cpu_restore = __restore_cpu_ppc970,
256 .oprofile_cpu_type = "ppc64/970MP",
257 .oprofile_type = PPC_OPROFILE_POWER4,
258 .platform = "ppc970",
261 .pvr_mask = 0xffff0000,
262 .pvr_value = 0x00450000,
263 .cpu_name = "PPC970GX",
264 .cpu_features = CPU_FTRS_PPC970,
265 .cpu_user_features = COMMON_USER_POWER4 |
266 PPC_FEATURE_HAS_ALTIVEC_COMP,
270 .pmc_type = PPC_PMC_IBM,
271 .cpu_setup = __setup_cpu_ppc970,
272 .oprofile_cpu_type = "ppc64/970",
273 .oprofile_type = PPC_OPROFILE_POWER4,
274 .platform = "ppc970",
277 .pvr_mask = 0xffff0000,
278 .pvr_value = 0x003a0000,
279 .cpu_name = "POWER5 (gr)",
280 .cpu_features = CPU_FTRS_POWER5,
281 .cpu_user_features = COMMON_USER_POWER5,
285 .pmc_type = PPC_PMC_IBM,
286 .oprofile_cpu_type = "ppc64/power5",
287 .oprofile_type = PPC_OPROFILE_POWER4,
288 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
289 * and above but only works on POWER5 and above
291 .oprofile_mmcra_sihv = MMCRA_SIHV,
292 .oprofile_mmcra_sipr = MMCRA_SIPR,
293 .platform = "power5",
296 .pvr_mask = 0xffff0000,
297 .pvr_value = 0x003b0000,
298 .cpu_name = "POWER5+ (gs)",
299 .cpu_features = CPU_FTRS_POWER5,
300 .cpu_user_features = COMMON_USER_POWER5_PLUS,
304 .pmc_type = PPC_PMC_IBM,
305 .oprofile_cpu_type = "ppc64/power5+",
306 .oprofile_type = PPC_OPROFILE_POWER4,
307 .oprofile_mmcra_sihv = MMCRA_SIHV,
308 .oprofile_mmcra_sipr = MMCRA_SIPR,
309 .platform = "power5+",
311 { /* POWER6 in P5+ mode; 2.04-compliant processor */
312 .pvr_mask = 0xffffffff,
313 .pvr_value = 0x0f000001,
314 .cpu_name = "POWER5+",
315 .cpu_features = CPU_FTRS_POWER5,
316 .cpu_user_features = COMMON_USER_POWER5_PLUS,
320 .oprofile_cpu_type = "ppc64/power6",
321 .oprofile_type = PPC_OPROFILE_POWER4,
322 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
323 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
324 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
326 .platform = "power5+",
329 .pvr_mask = 0xffff0000,
330 .pvr_value = 0x003e0000,
331 .cpu_name = "POWER6 (raw)",
332 .cpu_features = CPU_FTRS_POWER6,
333 .cpu_user_features = COMMON_USER_POWER6 |
334 PPC_FEATURE_POWER6_EXT,
338 .oprofile_cpu_type = "ppc64/power6",
339 .oprofile_type = PPC_OPROFILE_POWER4,
340 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
341 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
342 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
344 .platform = "power6x",
346 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
347 .pvr_mask = 0xffffffff,
348 .pvr_value = 0x0f000002,
349 .cpu_name = "POWER6 (architected)",
350 .cpu_features = CPU_FTRS_POWER6,
351 .cpu_user_features = COMMON_USER_POWER6,
355 .pmc_type = PPC_PMC_IBM,
356 .oprofile_cpu_type = "ppc64/power6",
357 .oprofile_type = PPC_OPROFILE_POWER4,
358 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
359 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
360 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
362 .platform = "power6",
364 { /* Cell Broadband Engine */
365 .pvr_mask = 0xffff0000,
366 .pvr_value = 0x00700000,
367 .cpu_name = "Cell Broadband Engine",
368 .cpu_features = CPU_FTRS_CELL,
369 .cpu_user_features = COMMON_USER_PPC64 |
370 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
375 .pmc_type = PPC_PMC_IBM,
376 .oprofile_cpu_type = "ppc64/cell-be",
377 .oprofile_type = PPC_OPROFILE_CELL,
378 .platform = "ppc-cell-be",
381 .pvr_mask = 0x7fff0000,
382 .pvr_value = 0x00900000,
384 .cpu_features = CPU_FTRS_PA6T,
385 .cpu_user_features = COMMON_USER_PA6T,
389 .pmc_type = PPC_PMC_PA6T,
390 .cpu_setup = __setup_cpu_pa6t,
391 .cpu_restore = __restore_cpu_pa6t,
392 .oprofile_cpu_type = "ppc64/pa6t",
393 .oprofile_type = PPC_OPROFILE_PA6T,
396 { /* default match */
397 .pvr_mask = 0x00000000,
398 .pvr_value = 0x00000000,
399 .cpu_name = "POWER4 (compatible)",
400 .cpu_features = CPU_FTRS_COMPATIBLE,
401 .cpu_user_features = COMMON_USER_PPC64,
405 .pmc_type = PPC_PMC_IBM,
406 .platform = "power4",
408 #endif /* CONFIG_PPC64 */
412 .pvr_mask = 0xffff0000,
413 .pvr_value = 0x00010000,
415 .cpu_features = CPU_FTRS_PPC601,
416 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
417 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
420 .platform = "ppc601",
423 .pvr_mask = 0xffff0000,
424 .pvr_value = 0x00030000,
426 .cpu_features = CPU_FTRS_603,
427 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
430 .cpu_setup = __setup_cpu_603,
431 .platform = "ppc603",
434 .pvr_mask = 0xffff0000,
435 .pvr_value = 0x00060000,
437 .cpu_features = CPU_FTRS_603,
438 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
441 .cpu_setup = __setup_cpu_603,
442 .platform = "ppc603",
445 .pvr_mask = 0xffff0000,
446 .pvr_value = 0x00070000,
448 .cpu_features = CPU_FTRS_603,
449 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
452 .cpu_setup = __setup_cpu_603,
453 .platform = "ppc603",
456 .pvr_mask = 0xffff0000,
457 .pvr_value = 0x00040000,
459 .cpu_features = CPU_FTRS_604,
460 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
464 .cpu_setup = __setup_cpu_604,
465 .platform = "ppc604",
468 .pvr_mask = 0xfffff000,
469 .pvr_value = 0x00090000,
471 .cpu_features = CPU_FTRS_604,
472 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
476 .cpu_setup = __setup_cpu_604,
477 .platform = "ppc604",
480 .pvr_mask = 0xffff0000,
481 .pvr_value = 0x00090000,
483 .cpu_features = CPU_FTRS_604,
484 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
488 .cpu_setup = __setup_cpu_604,
489 .platform = "ppc604",
492 .pvr_mask = 0xffff0000,
493 .pvr_value = 0x000a0000,
495 .cpu_features = CPU_FTRS_604,
496 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
500 .cpu_setup = __setup_cpu_604,
501 .platform = "ppc604",
503 { /* 740/750 (0x4202, don't support TAU ?) */
504 .pvr_mask = 0xffffffff,
505 .pvr_value = 0x00084202,
506 .cpu_name = "740/750",
507 .cpu_features = CPU_FTRS_740_NOTAU,
508 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
512 .cpu_setup = __setup_cpu_750,
513 .platform = "ppc750",
515 { /* 750CX (80100 and 8010x?) */
516 .pvr_mask = 0xfffffff0,
517 .pvr_value = 0x00080100,
519 .cpu_features = CPU_FTRS_750,
520 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
524 .cpu_setup = __setup_cpu_750cx,
525 .platform = "ppc750",
527 { /* 750CX (82201 and 82202) */
528 .pvr_mask = 0xfffffff0,
529 .pvr_value = 0x00082200,
531 .cpu_features = CPU_FTRS_750,
532 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
536 .cpu_setup = __setup_cpu_750cx,
537 .platform = "ppc750",
539 { /* 750CXe (82214) */
540 .pvr_mask = 0xfffffff0,
541 .pvr_value = 0x00082210,
542 .cpu_name = "750CXe",
543 .cpu_features = CPU_FTRS_750,
544 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
548 .cpu_setup = __setup_cpu_750cx,
549 .platform = "ppc750",
551 { /* 750CXe "Gekko" (83214) */
552 .pvr_mask = 0xffffffff,
553 .pvr_value = 0x00083214,
554 .cpu_name = "750CXe",
555 .cpu_features = CPU_FTRS_750,
556 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
560 .cpu_setup = __setup_cpu_750cx,
561 .platform = "ppc750",
564 .pvr_mask = 0xfffff0f0,
565 .pvr_value = 0x00087010,
567 .cpu_features = CPU_FTRS_750CL,
568 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
572 .cpu_setup = __setup_cpu_750,
573 .platform = "ppc750",
576 .pvr_mask = 0xfffff000,
577 .pvr_value = 0x00083000,
578 .cpu_name = "745/755",
579 .cpu_features = CPU_FTRS_750,
580 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
584 .cpu_setup = __setup_cpu_750,
585 .platform = "ppc750",
587 { /* 750FX rev 1.x */
588 .pvr_mask = 0xffffff00,
589 .pvr_value = 0x70000100,
591 .cpu_features = CPU_FTRS_750FX1,
592 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
596 .cpu_setup = __setup_cpu_750,
597 .platform = "ppc750",
599 { /* 750FX rev 2.0 must disable HID0[DPM] */
600 .pvr_mask = 0xffffffff,
601 .pvr_value = 0x70000200,
603 .cpu_features = CPU_FTRS_750FX2,
604 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
608 .cpu_setup = __setup_cpu_750,
609 .platform = "ppc750",
611 { /* 750FX (All revs except 2.0) */
612 .pvr_mask = 0xffff0000,
613 .pvr_value = 0x70000000,
615 .cpu_features = CPU_FTRS_750FX,
616 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
620 .cpu_setup = __setup_cpu_750fx,
621 .platform = "ppc750",
624 .pvr_mask = 0xffff0000,
625 .pvr_value = 0x70020000,
627 .cpu_features = CPU_FTRS_750GX,
628 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
632 .cpu_setup = __setup_cpu_750fx,
633 .platform = "ppc750",
635 { /* 740/750 (L2CR bit need fixup for 740) */
636 .pvr_mask = 0xffff0000,
637 .pvr_value = 0x00080000,
638 .cpu_name = "740/750",
639 .cpu_features = CPU_FTRS_740,
640 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
644 .cpu_setup = __setup_cpu_750,
645 .platform = "ppc750",
647 { /* 7400 rev 1.1 ? (no TAU) */
648 .pvr_mask = 0xffffffff,
649 .pvr_value = 0x000c1101,
650 .cpu_name = "7400 (1.1)",
651 .cpu_features = CPU_FTRS_7400_NOTAU,
652 .cpu_user_features = COMMON_USER |
653 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
657 .cpu_setup = __setup_cpu_7400,
658 .platform = "ppc7400",
661 .pvr_mask = 0xffff0000,
662 .pvr_value = 0x000c0000,
664 .cpu_features = CPU_FTRS_7400,
665 .cpu_user_features = COMMON_USER |
666 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
670 .cpu_setup = __setup_cpu_7400,
671 .platform = "ppc7400",
674 .pvr_mask = 0xffff0000,
675 .pvr_value = 0x800c0000,
677 .cpu_features = CPU_FTRS_7400,
678 .cpu_user_features = COMMON_USER |
679 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
683 .cpu_setup = __setup_cpu_7410,
684 .platform = "ppc7400",
686 { /* 7450 2.0 - no doze/nap */
687 .pvr_mask = 0xffffffff,
688 .pvr_value = 0x80000200,
690 .cpu_features = CPU_FTRS_7450_20,
691 .cpu_user_features = COMMON_USER |
692 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
696 .cpu_setup = __setup_cpu_745x,
697 .oprofile_cpu_type = "ppc/7450",
698 .oprofile_type = PPC_OPROFILE_G4,
699 .platform = "ppc7450",
702 .pvr_mask = 0xffffffff,
703 .pvr_value = 0x80000201,
705 .cpu_features = CPU_FTRS_7450_21,
706 .cpu_user_features = COMMON_USER |
707 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
711 .cpu_setup = __setup_cpu_745x,
712 .oprofile_cpu_type = "ppc/7450",
713 .oprofile_type = PPC_OPROFILE_G4,
714 .platform = "ppc7450",
716 { /* 7450 2.3 and newer */
717 .pvr_mask = 0xffff0000,
718 .pvr_value = 0x80000000,
720 .cpu_features = CPU_FTRS_7450_23,
721 .cpu_user_features = COMMON_USER |
722 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
726 .cpu_setup = __setup_cpu_745x,
727 .oprofile_cpu_type = "ppc/7450",
728 .oprofile_type = PPC_OPROFILE_G4,
729 .platform = "ppc7450",
732 .pvr_mask = 0xffffff00,
733 .pvr_value = 0x80010100,
735 .cpu_features = CPU_FTRS_7455_1,
736 .cpu_user_features = COMMON_USER |
737 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
741 .cpu_setup = __setup_cpu_745x,
742 .oprofile_cpu_type = "ppc/7450",
743 .oprofile_type = PPC_OPROFILE_G4,
744 .platform = "ppc7450",
747 .pvr_mask = 0xffffffff,
748 .pvr_value = 0x80010200,
750 .cpu_features = CPU_FTRS_7455_20,
751 .cpu_user_features = COMMON_USER |
752 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
756 .cpu_setup = __setup_cpu_745x,
757 .oprofile_cpu_type = "ppc/7450",
758 .oprofile_type = PPC_OPROFILE_G4,
759 .platform = "ppc7450",
762 .pvr_mask = 0xffff0000,
763 .pvr_value = 0x80010000,
765 .cpu_features = CPU_FTRS_7455,
766 .cpu_user_features = COMMON_USER |
767 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
771 .cpu_setup = __setup_cpu_745x,
772 .oprofile_cpu_type = "ppc/7450",
773 .oprofile_type = PPC_OPROFILE_G4,
774 .platform = "ppc7450",
776 { /* 7447/7457 Rev 1.0 */
777 .pvr_mask = 0xffffffff,
778 .pvr_value = 0x80020100,
779 .cpu_name = "7447/7457",
780 .cpu_features = CPU_FTRS_7447_10,
781 .cpu_user_features = COMMON_USER |
782 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
786 .cpu_setup = __setup_cpu_745x,
787 .oprofile_cpu_type = "ppc/7450",
788 .oprofile_type = PPC_OPROFILE_G4,
789 .platform = "ppc7450",
791 { /* 7447/7457 Rev 1.1 */
792 .pvr_mask = 0xffffffff,
793 .pvr_value = 0x80020101,
794 .cpu_name = "7447/7457",
795 .cpu_features = CPU_FTRS_7447_10,
796 .cpu_user_features = COMMON_USER |
797 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
801 .cpu_setup = __setup_cpu_745x,
802 .oprofile_cpu_type = "ppc/7450",
803 .oprofile_type = PPC_OPROFILE_G4,
804 .platform = "ppc7450",
806 { /* 7447/7457 Rev 1.2 and later */
807 .pvr_mask = 0xffff0000,
808 .pvr_value = 0x80020000,
809 .cpu_name = "7447/7457",
810 .cpu_features = CPU_FTRS_7447,
811 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
815 .cpu_setup = __setup_cpu_745x,
816 .oprofile_cpu_type = "ppc/7450",
817 .oprofile_type = PPC_OPROFILE_G4,
818 .platform = "ppc7450",
821 .pvr_mask = 0xffff0000,
822 .pvr_value = 0x80030000,
824 .cpu_features = CPU_FTRS_7447A,
825 .cpu_user_features = COMMON_USER |
826 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
830 .cpu_setup = __setup_cpu_745x,
831 .oprofile_cpu_type = "ppc/7450",
832 .oprofile_type = PPC_OPROFILE_G4,
833 .platform = "ppc7450",
836 .pvr_mask = 0xffff0000,
837 .pvr_value = 0x80040000,
839 .cpu_features = CPU_FTRS_7447A,
840 .cpu_user_features = COMMON_USER |
841 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
845 .cpu_setup = __setup_cpu_745x,
846 .oprofile_cpu_type = "ppc/7450",
847 .oprofile_type = PPC_OPROFILE_G4,
848 .platform = "ppc7450",
850 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
851 .pvr_mask = 0x7fff0000,
852 .pvr_value = 0x00810000,
854 .cpu_features = CPU_FTRS_82XX,
855 .cpu_user_features = COMMON_USER,
858 .cpu_setup = __setup_cpu_603,
859 .platform = "ppc603",
861 { /* All G2_LE (603e core, plus some) have the same pvr */
862 .pvr_mask = 0x7fff0000,
863 .pvr_value = 0x00820000,
865 .cpu_features = CPU_FTRS_G2_LE,
866 .cpu_user_features = COMMON_USER,
869 .cpu_setup = __setup_cpu_603,
870 .platform = "ppc603",
872 { /* e300c1 (a 603e core, plus some) on 83xx */
873 .pvr_mask = 0x7fff0000,
874 .pvr_value = 0x00830000,
875 .cpu_name = "e300c1",
876 .cpu_features = CPU_FTRS_E300,
877 .cpu_user_features = COMMON_USER,
880 .cpu_setup = __setup_cpu_603,
881 .platform = "ppc603",
883 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
884 .pvr_mask = 0x7fff0000,
885 .pvr_value = 0x00840000,
886 .cpu_name = "e300c2",
887 .cpu_features = CPU_FTRS_E300C2,
888 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
891 .cpu_setup = __setup_cpu_603,
892 .platform = "ppc603",
894 { /* e300c3 on 83xx */
895 .pvr_mask = 0x7fff0000,
896 .pvr_value = 0x00850000,
897 .cpu_name = "e300c3",
898 .cpu_features = CPU_FTRS_E300,
899 .cpu_user_features = COMMON_USER,
902 .cpu_setup = __setup_cpu_603,
903 .platform = "ppc603",
905 { /* default match, we assume split I/D cache & TB (non-601)... */
906 .pvr_mask = 0x00000000,
907 .pvr_value = 0x00000000,
908 .cpu_name = "(generic PPC)",
909 .cpu_features = CPU_FTRS_CLASSIC32,
910 .cpu_user_features = COMMON_USER,
913 .platform = "ppc603",
915 #endif /* CLASSIC_PPC */
918 .pvr_mask = 0xffff0000,
919 .pvr_value = 0x00500000,
921 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
922 * if the 8xx code is there.... */
923 .cpu_features = CPU_FTRS_8XX,
924 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
927 .platform = "ppc823",
929 #endif /* CONFIG_8xx */
932 .pvr_mask = 0xffffff00,
933 .pvr_value = 0x00200200,
935 .cpu_features = CPU_FTRS_40X,
936 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
939 .platform = "ppc403",
942 .pvr_mask = 0xffffff00,
943 .pvr_value = 0x00201400,
944 .cpu_name = "403GCX",
945 .cpu_features = CPU_FTRS_40X,
946 .cpu_user_features = PPC_FEATURE_32 |
947 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
950 .platform = "ppc403",
953 .pvr_mask = 0xffff0000,
954 .pvr_value = 0x00200000,
955 .cpu_name = "403G ??",
956 .cpu_features = CPU_FTRS_40X,
957 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
960 .platform = "ppc403",
963 .pvr_mask = 0xffff0000,
964 .pvr_value = 0x40110000,
966 .cpu_features = CPU_FTRS_40X,
967 .cpu_user_features = PPC_FEATURE_32 |
968 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
971 .platform = "ppc405",
974 .pvr_mask = 0xffff0000,
975 .pvr_value = 0x40130000,
976 .cpu_name = "STB03xxx",
977 .cpu_features = CPU_FTRS_40X,
978 .cpu_user_features = PPC_FEATURE_32 |
979 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
982 .platform = "ppc405",
985 .pvr_mask = 0xffff0000,
986 .pvr_value = 0x41810000,
987 .cpu_name = "STB04xxx",
988 .cpu_features = CPU_FTRS_40X,
989 .cpu_user_features = PPC_FEATURE_32 |
990 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
993 .platform = "ppc405",
996 .pvr_mask = 0xffff0000,
997 .pvr_value = 0x41610000,
998 .cpu_name = "NP405L",
999 .cpu_features = CPU_FTRS_40X,
1000 .cpu_user_features = PPC_FEATURE_32 |
1001 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1004 .platform = "ppc405",
1007 .pvr_mask = 0xffff0000,
1008 .pvr_value = 0x40B10000,
1009 .cpu_name = "NP4GS3",
1010 .cpu_features = CPU_FTRS_40X,
1011 .cpu_user_features = PPC_FEATURE_32 |
1012 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1015 .platform = "ppc405",
1018 .pvr_mask = 0xffff0000,
1019 .pvr_value = 0x41410000,
1020 .cpu_name = "NP405H",
1021 .cpu_features = CPU_FTRS_40X,
1022 .cpu_user_features = PPC_FEATURE_32 |
1023 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1026 .platform = "ppc405",
1029 .pvr_mask = 0xffff0000,
1030 .pvr_value = 0x50910000,
1031 .cpu_name = "405GPr",
1032 .cpu_features = CPU_FTRS_40X,
1033 .cpu_user_features = PPC_FEATURE_32 |
1034 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1037 .platform = "ppc405",
1040 .pvr_mask = 0xffff0000,
1041 .pvr_value = 0x51510000,
1042 .cpu_name = "STBx25xx",
1043 .cpu_features = CPU_FTRS_40X,
1044 .cpu_user_features = PPC_FEATURE_32 |
1045 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1048 .platform = "ppc405",
1051 .pvr_mask = 0xffff0000,
1052 .pvr_value = 0x41F10000,
1053 .cpu_name = "405LP",
1054 .cpu_features = CPU_FTRS_40X,
1055 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1058 .platform = "ppc405",
1060 { /* Xilinx Virtex-II Pro */
1061 .pvr_mask = 0xfffff000,
1062 .pvr_value = 0x20010000,
1063 .cpu_name = "Virtex-II Pro",
1064 .cpu_features = CPU_FTRS_40X,
1065 .cpu_user_features = PPC_FEATURE_32 |
1066 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1069 .platform = "ppc405",
1071 { /* Xilinx Virtex-4 FX */
1072 .pvr_mask = 0xfffff000,
1073 .pvr_value = 0x20011000,
1074 .cpu_name = "Virtex-4 FX",
1075 .cpu_features = CPU_FTRS_40X,
1076 .cpu_user_features = PPC_FEATURE_32 |
1077 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1080 .platform = "ppc405",
1083 .pvr_mask = 0xffff0000,
1084 .pvr_value = 0x51210000,
1085 .cpu_name = "405EP",
1086 .cpu_features = CPU_FTRS_40X,
1087 .cpu_user_features = PPC_FEATURE_32 |
1088 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1091 .platform = "ppc405",
1094 #endif /* CONFIG_40x */
1097 .pvr_mask = 0xf0000fff,
1098 .pvr_value = 0x40000850,
1099 .cpu_name = "440EP Rev. A",
1100 .cpu_features = CPU_FTRS_44X,
1101 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1104 .platform = "ppc440",
1107 .pvr_mask = 0xf0000fff,
1108 .pvr_value = 0x400008d3,
1109 .cpu_name = "440EP Rev. B",
1110 .cpu_features = CPU_FTRS_44X,
1111 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1114 .platform = "ppc440",
1116 { /* 440GP Rev. B */
1117 .pvr_mask = 0xf0000fff,
1118 .pvr_value = 0x40000440,
1119 .cpu_name = "440GP Rev. B",
1120 .cpu_features = CPU_FTRS_44X,
1121 .cpu_user_features = COMMON_USER_BOOKE,
1124 .platform = "ppc440gp",
1126 { /* 440GP Rev. C */
1127 .pvr_mask = 0xf0000fff,
1128 .pvr_value = 0x40000481,
1129 .cpu_name = "440GP Rev. C",
1130 .cpu_features = CPU_FTRS_44X,
1131 .cpu_user_features = COMMON_USER_BOOKE,
1134 .platform = "ppc440gp",
1136 { /* 440GX Rev. A */
1137 .pvr_mask = 0xf0000fff,
1138 .pvr_value = 0x50000850,
1139 .cpu_name = "440GX Rev. A",
1140 .cpu_features = CPU_FTRS_44X,
1141 .cpu_user_features = COMMON_USER_BOOKE,
1144 .platform = "ppc440",
1146 { /* 440GX Rev. B */
1147 .pvr_mask = 0xf0000fff,
1148 .pvr_value = 0x50000851,
1149 .cpu_name = "440GX Rev. B",
1150 .cpu_features = CPU_FTRS_44X,
1151 .cpu_user_features = COMMON_USER_BOOKE,
1154 .platform = "ppc440",
1156 { /* 440GX Rev. C */
1157 .pvr_mask = 0xf0000fff,
1158 .pvr_value = 0x50000892,
1159 .cpu_name = "440GX Rev. C",
1160 .cpu_features = CPU_FTRS_44X,
1161 .cpu_user_features = COMMON_USER_BOOKE,
1164 .platform = "ppc440",
1166 { /* 440GX Rev. F */
1167 .pvr_mask = 0xf0000fff,
1168 .pvr_value = 0x50000894,
1169 .cpu_name = "440GX Rev. F",
1170 .cpu_features = CPU_FTRS_44X,
1171 .cpu_user_features = COMMON_USER_BOOKE,
1174 .platform = "ppc440",
1176 { /* 440SP Rev. A */
1177 .pvr_mask = 0xff000fff,
1178 .pvr_value = 0x53000891,
1179 .cpu_name = "440SP Rev. A",
1180 .cpu_features = CPU_FTRS_44X,
1181 .cpu_user_features = COMMON_USER_BOOKE,
1184 .platform = "ppc440",
1186 { /* 440SPe Rev. A */
1187 .pvr_mask = 0xff000fff,
1188 .pvr_value = 0x53000890,
1189 .cpu_name = "440SPe Rev. A",
1190 .cpu_features = CPU_FTRS_44X,
1191 .cpu_user_features = COMMON_USER_BOOKE,
1194 .platform = "ppc440",
1196 #endif /* CONFIG_44x */
1197 #ifdef CONFIG_FSL_BOOKE
1199 .pvr_mask = 0xfff00000,
1200 .pvr_value = 0x81000000,
1201 .cpu_name = "e200z5",
1202 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1203 .cpu_features = CPU_FTRS_E200,
1204 .cpu_user_features = COMMON_USER_BOOKE |
1205 PPC_FEATURE_HAS_EFP_SINGLE |
1206 PPC_FEATURE_UNIFIED_CACHE,
1208 .platform = "ppc5554",
1211 .pvr_mask = 0xfff00000,
1212 .pvr_value = 0x81100000,
1213 .cpu_name = "e200z6",
1214 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1215 .cpu_features = CPU_FTRS_E200,
1216 .cpu_user_features = COMMON_USER_BOOKE |
1217 PPC_FEATURE_SPE_COMP |
1218 PPC_FEATURE_HAS_EFP_SINGLE |
1219 PPC_FEATURE_UNIFIED_CACHE,
1221 .platform = "ppc5554",
1224 .pvr_mask = 0xffff0000,
1225 .pvr_value = 0x80200000,
1227 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1228 .cpu_features = CPU_FTRS_E500,
1229 .cpu_user_features = COMMON_USER_BOOKE |
1230 PPC_FEATURE_SPE_COMP |
1231 PPC_FEATURE_HAS_EFP_SINGLE,
1235 .oprofile_cpu_type = "ppc/e500",
1236 .oprofile_type = PPC_OPROFILE_BOOKE,
1237 .platform = "ppc8540",
1240 .pvr_mask = 0xffff0000,
1241 .pvr_value = 0x80210000,
1242 .cpu_name = "e500v2",
1243 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1244 .cpu_features = CPU_FTRS_E500_2,
1245 .cpu_user_features = COMMON_USER_BOOKE |
1246 PPC_FEATURE_SPE_COMP |
1247 PPC_FEATURE_HAS_EFP_SINGLE |
1248 PPC_FEATURE_HAS_EFP_DOUBLE,
1252 .oprofile_cpu_type = "ppc/e500",
1253 .oprofile_type = PPC_OPROFILE_BOOKE,
1254 .platform = "ppc8548",
1258 { /* default match */
1259 .pvr_mask = 0x00000000,
1260 .pvr_value = 0x00000000,
1261 .cpu_name = "(generic PPC)",
1262 .cpu_features = CPU_FTRS_GENERIC_32,
1263 .cpu_user_features = PPC_FEATURE_32,
1266 .platform = "powerpc",
1268 #endif /* !CLASSIC_PPC */
1269 #endif /* CONFIG_PPC32 */
1272 struct cpu_spec *identify_cpu(unsigned long offset, unsigned int pvr)
1274 struct cpu_spec *s = cpu_specs;
1275 struct cpu_spec **cur = &cur_cpu_spec;
1279 cur = PTRRELOC(cur);
1281 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++)
1282 if ((pvr & s->pvr_mask) == s->pvr_value) {
1283 *cur = cpu_specs + i;
1285 /* ppc64 expects identify_cpu to also call setup_cpu
1286 * for that processor. I will consolidate that at a
1287 * later time, for now, just use our friend #ifdef.
1288 * we also don't need to PTRRELOC the function pointer
1289 * on ppc64 as we are running at 0 in real mode.
1292 s->cpu_setup(offset, s);
1294 #endif /* CONFIG_PPC64 */
1301 void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)
1303 struct fixup_entry {
1305 unsigned long value;
1313 for (; fcur < fend; fcur++) {
1314 unsigned int *pstart, *pend, *p;
1316 if ((value & fcur->mask) == fcur->value)
1319 /* These PTRRELOCs will disappear once the new scheme for
1320 * modules and vdso is implemented
1322 pstart = ((unsigned int *)fcur) + (fcur->start_off / 4);
1323 pend = ((unsigned int *)fcur) + (fcur->end_off / 4);
1325 for (p = pstart; p < pend; p++) {
1327 asm volatile ("dcbst 0, %0" : : "r" (p));
1329 asm volatile ("sync" : : : "memory");
1330 for (p = pstart; p < pend; p++)
1331 asm volatile ("icbi 0,%0" : : "r" (p));
1332 asm volatile ("sync; isync" : : : "memory");