2 w83627ehf - Driver for the hardware monitoring functionality of
3 the Winbond W83627EHF Super-I/O chip
4 Copyright (C) 2005 Jean Delvare <khali@linux-fr.org>
5 Copyright (C) 2006 Yuan Mu (Winbond),
6 Rudolf Marek <r.marek@assembler.cz>
7 David Hubbard <david.c.hubbard@gmail.com>
9 Shamelessly ripped from the w83627hf driver
10 Copyright (C) 2003 Mark Studebaker
12 Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
13 in testing and debugging this driver.
15 This driver also supports the W83627EHG, which is the lead-free
16 version of the W83627EHF.
18 This program is free software; you can redistribute it and/or modify
19 it under the terms of the GNU General Public License as published by
20 the Free Software Foundation; either version 2 of the License, or
21 (at your option) any later version.
23 This program is distributed in the hope that it will be useful,
24 but WITHOUT ANY WARRANTY; without even the implied warranty of
25 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 GNU General Public License for more details.
28 You should have received a copy of the GNU General Public License
29 along with this program; if not, write to the Free Software
30 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
33 Supports the following chips:
35 Chip #vin #fan #pwm #temp chip IDs man ID
36 w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3
38 w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3
41 #include <linux/module.h>
42 #include <linux/init.h>
43 #include <linux/slab.h>
44 #include <linux/jiffies.h>
45 #include <linux/platform_device.h>
46 #include <linux/hwmon.h>
47 #include <linux/hwmon-sysfs.h>
48 #include <linux/hwmon-vid.h>
49 #include <linux/err.h>
50 #include <linux/mutex.h>
51 #include <linux/acpi.h>
55 enum kinds { w83627ehf, w83627dhg };
57 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
58 static const char * w83627ehf_device_names[] = {
63 static unsigned short force_id;
64 module_param(force_id, ushort, 0);
65 MODULE_PARM_DESC(force_id, "Override the detected device ID");
67 #define DRVNAME "w83627ehf"
70 * Super-I/O constants and functions
73 #define W83627EHF_LD_HWM 0x0b
75 #define SIO_REG_LDSEL 0x07 /* Logical device select */
76 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
77 #define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
78 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
79 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
80 #define SIO_REG_VID_CTRL 0xF0 /* VID control */
81 #define SIO_REG_VID_DATA 0xF1 /* VID data */
83 #define SIO_W83627EHF_ID 0x8850
84 #define SIO_W83627EHG_ID 0x8860
85 #define SIO_W83627DHG_ID 0xa020
86 #define SIO_ID_MASK 0xFFF0
89 superio_outb(int ioreg, int reg, int val)
96 superio_inb(int ioreg, int reg)
99 return inb(ioreg + 1);
103 superio_select(int ioreg, int ld)
105 outb(SIO_REG_LDSEL, ioreg);
110 superio_enter(int ioreg)
117 superio_exit(int ioreg)
120 outb(0x02, ioreg + 1);
127 #define IOREGION_ALIGNMENT ~7
128 #define IOREGION_OFFSET 5
129 #define IOREGION_LENGTH 2
130 #define ADDR_REG_OFFSET 0
131 #define DATA_REG_OFFSET 1
133 #define W83627EHF_REG_BANK 0x4E
134 #define W83627EHF_REG_CONFIG 0x40
136 /* Not currently used:
137 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
138 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
139 * REG_MAN_ID is at port 0x4f
140 * REG_CHIP_ID is at port 0x58 */
142 static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
143 static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
145 /* The W83627EHF registers for nr=7,8,9 are in bank 5 */
146 #define W83627EHF_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
147 (0x554 + (((nr) - 7) * 2)))
148 #define W83627EHF_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
149 (0x555 + (((nr) - 7) * 2)))
150 #define W83627EHF_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
153 #define W83627EHF_REG_TEMP1 0x27
154 #define W83627EHF_REG_TEMP1_HYST 0x3a
155 #define W83627EHF_REG_TEMP1_OVER 0x39
156 static const u16 W83627EHF_REG_TEMP[] = { 0x150, 0x250 };
157 static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x153, 0x253 };
158 static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x155, 0x255 };
159 static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0x152, 0x252 };
161 /* Fan clock dividers are spread over the following five registers */
162 #define W83627EHF_REG_FANDIV1 0x47
163 #define W83627EHF_REG_FANDIV2 0x4B
164 #define W83627EHF_REG_VBAT 0x5D
165 #define W83627EHF_REG_DIODE 0x59
166 #define W83627EHF_REG_SMI_OVT 0x4C
168 #define W83627EHF_REG_ALARM1 0x459
169 #define W83627EHF_REG_ALARM2 0x45A
170 #define W83627EHF_REG_ALARM3 0x45B
172 /* SmartFan registers */
173 /* DC or PWM output fan configuration */
174 static const u8 W83627EHF_REG_PWM_ENABLE[] = {
175 0x04, /* SYS FAN0 output mode and PWM mode */
176 0x04, /* CPU FAN0 output mode and PWM mode */
177 0x12, /* AUX FAN mode */
178 0x62, /* CPU fan1 mode */
181 static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
182 static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
184 /* FAN Duty Cycle, be used to control */
185 static const u8 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
186 static const u8 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
187 static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
190 /* Advanced Fan control, some values are common for all fans */
191 static const u8 W83627EHF_REG_FAN_MIN_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
192 static const u8 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0C, 0x0D, 0x17, 0x66 };
198 /* 1 is PWM mode, output in ms */
199 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
201 return mode ? 100 * reg : 400 * reg;
204 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
206 return SENSORS_LIMIT((mode ? (msec + 50) / 100 :
207 (msec + 200) / 400), 1, 255);
210 static inline unsigned int
211 fan_from_reg(u8 reg, unsigned int div)
213 if (reg == 0 || reg == 255)
215 return 1350000U / (reg * div);
218 static inline unsigned int
225 temp1_from_reg(s8 reg)
231 temp1_to_reg(long temp, int min, int max)
238 return (temp - 500) / 1000;
239 return (temp + 500) / 1000;
242 /* Some of analog inputs have internal scaling (2x), 8mV is ADC LSB */
244 static u8 scale_in[10] = { 8, 8, 16, 16, 8, 8, 8, 16, 16, 8 };
246 static inline long in_from_reg(u8 reg, u8 nr)
248 return reg * scale_in[nr];
251 static inline u8 in_to_reg(u32 val, u8 nr)
253 return SENSORS_LIMIT(((val + (scale_in[nr] / 2)) / scale_in[nr]), 0, 255);
257 * Data structures and manipulation thereof
260 struct w83627ehf_data {
261 int addr; /* IO base of hw monitor block */
264 struct device *hwmon_dev;
267 struct mutex update_lock;
268 char valid; /* !=0 if following fields are valid */
269 unsigned long last_updated; /* In jiffies */
271 /* Register values */
272 u8 in_num; /* number of in inputs we have */
273 u8 in[10]; /* Register value */
274 u8 in_max[10]; /* Register value */
275 u8 in_min[10]; /* Register value */
279 u8 has_fan; /* some fan inputs can be disabled */
286 s16 temp_max_hyst[2];
289 u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
290 u8 pwm_enable[4]; /* 1->manual
291 2->thermal cruise (also called SmartFan I) */
296 u8 fan_min_output[4]; /* minimum fan speed */
303 struct w83627ehf_sio_data {
308 static inline int is_word_sized(u16 reg)
310 return (((reg & 0xff00) == 0x100
311 || (reg & 0xff00) == 0x200)
312 && ((reg & 0x00ff) == 0x50
313 || (reg & 0x00ff) == 0x53
314 || (reg & 0x00ff) == 0x55));
317 /* Registers 0x50-0x5f are banked */
318 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
320 if ((reg & 0x00f0) == 0x50) {
321 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
322 outb_p(reg >> 8, data->addr + DATA_REG_OFFSET);
326 /* Not strictly necessary, but play it safe for now */
327 static inline void w83627ehf_reset_bank(struct w83627ehf_data *data, u16 reg)
330 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
331 outb_p(0, data->addr + DATA_REG_OFFSET);
335 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
337 int res, word_sized = is_word_sized(reg);
339 mutex_lock(&data->lock);
341 w83627ehf_set_bank(data, reg);
342 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
343 res = inb_p(data->addr + DATA_REG_OFFSET);
345 outb_p((reg & 0xff) + 1,
346 data->addr + ADDR_REG_OFFSET);
347 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
349 w83627ehf_reset_bank(data, reg);
351 mutex_unlock(&data->lock);
356 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg, u16 value)
358 int word_sized = is_word_sized(reg);
360 mutex_lock(&data->lock);
362 w83627ehf_set_bank(data, reg);
363 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
365 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
366 outb_p((reg & 0xff) + 1,
367 data->addr + ADDR_REG_OFFSET);
369 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
370 w83627ehf_reset_bank(data, reg);
372 mutex_unlock(&data->lock);
376 /* This function assumes that the caller holds data->update_lock */
377 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
383 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
384 | ((data->fan_div[0] & 0x03) << 4);
385 /* fan5 input control bit is write only, compute the value */
386 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
387 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
388 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
389 | ((data->fan_div[0] & 0x04) << 3);
390 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
393 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
394 | ((data->fan_div[1] & 0x03) << 6);
395 /* fan5 input control bit is write only, compute the value */
396 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
397 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
398 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
399 | ((data->fan_div[1] & 0x04) << 4);
400 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
403 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
404 | ((data->fan_div[2] & 0x03) << 6);
405 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
406 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
407 | ((data->fan_div[2] & 0x04) << 5);
408 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
411 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
412 | (data->fan_div[3] & 0x03);
413 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
414 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
415 | ((data->fan_div[3] & 0x04) << 5);
416 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
419 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
420 | ((data->fan_div[4] & 0x03) << 2)
421 | ((data->fan_div[4] & 0x04) << 5);
422 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
427 static void w83627ehf_update_fan_div(struct w83627ehf_data *data)
431 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
432 data->fan_div[0] = (i >> 4) & 0x03;
433 data->fan_div[1] = (i >> 6) & 0x03;
434 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
435 data->fan_div[2] = (i >> 6) & 0x03;
436 i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
437 data->fan_div[0] |= (i >> 3) & 0x04;
438 data->fan_div[1] |= (i >> 4) & 0x04;
439 data->fan_div[2] |= (i >> 5) & 0x04;
440 if (data->has_fan & ((1 << 3) | (1 << 4))) {
441 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
442 data->fan_div[3] = i & 0x03;
443 data->fan_div[4] = ((i >> 2) & 0x03)
446 if (data->has_fan & (1 << 3)) {
447 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
448 data->fan_div[3] |= (i >> 5) & 0x04;
452 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
454 struct w83627ehf_data *data = dev_get_drvdata(dev);
455 int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
458 mutex_lock(&data->update_lock);
460 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
462 /* Fan clock dividers */
463 w83627ehf_update_fan_div(data);
465 /* Measured voltages and limits */
466 for (i = 0; i < data->in_num; i++) {
467 data->in[i] = w83627ehf_read_value(data,
468 W83627EHF_REG_IN(i));
469 data->in_min[i] = w83627ehf_read_value(data,
470 W83627EHF_REG_IN_MIN(i));
471 data->in_max[i] = w83627ehf_read_value(data,
472 W83627EHF_REG_IN_MAX(i));
475 /* Measured fan speeds and limits */
476 for (i = 0; i < 5; i++) {
477 if (!(data->has_fan & (1 << i)))
480 data->fan[i] = w83627ehf_read_value(data,
481 W83627EHF_REG_FAN[i]);
482 data->fan_min[i] = w83627ehf_read_value(data,
483 W83627EHF_REG_FAN_MIN[i]);
485 /* If we failed to measure the fan speed and clock
486 divider can be increased, let's try that for next
488 if (data->fan[i] == 0xff
489 && data->fan_div[i] < 0x07) {
490 dev_dbg(dev, "Increasing fan%d "
491 "clock divider from %u to %u\n",
492 i + 1, div_from_reg(data->fan_div[i]),
493 div_from_reg(data->fan_div[i] + 1));
495 w83627ehf_write_fan_div(data, i);
496 /* Preserve min limit if possible */
497 if (data->fan_min[i] >= 2
498 && data->fan_min[i] != 255)
499 w83627ehf_write_value(data,
500 W83627EHF_REG_FAN_MIN[i],
501 (data->fan_min[i] /= 2));
505 for (i = 0; i < 4; i++) {
506 /* pwmcfg, tolerance mapped for i=0, i=1 to same reg */
508 pwmcfg = w83627ehf_read_value(data,
509 W83627EHF_REG_PWM_ENABLE[i]);
510 tolerance = w83627ehf_read_value(data,
511 W83627EHF_REG_TOLERANCE[i]);
514 ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1)
516 data->pwm_enable[i] =
517 ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
519 data->pwm[i] = w83627ehf_read_value(data,
520 W83627EHF_REG_PWM[i]);
521 data->fan_min_output[i] = w83627ehf_read_value(data,
522 W83627EHF_REG_FAN_MIN_OUTPUT[i]);
523 data->fan_stop_time[i] = w83627ehf_read_value(data,
524 W83627EHF_REG_FAN_STOP_TIME[i]);
525 data->target_temp[i] =
526 w83627ehf_read_value(data,
527 W83627EHF_REG_TARGET[i]) &
528 (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
529 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0))
533 /* Measured temperatures and limits */
534 data->temp1 = w83627ehf_read_value(data,
535 W83627EHF_REG_TEMP1);
536 data->temp1_max = w83627ehf_read_value(data,
537 W83627EHF_REG_TEMP1_OVER);
538 data->temp1_max_hyst = w83627ehf_read_value(data,
539 W83627EHF_REG_TEMP1_HYST);
540 for (i = 0; i < 2; i++) {
541 data->temp[i] = w83627ehf_read_value(data,
542 W83627EHF_REG_TEMP[i]);
543 data->temp_max[i] = w83627ehf_read_value(data,
544 W83627EHF_REG_TEMP_OVER[i]);
545 data->temp_max_hyst[i] = w83627ehf_read_value(data,
546 W83627EHF_REG_TEMP_HYST[i]);
549 data->alarms = w83627ehf_read_value(data,
550 W83627EHF_REG_ALARM1) |
551 (w83627ehf_read_value(data,
552 W83627EHF_REG_ALARM2) << 8) |
553 (w83627ehf_read_value(data,
554 W83627EHF_REG_ALARM3) << 16);
556 data->last_updated = jiffies;
560 mutex_unlock(&data->update_lock);
565 * Sysfs callback functions
567 #define show_in_reg(reg) \
569 show_##reg(struct device *dev, struct device_attribute *attr, \
572 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
573 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
574 int nr = sensor_attr->index; \
575 return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr)); \
581 #define store_in_reg(REG, reg) \
583 store_in_##reg (struct device *dev, struct device_attribute *attr, \
584 const char *buf, size_t count) \
586 struct w83627ehf_data *data = dev_get_drvdata(dev); \
587 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
588 int nr = sensor_attr->index; \
589 u32 val = simple_strtoul(buf, NULL, 10); \
591 mutex_lock(&data->update_lock); \
592 data->in_##reg[nr] = in_to_reg(val, nr); \
593 w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
594 data->in_##reg[nr]); \
595 mutex_unlock(&data->update_lock); \
599 store_in_reg(MIN, min)
600 store_in_reg(MAX, max)
602 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
604 struct w83627ehf_data *data = w83627ehf_update_device(dev);
605 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
606 int nr = sensor_attr->index;
607 return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
610 static struct sensor_device_attribute sda_in_input[] = {
611 SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
612 SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
613 SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
614 SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
615 SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
616 SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
617 SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
618 SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
619 SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
620 SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
623 static struct sensor_device_attribute sda_in_alarm[] = {
624 SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
625 SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
626 SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
627 SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
628 SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
629 SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
630 SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
631 SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
632 SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
633 SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
636 static struct sensor_device_attribute sda_in_min[] = {
637 SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
638 SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
639 SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
640 SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
641 SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
642 SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
643 SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
644 SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
645 SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
646 SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
649 static struct sensor_device_attribute sda_in_max[] = {
650 SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
651 SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
652 SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
653 SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
654 SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
655 SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
656 SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
657 SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
658 SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
659 SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
662 #define show_fan_reg(reg) \
664 show_##reg(struct device *dev, struct device_attribute *attr, \
667 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
668 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
669 int nr = sensor_attr->index; \
670 return sprintf(buf, "%d\n", \
671 fan_from_reg(data->reg[nr], \
672 div_from_reg(data->fan_div[nr]))); \
675 show_fan_reg(fan_min);
678 show_fan_div(struct device *dev, struct device_attribute *attr,
681 struct w83627ehf_data *data = w83627ehf_update_device(dev);
682 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
683 int nr = sensor_attr->index;
684 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
688 store_fan_min(struct device *dev, struct device_attribute *attr,
689 const char *buf, size_t count)
691 struct w83627ehf_data *data = dev_get_drvdata(dev);
692 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
693 int nr = sensor_attr->index;
694 unsigned int val = simple_strtoul(buf, NULL, 10);
698 mutex_lock(&data->update_lock);
700 /* No min limit, alarm disabled */
701 data->fan_min[nr] = 255;
702 new_div = data->fan_div[nr]; /* No change */
703 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
704 } else if ((reg = 1350000U / val) >= 128 * 255) {
705 /* Speed below this value cannot possibly be represented,
706 even with the highest divider (128) */
707 data->fan_min[nr] = 254;
708 new_div = 7; /* 128 == (1 << 7) */
709 dev_warn(dev, "fan%u low limit %u below minimum %u, set to "
710 "minimum\n", nr + 1, val, fan_from_reg(254, 128));
712 /* Speed above this value cannot possibly be represented,
713 even with the lowest divider (1) */
714 data->fan_min[nr] = 1;
715 new_div = 0; /* 1 == (1 << 0) */
716 dev_warn(dev, "fan%u low limit %u above maximum %u, set to "
717 "maximum\n", nr + 1, val, fan_from_reg(1, 1));
719 /* Automatically pick the best divider, i.e. the one such
720 that the min limit will correspond to a register value
721 in the 96..192 range */
723 while (reg > 192 && new_div < 7) {
727 data->fan_min[nr] = reg;
730 /* Write both the fan clock divider (if it changed) and the new
731 fan min (unconditionally) */
732 if (new_div != data->fan_div[nr]) {
733 /* Preserve the fan speed reading */
734 if (data->fan[nr] != 0xff) {
735 if (new_div > data->fan_div[nr])
736 data->fan[nr] >>= new_div - data->fan_div[nr];
737 else if (data->fan[nr] & 0x80)
738 data->fan[nr] = 0xff;
740 data->fan[nr] <<= data->fan_div[nr] - new_div;
743 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
744 nr + 1, div_from_reg(data->fan_div[nr]),
745 div_from_reg(new_div));
746 data->fan_div[nr] = new_div;
747 w83627ehf_write_fan_div(data, nr);
748 /* Give the chip time to sample a new speed value */
749 data->last_updated = jiffies;
751 w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[nr],
753 mutex_unlock(&data->update_lock);
758 static struct sensor_device_attribute sda_fan_input[] = {
759 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
760 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
761 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
762 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
763 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
766 static struct sensor_device_attribute sda_fan_alarm[] = {
767 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
768 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
769 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
770 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
771 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
774 static struct sensor_device_attribute sda_fan_min[] = {
775 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
777 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
779 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
781 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
783 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
787 static struct sensor_device_attribute sda_fan_div[] = {
788 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
789 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
790 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
791 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
792 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
795 #define show_temp1_reg(reg) \
797 show_##reg(struct device *dev, struct device_attribute *attr, \
800 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
801 return sprintf(buf, "%d\n", temp1_from_reg(data->reg)); \
803 show_temp1_reg(temp1);
804 show_temp1_reg(temp1_max);
805 show_temp1_reg(temp1_max_hyst);
807 #define store_temp1_reg(REG, reg) \
809 store_temp1_##reg(struct device *dev, struct device_attribute *attr, \
810 const char *buf, size_t count) \
812 struct w83627ehf_data *data = dev_get_drvdata(dev); \
813 long val = simple_strtol(buf, NULL, 10); \
815 mutex_lock(&data->update_lock); \
816 data->temp1_##reg = temp1_to_reg(val, -128000, 127000); \
817 w83627ehf_write_value(data, W83627EHF_REG_TEMP1_##REG, \
818 data->temp1_##reg); \
819 mutex_unlock(&data->update_lock); \
822 store_temp1_reg(OVER, max);
823 store_temp1_reg(HYST, max_hyst);
825 #define show_temp_reg(reg) \
827 show_##reg(struct device *dev, struct device_attribute *attr, \
830 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
831 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
832 int nr = sensor_attr->index; \
833 return sprintf(buf, "%d\n", \
834 LM75_TEMP_FROM_REG(data->reg[nr])); \
837 show_temp_reg(temp_max);
838 show_temp_reg(temp_max_hyst);
840 #define store_temp_reg(REG, reg) \
842 store_##reg(struct device *dev, struct device_attribute *attr, \
843 const char *buf, size_t count) \
845 struct w83627ehf_data *data = dev_get_drvdata(dev); \
846 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
847 int nr = sensor_attr->index; \
848 long val = simple_strtol(buf, NULL, 10); \
850 mutex_lock(&data->update_lock); \
851 data->reg[nr] = LM75_TEMP_TO_REG(val); \
852 w83627ehf_write_value(data, W83627EHF_REG_TEMP_##REG[nr], \
854 mutex_unlock(&data->update_lock); \
857 store_temp_reg(OVER, temp_max);
858 store_temp_reg(HYST, temp_max_hyst);
861 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
863 struct w83627ehf_data *data = w83627ehf_update_device(dev);
864 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
865 int nr = sensor_attr->index;
866 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
869 static struct sensor_device_attribute sda_temp[] = {
870 SENSOR_ATTR(temp1_input, S_IRUGO, show_temp1, NULL, 0),
871 SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 0),
872 SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 1),
873 SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp1_max,
875 SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
877 SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
879 SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp1_max_hyst,
880 store_temp1_max_hyst, 0),
881 SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
882 store_temp_max_hyst, 0),
883 SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
884 store_temp_max_hyst, 1),
885 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
886 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
887 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
888 SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
889 SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
890 SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
893 #define show_pwm_reg(reg) \
894 static ssize_t show_##reg (struct device *dev, struct device_attribute *attr, \
897 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
898 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
899 int nr = sensor_attr->index; \
900 return sprintf(buf, "%d\n", data->reg[nr]); \
903 show_pwm_reg(pwm_mode)
904 show_pwm_reg(pwm_enable)
908 store_pwm_mode(struct device *dev, struct device_attribute *attr,
909 const char *buf, size_t count)
911 struct w83627ehf_data *data = dev_get_drvdata(dev);
912 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
913 int nr = sensor_attr->index;
914 u32 val = simple_strtoul(buf, NULL, 10);
919 mutex_lock(&data->update_lock);
920 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
921 data->pwm_mode[nr] = val;
922 reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
924 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
925 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
926 mutex_unlock(&data->update_lock);
931 store_pwm(struct device *dev, struct device_attribute *attr,
932 const char *buf, size_t count)
934 struct w83627ehf_data *data = dev_get_drvdata(dev);
935 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
936 int nr = sensor_attr->index;
937 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 255);
939 mutex_lock(&data->update_lock);
941 w83627ehf_write_value(data, W83627EHF_REG_PWM[nr], val);
942 mutex_unlock(&data->update_lock);
947 store_pwm_enable(struct device *dev, struct device_attribute *attr,
948 const char *buf, size_t count)
950 struct w83627ehf_data *data = dev_get_drvdata(dev);
951 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
952 int nr = sensor_attr->index;
953 u32 val = simple_strtoul(buf, NULL, 10);
956 if (!val || (val > 2)) /* only modes 1 and 2 are supported */
958 mutex_lock(&data->update_lock);
959 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
960 data->pwm_enable[nr] = val;
961 reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
962 reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
963 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
964 mutex_unlock(&data->update_lock);
969 #define show_tol_temp(reg) \
970 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
973 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
974 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
975 int nr = sensor_attr->index; \
976 return sprintf(buf, "%d\n", temp1_from_reg(data->reg[nr])); \
979 show_tol_temp(tolerance)
980 show_tol_temp(target_temp)
983 store_target_temp(struct device *dev, struct device_attribute *attr,
984 const char *buf, size_t count)
986 struct w83627ehf_data *data = dev_get_drvdata(dev);
987 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
988 int nr = sensor_attr->index;
989 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 127000);
991 mutex_lock(&data->update_lock);
992 data->target_temp[nr] = val;
993 w83627ehf_write_value(data, W83627EHF_REG_TARGET[nr], val);
994 mutex_unlock(&data->update_lock);
999 store_tolerance(struct device *dev, struct device_attribute *attr,
1000 const char *buf, size_t count)
1002 struct w83627ehf_data *data = dev_get_drvdata(dev);
1003 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1004 int nr = sensor_attr->index;
1006 /* Limit the temp to 0C - 15C */
1007 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 15000);
1009 mutex_lock(&data->update_lock);
1010 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
1011 data->tolerance[nr] = val;
1013 reg = (reg & 0x0f) | (val << 4);
1015 reg = (reg & 0xf0) | val;
1016 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
1017 mutex_unlock(&data->update_lock);
1021 static struct sensor_device_attribute sda_pwm[] = {
1022 SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
1023 SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
1024 SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
1025 SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
1028 static struct sensor_device_attribute sda_pwm_mode[] = {
1029 SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1031 SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1033 SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1035 SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1039 static struct sensor_device_attribute sda_pwm_enable[] = {
1040 SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1041 store_pwm_enable, 0),
1042 SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1043 store_pwm_enable, 1),
1044 SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1045 store_pwm_enable, 2),
1046 SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1047 store_pwm_enable, 3),
1050 static struct sensor_device_attribute sda_target_temp[] = {
1051 SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1052 store_target_temp, 0),
1053 SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1054 store_target_temp, 1),
1055 SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1056 store_target_temp, 2),
1057 SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
1058 store_target_temp, 3),
1061 static struct sensor_device_attribute sda_tolerance[] = {
1062 SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1063 store_tolerance, 0),
1064 SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1065 store_tolerance, 1),
1066 SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1067 store_tolerance, 2),
1068 SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1069 store_tolerance, 3),
1072 /* Smart Fan registers */
1074 #define fan_functions(reg, REG) \
1075 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1078 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1079 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1080 int nr = sensor_attr->index; \
1081 return sprintf(buf, "%d\n", data->reg[nr]); \
1084 store_##reg(struct device *dev, struct device_attribute *attr, \
1085 const char *buf, size_t count) \
1087 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1088 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1089 int nr = sensor_attr->index; \
1090 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 1, 255); \
1091 mutex_lock(&data->update_lock); \
1092 data->reg[nr] = val; \
1093 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1094 mutex_unlock(&data->update_lock); \
1098 fan_functions(fan_min_output, FAN_MIN_OUTPUT)
1100 #define fan_time_functions(reg, REG) \
1101 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1104 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1105 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1106 int nr = sensor_attr->index; \
1107 return sprintf(buf, "%d\n", \
1108 step_time_from_reg(data->reg[nr], data->pwm_mode[nr])); \
1112 store_##reg(struct device *dev, struct device_attribute *attr, \
1113 const char *buf, size_t count) \
1115 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1116 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1117 int nr = sensor_attr->index; \
1118 u8 val = step_time_to_reg(simple_strtoul(buf, NULL, 10), \
1119 data->pwm_mode[nr]); \
1120 mutex_lock(&data->update_lock); \
1121 data->reg[nr] = val; \
1122 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1123 mutex_unlock(&data->update_lock); \
1127 fan_time_functions(fan_stop_time, FAN_STOP_TIME)
1129 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1132 struct w83627ehf_data *data = dev_get_drvdata(dev);
1134 return sprintf(buf, "%s\n", data->name);
1136 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1138 static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
1139 SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1140 store_fan_stop_time, 3),
1141 SENSOR_ATTR(pwm4_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1142 store_fan_min_output, 3),
1145 static struct sensor_device_attribute sda_sf3_arrays[] = {
1146 SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1147 store_fan_stop_time, 0),
1148 SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1149 store_fan_stop_time, 1),
1150 SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1151 store_fan_stop_time, 2),
1152 SENSOR_ATTR(pwm1_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1153 store_fan_min_output, 0),
1154 SENSOR_ATTR(pwm2_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1155 store_fan_min_output, 1),
1156 SENSOR_ATTR(pwm3_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1157 store_fan_min_output, 2),
1161 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1163 struct w83627ehf_data *data = dev_get_drvdata(dev);
1164 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1166 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1169 * Driver and device management
1172 static void w83627ehf_device_remove_files(struct device *dev)
1174 /* some entries in the following arrays may not have been used in
1175 * device_create_file(), but device_remove_file() will ignore them */
1177 struct w83627ehf_data *data = dev_get_drvdata(dev);
1179 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1180 device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1181 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
1182 device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1183 for (i = 0; i < data->in_num; i++) {
1184 device_remove_file(dev, &sda_in_input[i].dev_attr);
1185 device_remove_file(dev, &sda_in_alarm[i].dev_attr);
1186 device_remove_file(dev, &sda_in_min[i].dev_attr);
1187 device_remove_file(dev, &sda_in_max[i].dev_attr);
1189 for (i = 0; i < 5; i++) {
1190 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1191 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1192 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1193 device_remove_file(dev, &sda_fan_min[i].dev_attr);
1195 for (i = 0; i < 4; i++) {
1196 device_remove_file(dev, &sda_pwm[i].dev_attr);
1197 device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
1198 device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
1199 device_remove_file(dev, &sda_target_temp[i].dev_attr);
1200 device_remove_file(dev, &sda_tolerance[i].dev_attr);
1202 for (i = 0; i < ARRAY_SIZE(sda_temp); i++)
1203 device_remove_file(dev, &sda_temp[i].dev_attr);
1205 device_remove_file(dev, &dev_attr_name);
1206 device_remove_file(dev, &dev_attr_cpu0_vid);
1209 /* Get the monitoring functions started */
1210 static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data)
1215 /* Start monitoring is needed */
1216 tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1218 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1221 /* Enable temp2 and temp3 if needed */
1222 for (i = 0; i < 2; i++) {
1223 tmp = w83627ehf_read_value(data,
1224 W83627EHF_REG_TEMP_CONFIG[i]);
1226 w83627ehf_write_value(data,
1227 W83627EHF_REG_TEMP_CONFIG[i],
1231 /* Enable VBAT monitoring if needed */
1232 tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1234 w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1236 /* Get thermal sensor types */
1237 diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1238 for (i = 0; i < 3; i++) {
1239 if ((tmp & (0x02 << i)))
1240 data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 2;
1242 data->temp_type[i] = 4; /* thermistor */
1246 static int __devinit w83627ehf_probe(struct platform_device *pdev)
1248 struct device *dev = &pdev->dev;
1249 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1250 struct w83627ehf_data *data;
1251 struct resource *res;
1252 u8 fan4pin, fan5pin, en_vrm10;
1255 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1256 if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
1258 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1259 (unsigned long)res->start,
1260 (unsigned long)res->start + IOREGION_LENGTH - 1);
1264 if (!(data = kzalloc(sizeof(struct w83627ehf_data), GFP_KERNEL))) {
1269 data->addr = res->start;
1270 mutex_init(&data->lock);
1271 mutex_init(&data->update_lock);
1272 data->name = w83627ehf_device_names[sio_data->kind];
1273 platform_set_drvdata(pdev, data);
1275 /* 627EHG and 627EHF have 10 voltage inputs; DHG has 9 */
1276 data->in_num = (sio_data->kind == w83627dhg) ? 9 : 10;
1278 /* Initialize the chip */
1279 w83627ehf_init_device(data);
1281 data->vrm = vid_which_vrm();
1282 superio_enter(sio_data->sioreg);
1283 /* Read VID value */
1284 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
1285 if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80) {
1286 /* Set VID input sensibility if needed. In theory the BIOS
1287 should have set it, but in practice it's not always the
1288 case. We only do it for the W83627EHF/EHG because the
1289 W83627DHG is more complex in this respect. */
1290 if (sio_data->kind == w83627ehf) {
1291 en_vrm10 = superio_inb(sio_data->sioreg,
1293 if ((en_vrm10 & 0x08) && data->vrm == 90) {
1294 dev_warn(dev, "Setting VID input voltage to "
1296 superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,
1298 } else if (!(en_vrm10 & 0x08) && data->vrm == 100) {
1299 dev_warn(dev, "Setting VID input voltage to "
1301 superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,
1306 data->vid = superio_inb(sio_data->sioreg, SIO_REG_VID_DATA);
1307 if (sio_data->kind == w83627ehf) /* 6 VID pins only */
1310 err = device_create_file(dev, &dev_attr_cpu0_vid);
1314 dev_info(dev, "VID pins in output mode, CPU VID not "
1318 /* fan4 and fan5 share some pins with the GPIO and serial flash */
1320 fan5pin = superio_inb(sio_data->sioreg, 0x24) & 0x2;
1321 fan4pin = superio_inb(sio_data->sioreg, 0x29) & 0x6;
1322 superio_exit(sio_data->sioreg);
1324 /* It looks like fan4 and fan5 pins can be alternatively used
1325 as fan on/off switches, but fan5 control is write only :/
1326 We assume that if the serial interface is disabled, designers
1327 connected fan5 as input unless they are emitting log 1, which
1328 is not the default. */
1330 data->has_fan = 0x07; /* fan1, fan2 and fan3 */
1331 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
1332 if ((i & (1 << 2)) && (!fan4pin))
1333 data->has_fan |= (1 << 3);
1334 if (!(i & (1 << 1)) && (!fan5pin))
1335 data->has_fan |= (1 << 4);
1337 /* Read fan clock dividers immediately */
1338 w83627ehf_update_fan_div(data);
1340 /* Register sysfs hooks */
1341 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1342 if ((err = device_create_file(dev,
1343 &sda_sf3_arrays[i].dev_attr)))
1346 /* if fan4 is enabled create the sf3 files for it */
1347 if (data->has_fan & (1 << 3))
1348 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
1349 if ((err = device_create_file(dev,
1350 &sda_sf3_arrays_fan4[i].dev_attr)))
1354 for (i = 0; i < data->in_num; i++)
1355 if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
1356 || (err = device_create_file(dev,
1357 &sda_in_alarm[i].dev_attr))
1358 || (err = device_create_file(dev,
1359 &sda_in_min[i].dev_attr))
1360 || (err = device_create_file(dev,
1361 &sda_in_max[i].dev_attr)))
1364 for (i = 0; i < 5; i++) {
1365 if (data->has_fan & (1 << i)) {
1366 if ((err = device_create_file(dev,
1367 &sda_fan_input[i].dev_attr))
1368 || (err = device_create_file(dev,
1369 &sda_fan_alarm[i].dev_attr))
1370 || (err = device_create_file(dev,
1371 &sda_fan_div[i].dev_attr))
1372 || (err = device_create_file(dev,
1373 &sda_fan_min[i].dev_attr)))
1375 if (i < 4 && /* w83627ehf only has 4 pwm */
1376 ((err = device_create_file(dev,
1377 &sda_pwm[i].dev_attr))
1378 || (err = device_create_file(dev,
1379 &sda_pwm_mode[i].dev_attr))
1380 || (err = device_create_file(dev,
1381 &sda_pwm_enable[i].dev_attr))
1382 || (err = device_create_file(dev,
1383 &sda_target_temp[i].dev_attr))
1384 || (err = device_create_file(dev,
1385 &sda_tolerance[i].dev_attr))))
1390 for (i = 0; i < ARRAY_SIZE(sda_temp); i++)
1391 if ((err = device_create_file(dev, &sda_temp[i].dev_attr)))
1394 err = device_create_file(dev, &dev_attr_name);
1398 data->hwmon_dev = hwmon_device_register(dev);
1399 if (IS_ERR(data->hwmon_dev)) {
1400 err = PTR_ERR(data->hwmon_dev);
1407 w83627ehf_device_remove_files(dev);
1409 platform_set_drvdata(pdev, NULL);
1411 release_region(res->start, IOREGION_LENGTH);
1416 static int __devexit w83627ehf_remove(struct platform_device *pdev)
1418 struct w83627ehf_data *data = platform_get_drvdata(pdev);
1420 hwmon_device_unregister(data->hwmon_dev);
1421 w83627ehf_device_remove_files(&pdev->dev);
1422 release_region(data->addr, IOREGION_LENGTH);
1423 platform_set_drvdata(pdev, NULL);
1429 static struct platform_driver w83627ehf_driver = {
1431 .owner = THIS_MODULE,
1434 .probe = w83627ehf_probe,
1435 .remove = __devexit_p(w83627ehf_remove),
1438 /* w83627ehf_find() looks for a '627 in the Super-I/O config space */
1439 static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
1440 struct w83627ehf_sio_data *sio_data)
1442 static const char __initdata sio_name_W83627EHF[] = "W83627EHF";
1443 static const char __initdata sio_name_W83627EHG[] = "W83627EHG";
1444 static const char __initdata sio_name_W83627DHG[] = "W83627DHG";
1447 const char *sio_name;
1449 superio_enter(sioaddr);
1454 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
1455 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
1456 switch (val & SIO_ID_MASK) {
1457 case SIO_W83627EHF_ID:
1458 sio_data->kind = w83627ehf;
1459 sio_name = sio_name_W83627EHF;
1461 case SIO_W83627EHG_ID:
1462 sio_data->kind = w83627ehf;
1463 sio_name = sio_name_W83627EHG;
1465 case SIO_W83627DHG_ID:
1466 sio_data->kind = w83627dhg;
1467 sio_name = sio_name_W83627DHG;
1471 pr_debug(DRVNAME ": unsupported chip ID: 0x%04x\n",
1473 superio_exit(sioaddr);
1477 /* We have a known chip, find the HWM I/O address */
1478 superio_select(sioaddr, W83627EHF_LD_HWM);
1479 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
1480 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
1481 *addr = val & IOREGION_ALIGNMENT;
1483 printk(KERN_ERR DRVNAME ": Refusing to enable a Super-I/O "
1484 "device with a base I/O port 0.\n");
1485 superio_exit(sioaddr);
1489 /* Activate logical device if needed */
1490 val = superio_inb(sioaddr, SIO_REG_ENABLE);
1491 if (!(val & 0x01)) {
1492 printk(KERN_WARNING DRVNAME ": Forcibly enabling Super-I/O. "
1493 "Sensor is probably unusable.\n");
1494 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
1497 superio_exit(sioaddr);
1498 pr_info(DRVNAME ": Found %s chip at %#x\n", sio_name, *addr);
1499 sio_data->sioreg = sioaddr;
1504 /* when Super-I/O functions move to a separate file, the Super-I/O
1505 * bus will manage the lifetime of the device and this module will only keep
1506 * track of the w83627ehf driver. But since we platform_device_alloc(), we
1507 * must keep track of the device */
1508 static struct platform_device *pdev;
1510 static int __init sensors_w83627ehf_init(void)
1513 unsigned short address;
1514 struct resource res;
1515 struct w83627ehf_sio_data sio_data;
1517 /* initialize sio_data->kind and sio_data->sioreg.
1519 * when Super-I/O functions move to a separate file, the Super-I/O
1520 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
1521 * w83627ehf hardware monitor, and call probe() */
1522 if (w83627ehf_find(0x2e, &address, &sio_data) &&
1523 w83627ehf_find(0x4e, &address, &sio_data))
1526 err = platform_driver_register(&w83627ehf_driver);
1530 if (!(pdev = platform_device_alloc(DRVNAME, address))) {
1532 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1533 goto exit_unregister;
1536 err = platform_device_add_data(pdev, &sio_data,
1537 sizeof(struct w83627ehf_sio_data));
1539 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1540 goto exit_device_put;
1543 memset(&res, 0, sizeof(res));
1545 res.start = address + IOREGION_OFFSET;
1546 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
1547 res.flags = IORESOURCE_IO;
1549 err = acpi_check_resource_conflict(&res);
1553 err = platform_device_add_resources(pdev, &res, 1);
1555 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1557 goto exit_device_put;
1560 /* platform_device_add calls probe() */
1561 err = platform_device_add(pdev);
1563 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1565 goto exit_device_put;
1571 platform_device_put(pdev);
1573 platform_driver_unregister(&w83627ehf_driver);
1578 static void __exit sensors_w83627ehf_exit(void)
1580 platform_device_unregister(pdev);
1581 platform_driver_unregister(&w83627ehf_driver);
1584 MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
1585 MODULE_DESCRIPTION("W83627EHF driver");
1586 MODULE_LICENSE("GPL");
1588 module_init(sensors_w83627ehf_init);
1589 module_exit(sensors_w83627ehf_exit);