2 * Platform dependent support for SGI SN
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
8 * Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved.
11 #include <linux/irq.h>
12 #include <linux/spinlock.h>
13 #include <linux/init.h>
14 #include <asm/sn/addrs.h>
15 #include <asm/sn/arch.h>
16 #include <asm/sn/intr.h>
17 #include <asm/sn/pcibr_provider.h>
18 #include <asm/sn/pcibus_provider_defs.h>
19 #include <asm/sn/pcidev.h>
20 #include <asm/sn/shub_mmr.h>
21 #include <asm/sn/sn_sal.h>
22 #include <asm/sn/sn_feature_sets.h>
24 static void force_interrupt(int irq);
25 static void register_intr_pda(struct sn_irq_info *sn_irq_info);
26 static void unregister_intr_pda(struct sn_irq_info *sn_irq_info);
28 int sn_force_interrupt_flag = 1;
29 extern int sn_ioif_inited;
30 struct list_head **sn_irq_lh;
31 static DEFINE_SPINLOCK(sn_irq_info_lock); /* non-IRQ lock */
33 u64 sn_intr_alloc(nasid_t local_nasid, int local_widget,
34 struct sn_irq_info *sn_irq_info,
35 int req_irq, nasid_t req_nasid,
38 struct ia64_sal_retval ret_stuff;
42 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
43 (u64) SAL_INTR_ALLOC, (u64) local_nasid,
44 (u64) local_widget, __pa(sn_irq_info), (u64) req_irq,
45 (u64) req_nasid, (u64) req_slice);
47 return ret_stuff.status;
50 void sn_intr_free(nasid_t local_nasid, int local_widget,
51 struct sn_irq_info *sn_irq_info)
53 struct ia64_sal_retval ret_stuff;
57 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
58 (u64) SAL_INTR_FREE, (u64) local_nasid,
59 (u64) local_widget, (u64) sn_irq_info->irq_irq,
60 (u64) sn_irq_info->irq_cookie, 0, 0);
63 u64 sn_intr_redirect(nasid_t local_nasid, int local_widget,
64 struct sn_irq_info *sn_irq_info,
65 nasid_t req_nasid, int req_slice)
67 struct ia64_sal_retval ret_stuff;
71 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
72 (u64) SAL_INTR_REDIRECT, (u64) local_nasid,
73 (u64) local_widget, __pa(sn_irq_info),
74 (u64) req_nasid, (u64) req_slice, 0);
76 return ret_stuff.status;
79 static unsigned int sn_startup_irq(unsigned int irq)
84 static void sn_shutdown_irq(unsigned int irq)
88 static void sn_disable_irq(unsigned int irq)
92 static void sn_enable_irq(unsigned int irq)
96 static void sn_ack_irq(unsigned int irq)
98 u64 event_occurred, mask;
101 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED));
102 mask = event_occurred & SH_ALL_INT_MASK;
103 HUB_S((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), mask);
104 __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs);
106 move_native_irq(irq);
109 static void sn_end_irq(unsigned int irq)
115 if (ivec == SGI_UART_VECTOR) {
116 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR (SH_EVENT_OCCURRED));
117 /* If the UART bit is set here, we may have received an
118 * interrupt from the UART that the driver missed. To
119 * make sure, we IPI ourselves to force us to look again.
121 if (event_occurred & SH_EVENT_OCCURRED_UART_INT_MASK) {
122 platform_send_ipi(smp_processor_id(), SGI_UART_VECTOR,
126 __clear_bit(ivec, (volatile void *)pda->sn_in_service_ivecs);
127 if (sn_force_interrupt_flag)
128 force_interrupt(irq);
131 static void sn_irq_info_free(struct rcu_head *head);
133 struct sn_irq_info *sn_retarget_vector(struct sn_irq_info *sn_irq_info,
134 nasid_t nasid, int slice)
142 int local_widget, status;
144 struct sn_irq_info *new_irq_info;
145 struct sn_pcibus_provider *pci_provider;
147 bridge = (u64) sn_irq_info->irq_bridge;
149 return NULL; /* irq is not a device interrupt */
152 local_nasid = NASID_GET(bridge);
155 local_widget = TIO_SWIN_WIDGETNUM(bridge);
157 local_widget = SWIN_WIDGETNUM(bridge);
158 vector = sn_irq_info->irq_irq;
160 /* Make use of SAL_INTR_REDIRECT if PROM supports it */
161 status = sn_intr_redirect(local_nasid, local_widget, sn_irq_info, nasid, slice);
163 new_irq_info = sn_irq_info;
168 * PROM does not support SAL_INTR_REDIRECT, or it failed.
169 * Revert to old method.
171 new_irq_info = kmalloc(sizeof(struct sn_irq_info), GFP_ATOMIC);
172 if (new_irq_info == NULL)
175 memcpy(new_irq_info, sn_irq_info, sizeof(struct sn_irq_info));
177 /* Free the old PROM new_irq_info structure */
178 sn_intr_free(local_nasid, local_widget, new_irq_info);
179 unregister_intr_pda(new_irq_info);
181 /* allocate a new PROM new_irq_info struct */
182 status = sn_intr_alloc(local_nasid, local_widget,
183 new_irq_info, vector,
186 /* SAL call failed */
192 register_intr_pda(new_irq_info);
193 spin_lock(&sn_irq_info_lock);
194 list_replace_rcu(&sn_irq_info->list, &new_irq_info->list);
195 spin_unlock(&sn_irq_info_lock);
196 call_rcu(&sn_irq_info->rcu, sn_irq_info_free);
200 /* Update kernels new_irq_info with new target info */
201 cpuid = nasid_slice_to_cpuid(new_irq_info->irq_nasid,
202 new_irq_info->irq_slice);
203 new_irq_info->irq_cpuid = cpuid;
205 pci_provider = sn_pci_provider[new_irq_info->irq_bridge_type];
208 * If this represents a line interrupt, target it. If it's
209 * an msi (irq_int_bit < 0), it's already targeted.
211 if (new_irq_info->irq_int_bit >= 0 &&
212 pci_provider && pci_provider->target_interrupt)
213 (pci_provider->target_interrupt)(new_irq_info);
216 cpuphys = cpu_physical_id(cpuid);
217 set_irq_affinity_info((vector & 0xff), cpuphys, 0);
223 static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask)
225 struct sn_irq_info *sn_irq_info, *sn_irq_info_safe;
229 nasid = cpuid_to_nasid(first_cpu(mask));
230 slice = cpuid_to_slice(first_cpu(mask));
232 list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe,
233 sn_irq_lh[irq], list)
234 (void)sn_retarget_vector(sn_irq_info, nasid, slice);
238 void sn_set_err_irq_affinity(unsigned int irq)
241 * On systems which support CPU disabling (SHub2), all error interrupts
242 * are targetted at the boot CPU.
244 if (is_shub2() && sn_prom_feature_available(PRF_CPU_DISABLE_SUPPORT))
245 set_irq_affinity_info(irq, cpu_physical_id(0), 0);
248 void sn_set_err_irq_affinity(unsigned int irq) { }
252 sn_mask_irq(unsigned int irq)
257 sn_unmask_irq(unsigned int irq)
261 struct irq_chip irq_type_sn = {
263 .startup = sn_startup_irq,
264 .shutdown = sn_shutdown_irq,
265 .enable = sn_enable_irq,
266 .disable = sn_disable_irq,
270 .unmask = sn_unmask_irq,
271 .set_affinity = sn_set_affinity_irq
274 ia64_vector sn_irq_to_vector(int irq)
276 if (irq >= IA64_NUM_VECTORS)
278 return (ia64_vector)irq;
281 unsigned int sn_local_vector_to_irq(u8 vector)
283 return (CPU_VECTOR_TO_IRQ(smp_processor_id(), vector));
286 void sn_irq_init(void)
289 irq_desc_t *base_desc = irq_desc;
291 ia64_first_device_vector = IA64_SN2_FIRST_DEVICE_VECTOR;
292 ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR;
294 for (i = 0; i < NR_IRQS; i++) {
295 if (base_desc[i].chip == &no_irq_type) {
296 base_desc[i].chip = &irq_type_sn;
301 static void register_intr_pda(struct sn_irq_info *sn_irq_info)
303 int irq = sn_irq_info->irq_irq;
304 int cpu = sn_irq_info->irq_cpuid;
306 if (pdacpu(cpu)->sn_last_irq < irq) {
307 pdacpu(cpu)->sn_last_irq = irq;
310 if (pdacpu(cpu)->sn_first_irq == 0 || pdacpu(cpu)->sn_first_irq > irq)
311 pdacpu(cpu)->sn_first_irq = irq;
314 static void unregister_intr_pda(struct sn_irq_info *sn_irq_info)
316 int irq = sn_irq_info->irq_irq;
317 int cpu = sn_irq_info->irq_cpuid;
318 struct sn_irq_info *tmp_irq_info;
322 if (pdacpu(cpu)->sn_last_irq == irq) {
324 for (i = pdacpu(cpu)->sn_last_irq - 1;
325 i && !foundmatch; i--) {
326 list_for_each_entry_rcu(tmp_irq_info,
329 if (tmp_irq_info->irq_cpuid == cpu) {
335 pdacpu(cpu)->sn_last_irq = i;
338 if (pdacpu(cpu)->sn_first_irq == irq) {
340 for (i = pdacpu(cpu)->sn_first_irq + 1;
341 i < NR_IRQS && !foundmatch; i++) {
342 list_for_each_entry_rcu(tmp_irq_info,
345 if (tmp_irq_info->irq_cpuid == cpu) {
351 pdacpu(cpu)->sn_first_irq = ((i == NR_IRQS) ? 0 : i);
356 static void sn_irq_info_free(struct rcu_head *head)
358 struct sn_irq_info *sn_irq_info;
360 sn_irq_info = container_of(head, struct sn_irq_info, rcu);
364 void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info)
366 nasid_t nasid = sn_irq_info->irq_nasid;
367 int slice = sn_irq_info->irq_slice;
368 int cpu = nasid_slice_to_cpuid(nasid, slice);
373 pci_dev_get(pci_dev);
374 sn_irq_info->irq_cpuid = cpu;
375 sn_irq_info->irq_pciioinfo = SN_PCIDEV_INFO(pci_dev);
377 /* link it into the sn_irq[irq] list */
378 spin_lock(&sn_irq_info_lock);
379 list_add_rcu(&sn_irq_info->list, sn_irq_lh[sn_irq_info->irq_irq]);
380 reserve_irq_vector(sn_irq_info->irq_irq);
381 spin_unlock(&sn_irq_info_lock);
383 register_intr_pda(sn_irq_info);
385 cpuphys = cpu_physical_id(cpu);
386 set_irq_affinity_info(sn_irq_info->irq_irq, cpuphys, 0);
390 void sn_irq_unfixup(struct pci_dev *pci_dev)
392 struct sn_irq_info *sn_irq_info;
394 /* Only cleanup IRQ stuff if this device has a host bus context */
395 if (!SN_PCIDEV_BUSSOFT(pci_dev))
398 sn_irq_info = SN_PCIDEV_INFO(pci_dev)->pdi_sn_irq_info;
401 if (!sn_irq_info->irq_irq) {
406 unregister_intr_pda(sn_irq_info);
407 spin_lock(&sn_irq_info_lock);
408 list_del_rcu(&sn_irq_info->list);
409 spin_unlock(&sn_irq_info_lock);
410 if (list_empty(sn_irq_lh[sn_irq_info->irq_irq]))
411 free_irq_vector(sn_irq_info->irq_irq);
412 call_rcu(&sn_irq_info->rcu, sn_irq_info_free);
413 pci_dev_put(pci_dev);
418 sn_call_force_intr_provider(struct sn_irq_info *sn_irq_info)
420 struct sn_pcibus_provider *pci_provider;
422 pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type];
424 /* Don't force an interrupt if the irq has been disabled */
425 if (!(irq_desc[sn_irq_info->irq_irq].status & IRQ_DISABLED) &&
426 pci_provider && pci_provider->force_interrupt)
427 (*pci_provider->force_interrupt)(sn_irq_info);
430 static void force_interrupt(int irq)
432 struct sn_irq_info *sn_irq_info;
438 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[irq], list)
439 sn_call_force_intr_provider(sn_irq_info);
445 * Check for lost interrupts. If the PIC int_status reg. says that
446 * an interrupt has been sent, but not handled, and the interrupt
447 * is not pending in either the cpu irr regs or in the soft irr regs,
448 * and the interrupt is not in service, then the interrupt may have
449 * been lost. Force an interrupt on that pin. It is possible that
450 * the interrupt is in flight, so we may generate a spurious interrupt,
451 * but we should never miss a real lost interrupt.
453 static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info)
456 struct pcidev_info *pcidev_info;
457 struct pcibus_info *pcibus_info;
460 * Bridge types attached to TIO (anything but PIC) do not need this WAR
461 * since they do not target Shub II interrupt registers. If that
462 * ever changes, this check needs to accomodate.
464 if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_PIC)
467 pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
472 (struct pcibus_info *)pcidev_info->pdi_host_pcidev_info->
474 regval = pcireg_intr_status_get(pcibus_info);
476 if (!ia64_get_irr(irq_to_vector(irq))) {
477 if (!test_bit(irq, pda->sn_in_service_ivecs)) {
479 if (sn_irq_info->irq_int_bit & regval &
480 sn_irq_info->irq_last_intr) {
481 regval &= ~(sn_irq_info->irq_int_bit & regval);
482 sn_call_force_intr_provider(sn_irq_info);
486 sn_irq_info->irq_last_intr = regval;
489 void sn_lb_int_war_check(void)
491 struct sn_irq_info *sn_irq_info;
494 if (!sn_ioif_inited || pda->sn_first_irq == 0)
498 for (i = pda->sn_first_irq; i <= pda->sn_last_irq; i++) {
499 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[i], list) {
500 sn_check_intr(i, sn_irq_info);
506 void __init sn_irq_lh_init(void)
510 sn_irq_lh = kmalloc(sizeof(struct list_head *) * NR_IRQS, GFP_KERNEL);
512 panic("SN PCI INIT: Failed to allocate memory for PCI init\n");
514 for (i = 0; i < NR_IRQS; i++) {
515 sn_irq_lh[i] = kmalloc(sizeof(struct list_head), GFP_KERNEL);
517 panic("SN PCI INIT: Failed IRQ memory allocation\n");
519 INIT_LIST_HEAD(sn_irq_lh[i]);