git.oblomov.eu Git - linux-2.6/blob - drivers/staging/rt2860/common/rtmp_init.c

   1 /*
   2  *************************************************************************
   3  * Ralink Tech Inc.
   4  * 5F., No.36, Taiyuan St., Jhubei City,
   5  * Hsinchu County 302,
   6  * Taiwan, R.O.C.
   7  *
   8  * (c) Copyright 2002-2007, Ralink Technology, Inc.
   9  *
  10  * This program is free software; you can redistribute it and/or modify  *
  11  * it under the terms of the GNU General Public License as published by  *
  12  * the Free Software Foundation; either version 2 of the License, or     *
  13  * (at your option) any later version.                                   *
  14  *                                                                       *
  15  * This program is distributed in the hope that it will be useful,       *
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  18  * GNU General Public License for more details.                          *
  19  *                                                                       *
  20  * You should have received a copy of the GNU General Public License     *
  21  * along with this program; if not, write to the                         *
  22  * Free Software Foundation, Inc.,                                       *
  23  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  24  *                                                                       *
  25  *************************************************************************
  26
  27         Module Name:
  28         rtmp_init.c
  29
  30         Abstract:
  31         Miniport generic portion header file
  32
  33         Revision History:
  34         Who         When          What
  35         --------    ----------    ----------------------------------------------
  36         Paul Lin    2002-08-01    created
  37     John Chang  2004-08-20    RT2561/2661 use scatter-gather scheme
  38     Jan Lee  2006-09-15    RT2860. Change for 802.11n , EEPROM, Led, BA, HT.
  39 */
  40 #include "../rt_config.h"
  41 #include        "firmware.h"
  42 #include <linux/bitrev.h>
  43
  44 UCHAR    BIT8[] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80};
  45 ULONG    BIT32[] = {0x00000001, 0x00000002, 0x00000004, 0x00000008,
  46                                         0x00000010, 0x00000020, 0x00000040, 0x00000080,
  47                                         0x00000100, 0x00000200, 0x00000400, 0x00000800,
  48                                         0x00001000, 0x00002000, 0x00004000, 0x00008000,
  49                                         0x00010000, 0x00020000, 0x00040000, 0x00080000,
  50                                         0x00100000, 0x00200000, 0x00400000, 0x00800000,
  51                                         0x01000000, 0x02000000, 0x04000000, 0x08000000,
  52                                         0x10000000, 0x20000000, 0x40000000, 0x80000000};
  53
  54 char*   CipherName[] = {"none","wep64","wep128","TKIP","AES","CKIP64","CKIP128"};
  55
  56 const unsigned short ccitt_16Table[] = {
  57         0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50A5, 0x60C6, 0x70E7,
  58         0x8108, 0x9129, 0xA14A, 0xB16B, 0xC18C, 0xD1AD, 0xE1CE, 0xF1EF,
  59         0x1231, 0x0210, 0x3273, 0x2252, 0x52B5, 0x4294, 0x72F7, 0x62D6,
  60         0x9339, 0x8318, 0xB37B, 0xA35A, 0xD3BD, 0xC39C, 0xF3FF, 0xE3DE,
  61         0x2462, 0x3443, 0x0420, 0x1401, 0x64E6, 0x74C7, 0x44A4, 0x5485,
  62         0xA56A, 0xB54B, 0x8528, 0x9509, 0xE5EE, 0xF5CF, 0xC5AC, 0xD58D,
  63         0x3653, 0x2672, 0x1611, 0x0630, 0x76D7, 0x66F6, 0x5695, 0x46B4,
  64         0xB75B, 0xA77A, 0x9719, 0x8738, 0xF7DF, 0xE7FE, 0xD79D, 0xC7BC,
  65         0x48C4, 0x58E5, 0x6886, 0x78A7, 0x0840, 0x1861, 0x2802, 0x3823,
  66         0xC9CC, 0xD9ED, 0xE98E, 0xF9AF, 0x8948, 0x9969, 0xA90A, 0xB92B,
  67         0x5AF5, 0x4AD4, 0x7AB7, 0x6A96, 0x1A71, 0x0A50, 0x3A33, 0x2A12,
  68         0xDBFD, 0xCBDC, 0xFBBF, 0xEB9E, 0x9B79, 0x8B58, 0xBB3B, 0xAB1A,
  69         0x6CA6, 0x7C87, 0x4CE4, 0x5CC5, 0x2C22, 0x3C03, 0x0C60, 0x1C41,
  70         0xEDAE, 0xFD8F, 0xCDEC, 0xDDCD, 0xAD2A, 0xBD0B, 0x8D68, 0x9D49,
  71         0x7E97, 0x6EB6, 0x5ED5, 0x4EF4, 0x3E13, 0x2E32, 0x1E51, 0x0E70,
  72         0xFF9F, 0xEFBE, 0xDFDD, 0xCFFC, 0xBF1B, 0xAF3A, 0x9F59, 0x8F78,
  73         0x9188, 0x81A9, 0xB1CA, 0xA1EB, 0xD10C, 0xC12D, 0xF14E, 0xE16F,
  74         0x1080, 0x00A1, 0x30C2, 0x20E3, 0x5004, 0x4025, 0x7046, 0x6067,
  75         0x83B9, 0x9398, 0xA3FB, 0xB3DA, 0xC33D, 0xD31C, 0xE37F, 0xF35E,
  76         0x02B1, 0x1290, 0x22F3, 0x32D2, 0x4235, 0x5214, 0x6277, 0x7256,
  77         0xB5EA, 0xA5CB, 0x95A8, 0x8589, 0xF56E, 0xE54F, 0xD52C, 0xC50D,
  78         0x34E2, 0x24C3, 0x14A0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
  79         0xA7DB, 0xB7FA, 0x8799, 0x97B8, 0xE75F, 0xF77E, 0xC71D, 0xD73C,
  80         0x26D3, 0x36F2, 0x0691, 0x16B0, 0x6657, 0x7676, 0x4615, 0x5634,
  81         0xD94C, 0xC96D, 0xF90E, 0xE92F, 0x99C8, 0x89E9, 0xB98A, 0xA9AB,
  82         0x5844, 0x4865, 0x7806, 0x6827, 0x18C0, 0x08E1, 0x3882, 0x28A3,
  83         0xCB7D, 0xDB5C, 0xEB3F, 0xFB1E, 0x8BF9, 0x9BD8, 0xABBB, 0xBB9A,
  84         0x4A75, 0x5A54, 0x6A37, 0x7A16, 0x0AF1, 0x1AD0, 0x2AB3, 0x3A92,
  85         0xFD2E, 0xED0F, 0xDD6C, 0xCD4D, 0xBDAA, 0xAD8B, 0x9DE8, 0x8DC9,
  86         0x7C26, 0x6C07, 0x5C64, 0x4C45, 0x3CA2, 0x2C83, 0x1CE0, 0x0CC1,
  87         0xEF1F, 0xFF3E, 0xCF5D, 0xDF7C, 0xAF9B, 0xBFBA, 0x8FD9, 0x9FF8,
  88         0x6E17, 0x7E36, 0x4E55, 0x5E74, 0x2E93, 0x3EB2, 0x0ED1, 0x1EF0
  89 };
  90 #define ByteCRC16(v, crc) \
  91         (unsigned short)((crc << 8) ^  ccitt_16Table[((crc >> 8) ^ (v)) & 255])
  92
  93 //
  94 // BBP register initialization set
  95 //
  96 REG_PAIR   BBPRegTable[] = {
  97         {BBP_R65,               0x2C},          // fix rssi issue
  98         {BBP_R66,               0x38},  // Also set this default value to pAd->BbpTuning.R66CurrentValue at initial
  99         {BBP_R69,               0x12},
 100         {BBP_R70,               0xa},   // BBP_R70 will change to 0x8 in ApStartUp and LinkUp for rt2860C, otherwise value is 0xa
 101         {BBP_R73,               0x10},
 102         {BBP_R81,               0x37},
 103         {BBP_R82,               0x62},
 104         {BBP_R83,               0x6A},
 105         {BBP_R84,               0x99},  // 0x19 is for rt2860E and after. This is for extension channel overlapping IOT. 0x99 is for rt2860D and before
 106         {BBP_R86,               0x00},  // middle range issue, Rory @2008-01-28
 107         {BBP_R91,               0x04},  // middle range issue, Rory @2008-01-28
 108         {BBP_R92,               0x00},  // middle range issue, Rory @2008-01-28
 109         {BBP_R103,      0x00},  // near range high-power issue, requested from Gary @2008-0528
 110         {BBP_R105,              0x05},  // 0x05 is for rt2860E to turn on FEQ control. It is safe for rt2860D and before, because Bit 7:2 are reserved in rt2860D and before.
 111 };
 112 #define NUM_BBP_REG_PARMS       (sizeof(BBPRegTable) / sizeof(REG_PAIR))
 113
 114 //
 115 // RF register initialization set
 116 //
 117
 118 //
 119 // ASIC register initialization sets
 120 //
 121
 122 RTMP_REG_PAIR   MACRegTable[] = {
 123 #if defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x200)
 124         {BCN_OFFSET0,                   0xf8f0e8e0}, /* 0x3800(e0), 0x3A00(e8), 0x3C00(f0), 0x3E00(f8), 512B for each beacon */
 125         {BCN_OFFSET1,                   0x6f77d0c8}, /* 0x3200(c8), 0x3400(d0), 0x1DC0(77), 0x1BC0(6f), 512B for each beacon */
 126 #elif defined(HW_BEACON_OFFSET) && (HW_BEACON_OFFSET == 0x100)
 127         {BCN_OFFSET0,                   0xece8e4e0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
 128         {BCN_OFFSET1,                   0xfcf8f4f0}, /* 0x3800, 0x3A00, 0x3C00, 0x3E00, 512B for each beacon */
 129 #else
 130     #error You must re-calculate new value for BCN_OFFSET0 & BCN_OFFSET1 in MACRegTable[]!!!
 131 #endif // HW_BEACON_OFFSET //
 132
 133         {LEGACY_BASIC_RATE,             0x0000013f}, //  Basic rate set bitmap
 134         {HT_BASIC_RATE,         0x00008003}, // Basic HT rate set , 20M, MCS=3, MM. Format is the same as in TXWI.
 135         {MAC_SYS_CTRL,          0x00}, // 0x1004, , default Disable RX
 136         {RX_FILTR_CFG,          0x17f97}, //0x1400  , RX filter control,
 137         {BKOFF_SLOT_CFG,        0x209}, // default set short slot time, CC_DELAY_TIME should be 2
 138         {TX_SW_CFG0,            0x0},           // Gary,2008-05-21 for CWC test
 139         {TX_SW_CFG1,            0x80606}, // Gary,2006-08-23
 140         {TX_LINK_CFG,           0x1020},                // Gary,2006-08-23
 141         {TX_TIMEOUT_CFG,        0x000a2090},    // CCK has some problem. So increase timieout value. 2006-10-09// MArvek RT , Modify for 2860E ,2007-08-01
 142         {MAX_LEN_CFG,           MAX_AGGREGATION_SIZE | 0x00001000},     // 0x3018, MAX frame length. Max PSDU = 16kbytes.
 143         {LED_CFG,               0x7f031e46}, // Gary, 2006-08-23
 144         {PBF_MAX_PCNT,                  0x1F3FBF9F},    //0x1F3f7f9f},          //Jan, 2006/04/20
 145         {TX_RTY_CFG,                    0x47d01f0f},    // Jan, 2006/11/16, Set TxWI->ACK =0 in Probe Rsp Modify for 2860E ,2007-08-03
 146         {AUTO_RSP_CFG,                  0x00000013},    // Initial Auto_Responder, because QA will turn off Auto-Responder
 147         {CCK_PROT_CFG,                  0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 148         {OFDM_PROT_CFG,                 0x05740003 /*0x01740003*/},     // Initial Auto_Responder, because QA will turn off Auto-Responder. And RTS threshold is enabled.
 149         {GF20_PROT_CFG,                 0x01744004},    // set 19:18 --> Short NAV for MIMO PS
 150         {GF40_PROT_CFG,                 0x03F44084},
 151         {MM20_PROT_CFG,                 0x01744004},
 152         {MM40_PROT_CFG,                 0x03F54084},
 153         {TXOP_CTRL_CFG,                 0x0000583f, /*0x0000243f*/ /*0x000024bf*/},     //Extension channel backoff.
 154         {TX_RTS_CFG,                    0x00092b20},
 155         {EXP_ACK_TIME,                  0x002400ca},    // default value
 156         {TXOP_HLDR_ET,                  0x00000002},
 157
 158         /* Jerry comments 2008/01/16: we use SIFS = 10us in CCK defaultly, but it seems that 10us
 159                 is too small for INTEL 2200bg card, so in MBSS mode, the delta time between beacon0
 160                 and beacon1 is SIFS (10us), so if INTEL 2200bg card connects to BSS0, the ping
 161                 will always lost. So we change the SIFS of CCK from 10us to 16us. */
 162         {XIFS_TIME_CFG,                 0x33a41010},
 163         {PWR_PIN_CFG,                   0x00000003},    // patch for 2880-E
 164 };
 165
 166
 167 #ifdef CONFIG_STA_SUPPORT
 168 RTMP_REG_PAIR   STAMACRegTable[] =      {
 169         {WMM_AIFSN_CFG,         0x00002273},
 170         {WMM_CWMIN_CFG, 0x00002344},
 171         {WMM_CWMAX_CFG, 0x000034aa},
 172 };
 173 #endif // CONFIG_STA_SUPPORT //
 174
 175 #define NUM_MAC_REG_PARMS               (sizeof(MACRegTable) / sizeof(RTMP_REG_PAIR))
 176 #ifdef CONFIG_STA_SUPPORT
 177 #define NUM_STA_MAC_REG_PARMS   (sizeof(STAMACRegTable) / sizeof(RTMP_REG_PAIR))
 178 #endif // CONFIG_STA_SUPPORT //
 179
 180
 181 // New 8k byte firmware size for RT3071/RT3072
 182 #define FIRMWAREIMAGE_MAX_LENGTH        0x2000
 183 #define FIRMWAREIMAGE_LENGTH            (sizeof (FirmwareImage) / sizeof(UCHAR))
 184 #define FIRMWARE_MAJOR_VERSION  0
 185
 186 #define FIRMWAREIMAGEV1_LENGTH  0x1000
 187 #define FIRMWAREIMAGEV2_LENGTH  0x1000
 188
 189 #define FIRMWARE_MINOR_VERSION  2
 190
 191
 192 /*
 193         ========================================================================
 194
 195         Routine Description:
 196                 Allocate RTMP_ADAPTER data block and do some initialization
 197
 198         Arguments:
 199                 Adapter         Pointer to our adapter
 200
 201         Return Value:
 202                 NDIS_STATUS_SUCCESS
 203                 NDIS_STATUS_FAILURE
 204
 205         IRQL = PASSIVE_LEVEL
 206
 207         Note:
 208
 209         ========================================================================
 210 */
 211 NDIS_STATUS     RTMPAllocAdapterBlock(
 212         IN  PVOID       handle,
 213         OUT     PRTMP_ADAPTER   *ppAdapter)
 214 {
 215         PRTMP_ADAPTER   pAd;
 216         NDIS_STATUS             Status;
 217         INT                     index;
 218         UCHAR                   *pBeaconBuf = NULL;
 219
 220         DBGPRINT(RT_DEBUG_TRACE, ("--> RTMPAllocAdapterBlock\n"));
 221
 222         *ppAdapter = NULL;
 223
 224         do
 225         {
 226                 // Allocate RTMP_ADAPTER memory block
 227                 pBeaconBuf = kmalloc(MAX_BEACON_SIZE, MEM_ALLOC_FLAG);
 228                 if (pBeaconBuf == NULL)
 229                 {
 230                         Status = NDIS_STATUS_FAILURE;
 231                         DBGPRINT_ERR(("Failed to allocate memory - BeaconBuf!\n"));
 232                         break;
 233                 }
 234
 235                 Status = AdapterBlockAllocateMemory(handle, (PVOID *)&pAd);
 236                 if (Status != NDIS_STATUS_SUCCESS)
 237                 {
 238                         DBGPRINT_ERR(("Failed to allocate memory - ADAPTER\n"));
 239                         break;
 240                 }
 241                 pAd->BeaconBuf = pBeaconBuf;
 242                 printk("\n\n=== pAd = %p, size = %d ===\n\n", pAd, (UINT32)sizeof(RTMP_ADAPTER));
 243
 244
 245                 // Init spin locks
 246                 NdisAllocateSpinLock(&pAd->MgmtRingLock);
 247                 NdisAllocateSpinLock(&pAd->RxRingLock);
 248
 249                 for (index =0 ; index < NUM_OF_TX_RING; index++)
 250                 {
 251                         NdisAllocateSpinLock(&pAd->TxSwQueueLock[index]);
 252                         NdisAllocateSpinLock(&pAd->DeQueueLock[index]);
 253                         pAd->DeQueueRunning[index] = FALSE;
 254                 }
 255
 256                 NdisAllocateSpinLock(&pAd->irq_lock);
 257
 258         } while (FALSE);
 259
 260         if ((Status != NDIS_STATUS_SUCCESS) && (pBeaconBuf))
 261                 kfree(pBeaconBuf);
 262
 263         *ppAdapter = pAd;
 264
 265         DBGPRINT_S(Status, ("<-- RTMPAllocAdapterBlock, Status=%x\n", Status));
 266         return Status;
 267 }
 268
 269 /*
 270         ========================================================================
 271
 272         Routine Description:
 273                 Read initial Tx power per MCS and BW from EEPROM
 274
 275         Arguments:
 276                 Adapter                                         Pointer to our adapter
 277
 278         Return Value:
 279                 None
 280
 281         IRQL = PASSIVE_LEVEL
 282
 283         Note:
 284
 285         ========================================================================
 286 */
 287 VOID    RTMPReadTxPwrPerRate(
 288         IN      PRTMP_ADAPTER   pAd)
 289 {
 290         ULONG           data, Adata, Gdata;
 291         USHORT          i, value, value2;
 292         INT                     Apwrdelta, Gpwrdelta;
 293         UCHAR           t1,t2,t3,t4;
 294         BOOLEAN         bValid, bApwrdeltaMinus = TRUE, bGpwrdeltaMinus = TRUE;
 295
 296         //
 297         // Get power delta for 20MHz and 40MHz.
 298         //
 299         DBGPRINT(RT_DEBUG_TRACE, ("Txpower per Rate\n"));
 300         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_DELTA, value2);
 301         Apwrdelta = 0;
 302         Gpwrdelta = 0;
 303
 304         if ((value2 & 0xff) != 0xff)
 305         {
 306                 if ((value2 & 0x80))
 307                         Gpwrdelta = (value2&0xf);
 308
 309                 if ((value2 & 0x40))
 310                         bGpwrdeltaMinus = FALSE;
 311                 else
 312                         bGpwrdeltaMinus = TRUE;
 313         }
 314         if ((value2 & 0xff00) != 0xff00)
 315         {
 316                 if ((value2 & 0x8000))
 317                         Apwrdelta = ((value2&0xf00)>>8);
 318
 319                 if ((value2 & 0x4000))
 320                         bApwrdeltaMinus = FALSE;
 321                 else
 322                         bApwrdeltaMinus = TRUE;
 323         }
 324         DBGPRINT(RT_DEBUG_TRACE, ("Gpwrdelta = %x, Apwrdelta = %x .\n", Gpwrdelta, Apwrdelta));
 325
 326         //
 327         // Get Txpower per MCS for 20MHz in 2.4G.
 328         //
 329         for (i=0; i<5; i++)
 330         {
 331                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4, value);
 332                 data = value;
 333                 if (bApwrdeltaMinus == FALSE)
 334                 {
 335                         t1 = (value&0xf)+(Apwrdelta);
 336                         if (t1 > 0xf)
 337                                 t1 = 0xf;
 338                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 339                         if (t2 > 0xf)
 340                                 t2 = 0xf;
 341                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 342                         if (t3 > 0xf)
 343                                 t3 = 0xf;
 344                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 345                         if (t4 > 0xf)
 346                                 t4 = 0xf;
 347                 }
 348                 else
 349                 {
 350                         if ((value&0xf) > Apwrdelta)
 351                                 t1 = (value&0xf)-(Apwrdelta);
 352                         else
 353                                 t1 = 0;
 354                         if (((value&0xf0)>>4) > Apwrdelta)
 355                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 356                         else
 357                                 t2 = 0;
 358                         if (((value&0xf00)>>8) > Apwrdelta)
 359                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 360                         else
 361                                 t3 = 0;
 362                         if (((value&0xf000)>>12) > Apwrdelta)
 363                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 364                         else
 365                                 t4 = 0;
 366                 }
 367                 Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 368                 if (bGpwrdeltaMinus == FALSE)
 369                 {
 370                         t1 = (value&0xf)+(Gpwrdelta);
 371                         if (t1 > 0xf)
 372                                 t1 = 0xf;
 373                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 374                         if (t2 > 0xf)
 375                                 t2 = 0xf;
 376                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 377                         if (t3 > 0xf)
 378                                 t3 = 0xf;
 379                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 380                         if (t4 > 0xf)
 381                                 t4 = 0xf;
 382                 }
 383                 else
 384                 {
 385                         if ((value&0xf) > Gpwrdelta)
 386                                 t1 = (value&0xf)-(Gpwrdelta);
 387                         else
 388                                 t1 = 0;
 389                         if (((value&0xf0)>>4) > Gpwrdelta)
 390                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 391                         else
 392                                 t2 = 0;
 393                         if (((value&0xf00)>>8) > Gpwrdelta)
 394                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 395                         else
 396                                 t3 = 0;
 397                         if (((value&0xf000)>>12) > Gpwrdelta)
 398                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 399                         else
 400                                 t4 = 0;
 401                 }
 402                 Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 403
 404                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_2_4G + i*4 + 2, value);
 405                 if (bApwrdeltaMinus == FALSE)
 406                 {
 407                         t1 = (value&0xf)+(Apwrdelta);
 408                         if (t1 > 0xf)
 409                                 t1 = 0xf;
 410                         t2 = ((value&0xf0)>>4)+(Apwrdelta);
 411                         if (t2 > 0xf)
 412                                 t2 = 0xf;
 413                         t3 = ((value&0xf00)>>8)+(Apwrdelta);
 414                         if (t3 > 0xf)
 415                                 t3 = 0xf;
 416                         t4 = ((value&0xf000)>>12)+(Apwrdelta);
 417                         if (t4 > 0xf)
 418                                 t4 = 0xf;
 419                 }
 420                 else
 421                 {
 422                         if ((value&0xf) > Apwrdelta)
 423                                 t1 = (value&0xf)-(Apwrdelta);
 424                         else
 425                                 t1 = 0;
 426                         if (((value&0xf0)>>4) > Apwrdelta)
 427                                 t2 = ((value&0xf0)>>4)-(Apwrdelta);
 428                         else
 429                                 t2 = 0;
 430                         if (((value&0xf00)>>8) > Apwrdelta)
 431                                 t3 = ((value&0xf00)>>8)-(Apwrdelta);
 432                         else
 433                                 t3 = 0;
 434                         if (((value&0xf000)>>12) > Apwrdelta)
 435                                 t4 = ((value&0xf000)>>12)-(Apwrdelta);
 436                         else
 437                                 t4 = 0;
 438                 }
 439                 Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 440                 if (bGpwrdeltaMinus == FALSE)
 441                 {
 442                         t1 = (value&0xf)+(Gpwrdelta);
 443                         if (t1 > 0xf)
 444                                 t1 = 0xf;
 445                         t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 446                         if (t2 > 0xf)
 447                                 t2 = 0xf;
 448                         t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 449                         if (t3 > 0xf)
 450                                 t3 = 0xf;
 451                         t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 452                         if (t4 > 0xf)
 453                                 t4 = 0xf;
 454                 }
 455                 else
 456                 {
 457                         if ((value&0xf) > Gpwrdelta)
 458                                 t1 = (value&0xf)-(Gpwrdelta);
 459                         else
 460                                 t1 = 0;
 461                         if (((value&0xf0)>>4) > Gpwrdelta)
 462                                 t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 463                         else
 464                                 t2 = 0;
 465                         if (((value&0xf00)>>8) > Gpwrdelta)
 466                                 t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 467                         else
 468                                 t3 = 0;
 469                         if (((value&0xf000)>>12) > Gpwrdelta)
 470                                 t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 471                         else
 472                                 t4 = 0;
 473                 }
 474                 Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 475                 data |= (value<<16);
 476
 477                 pAd->Tx20MPwrCfgABand[i] = pAd->Tx40MPwrCfgABand[i] = Adata;
 478                 pAd->Tx20MPwrCfgGBand[i] = pAd->Tx40MPwrCfgGBand[i] = Gdata;
 479
 480                 if (data != 0xffffffff)
 481                         RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, data);
 482                 DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 2.4G band-%lx,  Adata = %lx,  Gdata = %lx \n", data, Adata, Gdata));
 483         }
 484
 485         //
 486         // Check this block is valid for 40MHz in 2.4G. If invalid, use parameter for 20MHz in 2.4G
 487         //
 488         bValid = TRUE;
 489         for (i=0; i<6; i++)
 490         {
 491                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + 2 + i*2, value);
 492                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 493                 {
 494                         bValid = FALSE;
 495                         break;
 496                 }
 497         }
 498
 499         //
 500         // Get Txpower per MCS for 40MHz in 2.4G.
 501         //
 502         if (bValid)
 503         {
 504                 for (i=0; i<4; i++)
 505                 {
 506                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4, value);
 507                         if (bGpwrdeltaMinus == FALSE)
 508                         {
 509                                 t1 = (value&0xf)+(Gpwrdelta);
 510                                 if (t1 > 0xf)
 511                                         t1 = 0xf;
 512                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 513                                 if (t2 > 0xf)
 514                                         t2 = 0xf;
 515                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 516                                 if (t3 > 0xf)
 517                                         t3 = 0xf;
 518                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 519                                 if (t4 > 0xf)
 520                                         t4 = 0xf;
 521                         }
 522                         else
 523                         {
 524                                 if ((value&0xf) > Gpwrdelta)
 525                                         t1 = (value&0xf)-(Gpwrdelta);
 526                                 else
 527                                         t1 = 0;
 528                                 if (((value&0xf0)>>4) > Gpwrdelta)
 529                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 530                                 else
 531                                         t2 = 0;
 532                                 if (((value&0xf00)>>8) > Gpwrdelta)
 533                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 534                                 else
 535                                         t3 = 0;
 536                                 if (((value&0xf000)>>12) > Gpwrdelta)
 537                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 538                                 else
 539                                         t4 = 0;
 540                         }
 541                         Gdata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 542
 543                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_2_4G + i*4 + 2, value);
 544                         if (bGpwrdeltaMinus == FALSE)
 545                         {
 546                                 t1 = (value&0xf)+(Gpwrdelta);
 547                                 if (t1 > 0xf)
 548                                         t1 = 0xf;
 549                                 t2 = ((value&0xf0)>>4)+(Gpwrdelta);
 550                                 if (t2 > 0xf)
 551                                         t2 = 0xf;
 552                                 t3 = ((value&0xf00)>>8)+(Gpwrdelta);
 553                                 if (t3 > 0xf)
 554                                         t3 = 0xf;
 555                                 t4 = ((value&0xf000)>>12)+(Gpwrdelta);
 556                                 if (t4 > 0xf)
 557                                         t4 = 0xf;
 558                         }
 559                         else
 560                         {
 561                                 if ((value&0xf) > Gpwrdelta)
 562                                         t1 = (value&0xf)-(Gpwrdelta);
 563                                 else
 564                                         t1 = 0;
 565                                 if (((value&0xf0)>>4) > Gpwrdelta)
 566                                         t2 = ((value&0xf0)>>4)-(Gpwrdelta);
 567                                 else
 568                                         t2 = 0;
 569                                 if (((value&0xf00)>>8) > Gpwrdelta)
 570                                         t3 = ((value&0xf00)>>8)-(Gpwrdelta);
 571                                 else
 572                                         t3 = 0;
 573                                 if (((value&0xf000)>>12) > Gpwrdelta)
 574                                         t4 = ((value&0xf000)>>12)-(Gpwrdelta);
 575                                 else
 576                                         t4 = 0;
 577                         }
 578                         Gdata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 579
 580                         if (i == 0)
 581                                 pAd->Tx40MPwrCfgGBand[i+1] = (pAd->Tx40MPwrCfgGBand[i+1] & 0x0000FFFF) | (Gdata & 0xFFFF0000);
 582                         else
 583                                 pAd->Tx40MPwrCfgGBand[i+1] = Gdata;
 584
 585                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 2.4G band, Gdata = %lx \n", Gdata));
 586                 }
 587         }
 588
 589         //
 590         // Check this block is valid for 20MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
 591         //
 592         bValid = TRUE;
 593         for (i=0; i<8; i++)
 594         {
 595                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + 2 + i*2, value);
 596                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 597                 {
 598                         bValid = FALSE;
 599                         break;
 600                 }
 601         }
 602
 603         //
 604         // Get Txpower per MCS for 20MHz in 5G.
 605         //
 606         if (bValid)
 607         {
 608                 for (i=0; i<5; i++)
 609                 {
 610                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4, value);
 611                         if (bApwrdeltaMinus == FALSE)
 612                         {
 613                                 t1 = (value&0xf)+(Apwrdelta);
 614                                 if (t1 > 0xf)
 615                                         t1 = 0xf;
 616                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 617                                 if (t2 > 0xf)
 618                                         t2 = 0xf;
 619                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 620                                 if (t3 > 0xf)
 621                                         t3 = 0xf;
 622                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 623                                 if (t4 > 0xf)
 624                                         t4 = 0xf;
 625                         }
 626                         else
 627                         {
 628                                 if ((value&0xf) > Apwrdelta)
 629                                         t1 = (value&0xf)-(Apwrdelta);
 630                                 else
 631                                         t1 = 0;
 632                                 if (((value&0xf0)>>4) > Apwrdelta)
 633                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 634                                 else
 635                                         t2 = 0;
 636                                 if (((value&0xf00)>>8) > Apwrdelta)
 637                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 638                                 else
 639                                         t3 = 0;
 640                                 if (((value&0xf000)>>12) > Apwrdelta)
 641                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 642                                 else
 643                                         t4 = 0;
 644                         }
 645                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 646
 647                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_20MHZ_5G + i*4 + 2, value);
 648                         if (bApwrdeltaMinus == FALSE)
 649                         {
 650                                 t1 = (value&0xf)+(Apwrdelta);
 651                                 if (t1 > 0xf)
 652                                         t1 = 0xf;
 653                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 654                                 if (t2 > 0xf)
 655                                         t2 = 0xf;
 656                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 657                                 if (t3 > 0xf)
 658                                         t3 = 0xf;
 659                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 660                                 if (t4 > 0xf)
 661                                         t4 = 0xf;
 662                         }
 663                         else
 664                         {
 665                                 if ((value&0xf) > Apwrdelta)
 666                                         t1 = (value&0xf)-(Apwrdelta);
 667                                 else
 668                                         t1 = 0;
 669                                 if (((value&0xf0)>>4) > Apwrdelta)
 670                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 671                                 else
 672                                         t2 = 0;
 673                                 if (((value&0xf00)>>8) > Apwrdelta)
 674                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 675                                 else
 676                                         t3 = 0;
 677                                 if (((value&0xf000)>>12) > Apwrdelta)
 678                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 679                                 else
 680                                         t4 = 0;
 681                         }
 682                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 683
 684                         if (i == 0)
 685                                 pAd->Tx20MPwrCfgABand[i] = (pAd->Tx20MPwrCfgABand[i] & 0x0000FFFF) | (Adata & 0xFFFF0000);
 686                         else
 687                                 pAd->Tx20MPwrCfgABand[i] = Adata;
 688
 689                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("20MHz BW, 5GHz band, Adata = %lx \n", Adata));
 690                 }
 691         }
 692
 693         //
 694         // Check this block is valid for 40MHz in 5G. If invalid, use parameter for 20MHz in 2.4G
 695         //
 696         bValid = TRUE;
 697         for (i=0; i<6; i++)
 698         {
 699                 RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + 2 + i*2, value);
 700                 if (((value & 0x00FF) == 0x00FF) || ((value & 0xFF00) == 0xFF00))
 701                 {
 702                         bValid = FALSE;
 703                         break;
 704                 }
 705         }
 706
 707         //
 708         // Get Txpower per MCS for 40MHz in 5G.
 709         //
 710         if (bValid)
 711         {
 712                 for (i=0; i<4; i++)
 713                 {
 714                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4, value);
 715                         if (bApwrdeltaMinus == FALSE)
 716                         {
 717                                 t1 = (value&0xf)+(Apwrdelta);
 718                                 if (t1 > 0xf)
 719                                         t1 = 0xf;
 720                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 721                                 if (t2 > 0xf)
 722                                         t2 = 0xf;
 723                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 724                                 if (t3 > 0xf)
 725                                         t3 = 0xf;
 726                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 727                                 if (t4 > 0xf)
 728                                         t4 = 0xf;
 729                         }
 730                         else
 731                         {
 732                                 if ((value&0xf) > Apwrdelta)
 733                                         t1 = (value&0xf)-(Apwrdelta);
 734                                 else
 735                                         t1 = 0;
 736                                 if (((value&0xf0)>>4) > Apwrdelta)
 737                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 738                                 else
 739                                         t2 = 0;
 740                                 if (((value&0xf00)>>8) > Apwrdelta)
 741                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 742                                 else
 743                                         t3 = 0;
 744                                 if (((value&0xf000)>>12) > Apwrdelta)
 745                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 746                                 else
 747                                         t4 = 0;
 748                         }
 749                         Adata = t1 + (t2<<4) + (t3<<8) + (t4<<12);
 750
 751                         RT28xx_EEPROM_READ16(pAd, EEPROM_TXPOWER_BYRATE_40MHZ_5G + i*4 + 2, value);
 752                         if (bApwrdeltaMinus == FALSE)
 753                         {
 754                                 t1 = (value&0xf)+(Apwrdelta);
 755                                 if (t1 > 0xf)
 756                                         t1 = 0xf;
 757                                 t2 = ((value&0xf0)>>4)+(Apwrdelta);
 758                                 if (t2 > 0xf)
 759                                         t2 = 0xf;
 760                                 t3 = ((value&0xf00)>>8)+(Apwrdelta);
 761                                 if (t3 > 0xf)
 762                                         t3 = 0xf;
 763                                 t4 = ((value&0xf000)>>12)+(Apwrdelta);
 764                                 if (t4 > 0xf)
 765                                         t4 = 0xf;
 766                         }
 767                         else
 768                         {
 769                                 if ((value&0xf) > Apwrdelta)
 770                                         t1 = (value&0xf)-(Apwrdelta);
 771                                 else
 772                                         t1 = 0;
 773                                 if (((value&0xf0)>>4) > Apwrdelta)
 774                                         t2 = ((value&0xf0)>>4)-(Apwrdelta);
 775                                 else
 776                                         t2 = 0;
 777                                 if (((value&0xf00)>>8) > Apwrdelta)
 778                                         t3 = ((value&0xf00)>>8)-(Apwrdelta);
 779                                 else
 780                                         t3 = 0;
 781                                 if (((value&0xf000)>>12) > Apwrdelta)
 782                                         t4 = ((value&0xf000)>>12)-(Apwrdelta);
 783                                 else
 784                                         t4 = 0;
 785                         }
 786                         Adata |= ((t1<<16) + (t2<<20) + (t3<<24) + (t4<<28));
 787
 788                         if (i == 0)
 789                                 pAd->Tx40MPwrCfgABand[i+1] = (pAd->Tx40MPwrCfgABand[i+1] & 0x0000FFFF) | (Adata & 0xFFFF0000);
 790                         else
 791                                 pAd->Tx40MPwrCfgABand[i+1] = Adata;
 792
 793                         DBGPRINT_RAW(RT_DEBUG_TRACE, ("40MHz BW, 5GHz band, Adata = %lx \n", Adata));
 794                 }
 795         }
 796 }
 797
 798
 799 /*
 800         ========================================================================
 801
 802         Routine Description:
 803                 Read initial channel power parameters from EEPROM
 804
 805         Arguments:
 806                 Adapter                                         Pointer to our adapter
 807
 808         Return Value:
 809                 None
 810
 811         IRQL = PASSIVE_LEVEL
 812
 813         Note:
 814
 815         ========================================================================
 816 */
 817 VOID    RTMPReadChannelPwr(
 818         IN      PRTMP_ADAPTER   pAd)
 819 {
 820         UCHAR                           i, choffset;
 821         EEPROM_TX_PWR_STRUC         Power;
 822         EEPROM_TX_PWR_STRUC         Power2;
 823
 824         // Read Tx power value for all channels
 825         // Value from 1 - 0x7f. Default value is 24.
 826         // Power value : 2.4G 0x00 (0) ~ 0x1F (31)
 827         //             : 5.5G 0xF9 (-7) ~ 0x0F (15)
 828
 829         // 0. 11b/g, ch1 - ch 14
 830         for (i = 0; i < 7; i++)
 831         {
 832                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX_PWR_OFFSET + i * 2, Power.word);
 833                 RT28xx_EEPROM_READ16(pAd, EEPROM_G_TX2_PWR_OFFSET + i * 2, Power2.word);
 834                 pAd->TxPower[i * 2].Channel = i * 2 + 1;
 835                 pAd->TxPower[i * 2 + 1].Channel = i * 2 + 2;
 836
 837                 if ((Power.field.Byte0 > 31) || (Power.field.Byte0 < 0))
 838                         pAd->TxPower[i * 2].Power = DEFAULT_RF_TX_POWER;
 839                 else
 840                         pAd->TxPower[i * 2].Power = Power.field.Byte0;
 841
 842                 if ((Power.field.Byte1 > 31) || (Power.field.Byte1 < 0))
 843                         pAd->TxPower[i * 2 + 1].Power = DEFAULT_RF_TX_POWER;
 844                 else
 845                         pAd->TxPower[i * 2 + 1].Power = Power.field.Byte1;
 846
 847                 if ((Power2.field.Byte0 > 31) || (Power2.field.Byte0 < 0))
 848                         pAd->TxPower[i * 2].Power2 = DEFAULT_RF_TX_POWER;
 849                 else
 850                         pAd->TxPower[i * 2].Power2 = Power2.field.Byte0;
 851
 852                 if ((Power2.field.Byte1 > 31) || (Power2.field.Byte1 < 0))
 853                         pAd->TxPower[i * 2 + 1].Power2 = DEFAULT_RF_TX_POWER;
 854                 else
 855                         pAd->TxPower[i * 2 + 1].Power2 = Power2.field.Byte1;
 856         }
 857
 858         // 1. U-NII lower/middle band: 36, 38, 40; 44, 46, 48; 52, 54, 56; 60, 62, 64 (including central frequency in BW 40MHz)
 859         // 1.1 Fill up channel
 860         choffset = 14;
 861         for (i = 0; i < 4; i++)
 862         {
 863                 pAd->TxPower[3 * i + choffset + 0].Channel      = 36 + i * 8 + 0;
 864                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 865                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 866
 867                 pAd->TxPower[3 * i + choffset + 1].Channel      = 36 + i * 8 + 2;
 868                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 869                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 870
 871                 pAd->TxPower[3 * i + choffset + 2].Channel      = 36 + i * 8 + 4;
 872                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 873                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 874         }
 875
 876         // 1.2 Fill up power
 877         for (i = 0; i < 6; i++)
 878         {
 879                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + i * 2, Power.word);
 880                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + i * 2, Power2.word);
 881
 882                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 883                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 884
 885                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 886                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 887
 888                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 889                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 890
 891                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 892                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 893         }
 894
 895         // 2. HipperLAN 2 100, 102 ,104; 108, 110, 112; 116, 118, 120; 124, 126, 128; 132, 134, 136; 140 (including central frequency in BW 40MHz)
 896         // 2.1 Fill up channel
 897         choffset = 14 + 12;
 898         for (i = 0; i < 5; i++)
 899         {
 900                 pAd->TxPower[3 * i + choffset + 0].Channel      = 100 + i * 8 + 0;
 901                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 902                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 903
 904                 pAd->TxPower[3 * i + choffset + 1].Channel      = 100 + i * 8 + 2;
 905                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 906                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 907
 908                 pAd->TxPower[3 * i + choffset + 2].Channel      = 100 + i * 8 + 4;
 909                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 910                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 911         }
 912         pAd->TxPower[3 * 5 + choffset + 0].Channel              = 140;
 913         pAd->TxPower[3 * 5 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 914         pAd->TxPower[3 * 5 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 915
 916         // 2.2 Fill up power
 917         for (i = 0; i < 8; i++)
 918         {
 919                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 920                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 921
 922                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 923                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 924
 925                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 926                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 927
 928                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 929                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 930
 931                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 932                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 933         }
 934
 935         // 3. U-NII upper band: 149, 151, 153; 157, 159, 161; 165 (including central frequency in BW 40MHz)
 936         // 3.1 Fill up channel
 937         choffset = 14 + 12 + 16;
 938         for (i = 0; i < 2; i++)
 939         {
 940                 pAd->TxPower[3 * i + choffset + 0].Channel      = 149 + i * 8 + 0;
 941                 pAd->TxPower[3 * i + choffset + 0].Power        = DEFAULT_RF_TX_POWER;
 942                 pAd->TxPower[3 * i + choffset + 0].Power2       = DEFAULT_RF_TX_POWER;
 943
 944                 pAd->TxPower[3 * i + choffset + 1].Channel      = 149 + i * 8 + 2;
 945                 pAd->TxPower[3 * i + choffset + 1].Power        = DEFAULT_RF_TX_POWER;
 946                 pAd->TxPower[3 * i + choffset + 1].Power2       = DEFAULT_RF_TX_POWER;
 947
 948                 pAd->TxPower[3 * i + choffset + 2].Channel      = 149 + i * 8 + 4;
 949                 pAd->TxPower[3 * i + choffset + 2].Power        = DEFAULT_RF_TX_POWER;
 950                 pAd->TxPower[3 * i + choffset + 2].Power2       = DEFAULT_RF_TX_POWER;
 951         }
 952         pAd->TxPower[3 * 2 + choffset + 0].Channel              = 165;
 953         pAd->TxPower[3 * 2 + choffset + 0].Power                = DEFAULT_RF_TX_POWER;
 954         pAd->TxPower[3 * 2 + choffset + 0].Power2               = DEFAULT_RF_TX_POWER;
 955
 956         // 3.2 Fill up power
 957         for (i = 0; i < 4; i++)
 958         {
 959                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX_PWR_OFFSET + (choffset - 14) + i * 2, Power.word);
 960                 RT28xx_EEPROM_READ16(pAd, EEPROM_A_TX2_PWR_OFFSET + (choffset - 14) + i * 2, Power2.word);
 961
 962                 if ((Power.field.Byte0 < 16) && (Power.field.Byte0 >= -7))
 963                         pAd->TxPower[i * 2 + choffset + 0].Power = Power.field.Byte0;
 964
 965                 if ((Power.field.Byte1 < 16) && (Power.field.Byte1 >= -7))
 966                         pAd->TxPower[i * 2 + choffset + 1].Power = Power.field.Byte1;
 967
 968                 if ((Power2.field.Byte0 < 16) && (Power2.field.Byte0 >= -7))
 969                         pAd->TxPower[i * 2 + choffset + 0].Power2 = Power2.field.Byte0;
 970
 971                 if ((Power2.field.Byte1 < 16) && (Power2.field.Byte1 >= -7))
 972                         pAd->TxPower[i * 2 + choffset + 1].Power2 = Power2.field.Byte1;
 973         }
 974
 975         // 4. Print and Debug
 976         choffset = 14 + 12 + 16 + 7;
 977
 978
 979 #if 0
 980         // Init the 802.11j channel number for TX channel power
 981         // 0. 20MHz
 982         for (i = 0; i < 3; i++)
 983         {
 984                 pAd->TxPower11J[i].Channel = 8 + i * 4;
 985                 pAd->TxPower11J[i].BW = BW_20;
 986         }
 987
 988         for (i = 0; i < 4; i++)
 989         {
 990                 pAd->TxPower11J[i + 3].Channel = 34 + i * 4;
 991                 pAd->TxPower11J[i + 3].BW = BW_20;
 992         }
 993
 994         for (i = 0; i < 4; i++)
 995         {
 996                 pAd->TxPower11J[i + 7].Channel = 184 + i * 4;
 997                 pAd->TxPower11J[i + 7].BW = BW_20;
 998         }
 999
1000         // 0. 10MHz
1001         for (i = 0; i < 2; i++)
1002         {
1003                 pAd->TxPower11J[i + 11].Channel = 7 + i;
1004                 pAd->TxPower11J[i + 11].BW = BW_10;
1005         }
1006         pAd->TxPower11J[13].Channel = 11;
1007         pAd->TxPower11J[13].BW = BW_10;
1008
1009         for (i = 0; i < 3; i++)
1010         {
1011                 pAd->TxPower11J[i + 14].Channel = 183 + i;
1012                 pAd->TxPower11J[i + 14].BW= BW_10;
1013         }
1014
1015         for (i = 0; i < 3; i++)
1016         {
1017                 pAd->TxPower11J[i + 17].Channel = 187 + i;
1018                 pAd->TxPower11J[i + 17].BW = BW_10;
1019         }
1020         for (i = 0; i < 10; i++)
1021         {
1022                 Power.word = RTMP_EEPROM_READ16(pAd, EEPROM_Japan_TX_PWR_OFFSET + i * 2);
1023                 Power2.word = RTMP_EEPROM_READ16(pAd, EEPROM_Japan_TX2_PWR_OFFSET + i * 2);
1024
1025                 if ((Power.field.Byte0 < 36) && (Power.field.Byte0 > -6))
1026                         pAd->TxPower11J[i * 2].Power = Power.field.Byte0;
1027
1028                 if ((Power.field.Byte1 < 36) && (Power.field.Byte1 > -6))
1029                         pAd->TxPower11J[i * 2 + 1].Power = Power.field.Byte1;
1030
1031                 if ((Power2.field.Byte0 < 36) && (Power2.field.Byte0 > -6))
1032                         pAd->TxPower11J[i * 2].Power2 = Power2.field.Byte0;
1033
1034                 if ((Power2.field.Byte1 < 36) && (Power2.field.Byte1 > -6))
1035                         pAd->TxPower11J[i * 2 + 1].Power2 = Power2.field.Byte1;
1036         }
1037 #endif
1038 }
1039
1040 /*
1041         ========================================================================
1042
1043         Routine Description:
1044                 Read the following from the registry
1045                 1. All the parameters
1046                 2. NetworkAddres
1047
1048         Arguments:
1049                 Adapter                                         Pointer to our adapter
1050                 WrapperConfigurationContext     For use by NdisOpenConfiguration
1051
1052         Return Value:
1053                 NDIS_STATUS_SUCCESS
1054                 NDIS_STATUS_FAILURE
1055                 NDIS_STATUS_RESOURCES
1056
1057         IRQL = PASSIVE_LEVEL
1058
1059         Note:
1060
1061         ========================================================================
1062 */
1063 NDIS_STATUS     NICReadRegParameters(
1064         IN      PRTMP_ADAPTER           pAd,
1065         IN      NDIS_HANDLE                     WrapperConfigurationContext
1066         )
1067 {
1068         NDIS_STATUS                                             Status = NDIS_STATUS_SUCCESS;
1069         DBGPRINT_S(Status, ("<-- NICReadRegParameters, Status=%x\n", Status));
1070         return Status;
1071 }
1072
1073
1074
1075
1076 /*
1077         ========================================================================
1078
1079         Routine Description:
1080                 Read initial parameters from EEPROM
1081
1082         Arguments:
1083                 Adapter                                         Pointer to our adapter
1084
1085         Return Value:
1086                 None
1087
1088         IRQL = PASSIVE_LEVEL
1089
1090         Note:
1091
1092         ========================================================================
1093 */
1094 VOID    NICReadEEPROMParameters(
1095         IN      PRTMP_ADAPTER   pAd,
1096         IN      PUCHAR                  mac_addr)
1097 {
1098         UINT32                  data = 0;
1099         USHORT                  i, value, value2;
1100         UCHAR                   TmpPhy;
1101         EEPROM_TX_PWR_STRUC         Power;
1102         EEPROM_VERSION_STRUC    Version;
1103         EEPROM_ANTENNA_STRUC    Antenna;
1104         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1105
1106         DBGPRINT(RT_DEBUG_TRACE, ("--> NICReadEEPROMParameters\n"));
1107
1108         // Init EEPROM Address Number, before access EEPROM; if 93c46, EEPROMAddressNum=6, else if 93c66, EEPROMAddressNum=8
1109         RTMP_IO_READ32(pAd, E2PROM_CSR, &data);
1110         DBGPRINT(RT_DEBUG_TRACE, ("--> E2PROM_CSR = 0x%x\n", data));
1111
1112         if((data & 0x30) == 0)
1113                 pAd->EEPROMAddressNum = 6;              // 93C46
1114         else if((data & 0x30) == 0x10)
1115                 pAd->EEPROMAddressNum = 8;     // 93C66
1116         else
1117                 pAd->EEPROMAddressNum = 8;     // 93C86
1118         DBGPRINT(RT_DEBUG_TRACE, ("--> EEPROMAddressNum = %d\n", pAd->EEPROMAddressNum ));
1119
1120         // RT2860 MAC no longer auto load MAC address from E2PROM. Driver has to intialize
1121         // MAC address registers according to E2PROM setting
1122         if (mac_addr == NULL ||
1123                 strlen(mac_addr) != 17 ||
1124                 mac_addr[2] != ':'  || mac_addr[5] != ':'  || mac_addr[8] != ':' ||
1125                 mac_addr[11] != ':' || mac_addr[14] != ':')
1126         {
1127                 USHORT  Addr01,Addr23,Addr45 ;
1128
1129                 RT28xx_EEPROM_READ16(pAd, 0x04, Addr01);
1130                 RT28xx_EEPROM_READ16(pAd, 0x06, Addr23);
1131                 RT28xx_EEPROM_READ16(pAd, 0x08, Addr45);
1132
1133                 pAd->PermanentAddress[0] = (UCHAR)(Addr01 & 0xff);
1134                 pAd->PermanentAddress[1] = (UCHAR)(Addr01 >> 8);
1135                 pAd->PermanentAddress[2] = (UCHAR)(Addr23 & 0xff);
1136                 pAd->PermanentAddress[3] = (UCHAR)(Addr23 >> 8);
1137                 pAd->PermanentAddress[4] = (UCHAR)(Addr45 & 0xff);
1138                 pAd->PermanentAddress[5] = (UCHAR)(Addr45 >> 8);
1139
1140                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from E2PROM \n"));
1141         }
1142         else
1143         {
1144                 INT             j;
1145                 PUCHAR  macptr;
1146
1147                 macptr = mac_addr;
1148
1149                 for (j=0; j<MAC_ADDR_LEN; j++)
1150                 {
1151                         AtoH(macptr, &pAd->PermanentAddress[j], 1);
1152                         macptr=macptr+3;
1153                 }
1154
1155                 DBGPRINT(RT_DEBUG_TRACE, ("Initialize MAC Address from module parameter \n"));
1156         }
1157
1158
1159         {
1160                 //more conveninet to test mbssid, so ap's bssid &0xf1
1161                 if (pAd->PermanentAddress[0] == 0xff)
1162                         pAd->PermanentAddress[0] = RandomByte(pAd)&0xf8;
1163
1164                 //if (pAd->PermanentAddress[5] == 0xff)
1165                 //      pAd->PermanentAddress[5] = RandomByte(pAd)&0xf8;
1166
1167                 DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1168                         pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1169                         pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1170                         pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1171                 if (pAd->bLocalAdminMAC == FALSE)
1172                 {
1173                         MAC_DW0_STRUC csr2;
1174                         MAC_DW1_STRUC csr3;
1175                         COPY_MAC_ADDR(pAd->CurrentAddress, pAd->PermanentAddress);
1176                         csr2.field.Byte0 = pAd->CurrentAddress[0];
1177                         csr2.field.Byte1 = pAd->CurrentAddress[1];
1178                         csr2.field.Byte2 = pAd->CurrentAddress[2];
1179                         csr2.field.Byte3 = pAd->CurrentAddress[3];
1180                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW0, csr2.word);
1181                         csr3.word = 0;
1182                         csr3.field.Byte4 = pAd->CurrentAddress[4];
1183                         csr3.field.Byte5 = pAd->CurrentAddress[5];
1184                         csr3.field.U2MeMask = 0xff;
1185                         RTMP_IO_WRITE32(pAd, MAC_ADDR_DW1, csr3.word);
1186                         DBGPRINT_RAW(RT_DEBUG_TRACE,("E2PROM MAC: =%02x:%02x:%02x:%02x:%02x:%02x\n",
1187                                 pAd->PermanentAddress[0], pAd->PermanentAddress[1],
1188                                 pAd->PermanentAddress[2], pAd->PermanentAddress[3],
1189                                 pAd->PermanentAddress[4], pAd->PermanentAddress[5]));
1190                 }
1191         }
1192
1193         // if not return early. cause fail at emulation.
1194         // Init the channel number for TX channel power
1195         RTMPReadChannelPwr(pAd);
1196
1197         // if E2PROM version mismatch with driver's expectation, then skip
1198         // all subsequent E2RPOM retieval and set a system error bit to notify GUI
1199         RT28xx_EEPROM_READ16(pAd, EEPROM_VERSION_OFFSET, Version.word);
1200         pAd->EepromVersion = Version.field.Version + Version.field.FaeReleaseNumber * 256;
1201         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: Version = %d, FAE release #%d\n", Version.field.Version, Version.field.FaeReleaseNumber));
1202
1203         if (Version.field.Version > VALID_EEPROM_VERSION)
1204         {
1205                 DBGPRINT_ERR(("E2PROM: WRONG VERSION 0x%x, should be %d\n",Version.field.Version, VALID_EEPROM_VERSION));
1206                 /*pAd->SystemErrorBitmap |= 0x00000001;
1207
1208                 // hard-code default value when no proper E2PROM installed
1209                 pAd->bAutoTxAgcA = FALSE;
1210                 pAd->bAutoTxAgcG = FALSE;
1211
1212                 // Default the channel power
1213                 for (i = 0; i < MAX_NUM_OF_CHANNELS; i++)
1214                         pAd->TxPower[i].Power = DEFAULT_RF_TX_POWER;
1215
1216                 // Default the channel power
1217                 for (i = 0; i < MAX_NUM_OF_11JCHANNELS; i++)
1218                         pAd->TxPower11J[i].Power = DEFAULT_RF_TX_POWER;
1219
1220                 for(i = 0; i < NUM_EEPROM_BBP_PARMS; i++)
1221                         pAd->EEPROMDefaultValue[i] = 0xffff;
1222                 return;  */
1223         }
1224
1225         // Read BBP default value from EEPROM and store to array(EEPROMDefaultValue) in pAd
1226         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC1_OFFSET, value);
1227         pAd->EEPROMDefaultValue[0] = value;
1228
1229         RT28xx_EEPROM_READ16(pAd, EEPROM_NIC2_OFFSET, value);
1230         pAd->EEPROMDefaultValue[1] = value;
1231
1232         RT28xx_EEPROM_READ16(pAd, 0x38, value); // Country Region
1233         pAd->EEPROMDefaultValue[2] = value;
1234
1235         for(i = 0; i < 8; i++)
1236         {
1237                 RT28xx_EEPROM_READ16(pAd, EEPROM_BBP_BASE_OFFSET + i*2, value);
1238                 pAd->EEPROMDefaultValue[i+3] = value;
1239         }
1240
1241         // We have to parse NIC configuration 0 at here.
1242         // If TSSI did not have preloaded value, it should reset the TxAutoAgc to false
1243         // Therefore, we have to read TxAutoAgc control beforehand.
1244         // Read Tx AGC control bit
1245         Antenna.word = pAd->EEPROMDefaultValue[0];
1246         if (Antenna.word == 0xFFFF)
1247         {
1248                 Antenna.word = 0;
1249                 Antenna.field.RfIcType = RFIC_2820;
1250                 Antenna.field.TxPath = 1;
1251                 Antenna.field.RxPath = 2;
1252                 DBGPRINT(RT_DEBUG_WARN, ("E2PROM error, hard code as 0x%04x\n", Antenna.word));
1253         }
1254
1255         // Choose the desired Tx&Rx stream.
1256         if ((pAd->CommonCfg.TxStream == 0) || (pAd->CommonCfg.TxStream > Antenna.field.TxPath))
1257                 pAd->CommonCfg.TxStream = Antenna.field.TxPath;
1258
1259         if ((pAd->CommonCfg.RxStream == 0) || (pAd->CommonCfg.RxStream > Antenna.field.RxPath))
1260         {
1261                 pAd->CommonCfg.RxStream = Antenna.field.RxPath;
1262
1263                 if ((pAd->MACVersion < RALINK_2883_VERSION) &&
1264                         (pAd->CommonCfg.RxStream > 2))
1265                 {
1266                         // only 2 Rx streams for RT2860 series
1267                         pAd->CommonCfg.RxStream = 2;
1268                 }
1269         }
1270
1271         // 3*3
1272         // read value from EEPROM and set them to CSR174 ~ 177 in chain0 ~ chain2
1273         // yet implement
1274         for(i=0; i<3; i++)
1275         {
1276         }
1277
1278         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1279
1280
1281
1282 #ifdef CONFIG_STA_SUPPORT
1283         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1284         {
1285                 NicConfig2.word = 0;
1286                 if ((NicConfig2.word & 0x00ff) == 0xff)
1287                 {
1288                         NicConfig2.word &= 0xff00;
1289                 }
1290
1291                 if ((NicConfig2.word >> 8) == 0xff)
1292                 {
1293                         NicConfig2.word &= 0x00ff;
1294                 }
1295         }
1296 #endif // CONFIG_STA_SUPPORT //
1297
1298         if (NicConfig2.field.DynamicTxAgcControl == 1)
1299                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1300         else
1301                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1302
1303         DBGPRINT_RAW(RT_DEBUG_TRACE, ("NICReadEEPROMParameters: RxPath = %d, TxPath = %d\n", Antenna.field.RxPath, Antenna.field.TxPath));
1304
1305         // Save the antenna for future use
1306         pAd->Antenna.word = Antenna.word;
1307
1308         //
1309         // Reset PhyMode if we don't support 802.11a
1310         // Only RFIC_2850 & RFIC_2750 support 802.11a
1311         //
1312         if ((Antenna.field.RfIcType != RFIC_2850) && (Antenna.field.RfIcType != RFIC_2750))
1313         {
1314                 if ((pAd->CommonCfg.PhyMode == PHY_11ABG_MIXED) ||
1315                         (pAd->CommonCfg.PhyMode == PHY_11A))
1316                         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;
1317 #ifdef DOT11_N_SUPPORT
1318                 else if ((pAd->CommonCfg.PhyMode == PHY_11ABGN_MIXED)   ||
1319                                  (pAd->CommonCfg.PhyMode == PHY_11AN_MIXED)     ||
1320                                  (pAd->CommonCfg.PhyMode == PHY_11AGN_MIXED)    ||
1321                                  (pAd->CommonCfg.PhyMode == PHY_11N_5G))
1322                         pAd->CommonCfg.PhyMode = PHY_11BGN_MIXED;
1323 #endif // DOT11_N_SUPPORT //
1324         }
1325
1326         // Read TSSI reference and TSSI boundary for temperature compensation. This is ugly
1327         // 0. 11b/g
1328         {
1329                 /* these are tempature reference value (0x00 ~ 0xFE)
1330                    ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
1331                    TssiPlusBoundaryG [4] [3] [2] [1] [0] (smaller) +
1332                    TssiMinusBoundaryG[0] [1] [2] [3] [4] (larger) */
1333                 RT28xx_EEPROM_READ16(pAd, 0x6E, Power.word);
1334                 pAd->TssiMinusBoundaryG[4] = Power.field.Byte0;
1335                 pAd->TssiMinusBoundaryG[3] = Power.field.Byte1;
1336                 RT28xx_EEPROM_READ16(pAd, 0x70, Power.word);
1337                 pAd->TssiMinusBoundaryG[2] = Power.field.Byte0;
1338                 pAd->TssiMinusBoundaryG[1] = Power.field.Byte1;
1339                 RT28xx_EEPROM_READ16(pAd, 0x72, Power.word);
1340                 pAd->TssiRefG   = Power.field.Byte0; /* reference value [0] */
1341                 pAd->TssiPlusBoundaryG[1] = Power.field.Byte1;
1342                 RT28xx_EEPROM_READ16(pAd, 0x74, Power.word);
1343                 pAd->TssiPlusBoundaryG[2] = Power.field.Byte0;
1344                 pAd->TssiPlusBoundaryG[3] = Power.field.Byte1;
1345                 RT28xx_EEPROM_READ16(pAd, 0x76, Power.word);
1346                 pAd->TssiPlusBoundaryG[4] = Power.field.Byte0;
1347                 pAd->TxAgcStepG = Power.field.Byte1;
1348                 pAd->TxAgcCompensateG = 0;
1349                 pAd->TssiMinusBoundaryG[0] = pAd->TssiRefG;
1350                 pAd->TssiPlusBoundaryG[0]  = pAd->TssiRefG;
1351
1352                 // Disable TxAgc if the based value is not right
1353                 if (pAd->TssiRefG == 0xff)
1354                         pAd->bAutoTxAgcG = FALSE;
1355
1356                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: G Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1357                         pAd->TssiMinusBoundaryG[4], pAd->TssiMinusBoundaryG[3], pAd->TssiMinusBoundaryG[2], pAd->TssiMinusBoundaryG[1],
1358                         pAd->TssiRefG,
1359                         pAd->TssiPlusBoundaryG[1], pAd->TssiPlusBoundaryG[2], pAd->TssiPlusBoundaryG[3], pAd->TssiPlusBoundaryG[4],
1360                         pAd->TxAgcStepG, pAd->bAutoTxAgcG));
1361         }
1362         // 1. 11a
1363         {
1364                 RT28xx_EEPROM_READ16(pAd, 0xD4, Power.word);
1365                 pAd->TssiMinusBoundaryA[4] = Power.field.Byte0;
1366                 pAd->TssiMinusBoundaryA[3] = Power.field.Byte1;
1367                 RT28xx_EEPROM_READ16(pAd, 0xD6, Power.word);
1368                 pAd->TssiMinusBoundaryA[2] = Power.field.Byte0;
1369                 pAd->TssiMinusBoundaryA[1] = Power.field.Byte1;
1370                 RT28xx_EEPROM_READ16(pAd, 0xD8, Power.word);
1371                 pAd->TssiRefA   = Power.field.Byte0;
1372                 pAd->TssiPlusBoundaryA[1] = Power.field.Byte1;
1373                 RT28xx_EEPROM_READ16(pAd, 0xDA, Power.word);
1374                 pAd->TssiPlusBoundaryA[2] = Power.field.Byte0;
1375                 pAd->TssiPlusBoundaryA[3] = Power.field.Byte1;
1376                 RT28xx_EEPROM_READ16(pAd, 0xDC, Power.word);
1377                 pAd->TssiPlusBoundaryA[4] = Power.field.Byte0;
1378                 pAd->TxAgcStepA = Power.field.Byte1;
1379                 pAd->TxAgcCompensateA = 0;
1380                 pAd->TssiMinusBoundaryA[0] = pAd->TssiRefA;
1381                 pAd->TssiPlusBoundaryA[0]  = pAd->TssiRefA;
1382
1383                 // Disable TxAgc if the based value is not right
1384                 if (pAd->TssiRefA == 0xff)
1385                         pAd->bAutoTxAgcA = FALSE;
1386
1387                 DBGPRINT(RT_DEBUG_TRACE,("E2PROM: A Tssi[-4 .. +4] = %d %d %d %d - %d -%d %d %d %d, step=%d, tuning=%d\n",
1388                         pAd->TssiMinusBoundaryA[4], pAd->TssiMinusBoundaryA[3], pAd->TssiMinusBoundaryA[2], pAd->TssiMinusBoundaryA[1],
1389                         pAd->TssiRefA,
1390                         pAd->TssiPlusBoundaryA[1], pAd->TssiPlusBoundaryA[2], pAd->TssiPlusBoundaryA[3], pAd->TssiPlusBoundaryA[4],
1391                         pAd->TxAgcStepA, pAd->bAutoTxAgcA));
1392         }
1393         pAd->BbpRssiToDbmDelta = 0x0;
1394
1395         // Read frequency offset setting for RF
1396         RT28xx_EEPROM_READ16(pAd, EEPROM_FREQ_OFFSET, value);
1397         if ((value & 0x00FF) != 0x00FF)
1398                 pAd->RfFreqOffset = (ULONG) (value & 0x00FF);
1399         else
1400                 pAd->RfFreqOffset = 0;
1401         DBGPRINT(RT_DEBUG_TRACE, ("E2PROM: RF FreqOffset=0x%lx \n", pAd->RfFreqOffset));
1402
1403         //CountryRegion byte offset (38h)
1404         value = pAd->EEPROMDefaultValue[2] >> 8;                // 2.4G band
1405         value2 = pAd->EEPROMDefaultValue[2] & 0x00FF;   // 5G band
1406
1407         if ((value <= REGION_MAXIMUM_BG_BAND) && (value2 <= REGION_MAXIMUM_A_BAND))
1408         {
1409                 pAd->CommonCfg.CountryRegion = ((UCHAR) value) | 0x80;
1410                 pAd->CommonCfg.CountryRegionForABand = ((UCHAR) value2) | 0x80;
1411                 TmpPhy = pAd->CommonCfg.PhyMode;
1412                 pAd->CommonCfg.PhyMode = 0xff;
1413                 RTMPSetPhyMode(pAd, TmpPhy);
1414 #ifdef DOT11_N_SUPPORT
1415                 SetCommonHT(pAd);
1416 #endif // DOT11_N_SUPPORT //
1417         }
1418
1419         //
1420         // Get RSSI Offset on EEPROM 0x9Ah & 0x9Ch.
1421         // The valid value are (-10 ~ 10)
1422         //
1423         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, value);
1424         pAd->BGRssiOffset0 = value & 0x00ff;
1425         pAd->BGRssiOffset1 = (value >> 8);
1426         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET+2, value);
1427         pAd->BGRssiOffset2 = value & 0x00ff;
1428         pAd->ALNAGain1 = (value >> 8);
1429         RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, value);
1430         pAd->BLNAGain = value & 0x00ff;
1431         pAd->ALNAGain0 = (value >> 8);
1432
1433         // Validate 11b/g RSSI_0 offset.
1434         if ((pAd->BGRssiOffset0 < -10) || (pAd->BGRssiOffset0 > 10))
1435                 pAd->BGRssiOffset0 = 0;
1436
1437         // Validate 11b/g RSSI_1 offset.
1438         if ((pAd->BGRssiOffset1 < -10) || (pAd->BGRssiOffset1 > 10))
1439                 pAd->BGRssiOffset1 = 0;
1440
1441         // Validate 11b/g RSSI_2 offset.
1442         if ((pAd->BGRssiOffset2 < -10) || (pAd->BGRssiOffset2 > 10))
1443                 pAd->BGRssiOffset2 = 0;
1444
1445         RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, value);
1446         pAd->ARssiOffset0 = value & 0x00ff;
1447         pAd->ARssiOffset1 = (value >> 8);
1448         RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET+2), value);
1449         pAd->ARssiOffset2 = value & 0x00ff;
1450         pAd->ALNAGain2 = (value >> 8);
1451
1452         if (((UCHAR)pAd->ALNAGain1 == 0xFF) || (pAd->ALNAGain1 == 0x00))
1453                 pAd->ALNAGain1 = pAd->ALNAGain0;
1454         if (((UCHAR)pAd->ALNAGain2 == 0xFF) || (pAd->ALNAGain2 == 0x00))
1455                 pAd->ALNAGain2 = pAd->ALNAGain0;
1456
1457         // Validate 11a RSSI_0 offset.
1458         if ((pAd->ARssiOffset0 < -10) || (pAd->ARssiOffset0 > 10))
1459                 pAd->ARssiOffset0 = 0;
1460
1461         // Validate 11a RSSI_1 offset.
1462         if ((pAd->ARssiOffset1 < -10) || (pAd->ARssiOffset1 > 10))
1463                 pAd->ARssiOffset1 = 0;
1464
1465         //Validate 11a RSSI_2 offset.
1466         if ((pAd->ARssiOffset2 < -10) || (pAd->ARssiOffset2 > 10))
1467                 pAd->ARssiOffset2 = 0;
1468
1469         //
1470         // Get LED Setting.
1471         //
1472         RT28xx_EEPROM_READ16(pAd, 0x3a, value);
1473         pAd->LedCntl.word = (value&0xff00) >> 8;
1474         RT28xx_EEPROM_READ16(pAd, EEPROM_LED1_OFFSET, value);
1475         pAd->Led1 = value;
1476         RT28xx_EEPROM_READ16(pAd, EEPROM_LED2_OFFSET, value);
1477         pAd->Led2 = value;
1478         RT28xx_EEPROM_READ16(pAd, EEPROM_LED3_OFFSET, value);
1479         pAd->Led3 = value;
1480
1481         RTMPReadTxPwrPerRate(pAd);
1482
1483 #ifdef SINGLE_SKU
1484         //pAd->CommonCfg.DefineMaxTxPwr = RTMP_EEPROM_READ16(pAd, EEPROM_DEFINE_MAX_TXPWR);
1485         RT28xx_EEPROM_READ16(pAd, EEPROM_DEFINE_MAX_TXPWR, pAd->CommonCfg.DefineMaxTxPwr);
1486 #endif // SINGLE_SKU //
1487
1488         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICReadEEPROMParameters\n"));
1489 }
1490
1491 /*
1492         ========================================================================
1493
1494         Routine Description:
1495                 Set default value from EEPROM
1496
1497         Arguments:
1498                 Adapter                                         Pointer to our adapter
1499
1500         Return Value:
1501                 None
1502
1503         IRQL = PASSIVE_LEVEL
1504
1505         Note:
1506
1507         ========================================================================
1508 */
1509 VOID    NICInitAsicFromEEPROM(
1510         IN      PRTMP_ADAPTER   pAd)
1511 {
1512 #ifdef CONFIG_STA_SUPPORT
1513         UINT32                                  data = 0;
1514         UCHAR   BBPR1 = 0;
1515 #endif // CONFIG_STA_SUPPORT //
1516         USHORT                                  i;
1517         EEPROM_ANTENNA_STRUC    Antenna;
1518         EEPROM_NIC_CONFIG2_STRUC    NicConfig2;
1519         UCHAR   BBPR3 = 0;
1520
1521         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitAsicFromEEPROM\n"));
1522         for(i = 3; i < NUM_EEPROM_BBP_PARMS; i++)
1523         {
1524                 UCHAR BbpRegIdx, BbpValue;
1525
1526                 if ((pAd->EEPROMDefaultValue[i] != 0xFFFF) && (pAd->EEPROMDefaultValue[i] != 0))
1527                 {
1528                         BbpRegIdx = (UCHAR)(pAd->EEPROMDefaultValue[i] >> 8);
1529                         BbpValue  = (UCHAR)(pAd->EEPROMDefaultValue[i] & 0xff);
1530                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BbpRegIdx, BbpValue);
1531                 }
1532         }
1533
1534         Antenna.word = pAd->Antenna.word;
1535         pAd->Mlme.RealRxPath = (UCHAR) Antenna.field.RxPath;
1536         pAd->RfIcType = (UCHAR) Antenna.field.RfIcType;
1537
1538         NicConfig2.word = pAd->EEPROMDefaultValue[1];
1539
1540
1541         // Save the antenna for future use
1542         pAd->NicConfig2.word = NicConfig2.word;
1543
1544         //
1545         // Send LED Setting to MCU.
1546         //
1547         if (pAd->LedCntl.word == 0xFF)
1548         {
1549                 pAd->LedCntl.word = 0x01;
1550                 pAd->Led1 = 0x5555;
1551                 pAd->Led2 = 0x2221;
1552                 pAd->Led3 = 0xA9F8;
1553         }
1554
1555         AsicSendCommandToMcu(pAd, 0x52, 0xff, (UCHAR)pAd->Led1, (UCHAR)(pAd->Led1 >> 8));
1556         AsicSendCommandToMcu(pAd, 0x53, 0xff, (UCHAR)pAd->Led2, (UCHAR)(pAd->Led2 >> 8));
1557         AsicSendCommandToMcu(pAd, 0x54, 0xff, (UCHAR)pAd->Led3, (UCHAR)(pAd->Led3 >> 8));
1558     pAd->LedIndicatorStregth = 0xFF;
1559     RTMPSetSignalLED(pAd, -100);        // Force signal strength Led to be turned off, before link up
1560
1561 #ifdef CONFIG_STA_SUPPORT
1562         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1563         {
1564                 // Read Hardware controlled Radio state enable bit
1565                 if (NicConfig2.field.HardwareRadioControl == 1)
1566                 {
1567                         pAd->StaCfg.bHardwareRadio = TRUE;
1568
1569                         // Read GPIO pin2 as Hardware controlled radio state
1570                         RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &data);
1571                         if ((data & 0x04) == 0)
1572                         {
1573                                 pAd->StaCfg.bHwRadio = FALSE;
1574                                 pAd->StaCfg.bRadio = FALSE;
1575                                 RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1576                         }
1577                 }
1578                 else
1579                         pAd->StaCfg.bHardwareRadio = FALSE;
1580
1581                 if (pAd->StaCfg.bRadio == FALSE)
1582                 {
1583                         RTMPSetLED(pAd, LED_RADIO_OFF);
1584                 }
1585                 else
1586                 {
1587                         RTMPSetLED(pAd, LED_RADIO_ON);
1588                         AsicSendCommandToMcu(pAd, 0x30, 0xff, 0xff, 0x02);
1589                         AsicSendCommandToMcu(pAd, 0x31, PowerWakeCID, 0x00, 0x00);
1590                         // 2-1. wait command ok.
1591                         AsicCheckCommanOk(pAd, PowerWakeCID);
1592                 }
1593         }
1594 #endif // CONFIG_STA_SUPPORT //
1595
1596         // Turn off patching for cardbus controller
1597         if (NicConfig2.field.CardbusAcceleration == 1)
1598         {
1599         }
1600
1601         if (NicConfig2.field.DynamicTxAgcControl == 1)
1602                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = TRUE;
1603         else
1604                 pAd->bAutoTxAgcA = pAd->bAutoTxAgcG = FALSE;
1605         //
1606         // Since BBP has been progamed, to make sure BBP setting will be
1607         // upate inside of AsicAntennaSelect, so reset to UNKNOWN_BAND!!
1608         //
1609         pAd->CommonCfg.BandState = UNKNOWN_BAND;
1610
1611         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BBPR3);
1612         BBPR3 &= (~0x18);
1613         if(pAd->Antenna.field.RxPath == 3)
1614         {
1615                 BBPR3 |= (0x10);
1616         }
1617         else if(pAd->Antenna.field.RxPath == 2)
1618         {
1619                 BBPR3 |= (0x8);
1620         }
1621         else if(pAd->Antenna.field.RxPath == 1)
1622         {
1623                 BBPR3 |= (0x0);
1624         }
1625         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BBPR3);
1626
1627 #ifdef CONFIG_STA_SUPPORT
1628         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1629         {
1630                 // Handle the difference when 1T
1631                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BBPR1);
1632                 if(pAd->Antenna.field.TxPath == 1)
1633                 {
1634                 BBPR1 &= (~0x18);
1635                 }
1636                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BBPR1);
1637
1638                 DBGPRINT(RT_DEBUG_TRACE, ("Use Hw Radio Control Pin=%d; if used Pin=%d;\n", pAd->CommonCfg.bHardwareRadio, pAd->CommonCfg.bHardwareRadio));
1639         }
1640 #endif // CONFIG_STA_SUPPORT //
1641         DBGPRINT(RT_DEBUG_TRACE, ("TxPath = %d, RxPath = %d, RFIC=%d, Polar+LED mode=%x\n", pAd->Antenna.field.TxPath, pAd->Antenna.field.RxPath, pAd->RfIcType, pAd->LedCntl.word));
1642         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitAsicFromEEPROM\n"));
1643 }
1644
1645 /*
1646         ========================================================================
1647
1648         Routine Description:
1649                 Initialize NIC hardware
1650
1651         Arguments:
1652                 Adapter                                         Pointer to our adapter
1653
1654         Return Value:
1655                 None
1656
1657         IRQL = PASSIVE_LEVEL
1658
1659         Note:
1660
1661         ========================================================================
1662 */
1663 NDIS_STATUS     NICInitializeAdapter(
1664         IN      PRTMP_ADAPTER   pAd,
1665         IN   BOOLEAN    bHardReset)
1666 {
1667         NDIS_STATUS     Status = NDIS_STATUS_SUCCESS;
1668         WPDMA_GLO_CFG_STRUC     GloCfg;
1669         UINT32                  Value;
1670         DELAY_INT_CFG_STRUC     IntCfg;
1671         ULONG   i =0, j=0;
1672         AC_TXOP_CSR0_STRUC      csr0;
1673
1674         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAdapter\n"));
1675
1676         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1677 retry:
1678         i = 0;
1679         do
1680         {
1681                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1682                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1683                         break;
1684
1685                 RTMPusecDelay(1000);
1686                 i++;
1687         }while ( i<100);
1688         DBGPRINT(RT_DEBUG_TRACE, ("<== DMA offset 0x208 = 0x%x\n", GloCfg.word));
1689         GloCfg.word &= 0xff0;
1690         GloCfg.field.EnTXWriteBackDDONE =1;
1691         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1692
1693         // Record HW Beacon offset
1694         pAd->BeaconOffset[0] = HW_BEACON_BASE0;
1695         pAd->BeaconOffset[1] = HW_BEACON_BASE1;
1696         pAd->BeaconOffset[2] = HW_BEACON_BASE2;
1697         pAd->BeaconOffset[3] = HW_BEACON_BASE3;
1698         pAd->BeaconOffset[4] = HW_BEACON_BASE4;
1699         pAd->BeaconOffset[5] = HW_BEACON_BASE5;
1700         pAd->BeaconOffset[6] = HW_BEACON_BASE6;
1701         pAd->BeaconOffset[7] = HW_BEACON_BASE7;
1702
1703         //
1704         // write all shared Ring's base address into ASIC
1705         //
1706
1707         // asic simulation sequence put this ahead before loading firmware.
1708         // pbf hardware reset
1709         RTMP_IO_WRITE32(pAd, WPDMA_RST_IDX, 0x1003f);   // 0x10000 for reset rx, 0x3f resets all 6 tx rings.
1710         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe1f);
1711         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0xe00);
1712
1713         // Initialze ASIC for TX & Rx operation
1714         if (NICInitializeAsic(pAd , bHardReset) != NDIS_STATUS_SUCCESS)
1715         {
1716                 if (j++ == 0)
1717                 {
1718                         NICLoadFirmware(pAd);
1719                         goto retry;
1720                 }
1721                 return NDIS_STATUS_FAILURE;
1722         }
1723
1724
1725         // Write AC_BK base address register
1726         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BK].Cell[0].AllocPa);
1727         RTMP_IO_WRITE32(pAd, TX_BASE_PTR1, Value);
1728         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR1 : 0x%x\n", Value));
1729
1730         // Write AC_BE base address register
1731         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_BE].Cell[0].AllocPa);
1732         RTMP_IO_WRITE32(pAd, TX_BASE_PTR0, Value);
1733         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR0 : 0x%x\n", Value));
1734
1735         // Write AC_VI base address register
1736         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VI].Cell[0].AllocPa);
1737         RTMP_IO_WRITE32(pAd, TX_BASE_PTR2, Value);
1738         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR2 : 0x%x\n", Value));
1739
1740         // Write AC_VO base address register
1741         Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_AC_VO].Cell[0].AllocPa);
1742         RTMP_IO_WRITE32(pAd, TX_BASE_PTR3, Value);
1743         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR3 : 0x%x\n", Value));
1744
1745         // Write HCCA base address register
1746           Value = RTMP_GetPhysicalAddressLow(pAd->TxRing[QID_HCCA].Cell[0].AllocPa);
1747           RTMP_IO_WRITE32(pAd, TX_BASE_PTR4, Value);
1748         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR4 : 0x%x\n", Value));
1749
1750         // Write MGMT_BASE_CSR register
1751         Value = RTMP_GetPhysicalAddressLow(pAd->MgmtRing.Cell[0].AllocPa);
1752         RTMP_IO_WRITE32(pAd, TX_BASE_PTR5, Value);
1753         DBGPRINT(RT_DEBUG_TRACE, ("--> TX_BASE_PTR5 : 0x%x\n", Value));
1754
1755         // Write RX_BASE_CSR register
1756         Value = RTMP_GetPhysicalAddressLow(pAd->RxRing.Cell[0].AllocPa);
1757         RTMP_IO_WRITE32(pAd, RX_BASE_PTR, Value);
1758         DBGPRINT(RT_DEBUG_TRACE, ("--> RX_BASE_PTR : 0x%x\n", Value));
1759
1760         // Init RX Ring index pointer
1761         pAd->RxRing.RxSwReadIdx = 0;
1762         pAd->RxRing.RxCpuIdx = RX_RING_SIZE-1;
1763         RTMP_IO_WRITE32(pAd, RX_CRX_IDX, pAd->RxRing.RxCpuIdx);
1764
1765         // Init TX rings index pointer
1766         {
1767                 for (i=0; i<NUM_OF_TX_RING; i++)
1768                 {
1769                         pAd->TxRing[i].TxSwFreeIdx = 0;
1770                         pAd->TxRing[i].TxCpuIdx = 0;
1771                         RTMP_IO_WRITE32(pAd, (TX_CTX_IDX0 + i * 0x10) ,  pAd->TxRing[i].TxCpuIdx);
1772                 }
1773         }
1774
1775         // init MGMT ring index pointer
1776         pAd->MgmtRing.TxSwFreeIdx = 0;
1777         pAd->MgmtRing.TxCpuIdx = 0;
1778         RTMP_IO_WRITE32(pAd, TX_MGMTCTX_IDX,  pAd->MgmtRing.TxCpuIdx);
1779
1780         //
1781         // set each Ring's SIZE  into ASIC. Descriptor Size is fixed by design.
1782         //
1783
1784         // Write TX_RING_CSR0 register
1785         Value = TX_RING_SIZE;
1786         RTMP_IO_WRITE32(pAd, TX_MAX_CNT0, Value);
1787         RTMP_IO_WRITE32(pAd, TX_MAX_CNT1, Value);
1788         RTMP_IO_WRITE32(pAd, TX_MAX_CNT2, Value);
1789         RTMP_IO_WRITE32(pAd, TX_MAX_CNT3, Value);
1790         RTMP_IO_WRITE32(pAd, TX_MAX_CNT4, Value);
1791         Value = MGMT_RING_SIZE;
1792         RTMP_IO_WRITE32(pAd, TX_MGMTMAX_CNT, Value);
1793
1794         // Write RX_RING_CSR register
1795         Value = RX_RING_SIZE;
1796         RTMP_IO_WRITE32(pAd, RX_MAX_CNT, Value);
1797
1798
1799         // WMM parameter
1800         csr0.word = 0;
1801         RTMP_IO_WRITE32(pAd, WMM_TXOP0_CFG, csr0.word);
1802         if (pAd->CommonCfg.PhyMode == PHY_11B)
1803         {
1804                 csr0.field.Ac0Txop = 192;       // AC_VI: 192*32us ~= 6ms
1805                 csr0.field.Ac1Txop = 96;        // AC_VO: 96*32us  ~= 3ms
1806         }
1807         else
1808         {
1809                 csr0.field.Ac0Txop = 96;        // AC_VI: 96*32us ~= 3ms
1810                 csr0.field.Ac1Txop = 48;        // AC_VO: 48*32us ~= 1.5ms
1811         }
1812         RTMP_IO_WRITE32(pAd, WMM_TXOP1_CFG, csr0.word);
1813
1814
1815         // 3. Set DMA global configuration except TX_DMA_EN and RX_DMA_EN bits:
1816         i = 0;
1817         do
1818         {
1819                 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word);
1820                 if ((GloCfg.field.TxDMABusy == 0)  && (GloCfg.field.RxDMABusy == 0))
1821                         break;
1822
1823                 RTMPusecDelay(1000);
1824                 i++;
1825         }while ( i < 100);
1826
1827         GloCfg.word &= 0xff0;
1828         GloCfg.field.EnTXWriteBackDDONE =1;
1829         RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word);
1830
1831         IntCfg.word = 0;
1832         RTMP_IO_WRITE32(pAd, DELAY_INT_CFG, IntCfg.word);
1833
1834
1835         // reset action
1836         // Load firmware
1837         //  Status = NICLoadFirmware(pAd);
1838
1839         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAdapter\n"));
1840         return Status;
1841 }
1842
1843 /*
1844         ========================================================================
1845
1846         Routine Description:
1847                 Initialize ASIC
1848
1849         Arguments:
1850                 Adapter                                         Pointer to our adapter
1851
1852         Return Value:
1853                 None
1854
1855         IRQL = PASSIVE_LEVEL
1856
1857         Note:
1858
1859         ========================================================================
1860 */
1861 NDIS_STATUS     NICInitializeAsic(
1862         IN      PRTMP_ADAPTER   pAd,
1863         IN  BOOLEAN             bHardReset)
1864 {
1865         ULONG                   Index = 0;
1866         UCHAR                   R0 = 0xff;
1867         UINT32                  MacCsr12 = 0, Counter = 0;
1868         USHORT                  KeyIdx;
1869         INT                             i,apidx;
1870
1871         DBGPRINT(RT_DEBUG_TRACE, ("--> NICInitializeAsic\n"));
1872
1873         if (bHardReset == TRUE)
1874         {
1875                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x3);
1876         }
1877         else
1878                 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
1879
1880         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
1881         // Initialize MAC register to default value
1882         for (Index = 0; Index < NUM_MAC_REG_PARMS; Index++)
1883         {
1884                 RTMP_IO_WRITE32(pAd, MACRegTable[Index].Register, MACRegTable[Index].Value);
1885         }
1886
1887
1888 #ifdef CONFIG_STA_SUPPORT
1889         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1890         {
1891                 for (Index = 0; Index < NUM_STA_MAC_REG_PARMS; Index++)
1892                 {
1893                         RTMP_IO_WRITE32(pAd, STAMACRegTable[Index].Register, STAMACRegTable[Index].Value);
1894                 }
1895         }
1896 #endif // CONFIG_STA_SUPPORT //
1897
1898
1899         //
1900         // Before program BBP, we need to wait BBP/RF get wake up.
1901         //
1902         Index = 0;
1903         do
1904         {
1905                 RTMP_IO_READ32(pAd, MAC_STATUS_CFG, &MacCsr12);
1906
1907                 if ((MacCsr12 & 0x03) == 0)     // if BB.RF is stable
1908                         break;
1909
1910                 DBGPRINT(RT_DEBUG_TRACE, ("Check MAC_STATUS_CFG  = Busy = %x\n", MacCsr12));
1911                 RTMPusecDelay(1000);
1912         } while (Index++ < 100);
1913
1914     // The commands to firmware should be after these commands, these commands will init firmware
1915         // PCI and USB are not the same because PCI driver needs to wait for PCI bus ready
1916         RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0); // initialize BBP R/W access agent
1917         RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
1918         RTMPusecDelay(1000);
1919
1920         // Read BBP register, make sure BBP is up and running before write new data
1921         Index = 0;
1922         do
1923         {
1924                 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R0, &R0);
1925                 DBGPRINT(RT_DEBUG_TRACE, ("BBP version = %x\n", R0));
1926         } while ((++Index < 20) && ((R0 == 0xff) || (R0 == 0x00)));
1927         //ASSERT(Index < 20); //this will cause BSOD on Check-build driver
1928
1929         if ((R0 == 0xff) || (R0 == 0x00))
1930                 return NDIS_STATUS_FAILURE;
1931
1932         // Initialize BBP register to default value
1933         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
1934         {
1935                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, BBPRegTable[Index].Value);
1936         }
1937
1938         // for rt2860E and after, init BBP_R84 with 0x19. This is for extension channel overlapping IOT.
1939         if ((pAd->MACVersion&0xffff) != 0x0101)
1940                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R84, 0x19);
1941
1942
1943         if (pAd->MACVersion == 0x28600100)
1944         {
1945                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
1946                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
1947     }
1948
1949         if (pAd->MACVersion >= RALINK_2880E_VERSION && pAd->MACVersion < RALINK_3070_VERSION) // 3*3
1950         {
1951                 // enlarge MAX_LEN_CFG
1952                 UINT32 csr;
1953                 RTMP_IO_READ32(pAd, MAX_LEN_CFG, &csr);
1954                 csr &= 0xFFF;
1955                 csr |= 0x2000;
1956                 RTMP_IO_WRITE32(pAd, MAX_LEN_CFG, csr);
1957         }
1958
1959
1960         // Add radio off control
1961 #ifdef CONFIG_STA_SUPPORT
1962         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
1963         {
1964                 if (pAd->StaCfg.bRadio == FALSE)
1965                 {
1966 //                      RTMP_IO_WRITE32(pAd, PWR_PIN_CFG, 0x00001818);
1967                         RTMP_SET_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF);
1968                         DBGPRINT(RT_DEBUG_TRACE, ("Set Radio Off\n"));
1969                 }
1970         }
1971 #endif // CONFIG_STA_SUPPORT //
1972
1973         // Clear raw counters
1974         RTMP_IO_READ32(pAd, RX_STA_CNT0, &Counter);
1975         RTMP_IO_READ32(pAd, RX_STA_CNT1, &Counter);
1976         RTMP_IO_READ32(pAd, RX_STA_CNT2, &Counter);
1977         RTMP_IO_READ32(pAd, TX_STA_CNT0, &Counter);
1978         RTMP_IO_READ32(pAd, TX_STA_CNT1, &Counter);
1979         RTMP_IO_READ32(pAd, TX_STA_CNT2, &Counter);
1980
1981         // ASIC will keep garbage value after boot
1982         // Clear all seared key table when initial
1983         // This routine can be ignored in radio-ON/OFF operation.
1984         if (bHardReset)
1985         {
1986                 for (KeyIdx = 0; KeyIdx < 4; KeyIdx++)
1987                 {
1988                         RTMP_IO_WRITE32(pAd, SHARED_KEY_MODE_BASE + 4*KeyIdx, 0);
1989                 }
1990
1991                 // Clear all pairwise key table when initial
1992                 for (KeyIdx = 0; KeyIdx < 256; KeyIdx++)
1993                 {
1994                         RTMP_IO_WRITE32(pAd, MAC_WCID_ATTRIBUTE_BASE + (KeyIdx * HW_WCID_ATTRI_SIZE), 1);
1995                 }
1996         }
1997
1998
1999         // It isn't necessary to clear this space when not hard reset.
2000         if (bHardReset == TRUE)
2001         {
2002                 // clear all on-chip BEACON frame space
2003                 for (apidx = 0; apidx < HW_BEACON_MAX_COUNT; apidx++)
2004                 {
2005                         for (i = 0; i < HW_BEACON_OFFSET>>2; i+=4)
2006                                 RTMP_IO_WRITE32(pAd, pAd->BeaconOffset[apidx] + i, 0x00);
2007                 }
2008         }
2009
2010 #ifdef CONFIG_STA_SUPPORT
2011         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
2012         {
2013                 // for rt2860E and after, init TXOP_CTRL_CFG with 0x583f. This is for extension channel overlapping IOT.
2014                 if ((pAd->MACVersion&0xffff) != 0x0101)
2015                         RTMP_IO_WRITE32(pAd, TXOP_CTRL_CFG, 0x583f);
2016         }
2017 #endif // CONFIG_STA_SUPPORT //
2018
2019         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICInitializeAsic\n"));
2020         return NDIS_STATUS_SUCCESS;
2021 }
2022
2023
2024 VOID NICRestoreBBPValue(
2025         IN PRTMP_ADAPTER pAd)
2026 {
2027         UCHAR           index;
2028         UCHAR           Value = 0;
2029         ULONG           Data;
2030
2031         DBGPRINT(RT_DEBUG_TRACE, ("--->  NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!!  \n"));
2032         // Initialize BBP register to default value (rtmp_init.c)
2033         for (index = 0; index < NUM_BBP_REG_PARMS; index++)
2034         {
2035                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[index].Register, BBPRegTable[index].Value);
2036         }
2037         // copy from (rtmp_init.c)
2038         if (pAd->MACVersion == 0x28600100)
2039         {
2040                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2041                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x12);
2042         }
2043
2044         // copy from (connect.c LinkUp function)
2045         if (INFRA_ON(pAd))
2046         {
2047                 // Change to AP channel
2048                 if ((pAd->CommonCfg.CentralChannel > pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2049                 {
2050                         // Must using 40MHz.
2051                         pAd->CommonCfg.BBPCurrentBW = BW_40;
2052                         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2053                         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2054
2055                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2056                         Value &= (~0x18);
2057                         Value |= 0x10;
2058                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2059
2060                         //  RX : control channel at lower
2061                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2062                         Value &= (~0x20);
2063                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2064                         // Record BBPR3 setting, But don't keep R Antenna # information.
2065                         pAd->StaCfg.BBPR3 = Value;
2066
2067                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2068                         Data &= 0xfffffffe;
2069                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2070
2071                         if (pAd->MACVersion == 0x28600100)
2072                         {
2073                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2074                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2075                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2076                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2077                         }
2078
2079                         DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Lower LINK UP !!! Control Channel at Below. Central = %d \n", pAd->CommonCfg.CentralChannel ));
2080                 }
2081                 else if ((pAd->CommonCfg.CentralChannel < pAd->CommonCfg.Channel) && (pAd->MlmeAux.HtCapability.HtCapInfo.ChannelWidth == BW_40))
2082                 {
2083                         // Must using 40MHz.
2084                         pAd->CommonCfg.BBPCurrentBW = BW_40;
2085                         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2086                         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2087
2088                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2089                         Value &= (~0x18);
2090                         Value |= 0x10;
2091                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2092
2093                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2094                         Data |= 0x1;
2095                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2096
2097                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2098                         Value |= (0x20);
2099                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2100                         // Record BBPR3 setting, But don't keep R Antenna # information.
2101                         pAd->StaCfg.BBPR3 = Value;
2102
2103                         if (pAd->MACVersion == 0x28600100)
2104                         {
2105                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x1A);
2106                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x0A);
2107                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x16);
2108                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2109                         }
2110
2111                         DBGPRINT(RT_DEBUG_TRACE, ("!!!40MHz Upper LINK UP !!! Control Channel at UpperCentral = %d \n", pAd->CommonCfg.CentralChannel ));
2112                 }
2113                 else
2114                 {
2115                         pAd->CommonCfg.BBPCurrentBW = BW_20;
2116                         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
2117                         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
2118
2119                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &Value);
2120                         Value &= (~0x18);
2121                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, Value);
2122
2123                         RTMP_IO_READ32(pAd, TX_BAND_CFG, &Data);
2124                         Data &= 0xfffffffe;
2125                         RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Data);
2126
2127                         RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &Value);
2128                         Value &= (~0x20);
2129                         RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, Value);
2130                         // Record BBPR3 setting, But don't keep R Antenna # information.
2131                         pAd->StaCfg.BBPR3 = Value;
2132
2133                         if (pAd->MACVersion == 0x28600100)
2134                         {
2135                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, 0x16);
2136                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, 0x08);
2137                                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, 0x11);
2138                                 DBGPRINT(RT_DEBUG_TRACE, ("!!!rt2860C !!! \n" ));
2139                         }
2140
2141                         DBGPRINT(RT_DEBUG_TRACE, ("!!!20MHz LINK UP !!! \n" ));
2142                 }
2143         }
2144
2145         DBGPRINT(RT_DEBUG_TRACE, ("<---  NICRestoreBBPValue !!!!!!!!!!!!!!!!!!!!!!!  \n"));
2146 }
2147
2148 /*
2149         ========================================================================
2150
2151         Routine Description:
2152                 Reset NIC Asics
2153
2154         Arguments:
2155                 Adapter                                         Pointer to our adapter
2156
2157         Return Value:
2158                 None
2159
2160         IRQL = PASSIVE_LEVEL
2161
2162         Note:
2163                 Reset NIC to initial state AS IS system boot up time.
2164
2165         ========================================================================
2166 */
2167 VOID    NICIssueReset(
2168         IN      PRTMP_ADAPTER   pAd)
2169 {
2170         UINT32  Value = 0;
2171         DBGPRINT(RT_DEBUG_TRACE, ("--> NICIssueReset\n"));
2172
2173         // Disable Rx, register value supposed will remain after reset
2174         RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
2175         Value &= (0xfffffff3);
2176         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
2177
2178         // Issue reset and clear from reset state
2179         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x03); // 2004-09-17 change from 0x01
2180         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x00);
2181
2182         DBGPRINT(RT_DEBUG_TRACE, ("<-- NICIssueReset\n"));
2183 }
2184
2185 /*
2186         ========================================================================
2187
2188         Routine Description:
2189                 Check ASIC registers and find any reason the system might hang
2190
2191         Arguments:
2192                 Adapter                                         Pointer to our adapter
2193
2194         Return Value:
2195                 None
2196
2197         IRQL = DISPATCH_LEVEL
2198
2199         ========================================================================
2200 */
2201 BOOLEAN NICCheckForHang(
2202         IN      PRTMP_ADAPTER   pAd)
2203 {
2204         return (FALSE);
2205 }
2206
2207 VOID NICUpdateFifoStaCounters(
2208         IN PRTMP_ADAPTER pAd)
2209 {
2210         TX_STA_FIFO_STRUC       StaFifo;
2211         MAC_TABLE_ENTRY         *pEntry;
2212         UCHAR                           i = 0;
2213         UCHAR                   pid = 0, wcid = 0;
2214         CHAR                            reTry;
2215         UCHAR                           succMCS;
2216
2217 #ifdef RALINK_ATE
2218         /* Nothing to do in ATE mode */
2219         if (ATE_ON(pAd))
2220                 return;
2221 #endif // RALINK_ATE //
2222
2223                 do
2224                 {
2225                         RTMP_IO_READ32(pAd, TX_STA_FIFO, &StaFifo.word);
2226
2227                         if (StaFifo.field.bValid == 0)
2228                                 break;
2229
2230                         wcid = (UCHAR)StaFifo.field.wcid;
2231
2232
2233                 /* ignore NoACK and MGMT frame use 0xFF as WCID */
2234                         if ((StaFifo.field.TxAckRequired == 0) || (wcid >= MAX_LEN_OF_MAC_TABLE))
2235                         {
2236                                 i++;
2237                                 continue;
2238                         }
2239
2240                         /* PID store Tx MCS Rate */
2241                         pid = (UCHAR)StaFifo.field.PidType;
2242
2243                         pEntry = &pAd->MacTab.Content[wcid];
2244
2245                         pEntry->DebugFIFOCount++;
2246
2247 #ifdef DOT11_N_SUPPORT
2248                         if (StaFifo.field.TxBF) // 3*3
2249                                 pEntry->TxBFCount++;
2250 #endif // DOT11_N_SUPPORT //
2251
2252 #ifdef UAPSD_AP_SUPPORT
2253                         UAPSD_SP_AUE_Handle(pAd, pEntry, StaFifo.field.TxSuccess);
2254 #endif // UAPSD_AP_SUPPORT //
2255
2256                         if (!StaFifo.field.TxSuccess)
2257                         {
2258                                 pEntry->FIFOCount++;
2259                                 pEntry->OneSecTxFailCount++;
2260
2261                                 if (pEntry->FIFOCount >= 1)
2262                                 {
2263                                         DBGPRINT(RT_DEBUG_TRACE, ("#"));
2264 #if 0
2265                                         SendRefreshBAR(pAd, pEntry);
2266                                         pEntry->NoBADataCountDown = 64;
2267 #else
2268 #ifdef DOT11_N_SUPPORT
2269                                         pEntry->NoBADataCountDown = 64;
2270 #endif // DOT11_N_SUPPORT //
2271
2272                                         if(pEntry->PsMode == PWR_ACTIVE)
2273                                         {
2274 #ifdef DOT11_N_SUPPORT
2275                                                 int tid;
2276                                                 for (tid=0; tid<NUM_OF_TID; tid++)
2277                                                 {
2278                                                         BAOriSessionTearDown(pAd, pEntry->Aid,  tid, FALSE, FALSE);
2279                                                 }
2280 #endif // DOT11_N_SUPPORT //
2281
2282                                                 // Update the continuous transmission counter except PS mode
2283                                                 pEntry->ContinueTxFailCnt++;
2284                                         }
2285                                         else
2286                                         {
2287                                                 // Clear the FIFOCount when sta in Power Save mode. Basically we assume
2288                                                 //     this tx error happened due to sta just go to sleep.
2289                                                 pEntry->FIFOCount = 0;
2290                                                 pEntry->ContinueTxFailCnt = 0;
2291                                         }
2292 #endif
2293                                         //pEntry->FIFOCount = 0;
2294                                 }
2295                                 //pEntry->bSendBAR = TRUE;
2296                         }
2297                         else
2298                         {
2299 #ifdef DOT11_N_SUPPORT
2300                                 if ((pEntry->PsMode != PWR_SAVE) && (pEntry->NoBADataCountDown > 0))
2301                                 {
2302                                         pEntry->NoBADataCountDown--;
2303                                         if (pEntry->NoBADataCountDown==0)
2304                                         {
2305                                                 DBGPRINT(RT_DEBUG_TRACE, ("@\n"));
2306                                         }
2307                                 }
2308 #endif // DOT11_N_SUPPORT //
2309                                 pEntry->FIFOCount = 0;
2310                                 pEntry->OneSecTxNoRetryOkCount++;
2311                                 // update NoDataIdleCount when sucessful send packet to STA.
2312                                 pEntry->NoDataIdleCount = 0;
2313                                 pEntry->ContinueTxFailCnt = 0;
2314                         }
2315
2316                         succMCS = StaFifo.field.SuccessRate & 0x7F;
2317
2318                         reTry = pid - succMCS;
2319
2320                         if (StaFifo.field.TxSuccess)
2321                         {
2322                                 pEntry->TXMCSExpected[pid]++;
2323                                 if (pid == succMCS)
2324                                 {
2325                                         pEntry->TXMCSSuccessful[pid]++;
2326                                 }
2327                                 else
2328                                 {
2329                                         pEntry->TXMCSAutoFallBack[pid][succMCS]++;
2330                                 }
2331                         }
2332                         else
2333                         {
2334                                 pEntry->TXMCSFailed[pid]++;
2335                         }
2336
2337                         if (reTry > 0)
2338                         {
2339                                 if ((pid >= 12) && succMCS <=7)
2340                                 {
2341                                         reTry -= 4;
2342                                 }
2343                                 pEntry->OneSecTxRetryOkCount += reTry;
2344                         }
2345
2346                         i++;
2347                         // ASIC store 16 stack
2348                 } while ( i < (2*TX_RING_SIZE) );
2349
2350 }
2351
2352 /*
2353         ========================================================================
2354
2355         Routine Description:
2356                 Read statistical counters from hardware registers and record them
2357                 in software variables for later on query
2358
2359         Arguments:
2360                 pAd                                     Pointer to our adapter
2361
2362         Return Value:
2363                 None
2364
2365         IRQL = DISPATCH_LEVEL
2366
2367         ========================================================================
2368 */
2369 VOID NICUpdateRawCounters(
2370         IN PRTMP_ADAPTER pAd)
2371 {
2372         UINT32  OldValue;
2373         RX_STA_CNT0_STRUC        RxStaCnt0;
2374         RX_STA_CNT1_STRUC   RxStaCnt1;
2375         RX_STA_CNT2_STRUC   RxStaCnt2;
2376         TX_STA_CNT0_STRUC        TxStaCnt0;
2377         TX_STA_CNT1_STRUC        StaTx1;
2378         TX_STA_CNT2_STRUC        StaTx2;
2379         TX_AGG_CNT_STRUC        TxAggCnt;
2380         TX_AGG_CNT0_STRUC       TxAggCnt0;
2381         TX_AGG_CNT1_STRUC       TxAggCnt1;
2382         TX_AGG_CNT2_STRUC       TxAggCnt2;
2383         TX_AGG_CNT3_STRUC       TxAggCnt3;
2384         TX_AGG_CNT4_STRUC       TxAggCnt4;
2385         TX_AGG_CNT5_STRUC       TxAggCnt5;
2386         TX_AGG_CNT6_STRUC       TxAggCnt6;
2387         TX_AGG_CNT7_STRUC       TxAggCnt7;
2388
2389         RTMP_IO_READ32(pAd, RX_STA_CNT0, &RxStaCnt0.word);
2390         RTMP_IO_READ32(pAd, RX_STA_CNT2, &RxStaCnt2.word);
2391
2392         {
2393                 RTMP_IO_READ32(pAd, RX_STA_CNT1, &RxStaCnt1.word);
2394             // Update RX PLCP error counter
2395             pAd->PrivateInfo.PhyRxErrCnt += RxStaCnt1.field.PlcpErr;
2396                 // Update False CCA counter
2397                 pAd->RalinkCounters.OneSecFalseCCACnt += RxStaCnt1.field.FalseCca;
2398         }
2399
2400         // Update FCS counters
2401         OldValue= pAd->WlanCounters.FCSErrorCount.u.LowPart;
2402         pAd->WlanCounters.FCSErrorCount.u.LowPart += (RxStaCnt0.field.CrcErr); // >> 7);
2403         if (pAd->WlanCounters.FCSErrorCount.u.LowPart < OldValue)
2404                 pAd->WlanCounters.FCSErrorCount.u.HighPart++;
2405
2406         // Add FCS error count to private counters
2407         pAd->RalinkCounters.OneSecRxFcsErrCnt += RxStaCnt0.field.CrcErr;
2408         OldValue = pAd->RalinkCounters.RealFcsErrCount.u.LowPart;
2409         pAd->RalinkCounters.RealFcsErrCount.u.LowPart += RxStaCnt0.field.CrcErr;
2410         if (pAd->RalinkCounters.RealFcsErrCount.u.LowPart < OldValue)
2411                 pAd->RalinkCounters.RealFcsErrCount.u.HighPart++;
2412
2413         // Update Duplicate Rcv check
2414         pAd->RalinkCounters.DuplicateRcv += RxStaCnt2.field.RxDupliCount;
2415         pAd->WlanCounters.FrameDuplicateCount.u.LowPart += RxStaCnt2.field.RxDupliCount;
2416         // Update RX Overflow counter
2417         pAd->Counters8023.RxNoBuffer += (RxStaCnt2.field.RxFifoOverflowCount);
2418
2419         if (!pAd->bUpdateBcnCntDone)
2420         {
2421         // Update BEACON sent count
2422         RTMP_IO_READ32(pAd, TX_STA_CNT0, &TxStaCnt0.word);
2423         RTMP_IO_READ32(pAd, TX_STA_CNT1, &StaTx1.word);
2424         RTMP_IO_READ32(pAd, TX_STA_CNT2, &StaTx2.word);
2425         pAd->RalinkCounters.OneSecBeaconSentCnt += TxStaCnt0.field.TxBeaconCount;
2426         pAd->RalinkCounters.OneSecTxRetryOkCount += StaTx1.field.TxRetransmit;
2427         pAd->RalinkCounters.OneSecTxNoRetryOkCount += StaTx1.field.TxSuccess;
2428         pAd->RalinkCounters.OneSecTxFailCount += TxStaCnt0.field.TxFailCount;
2429         pAd->WlanCounters.TransmittedFragmentCount.u.LowPart += StaTx1.field.TxSuccess;
2430         pAd->WlanCounters.RetryCount.u.LowPart += StaTx1.field.TxRetransmit;
2431         pAd->WlanCounters.FailedCount.u.LowPart += TxStaCnt0.field.TxFailCount;
2432         }
2433
2434         {
2435                 RTMP_IO_READ32(pAd, TX_AGG_CNT, &TxAggCnt.word);
2436                 RTMP_IO_READ32(pAd, TX_AGG_CNT0, &TxAggCnt0.word);
2437                 RTMP_IO_READ32(pAd, TX_AGG_CNT1, &TxAggCnt1.word);
2438                 RTMP_IO_READ32(pAd, TX_AGG_CNT2, &TxAggCnt2.word);
2439                 RTMP_IO_READ32(pAd, TX_AGG_CNT3, &TxAggCnt3.word);
2440                 RTMP_IO_READ32(pAd, TX_AGG_CNT4, &TxAggCnt4.word);
2441                 RTMP_IO_READ32(pAd, TX_AGG_CNT5, &TxAggCnt5.word);
2442                 RTMP_IO_READ32(pAd, TX_AGG_CNT6, &TxAggCnt6.word);
2443                 RTMP_IO_READ32(pAd, TX_AGG_CNT7, &TxAggCnt7.word);
2444                 pAd->RalinkCounters.TxAggCount += TxAggCnt.field.AggTxCount;
2445                 pAd->RalinkCounters.TxNonAggCount += TxAggCnt.field.NonAggTxCount;
2446                 pAd->RalinkCounters.TxAgg1MPDUCount += TxAggCnt0.field.AggSize1Count;
2447                 pAd->RalinkCounters.TxAgg2MPDUCount += TxAggCnt0.field.AggSize2Count;
2448
2449                 pAd->RalinkCounters.TxAgg3MPDUCount += TxAggCnt1.field.AggSize3Count;
2450                 pAd->RalinkCounters.TxAgg4MPDUCount += TxAggCnt1.field.AggSize4Count;
2451                 pAd->RalinkCounters.TxAgg5MPDUCount += TxAggCnt2.field.AggSize5Count;
2452                 pAd->RalinkCounters.TxAgg6MPDUCount += TxAggCnt2.field.AggSize6Count;
2453
2454                 pAd->RalinkCounters.TxAgg7MPDUCount += TxAggCnt3.field.AggSize7Count;
2455                 pAd->RalinkCounters.TxAgg8MPDUCount += TxAggCnt3.field.AggSize8Count;
2456                 pAd->RalinkCounters.TxAgg9MPDUCount += TxAggCnt4.field.AggSize9Count;
2457                 pAd->RalinkCounters.TxAgg10MPDUCount += TxAggCnt4.field.AggSize10Count;
2458
2459                 pAd->RalinkCounters.TxAgg11MPDUCount += TxAggCnt5.field.AggSize11Count;
2460                 pAd->RalinkCounters.TxAgg12MPDUCount += TxAggCnt5.field.AggSize12Count;
2461                 pAd->RalinkCounters.TxAgg13MPDUCount += TxAggCnt6.field.AggSize13Count;
2462                 pAd->RalinkCounters.TxAgg14MPDUCount += TxAggCnt6.field.AggSize14Count;
2463
2464                 pAd->RalinkCounters.TxAgg15MPDUCount += TxAggCnt7.field.AggSize15Count;
2465                 pAd->RalinkCounters.TxAgg16MPDUCount += TxAggCnt7.field.AggSize16Count;
2466
2467                 // Calculate the transmitted A-MPDU count
2468                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += TxAggCnt0.field.AggSize1Count;
2469                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt0.field.AggSize2Count / 2);
2470
2471                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize3Count / 3);
2472                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt1.field.AggSize4Count / 4);
2473
2474                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize5Count / 5);
2475                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt2.field.AggSize6Count / 6);
2476
2477                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize7Count / 7);
2478                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt3.field.AggSize8Count / 8);
2479
2480                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize9Count / 9);
2481                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt4.field.AggSize10Count / 10);
2482
2483                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize11Count / 11);
2484                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt5.field.AggSize12Count / 12);
2485
2486                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize13Count / 13);
2487                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt6.field.AggSize14Count / 14);
2488
2489                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize15Count / 15);
2490                 pAd->RalinkCounters.TransmittedAMPDUCount.u.LowPart += (TxAggCnt7.field.AggSize16Count / 16);
2491         }
2492
2493 #ifdef DBG_DIAGNOSE
2494         {
2495                 RtmpDiagStruct  *pDiag;
2496                 COUNTER_RALINK  *pRalinkCounters;
2497                 UCHAR                   ArrayCurIdx, i;
2498
2499                 pDiag = &pAd->DiagStruct;
2500                 pRalinkCounters = &pAd->RalinkCounters;
2501                 ArrayCurIdx = pDiag->ArrayCurIdx;
2502
2503                 if (pDiag->inited == 0)
2504                 {
2505                         NdisZeroMemory(pDiag, sizeof(struct _RtmpDiagStrcut_));
2506                         pDiag->ArrayStartIdx = pDiag->ArrayCurIdx = 0;
2507                         pDiag->inited = 1;
2508                 }
2509                 else
2510                 {
2511                         // Tx
2512                         pDiag->TxFailCnt[ArrayCurIdx] = TxStaCnt0.field.TxFailCount;
2513                         pDiag->TxAggCnt[ArrayCurIdx] = TxAggCnt.field.AggTxCount;
2514                         pDiag->TxNonAggCnt[ArrayCurIdx] = TxAggCnt.field.NonAggTxCount;
2515                         pDiag->TxAMPDUCnt[ArrayCurIdx][0] = TxAggCnt0.field.AggSize1Count;
2516                         pDiag->TxAMPDUCnt[ArrayCurIdx][1] = TxAggCnt0.field.AggSize2Count;
2517                         pDiag->TxAMPDUCnt[ArrayCurIdx][2] = TxAggCnt1.field.AggSize3Count;
2518                         pDiag->TxAMPDUCnt[ArrayCurIdx][3] = TxAggCnt1.field.AggSize4Count;
2519                         pDiag->TxAMPDUCnt[ArrayCurIdx][4] = TxAggCnt2.field.AggSize5Count;
2520                         pDiag->TxAMPDUCnt[ArrayCurIdx][5] = TxAggCnt2.field.AggSize6Count;
2521                         pDiag->TxAMPDUCnt[ArrayCurIdx][6] = TxAggCnt3.field.AggSize7Count;
2522                         pDiag->TxAMPDUCnt[ArrayCurIdx][7] = TxAggCnt3.field.AggSize8Count;
2523                         pDiag->TxAMPDUCnt[ArrayCurIdx][8] = TxAggCnt4.field.AggSize9Count;
2524                         pDiag->TxAMPDUCnt[ArrayCurIdx][9] = TxAggCnt4.field.AggSize10Count;
2525                         pDiag->TxAMPDUCnt[ArrayCurIdx][10] = TxAggCnt5.field.AggSize11Count;
2526                         pDiag->TxAMPDUCnt[ArrayCurIdx][11] = TxAggCnt5.field.AggSize12Count;
2527                         pDiag->TxAMPDUCnt[ArrayCurIdx][12] = TxAggCnt6.field.AggSize13Count;
2528                         pDiag->TxAMPDUCnt[ArrayCurIdx][13] = TxAggCnt6.field.AggSize14Count;
2529                         pDiag->TxAMPDUCnt[ArrayCurIdx][14] = TxAggCnt7.field.AggSize15Count;
2530                         pDiag->TxAMPDUCnt[ArrayCurIdx][15] = TxAggCnt7.field.AggSize16Count;
2531
2532                         pDiag->RxCrcErrCnt[ArrayCurIdx] = RxStaCnt0.field.CrcErr;
2533
2534                         INC_RING_INDEX(pDiag->ArrayCurIdx,  DIAGNOSE_TIME);
2535                         ArrayCurIdx = pDiag->ArrayCurIdx;
2536                         for (i =0; i < 9; i++)
2537                         {
2538                                 pDiag->TxDescCnt[ArrayCurIdx][i]= 0;
2539                                 pDiag->TxSWQueCnt[ArrayCurIdx][i] =0;
2540                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2541                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2542                         }
2543                         pDiag->TxDataCnt[ArrayCurIdx] = 0;
2544                         pDiag->TxFailCnt[ArrayCurIdx] = 0;
2545                         pDiag->RxDataCnt[ArrayCurIdx] = 0;
2546                         pDiag->RxCrcErrCnt[ArrayCurIdx]  = 0;
2547                         for (i = 9; i < 24; i++) // 3*3
2548                         {
2549                                 pDiag->TxDescCnt[ArrayCurIdx][i] = 0;
2550                                 pDiag->TxMcsCnt[ArrayCurIdx][i] = 0;
2551                                 pDiag->RxMcsCnt[ArrayCurIdx][i] = 0;
2552 }
2553
2554                         if (pDiag->ArrayCurIdx == pDiag->ArrayStartIdx)
2555                                 INC_RING_INDEX(pDiag->ArrayStartIdx,  DIAGNOSE_TIME);
2556                 }
2557
2558         }
2559 #endif // DBG_DIAGNOSE //
2560
2561
2562 }
2563
2564
2565 /*
2566         ========================================================================
2567
2568         Routine Description:
2569                 Reset NIC from error
2570
2571         Arguments:
2572                 Adapter                                         Pointer to our adapter
2573
2574         Return Value:
2575                 None
2576
2577         IRQL = PASSIVE_LEVEL
2578
2579         Note:
2580                 Reset NIC from error state
2581
2582         ========================================================================
2583 */
2584 VOID    NICResetFromError(
2585         IN      PRTMP_ADAPTER   pAd)
2586 {
2587         // Reset BBP (according to alex, reset ASIC will force reset BBP
2588         // Therefore, skip the reset BBP
2589         // RTMP_IO_WRITE32(pAd, MAC_CSR1, 0x2);
2590
2591         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x1);
2592         // Remove ASIC from reset state
2593         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0x0);
2594
2595         NICInitializeAdapter(pAd, FALSE);
2596         NICInitAsicFromEEPROM(pAd);
2597
2598         // Switch to current channel, since during reset process, the connection should remains on.
2599         AsicSwitchChannel(pAd, pAd->CommonCfg.CentralChannel, FALSE);
2600         AsicLockChannel(pAd, pAd->CommonCfg.CentralChannel);
2601 }
2602
2603 /*
2604         ========================================================================
2605
2606         Routine Description:
2607                 erase 8051 firmware image in MAC ASIC
2608
2609         Arguments:
2610                 Adapter                                         Pointer to our adapter
2611
2612         IRQL = PASSIVE_LEVEL
2613
2614         ========================================================================
2615 */
2616 VOID NICEraseFirmware(
2617         IN PRTMP_ADAPTER pAd)
2618 {
2619         ULONG i;
2620
2621         for(i=0; i<MAX_FIRMWARE_IMAGE_SIZE; i+=4)
2622                 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, 0);
2623
2624 }/* End of NICEraseFirmware */
2625
2626 /*
2627         ========================================================================
2628
2629         Routine Description:
2630                 Load 8051 firmware RT2561.BIN file into MAC ASIC
2631
2632         Arguments:
2633                 Adapter                                         Pointer to our adapter
2634
2635         Return Value:
2636                 NDIS_STATUS_SUCCESS         firmware image load ok
2637                 NDIS_STATUS_FAILURE         image not found
2638
2639         IRQL = PASSIVE_LEVEL
2640
2641         ========================================================================
2642 */
2643 NDIS_STATUS NICLoadFirmware(
2644         IN PRTMP_ADAPTER pAd)
2645 {
2646 #ifdef BIN_IN_FILE
2647 #define NICLF_DEFAULT_USE()     \
2648         flg_default_firm_use = TRUE; \
2649         printk("%s - Use default firmware!\n", __func__);
2650
2651         NDIS_STATUS             Status = NDIS_STATUS_SUCCESS;
2652         PUCHAR                  src;
2653         struct file             *srcf;
2654         INT                     retval, orgfsuid, orgfsgid, i;
2655         mm_segment_t    orgfs;
2656         PUCHAR                  pFirmwareImage;
2657         UINT                    FileLength = 0;
2658         UINT32                  MacReg;
2659         ULONG                   Index;
2660         ULONG                   firm;
2661         BOOLEAN                 flg_default_firm_use = FALSE;
2662
2663
2664         DBGPRINT(RT_DEBUG_TRACE, ("===> %s\n", __func__));
2665
2666         /* init */
2667         pFirmwareImage = NULL;
2668         src = RTMP_FIRMWARE_FILE_NAME;
2669
2670         /* save uid and gid used for filesystem access.
2671            set user and group to 0 (root) */
2672         orgfsuid = current->fsuid;
2673         orgfsgid = current->fsgid;
2674         current->fsuid = current->fsgid = 0;
2675     orgfs = get_fs();
2676     set_fs(KERNEL_DS);
2677
2678         pAd->FirmwareVersion = (FIRMWARE_MAJOR_VERSION << 8) + \
2679                                                    FIRMWARE_MINOR_VERSION;
2680
2681
2682         /* allocate firmware buffer */
2683     pFirmwareImage = kmalloc(MAX_FIRMWARE_IMAGE_SIZE, MEM_ALLOC_FLAG);
2684     if (pFirmwareImage == NULL)
2685         {
2686                 /* allocate fail, use default firmware array in firmware.h */
2687                 printk("%s - Allocate memory fail!\n", __func__);
2688                 NICLF_DEFAULT_USE();
2689     }
2690         else
2691         {
2692                 /* allocate ok! zero the firmware buffer */
2693                 memset(pFirmwareImage, 0x00, MAX_FIRMWARE_IMAGE_SIZE);
2694         } /* End of if */
2695
2696
2697         /* if ok, read firmware file from *.bin file */
2698         if (flg_default_firm_use == FALSE)
2699         {
2700                 do
2701                 {
2702                         /* open the bin file */
2703                         srcf = filp_open(src, O_RDONLY, 0);
2704
2705                         if (IS_ERR(srcf))
2706                         {
2707                                 printk("%s - Error %ld opening %s\n",
2708                                            __func__, -PTR_ERR(srcf), src);
2709                                 NICLF_DEFAULT_USE();
2710                                 break;
2711                         } /* End of if */
2712
2713                         /* the object must have a read method */
2714                         if ((srcf->f_op == NULL) || (srcf->f_op->read == NULL))
2715                         {
2716                                 printk("%s - %s does not have a write method\n", __func__, src);
2717                                 NICLF_DEFAULT_USE();
2718                                 break;
2719                         } /* End of if */
2720
2721                         /* read the firmware from the file *.bin */
2722                         FileLength = srcf->f_op->read(srcf,
2723                                                                                   pFirmwareImage,
2724                                                                                   MAX_FIRMWARE_IMAGE_SIZE,
2725                                                                                   &srcf->f_pos);
2726
2727                         if (FileLength != MAX_FIRMWARE_IMAGE_SIZE)
2728                         {
2729                                 printk("%s: error file length (=%d) in RT2860AP.BIN\n",
2730                                            __func__, FileLength);
2731                                 NICLF_DEFAULT_USE();
2732                                 break;
2733                         }
2734                         else
2735                         {
2736                                 PUCHAR ptr = pFirmwareImage;
2737                                 USHORT crc = 0xffff;
2738
2739
2740                                 /* calculate firmware CRC */
2741                                 for(i=0; i<(MAX_FIRMWARE_IMAGE_SIZE-2); i++, ptr++)
2742                                         crc = ByteCRC16(bitrev8(*ptr), crc);
2743                                 /* End of for */
2744
2745                                 if ((pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-2] != \
2746                                                                 (UCHAR)bitrev8((UCHAR)(crc>>8))) ||
2747                                         (pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-1] != \
2748                                                                 (UCHAR)bitrev8((UCHAR)crc)))
2749                                 {
2750                                         /* CRC fail */
2751                                         printk("%s: CRC = 0x%02x 0x%02x "
2752                                                    "error, should be 0x%02x 0x%02x\n",
2753                                                    __func__,
2754                                                    pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-2],
2755                                                    pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-1],
2756                                                    (UCHAR)(crc>>8), (UCHAR)(crc));
2757                                         NICLF_DEFAULT_USE();
2758                                         break;
2759                                 }
2760                                 else
2761                                 {
2762                                         /* firmware is ok */
2763                                         pAd->FirmwareVersion = \
2764                                                 (pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-4] << 8) +
2765                                                 pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-3];
2766
2767                                         /* check if firmware version of the file is too old */
2768                                         if ((pAd->FirmwareVersion) < \
2769                                                                                         ((FIRMWARE_MAJOR_VERSION << 8) +
2770                                                                                          FIRMWARE_MINOR_VERSION))
2771                                         {
2772                                                 printk("%s: firmware version too old!\n", __func__);
2773                                                 NICLF_DEFAULT_USE();
2774                                                 break;
2775                                         } /* End of if */
2776                                 } /* End of if */
2777
2778                                 DBGPRINT(RT_DEBUG_TRACE,
2779                                                  ("NICLoadFirmware: CRC ok, ver=%d.%d\n",
2780                                                   pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-4],
2781                                                   pFirmwareImage[MAX_FIRMWARE_IMAGE_SIZE-3]));
2782                         } /* End of if (FileLength == MAX_FIRMWARE_IMAGE_SIZE) */
2783                         break;
2784                 } while(TRUE);
2785
2786                 /* close firmware file */
2787                 if (IS_ERR(srcf))
2788                         ;
2789                 else
2790                 {
2791                         retval = filp_close(srcf, NULL);
2792                         if (retval)
2793                         {
2794                                 DBGPRINT(RT_DEBUG_ERROR,
2795                                                  ("--> Error %d closing %s\n", -retval, src));
2796                         } /* End of if */
2797                 } /* End of if */
2798         } /* End of if */
2799
2800
2801         /* write firmware to ASIC */
2802         if (flg_default_firm_use == TRUE)
2803         {
2804                 /* use default fimeware, free allocated buffer */
2805                 if (pFirmwareImage != NULL)
2806                         kfree(pFirmwareImage);
2807                 /* End of if */
2808
2809                 /* use default *.bin array */
2810                 pFirmwareImage = FirmwareImage;
2811                 FileLength = sizeof(FirmwareImage);
2812         } /* End of if */
2813
2814         /* enable Host program ram write selection */
2815         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x10000);
2816
2817         for(i=0; i<FileLength; i+=4)
2818         {
2819                 firm = pFirmwareImage[i] +
2820                            (pFirmwareImage[i+3] << 24) +
2821                            (pFirmwareImage[i+2] << 16) +
2822                            (pFirmwareImage[i+1] << 8);
2823
2824                 RTMP_IO_WRITE32(pAd, FIRMWARE_IMAGE_BASE + i, firm);
2825         } /* End of for */
2826
2827         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x00000);
2828         RTMP_IO_WRITE32(pAd, PBF_SYS_CTRL, 0x00001);
2829
2830         /* initialize BBP R/W access agent */
2831         RTMP_IO_WRITE32(pAd, H2M_BBP_AGENT, 0);
2832         RTMP_IO_WRITE32(pAd, H2M_MAILBOX_CSR, 0);
2833
2834         if (flg_default_firm_use == FALSE)
2835         {
2836                 /* use file firmware, free allocated buffer */
2837                 if (pFirmwareImage != NULL)
2838                         kfree(pFirmwareImage);
2839                 /* End of if */
2840         } /* End of if */
2841
2842         set_fs(orgfs);
2843         current->fsuid = orgfsuid;
2844         current->fsgid = orgfsgid;
2845 #else
2846
2847         NDIS_STATUS             Status = NDIS_STATUS_SUCCESS;
2848         PUCHAR                  pFirmwareImage;
2849         ULONG                   FileLength, Index;
2850         //ULONG                 firm;
2851         UINT32                  MacReg = 0;
2852
2853         pFirmwareImage = FirmwareImage;
2854         FileLength = sizeof(FirmwareImage);
2855         RT28XX_WRITE_FIRMWARE(pAd, pFirmwareImage, FileLength);
2856 #endif
2857
2858         /* check if MCU is ready */
2859         Index = 0;
2860         do
2861         {
2862                 RTMP_IO_READ32(pAd, PBF_SYS_CTRL, &MacReg);
2863
2864                 if (MacReg & 0x80)
2865                         break;
2866
2867                 RTMPusecDelay(1000);
2868         } while (Index++ < 1000);
2869
2870     if (Index >= 1000)
2871         {
2872                 Status = NDIS_STATUS_FAILURE;
2873                 DBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware: MCU is not ready\n\n\n"));
2874         } /* End of if */
2875
2876     DBGPRINT(RT_DEBUG_TRACE,
2877                          ("<=== %s (status=%d)\n", __func__, Status));
2878     return Status;
2879 } /* End of NICLoadFirmware */
2880
2881
2882 /*
2883         ========================================================================
2884
2885         Routine Description:
2886                 Load Tx rate switching parameters
2887
2888         Arguments:
2889                 Adapter                                         Pointer to our adapter
2890
2891         Return Value:
2892                 NDIS_STATUS_SUCCESS         firmware image load ok
2893                 NDIS_STATUS_FAILURE         image not found
2894
2895         IRQL = PASSIVE_LEVEL
2896
2897         Rate Table Format:
2898                 1. (B0: Valid Item number) (B1:Initial item from zero)
2899                 2. Item Number(Dec)      Mode(Hex)     Current MCS(Dec)    TrainUp(Dec)    TrainDown(Dec)
2900
2901         ========================================================================
2902 */
2903 NDIS_STATUS NICLoadRateSwitchingParams(
2904         IN PRTMP_ADAPTER pAd)
2905 {
2906         return NDIS_STATUS_SUCCESS;
2907 }
2908
2909 /*
2910         ========================================================================
2911
2912         Routine Description:
2913                 if  pSrc1 all zero with length Length, return 0.
2914                 If not all zero, return 1
2915
2916         Arguments:
2917                 pSrc1
2918
2919         Return Value:
2920                 1:                      not all zero
2921                 0:                      all zero
2922
2923         IRQL = DISPATCH_LEVEL
2924
2925         Note:
2926
2927         ========================================================================
2928 */
2929 ULONG   RTMPNotAllZero(
2930         IN      PVOID   pSrc1,
2931         IN      ULONG   Length)
2932 {
2933         PUCHAR  pMem1;
2934         ULONG   Index = 0;
2935
2936         pMem1 = (PUCHAR) pSrc1;
2937
2938         for (Index = 0; Index < Length; Index++)
2939         {
2940                 if (pMem1[Index] != 0x0)
2941                 {
2942                         break;
2943                 }
2944         }
2945
2946         if (Index == Length)
2947         {
2948                 return (0);
2949         }
2950         else
2951         {
2952                 return (1);
2953         }
2954 }
2955
2956 /*
2957         ========================================================================
2958
2959         Routine Description:
2960                 Compare two memory block
2961
2962         Arguments:
2963                 pSrc1           Pointer to first memory address
2964                 pSrc2           Pointer to second memory address
2965
2966         Return Value:
2967                 0:                      memory is equal
2968                 1:                      pSrc1 memory is larger
2969                 2:                      pSrc2 memory is larger
2970
2971         IRQL = DISPATCH_LEVEL
2972
2973         Note:
2974
2975         ========================================================================
2976 */
2977 ULONG   RTMPCompareMemory(
2978         IN      PVOID   pSrc1,
2979         IN      PVOID   pSrc2,
2980         IN      ULONG   Length)
2981 {
2982         PUCHAR  pMem1;
2983         PUCHAR  pMem2;
2984         ULONG   Index = 0;
2985
2986         pMem1 = (PUCHAR) pSrc1;
2987         pMem2 = (PUCHAR) pSrc2;
2988
2989         for (Index = 0; Index < Length; Index++)
2990         {
2991                 if (pMem1[Index] > pMem2[Index])
2992                         return (1);
2993                 else if (pMem1[Index] < pMem2[Index])
2994                         return (2);
2995         }
2996
2997         // Equal
2998         return (0);
2999 }
3000
3001 /*
3002         ========================================================================
3003
3004         Routine Description:
3005                 Zero out memory block
3006
3007         Arguments:
3008                 pSrc1           Pointer to memory address
3009                 Length          Size
3010
3011         Return Value:
3012                 None
3013
3014         IRQL = PASSIVE_LEVEL
3015         IRQL = DISPATCH_LEVEL
3016
3017         Note:
3018
3019         ========================================================================
3020 */
3021 VOID    RTMPZeroMemory(
3022         IN      PVOID   pSrc,
3023         IN      ULONG   Length)
3024 {
3025         PUCHAR  pMem;
3026         ULONG   Index = 0;
3027
3028         pMem = (PUCHAR) pSrc;
3029
3030         for (Index = 0; Index < Length; Index++)
3031         {
3032                 pMem[Index] = 0x00;
3033         }
3034 }
3035
3036 VOID    RTMPFillMemory(
3037         IN      PVOID   pSrc,
3038         IN      ULONG   Length,
3039         IN      UCHAR   Fill)
3040 {
3041         PUCHAR  pMem;
3042         ULONG   Index = 0;
3043
3044         pMem = (PUCHAR) pSrc;
3045
3046         for (Index = 0; Index < Length; Index++)
3047         {
3048                 pMem[Index] = Fill;
3049         }
3050 }
3051
3052 /*
3053         ========================================================================
3054
3055         Routine Description:
3056                 Copy data from memory block 1 to memory block 2
3057
3058         Arguments:
3059                 pDest           Pointer to destination memory address
3060                 pSrc            Pointer to source memory address
3061                 Length          Copy size
3062
3063         Return Value:
3064                 None
3065
3066         IRQL = PASSIVE_LEVEL
3067         IRQL = DISPATCH_LEVEL
3068
3069         Note:
3070
3071         ========================================================================
3072 */
3073 VOID    RTMPMoveMemory(
3074         OUT     PVOID   pDest,
3075         IN      PVOID   pSrc,
3076         IN      ULONG   Length)
3077 {
3078         PUCHAR  pMem1;
3079         PUCHAR  pMem2;
3080         UINT    Index;
3081
3082         ASSERT((Length==0) || (pDest && pSrc));
3083
3084         pMem1 = (PUCHAR) pDest;
3085         pMem2 = (PUCHAR) pSrc;
3086
3087         for (Index = 0; Index < Length; Index++)
3088         {
3089                 pMem1[Index] = pMem2[Index];
3090         }
3091 }
3092
3093 /*
3094         ========================================================================
3095
3096         Routine Description:
3097                 Initialize port configuration structure
3098
3099         Arguments:
3100                 Adapter                                         Pointer to our adapter
3101
3102         Return Value:
3103                 None
3104
3105         IRQL = PASSIVE_LEVEL
3106
3107         Note:
3108
3109         ========================================================================
3110 */
3111 VOID    UserCfgInit(
3112         IN      PRTMP_ADAPTER pAd)
3113 {
3114     UINT key_index, bss_index;
3115
3116         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit\n"));
3117
3118         //
3119         //  part I. intialize common configuration
3120         //
3121
3122         for(key_index=0; key_index<SHARE_KEY_NUM; key_index++)
3123         {
3124                 for(bss_index = 0; bss_index < MAX_MBSSID_NUM; bss_index++)
3125                 {
3126                         pAd->SharedKey[bss_index][key_index].KeyLen = 0;
3127                         pAd->SharedKey[bss_index][key_index].CipherAlg = CIPHER_NONE;
3128                 }
3129         }
3130
3131         pAd->Antenna.word = 0;
3132         pAd->CommonCfg.BBPCurrentBW = BW_20;
3133
3134         pAd->LedCntl.word = 0;
3135         pAd->LedIndicatorStregth = 0;
3136         pAd->RLnkCtrlOffset = 0;
3137         pAd->HostLnkCtrlOffset = 0;
3138         pAd->CheckDmaBusyCount = 0;
3139
3140         pAd->bAutoTxAgcA = FALSE;                       // Default is OFF
3141         pAd->bAutoTxAgcG = FALSE;                       // Default is OFF
3142         pAd->RfIcType = RFIC_2820;
3143
3144         // Init timer for reset complete event
3145         pAd->CommonCfg.CentralChannel = 1;
3146         pAd->bForcePrintTX = FALSE;
3147         pAd->bForcePrintRX = FALSE;
3148         pAd->bStaFifoTest = FALSE;
3149         pAd->bProtectionTest = FALSE;
3150         pAd->bHCCATest = FALSE;
3151         pAd->bGenOneHCCA = FALSE;
3152         pAd->CommonCfg.Dsifs = 10;      // in units of usec
3153         pAd->CommonCfg.TxPower = 100; //mW
3154         pAd->CommonCfg.TxPowerPercentage = 0xffffffff; // AUTO
3155         pAd->CommonCfg.TxPowerDefault = 0xffffffff; // AUTO
3156         pAd->CommonCfg.TxPreamble = Rt802_11PreambleAuto; // use Long preamble on TX by defaut
3157         pAd->CommonCfg.bUseZeroToDisableFragment = FALSE;
3158         pAd->CommonCfg.RtsThreshold = 2347;
3159         pAd->CommonCfg.FragmentThreshold = 2346;
3160         pAd->CommonCfg.UseBGProtection = 0;    // 0: AUTO
3161         pAd->CommonCfg.bEnableTxBurst = TRUE; //0;
3162         pAd->CommonCfg.PhyMode = 0xff;     // unknown
3163         pAd->CommonCfg.BandState = UNKNOWN_BAND;
3164         pAd->CommonCfg.RadarDetect.CSPeriod = 10;
3165         pAd->CommonCfg.RadarDetect.CSCount = 0;
3166         pAd->CommonCfg.RadarDetect.RDMode = RD_NORMAL_MODE;
3167         pAd->CommonCfg.RadarDetect.ChMovingTime = 65;
3168         pAd->CommonCfg.RadarDetect.LongPulseRadarTh = 3;
3169         pAd->CommonCfg.bAPSDCapable = FALSE;
3170         pAd->CommonCfg.bNeedSendTriggerFrame = FALSE;
3171         pAd->CommonCfg.TriggerTimerCount = 0;
3172         pAd->CommonCfg.bAPSDForcePowerSave = FALSE;
3173         pAd->CommonCfg.bCountryFlag = FALSE;
3174         pAd->CommonCfg.TxStream = 0;
3175         pAd->CommonCfg.RxStream = 0;
3176
3177         NdisZeroMemory(&pAd->BeaconTxWI, sizeof(pAd->BeaconTxWI));
3178
3179 #ifdef DOT11_N_SUPPORT
3180         NdisZeroMemory(&pAd->CommonCfg.HtCapability, sizeof(pAd->CommonCfg.HtCapability));
3181         pAd->HTCEnable = FALSE;
3182         pAd->bBroadComHT = FALSE;
3183         pAd->CommonCfg.bRdg = FALSE;
3184
3185 #ifdef DOT11N_DRAFT3
3186         pAd->CommonCfg.Dot11OBssScanPassiveDwell = dot11OBSSScanPassiveDwell;   // Unit : TU. 5~1000
3187         pAd->CommonCfg.Dot11OBssScanActiveDwell = dot11OBSSScanActiveDwell;     // Unit : TU. 10~1000
3188         pAd->CommonCfg.Dot11BssWidthTriggerScanInt = dot11BSSWidthTriggerScanInterval;  // Unit : Second
3189         pAd->CommonCfg.Dot11OBssScanPassiveTotalPerChannel = dot11OBSSScanPassiveTotalPerChannel;       // Unit : TU. 200~10000
3190         pAd->CommonCfg.Dot11OBssScanActiveTotalPerChannel = dot11OBSSScanActiveTotalPerChannel; // Unit : TU. 20~10000
3191         pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor = dot11BSSWidthChannelTransactionDelayFactor;
3192         pAd->CommonCfg.Dot11OBssScanActivityThre = dot11BSSScanActivityThreshold;       // Unit : percentage
3193         pAd->CommonCfg.Dot11BssWidthChanTranDelay = (pAd->CommonCfg.Dot11BssWidthTriggerScanInt * pAd->CommonCfg.Dot11BssWidthChanTranDelayFactor);
3194 #endif  // DOT11N_DRAFT3 //
3195
3196         NdisZeroMemory(&pAd->CommonCfg.AddHTInfo, sizeof(pAd->CommonCfg.AddHTInfo));
3197         pAd->CommonCfg.BACapability.field.MMPSmode = MMPS_ENABLE;
3198         pAd->CommonCfg.BACapability.field.MpduDensity = 0;
3199         pAd->CommonCfg.BACapability.field.Policy = IMMED_BA;
3200         pAd->CommonCfg.BACapability.field.RxBAWinLimit = 64; //32;
3201         pAd->CommonCfg.BACapability.field.TxBAWinLimit = 64; //32;
3202         DBGPRINT(RT_DEBUG_TRACE, ("--> UserCfgInit. BACapability = 0x%x\n", pAd->CommonCfg.BACapability.word));
3203
3204         pAd->CommonCfg.BACapability.field.AutoBA = FALSE;
3205         BATableInit(pAd, &pAd->BATable);
3206
3207         pAd->CommonCfg.bExtChannelSwitchAnnouncement = 1;
3208         pAd->CommonCfg.bHTProtect = 1;
3209         pAd->CommonCfg.bMIMOPSEnable = TRUE;
3210         pAd->CommonCfg.bBADecline = FALSE;
3211         pAd->CommonCfg.bDisableReordering = FALSE;
3212
3213         pAd->CommonCfg.TxBASize = 7;
3214
3215         pAd->CommonCfg.REGBACapability.word = pAd->CommonCfg.BACapability.word;
3216 #endif // DOT11_N_SUPPORT //
3217
3218         //pAd->CommonCfg.HTPhyMode.field.BW = BW_20;
3219         //pAd->CommonCfg.HTPhyMode.field.MCS = MCS_AUTO;
3220         //pAd->CommonCfg.HTPhyMode.field.ShortGI = GI_800;
3221         //pAd->CommonCfg.HTPhyMode.field.STBC = STBC_NONE;
3222         pAd->CommonCfg.TxRate = RATE_6;
3223
3224         pAd->CommonCfg.MlmeTransmit.field.MCS = MCS_RATE_6;
3225         pAd->CommonCfg.MlmeTransmit.field.BW = BW_20;
3226         pAd->CommonCfg.MlmeTransmit.field.MODE = MODE_OFDM;
3227
3228         pAd->CommonCfg.BeaconPeriod = 100;     // in mSec
3229
3230         //
3231         // part II. intialize STA specific configuration
3232         //
3233 #ifdef CONFIG_STA_SUPPORT
3234         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3235         {
3236                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_DIRECT);
3237                 RX_FILTER_CLEAR_FLAG(pAd, fRX_FILTER_ACCEPT_MULTICAST);
3238                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_BROADCAST);
3239                 RX_FILTER_SET_FLAG(pAd, fRX_FILTER_ACCEPT_ALL_MULTICAST);
3240
3241                 pAd->StaCfg.Psm = PWR_ACTIVE;
3242
3243                 pAd->StaCfg.OrigWepStatus = Ndis802_11EncryptionDisabled;
3244                 pAd->StaCfg.PairCipher = Ndis802_11EncryptionDisabled;
3245                 pAd->StaCfg.GroupCipher = Ndis802_11EncryptionDisabled;
3246                 pAd->StaCfg.bMixCipher = FALSE;
3247                 pAd->StaCfg.DefaultKeyId = 0;
3248
3249                 // 802.1x port control
3250                 pAd->StaCfg.PrivacyFilter = Ndis802_11PrivFilter8021xWEP;
3251                 pAd->StaCfg.PortSecured = WPA_802_1X_PORT_NOT_SECURED;
3252                 pAd->StaCfg.LastMicErrorTime = 0;
3253                 pAd->StaCfg.MicErrCnt        = 0;
3254                 pAd->StaCfg.bBlockAssoc      = FALSE;
3255                 pAd->StaCfg.WpaState         = SS_NOTUSE;
3256
3257                 pAd->CommonCfg.NdisRadioStateOff = FALSE;               // New to support microsoft disable radio with OID command
3258
3259                 pAd->StaCfg.RssiTrigger = 0;
3260                 NdisZeroMemory(&pAd->StaCfg.RssiSample, sizeof(RSSI_SAMPLE));
3261                 pAd->StaCfg.RssiTriggerMode = RSSI_TRIGGERED_UPON_BELOW_THRESHOLD;
3262                 pAd->StaCfg.AtimWin = 0;
3263                 pAd->StaCfg.DefaultListenCount = 3;//default listen count;
3264                 pAd->StaCfg.BssType = BSS_INFRA;  // BSS_INFRA or BSS_ADHOC or BSS_MONITOR
3265                 pAd->StaCfg.bScanReqIsFromWebUI = FALSE;
3266                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_DOZE);
3267                 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_WAKEUP_NOW);
3268
3269                 pAd->StaCfg.bAutoTxRateSwitch = TRUE;
3270                 pAd->StaCfg.DesiredTransmitSetting.field.MCS = MCS_AUTO;
3271         }
3272
3273 #ifdef EXT_BUILD_CHANNEL_LIST
3274         pAd->StaCfg.IEEE80211dClientMode = Rt802_11_D_None;
3275 #endif // EXT_BUILD_CHANNEL_LIST //
3276 #endif // CONFIG_STA_SUPPORT //
3277
3278         // global variables mXXXX used in MAC protocol state machines
3279         OPSTATUS_SET_FLAG(pAd, fOP_STATUS_RECEIVE_DTIM);
3280         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_ADHOC_ON);
3281         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_INFRA_ON);
3282
3283         // PHY specification
3284         pAd->CommonCfg.PhyMode = PHY_11BG_MIXED;                // default PHY mode
3285         OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);  // CCK use LONG preamble
3286
3287 #ifdef CONFIG_STA_SUPPORT
3288         IF_DEV_CONFIG_OPMODE_ON_STA(pAd)
3289         {
3290                 // user desired power mode
3291                 pAd->StaCfg.WindowsPowerMode = Ndis802_11PowerModeCAM;
3292                 pAd->StaCfg.WindowsBatteryPowerMode = Ndis802_11PowerModeCAM;
3293                 pAd->StaCfg.bWindowsACCAMEnable = FALSE;
3294
3295 #ifdef LEAP_SUPPORT
3296                 // CCX v1.0 releated init value
3297                 RTMPInitTimer(pAd, &pAd->StaCfg.LeapAuthTimer, GET_TIMER_FUNCTION(LeapAuthTimeout), pAd, FALSE);
3298                 pAd->StaCfg.LeapAuthMode = CISCO_AuthModeLEAPNone;
3299                 pAd->StaCfg.bCkipOn = FALSE;
3300 #endif // LEAP_SUPPORT //
3301
3302                 RTMPInitTimer(pAd, &pAd->StaCfg.StaQuickResponeForRateUpTimer, GET_TIMER_FUNCTION(StaQuickResponeForRateUpExec), pAd, FALSE);
3303                 pAd->StaCfg.StaQuickResponeForRateUpTimerRunning = FALSE;
3304
3305                 // Patch for Ndtest
3306                 pAd->StaCfg.ScanCnt = 0;
3307
3308                 // CCX 2.0 control flag init
3309                 pAd->StaCfg.CCXEnable = FALSE;
3310                 pAd->StaCfg.CCXReqType = MSRN_TYPE_UNUSED;
3311                 pAd->StaCfg.CCXQosECWMin        = 4;
3312                 pAd->StaCfg.CCXQosECWMax        = 10;
3313
3314                 pAd->StaCfg.bHwRadio  = TRUE; // Default Hardware Radio status is On
3315                 pAd->StaCfg.bSwRadio  = TRUE; // Default Software Radio status is On
3316                 pAd->StaCfg.bRadio    = TRUE; // bHwRadio && bSwRadio
3317                 pAd->StaCfg.bHardwareRadio = FALSE;             // Default is OFF
3318                 pAd->StaCfg.bShowHiddenSSID = FALSE;            // Default no show
3319
3320                 // Nitro mode control
3321                 pAd->StaCfg.bAutoReconnect = TRUE;
3322
3323                 // Save the init time as last scan time, the system should do scan after 2 seconds.
3324                 // This patch is for driver wake up from standby mode, system will do scan right away.
3325                 pAd->StaCfg.LastScanTime = 0;
3326                 NdisZeroMemory(pAd->nickname, IW_ESSID_MAX_SIZE+1);
3327                 sprintf(pAd->nickname, "%s", STA_NIC_DEVICE_NAME);
3328                 RTMPInitTimer(pAd, &pAd->StaCfg.WpaDisassocAndBlockAssocTimer, GET_TIMER_FUNCTION(WpaDisassocApAndBlockAssoc), pAd, FALSE);
3329 #ifdef WPA_SUPPLICANT_SUPPORT
3330                 pAd->StaCfg.IEEE8021X = FALSE;
3331                 pAd->StaCfg.IEEE8021x_required_keys = FALSE;
3332                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_DISABLE;
3333 #ifdef NATIVE_WPA_SUPPLICANT_SUPPORT
3334                 pAd->StaCfg.WpaSupplicantUP = WPA_SUPPLICANT_ENABLE;
3335 #endif // NATIVE_WPA_SUPPLICANT_SUPPORT //
3336 #endif // WPA_SUPPLICANT_SUPPORT //
3337
3338         }
3339 #endif // CONFIG_STA_SUPPORT //
3340
3341         // Default for extra information is not valid
3342         pAd->ExtraInfo = EXTRA_INFO_CLEAR;
3343
3344         // Default Config change flag
3345         pAd->bConfigChanged = FALSE;
3346
3347         //
3348         // part III. AP configurations
3349         //
3350
3351
3352         //
3353         // part IV. others
3354         //
3355         // dynamic BBP R66:sensibity tuning to overcome background noise
3356         pAd->BbpTuning.bEnable                = TRUE;
3357         pAd->BbpTuning.FalseCcaLowerThreshold = 100;
3358         pAd->BbpTuning.FalseCcaUpperThreshold = 512;
3359         pAd->BbpTuning.R66Delta               = 4;
3360         pAd->Mlme.bEnableAutoAntennaCheck = TRUE;
3361
3362         //
3363         // Also initial R66CurrentValue, RTUSBResumeMsduTransmission might use this value.
3364         // if not initial this value, the default value will be 0.
3365         //
3366         pAd->BbpTuning.R66CurrentValue = 0x38;
3367
3368         pAd->Bbp94 = BBPR94_DEFAULT;
3369         pAd->BbpForCCK = FALSE;
3370
3371         // initialize MAC table and allocate spin lock
3372         NdisZeroMemory(&pAd->MacTab, sizeof(MAC_TABLE));
3373         InitializeQueueHeader(&pAd->MacTab.McastPsQueue);
3374         NdisAllocateSpinLock(&pAd->MacTabLock);
3375
3376 #ifdef RALINK_ATE
3377         NdisZeroMemory(&pAd->ate, sizeof(ATE_INFO));
3378         pAd->ate.Mode = ATE_STOP;
3379         pAd->ate.TxCount = 200;/* to exceed TX_RING_SIZE ... */
3380         pAd->ate.TxLength = 1024;
3381         pAd->ate.TxWI.ShortGI = 0;// LONG GI : 800 ns
3382         pAd->ate.TxWI.PHYMODE = MODE_CCK;
3383         pAd->ate.TxWI.MCS = 3;
3384         pAd->ate.TxWI.BW = BW_20;
3385         pAd->ate.Channel = 1;
3386         pAd->ate.QID = QID_AC_BE;
3387         pAd->ate.Addr1[0] = 0x00;
3388         pAd->ate.Addr1[1] = 0x11;
3389         pAd->ate.Addr1[2] = 0x22;
3390         pAd->ate.Addr1[3] = 0xAA;
3391         pAd->ate.Addr1[4] = 0xBB;
3392         pAd->ate.Addr1[5] = 0xCC;
3393         NdisMoveMemory(pAd->ate.Addr2, pAd->ate.Addr1, ETH_LENGTH_OF_ADDRESS);
3394         NdisMoveMemory(pAd->ate.Addr3, pAd->ate.Addr1, ETH_LENGTH_OF_ADDRESS);
3395         pAd->ate.bRxFer = 0;
3396         pAd->ate.bQATxStart = FALSE;
3397         pAd->ate.bQARxStart = FALSE;
3398         pAd->ate.bFWLoading = FALSE;
3399 #ifdef RALINK_28xx_QA
3400         //pAd->ate.Repeat = 0;
3401         pAd->ate.TxStatus = 0;
3402         pAd->ate.AtePid = THREAD_PID_INIT_VALUE;
3403 #endif // RALINK_28xx_QA //
3404 #endif // RALINK_ATE //
3405
3406
3407         pAd->CommonCfg.bWiFiTest = FALSE;
3408         pAd->bPCIclkOff = FALSE;
3409
3410         RTMP_SET_PSFLAG(pAd, fRTMP_PS_CAN_GO_SLEEP);
3411         DBGPRINT(RT_DEBUG_TRACE, ("<-- UserCfgInit\n"));
3412 }
3413
3414 // IRQL = PASSIVE_LEVEL
3415 UCHAR BtoH(char ch)
3416 {
3417         if (ch >= '0' && ch <= '9') return (ch - '0');        // Handle numerals
3418         if (ch >= 'A' && ch <= 'F') return (ch - 'A' + 0xA);  // Handle capitol hex digits
3419         if (ch >= 'a' && ch <= 'f') return (ch - 'a' + 0xA);  // Handle small hex digits
3420         return(255);
3421 }
3422
3423 //
3424 //  FUNCTION: AtoH(char *, UCHAR *, int)
3425 //
3426 //  PURPOSE:  Converts ascii string to network order hex
3427 //
3428 //  PARAMETERS:
3429 //    src    - pointer to input ascii string
3430 //    dest   - pointer to output hex
3431 //    destlen - size of dest
3432 //
3433 //  COMMENTS:
3434 //
3435 //    2 ascii bytes make a hex byte so must put 1st ascii byte of pair
3436 //    into upper nibble and 2nd ascii byte of pair into lower nibble.
3437 //
3438 // IRQL = PASSIVE_LEVEL
3439
3440 void AtoH(char * src, UCHAR * dest, int destlen)
3441 {
3442         char * srcptr;
3443         PUCHAR destTemp;
3444
3445         srcptr = src;
3446         destTemp = (PUCHAR) dest;
3447
3448         while(destlen--)
3449         {
3450                 *destTemp = BtoH(*srcptr++) << 4;    // Put 1st ascii byte in upper nibble.
3451                 *destTemp += BtoH(*srcptr++);      // Add 2nd ascii byte to above.
3452                 destTemp++;
3453         }
3454 }
3455
3456 VOID    RTMPPatchMacBbpBug(
3457         IN      PRTMP_ADAPTER   pAd)
3458 {
3459         ULONG   Index;
3460
3461         // Initialize BBP register to default value
3462         for (Index = 0; Index < NUM_BBP_REG_PARMS; Index++)
3463         {
3464                 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBPRegTable[Index].Register, (UCHAR)BBPRegTable[Index].Value);
3465         }
3466
3467         // Initialize RF register to default value
3468         AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
3469         AsicLockChannel(pAd, pAd->CommonCfg.Channel);
3470
3471         // Re-init BBP register from EEPROM value
3472         NICInitAsicFromEEPROM(pAd);
3473 }
3474
3475 /*
3476         ========================================================================
3477
3478         Routine Description:
3479                 Init timer objects
3480
3481         Arguments:
3482                 pAd                     Pointer to our adapter
3483                 pTimer                          Timer structure
3484                 pTimerFunc                      Function to execute when timer expired
3485                 Repeat                          Ture for period timer
3486
3487         Return Value:
3488                 None
3489
3490         Note:
3491
3492         ========================================================================
3493 */
3494 VOID    RTMPInitTimer(
3495         IN      PRTMP_ADAPTER                   pAd,
3496         IN      PRALINK_TIMER_STRUCT    pTimer,
3497         IN      PVOID                                   pTimerFunc,
3498         IN      PVOID                                   pData,
3499         IN      BOOLEAN                                 Repeat)
3500 {
3501         //
3502         // Set Valid to TRUE for later used.
3503         // It will crash if we cancel a timer or set a timer
3504         // that we haven't initialize before.
3505         //
3506         pTimer->Valid      = TRUE;
3507
3508         pTimer->PeriodicType = Repeat;
3509         pTimer->State      = FALSE;
3510         pTimer->cookie = (ULONG) pData;
3511
3512
3513         RTMP_OS_Init_Timer(pAd, &pTimer->TimerObj,      pTimerFunc, (PVOID) pTimer);
3514 }
3515
3516 /*
3517         ========================================================================
3518
3519         Routine Description:
3520                 Init timer objects
3521
3522         Arguments:
3523                 pTimer                          Timer structure
3524                 Value                           Timer value in milliseconds
3525
3526         Return Value:
3527                 None
3528
3529         Note:
3530                 To use this routine, must call RTMPInitTimer before.
3531
3532         ========================================================================
3533 */
3534 VOID    RTMPSetTimer(
3535         IN      PRALINK_TIMER_STRUCT    pTimer,
3536         IN      ULONG                                   Value)
3537 {
3538         if (pTimer->Valid)
3539         {
3540                 pTimer->TimerValue = Value;
3541                 pTimer->State      = FALSE;
3542                 if (pTimer->PeriodicType == TRUE)
3543                 {
3544                         pTimer->Repeat = TRUE;
3545                         RTMP_SetPeriodicTimer(&pTimer->TimerObj, Value);
3546                 }
3547                 else
3548                 {
3549                         pTimer->Repeat = FALSE;
3550                         RTMP_OS_Add_Timer(&pTimer->TimerObj, Value);
3551                 }
3552         }
3553         else
3554         {
3555                 DBGPRINT_ERR(("RTMPSetTimer failed, Timer hasn't been initialize!\n"));
3556         }
3557 }
3558
3559
3560 /*
3561         ========================================================================
3562
3563         Routine Description:
3564                 Init timer objects
3565
3566         Arguments:
3567                 pTimer                          Timer structure
3568                 Value                           Timer value in milliseconds
3569
3570         Return Value:
3571                 None
3572
3573         Note:
3574                 To use this routine, must call RTMPInitTimer before.
3575
3576         ========================================================================
3577 */
3578 VOID    RTMPModTimer(
3579         IN      PRALINK_TIMER_STRUCT    pTimer,
3580         IN      ULONG                                   Value)
3581 {
3582         BOOLEAN Cancel;
3583
3584         if (pTimer->Valid)
3585         {
3586                 pTimer->TimerValue = Value;
3587                 pTimer->State      = FALSE;
3588                 if (pTimer->PeriodicType == TRUE)
3589                 {
3590                         RTMPCancelTimer(pTimer, &Cancel);
3591                         RTMPSetTimer(pTimer, Value);
3592                 }
3593                 else
3594                 {
3595                         RTMP_OS_Mod_Timer(&pTimer->TimerObj, Value);
3596                 }
3597         }
3598         else
3599         {
3600                 DBGPRINT_ERR(("RTMPModTimer failed, Timer hasn't been initialize!\n"));
3601         }
3602 }
3603
3604 /*
3605         ========================================================================
3606
3607         Routine Description:
3608                 Cancel timer objects
3609
3610         Arguments:
3611                 Adapter                                         Pointer to our adapter
3612
3613         Return Value:
3614                 None
3615
3616         IRQL = PASSIVE_LEVEL
3617         IRQL = DISPATCH_LEVEL
3618
3619         Note:
3620                 1.) To use this routine, must call RTMPInitTimer before.
3621                 2.) Reset NIC to initial state AS IS system boot up time.
3622
3623         ========================================================================
3624 */
3625 VOID    RTMPCancelTimer(
3626         IN      PRALINK_TIMER_STRUCT    pTimer,
3627         OUT     BOOLEAN                                 *pCancelled)
3628 {
3629         if (pTimer->Valid)
3630         {
3631                 if (pTimer->State == FALSE)
3632                         pTimer->Repeat = FALSE;
3633                         RTMP_OS_Del_Timer(&pTimer->TimerObj, pCancelled);
3634
3635                 if (*pCancelled == TRUE)
3636                         pTimer->State = TRUE;
3637
3638         }
3639         else
3640         {
3641                 //
3642                 // NdisMCancelTimer just canced the timer and not mean release the timer.
3643                 // And don't set the "Valid" to False. So that we can use this timer again.
3644                 //
3645                 DBGPRINT_ERR(("RTMPCancelTimer failed, Timer hasn't been initialize!\n"));
3646         }
3647 }
3648
3649 /*
3650         ========================================================================
3651
3652         Routine Description:
3653                 Set LED Status
3654
3655         Arguments:
3656                 pAd                                             Pointer to our adapter
3657                 Status                                  LED Status
3658
3659         Return Value:
3660                 None
3661
3662         IRQL = PASSIVE_LEVEL
3663         IRQL = DISPATCH_LEVEL
3664
3665         Note:
3666
3667         ========================================================================
3668 */
3669 VOID RTMPSetLED(
3670         IN PRTMP_ADAPTER        pAd,
3671         IN UCHAR                        Status)
3672 {
3673         //ULONG                 data;
3674         UCHAR                   HighByte = 0;
3675         UCHAR                   LowByte;
3676
3677 // In ATE mode of RT2860 AP/STA, we have erased 8051 firmware.
3678 // So LED mode is not supported when ATE is running.
3679 #ifdef RALINK_ATE
3680         if (ATE_ON(pAd))
3681                 return;
3682 #endif // RALINK_ATE //
3683
3684         LowByte = pAd->LedCntl.field.LedMode&0x7f;
3685         switch (Status)
3686         {
3687                 case LED_LINK_DOWN:
3688                         HighByte = 0x20;
3689                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3690                         pAd->LedIndicatorStregth = 0;
3691                         break;
3692                 case LED_LINK_UP:
3693                         if (pAd->CommonCfg.Channel > 14)
3694                                 HighByte = 0xa0;
3695                         else
3696                                 HighByte = 0x60;
3697                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3698                         break;
3699                 case LED_RADIO_ON:
3700                         HighByte = 0x20;
3701                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3702                         break;
3703                 case LED_HALT:
3704                         LowByte = 0; // Driver sets MAC register and MAC controls LED
3705                 case LED_RADIO_OFF:
3706                         HighByte = 0;
3707                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3708                         break;
3709         case LED_WPS:
3710                         HighByte = 0x10;
3711                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3712                         break;
3713                 case LED_ON_SITE_SURVEY:
3714                         HighByte = 0x08;
3715                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3716                         break;
3717                 case LED_POWER_UP:
3718                         HighByte = 0x04;
3719                         AsicSendCommandToMcu(pAd, 0x50, 0xff, LowByte, HighByte);
3720                         break;
3721                 default:
3722                         DBGPRINT(RT_DEBUG_WARN, ("RTMPSetLED::Unknown Status %d\n", Status));
3723                         break;
3724         }
3725
3726     //
3727         // Keep LED status for LED SiteSurvey mode.
3728         // After SiteSurvey, we will set the LED mode to previous status.
3729         //
3730         if ((Status != LED_ON_SITE_SURVEY) && (Status != LED_POWER_UP))
3731                 pAd->LedStatus = Status;
3732
3733         DBGPRINT(RT_DEBUG_TRACE, ("RTMPSetLED::Mode=%d,HighByte=0x%02x,LowByte=0x%02x\n", pAd->LedCntl.field.LedMode, HighByte, LowByte));
3734 }
3735
3736 /*
3737         ========================================================================
3738
3739         Routine Description:
3740                 Set LED Signal Stregth
3741
3742         Arguments:
3743                 pAd                                             Pointer to our adapter
3744                 Dbm                                             Signal Stregth
3745
3746         Return Value:
3747                 None
3748
3749         IRQL = PASSIVE_LEVEL
3750
3751         Note:
3752                 Can be run on any IRQL level.
3753
3754                 According to Microsoft Zero Config Wireless Signal Stregth definition as belows.
3755                 <= -90  No Signal
3756                 <= -81  Very Low
3757                 <= -71  Low
3758                 <= -67  Good
3759                 <= -57  Very Good
3760                  > -57  Excellent
3761         ========================================================================
3762 */
3763 VOID RTMPSetSignalLED(
3764         IN PRTMP_ADAPTER        pAd,
3765         IN NDIS_802_11_RSSI Dbm)
3766 {
3767         UCHAR           nLed = 0;
3768
3769         //
3770         // if not Signal Stregth, then do nothing.
3771         //
3772         if (pAd->LedCntl.field.LedMode != LED_MODE_SIGNAL_STREGTH)
3773         {
3774                 return;
3775         }
3776
3777         if (Dbm <= -90)
3778                 nLed = 0;
3779         else if (Dbm <= -81)
3780                 nLed = 1;
3781         else if (Dbm <= -71)
3782                 nLed = 3;
3783         else if (Dbm <= -67)
3784                 nLed = 7;
3785         else if (Dbm <= -57)
3786                 nLed = 15;
3787         else
3788                 nLed = 31;
3789
3790         //
3791         // Update Signal Stregth to firmware if changed.
3792         //
3793         if (pAd->LedIndicatorStregth != nLed)
3794         {
3795                 AsicSendCommandToMcu(pAd, 0x51, 0xff, nLed, pAd->LedCntl.field.Polarity);
3796                 pAd->LedIndicatorStregth = nLed;
3797         }
3798 }
3799
3800 /*
3801         ========================================================================
3802
3803         Routine Description:
3804                 Enable RX
3805
3806         Arguments:
3807                 pAd                                             Pointer to our adapter
3808
3809         Return Value:
3810                 None
3811
3812         IRQL <= DISPATCH_LEVEL
3813
3814         Note:
3815                 Before Enable RX, make sure you have enabled Interrupt.
3816         ========================================================================
3817 */
3818 VOID RTMPEnableRxTx(
3819         IN PRTMP_ADAPTER        pAd)
3820 {
3821         DBGPRINT(RT_DEBUG_TRACE, ("==> RTMPEnableRxTx\n"));
3822
3823         // Enable Rx DMA.
3824         RT28XXDMAEnable(pAd);
3825
3826         // enable RX of MAC block
3827         if (pAd->OpMode == OPMODE_AP)
3828         {
3829                 UINT32 rx_filter_flag = APNORMAL;
3830
3831
3832                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, rx_filter_flag);     // enable RX of DMA block
3833         }
3834         else
3835         {
3836                 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL);     // Staion not drop control frame will fail WiFi Certification.
3837         }
3838
3839         RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, 0xc);
3840         DBGPRINT(RT_DEBUG_TRACE, ("<== RTMPEnableRxTx\n"));
3841 }
3842
3843