git.oblomov.eu Git - linux-2.6/blob - arch/powerpc/sysdev/qe_lib/ucc_fast.c

   1 /*
   2  * Copyright (C) 2006 Freescale Semicondutor, Inc. All rights reserved.
   3  *
   4  * Authors:     Shlomi Gridish <gridish@freescale.com>
   5  *              Li Yang <leoli@freescale.com>
   6  *
   7  * Description:
   8  * QE UCC Fast API Set - UCC Fast specific routines implementations.
   9  *
  10  * This program is free software; you can redistribute  it and/or modify it
  11  * under  the terms of  the GNU General  Public License as published by the
  12  * Free Software Foundation;  either version 2 of the  License, or (at your
  13  * option) any later version.
  14  */
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/errno.h>
  18 #include <linux/slab.h>
  19 #include <linux/stddef.h>
  20 #include <linux/interrupt.h>
  21 #include <linux/err.h>
  22 #include <linux/module.h>
  23
  24 #include <asm/io.h>
  25 #include <asm/immap_qe.h>
  26 #include <asm/qe.h>
  27
  28 #include <asm/ucc.h>
  29 #include <asm/ucc_fast.h>
  30
  31 void ucc_fast_dump_regs(struct ucc_fast_private * uccf)
  32 {
  33         printk(KERN_INFO "UCC%d Fast registers:", uccf->uf_info->ucc_num);
  34         printk(KERN_INFO "Base address: 0x%08x", (u32) uccf->uf_regs);
  35
  36         printk(KERN_INFO "gumr  : addr - 0x%08x, val - 0x%08x",
  37                   (u32) & uccf->uf_regs->gumr, in_be32(&uccf->uf_regs->gumr));
  38         printk(KERN_INFO "upsmr : addr - 0x%08x, val - 0x%08x",
  39                   (u32) & uccf->uf_regs->upsmr, in_be32(&uccf->uf_regs->upsmr));
  40         printk(KERN_INFO "utodr : addr - 0x%08x, val - 0x%04x",
  41                   (u32) & uccf->uf_regs->utodr, in_be16(&uccf->uf_regs->utodr));
  42         printk(KERN_INFO "udsr  : addr - 0x%08x, val - 0x%04x",
  43                   (u32) & uccf->uf_regs->udsr, in_be16(&uccf->uf_regs->udsr));
  44         printk(KERN_INFO "ucce  : addr - 0x%08x, val - 0x%08x",
  45                   (u32) & uccf->uf_regs->ucce, in_be32(&uccf->uf_regs->ucce));
  46         printk(KERN_INFO "uccm  : addr - 0x%08x, val - 0x%08x",
  47                   (u32) & uccf->uf_regs->uccm, in_be32(&uccf->uf_regs->uccm));
  48         printk(KERN_INFO "uccs  : addr - 0x%08x, val - 0x%02x",
  49                   (u32) & uccf->uf_regs->uccs, uccf->uf_regs->uccs);
  50         printk(KERN_INFO "urfb  : addr - 0x%08x, val - 0x%08x",
  51                   (u32) & uccf->uf_regs->urfb, in_be32(&uccf->uf_regs->urfb));
  52         printk(KERN_INFO "urfs  : addr - 0x%08x, val - 0x%04x",
  53                   (u32) & uccf->uf_regs->urfs, in_be16(&uccf->uf_regs->urfs));
  54         printk(KERN_INFO "urfet : addr - 0x%08x, val - 0x%04x",
  55                   (u32) & uccf->uf_regs->urfet, in_be16(&uccf->uf_regs->urfet));
  56         printk(KERN_INFO "urfset: addr - 0x%08x, val - 0x%04x",
  57                   (u32) & uccf->uf_regs->urfset,
  58                   in_be16(&uccf->uf_regs->urfset));
  59         printk(KERN_INFO "utfb  : addr - 0x%08x, val - 0x%08x",
  60                   (u32) & uccf->uf_regs->utfb, in_be32(&uccf->uf_regs->utfb));
  61         printk(KERN_INFO "utfs  : addr - 0x%08x, val - 0x%04x",
  62                   (u32) & uccf->uf_regs->utfs, in_be16(&uccf->uf_regs->utfs));
  63         printk(KERN_INFO "utfet : addr - 0x%08x, val - 0x%04x",
  64                   (u32) & uccf->uf_regs->utfet, in_be16(&uccf->uf_regs->utfet));
  65         printk(KERN_INFO "utftt : addr - 0x%08x, val - 0x%04x",
  66                   (u32) & uccf->uf_regs->utftt, in_be16(&uccf->uf_regs->utftt));
  67         printk(KERN_INFO "utpt  : addr - 0x%08x, val - 0x%04x",
  68                   (u32) & uccf->uf_regs->utpt, in_be16(&uccf->uf_regs->utpt));
  69         printk(KERN_INFO "urtry : addr - 0x%08x, val - 0x%08x",
  70                   (u32) & uccf->uf_regs->urtry, in_be32(&uccf->uf_regs->urtry));
  71         printk(KERN_INFO "guemr : addr - 0x%08x, val - 0x%02x",
  72                   (u32) & uccf->uf_regs->guemr, uccf->uf_regs->guemr);
  73 }
  74 EXPORT_SYMBOL(ucc_fast_dump_regs);
  75
  76 u32 ucc_fast_get_qe_cr_subblock(int uccf_num)
  77 {
  78         switch (uccf_num) {
  79         case 0: return QE_CR_SUBBLOCK_UCCFAST1;
  80         case 1: return QE_CR_SUBBLOCK_UCCFAST2;
  81         case 2: return QE_CR_SUBBLOCK_UCCFAST3;
  82         case 3: return QE_CR_SUBBLOCK_UCCFAST4;
  83         case 4: return QE_CR_SUBBLOCK_UCCFAST5;
  84         case 5: return QE_CR_SUBBLOCK_UCCFAST6;
  85         case 6: return QE_CR_SUBBLOCK_UCCFAST7;
  86         case 7: return QE_CR_SUBBLOCK_UCCFAST8;
  87         default: return QE_CR_SUBBLOCK_INVALID;
  88         }
  89 }
  90 EXPORT_SYMBOL(ucc_fast_get_qe_cr_subblock);
  91
  92 void ucc_fast_transmit_on_demand(struct ucc_fast_private * uccf)
  93 {
  94         out_be16(&uccf->uf_regs->utodr, UCC_FAST_TOD);
  95 }
  96 EXPORT_SYMBOL(ucc_fast_transmit_on_demand);
  97
  98 void ucc_fast_enable(struct ucc_fast_private * uccf, enum comm_dir mode)
  99 {
 100         struct ucc_fast *uf_regs;
 101         u32 gumr;
 102
 103         uf_regs = uccf->uf_regs;
 104
 105         /* Enable reception and/or transmission on this UCC. */
 106         gumr = in_be32(&uf_regs->gumr);
 107         if (mode & COMM_DIR_TX) {
 108                 gumr |= UCC_FAST_GUMR_ENT;
 109                 uccf->enabled_tx = 1;
 110         }
 111         if (mode & COMM_DIR_RX) {
 112                 gumr |= UCC_FAST_GUMR_ENR;
 113                 uccf->enabled_rx = 1;
 114         }
 115         out_be32(&uf_regs->gumr, gumr);
 116 }
 117 EXPORT_SYMBOL(ucc_fast_enable);
 118
 119 void ucc_fast_disable(struct ucc_fast_private * uccf, enum comm_dir mode)
 120 {
 121         struct ucc_fast *uf_regs;
 122         u32 gumr;
 123
 124         uf_regs = uccf->uf_regs;
 125
 126         /* Disable reception and/or transmission on this UCC. */
 127         gumr = in_be32(&uf_regs->gumr);
 128         if (mode & COMM_DIR_TX) {
 129                 gumr &= ~UCC_FAST_GUMR_ENT;
 130                 uccf->enabled_tx = 0;
 131         }
 132         if (mode & COMM_DIR_RX) {
 133                 gumr &= ~UCC_FAST_GUMR_ENR;
 134                 uccf->enabled_rx = 0;
 135         }
 136         out_be32(&uf_regs->gumr, gumr);
 137 }
 138 EXPORT_SYMBOL(ucc_fast_disable);
 139
 140 int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** uccf_ret)
 141 {
 142         struct ucc_fast_private *uccf;
 143         struct ucc_fast *uf_regs;
 144         u32 gumr;
 145         int ret;
 146
 147         if (!uf_info)
 148                 return -EINVAL;
 149
 150         /* check if the UCC port number is in range. */
 151         if ((uf_info->ucc_num < 0) || (uf_info->ucc_num > UCC_MAX_NUM - 1)) {
 152                 printk(KERN_ERR "%s: illegal UCC number", __FUNCTION__);
 153                 return -EINVAL;
 154         }
 155
 156         /* Check that 'max_rx_buf_length' is properly aligned (4). */
 157         if (uf_info->max_rx_buf_length & (UCC_FAST_MRBLR_ALIGNMENT - 1)) {
 158                 printk(KERN_ERR "%s: max_rx_buf_length not aligned", __FUNCTION__);
 159                 return -EINVAL;
 160         }
 161
 162         /* Validate Virtual Fifo register values */
 163         if (uf_info->urfs < UCC_FAST_URFS_MIN_VAL) {
 164                 printk(KERN_ERR "%s: urfs is too small", __FUNCTION__);
 165                 return -EINVAL;
 166         }
 167
 168         if (uf_info->urfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
 169                 printk(KERN_ERR "%s: urfs is not aligned", __FUNCTION__);
 170                 return -EINVAL;
 171         }
 172
 173         if (uf_info->urfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
 174                 printk(KERN_ERR "%s: urfet is not aligned.", __FUNCTION__);
 175                 return -EINVAL;
 176         }
 177
 178         if (uf_info->urfset & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
 179                 printk(KERN_ERR "%s: urfset is not aligned", __FUNCTION__);
 180                 return -EINVAL;
 181         }
 182
 183         if (uf_info->utfs & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
 184                 printk(KERN_ERR "%s: utfs is not aligned", __FUNCTION__);
 185                 return -EINVAL;
 186         }
 187
 188         if (uf_info->utfet & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
 189                 printk(KERN_ERR "%s: utfet is not aligned", __FUNCTION__);
 190                 return -EINVAL;
 191         }
 192
 193         if (uf_info->utftt & (UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT - 1)) {
 194                 printk(KERN_ERR "%s: utftt is not aligned", __FUNCTION__);
 195                 return -EINVAL;
 196         }
 197
 198         uccf = kzalloc(sizeof(struct ucc_fast_private), GFP_KERNEL);
 199         if (!uccf) {
 200                 printk(KERN_ERR "%s: Cannot allocate private data", __FUNCTION__);
 201                 return -ENOMEM;
 202         }
 203
 204         /* Fill fast UCC structure */
 205         uccf->uf_info = uf_info;
 206         /* Set the PHY base address */
 207         uccf->uf_regs = ioremap(uf_info->regs, sizeof(struct ucc_fast));
 208         if (uccf->uf_regs == NULL) {
 209                 printk(KERN_ERR "%s: Cannot map UCC registers", __FUNCTION__);
 210                 return -ENOMEM;
 211         }
 212
 213         uccf->enabled_tx = 0;
 214         uccf->enabled_rx = 0;
 215         uccf->stopped_tx = 0;
 216         uccf->stopped_rx = 0;
 217         uf_regs = uccf->uf_regs;
 218         uccf->p_ucce = (u32 *) & (uf_regs->ucce);
 219         uccf->p_uccm = (u32 *) & (uf_regs->uccm);
 220 #ifdef CONFIG_UGETH_TX_ON_DEMAND
 221         uccf->p_utodr = (u16 *) & (uf_regs->utodr);
 222 #endif
 223 #ifdef STATISTICS
 224         uccf->tx_frames = 0;
 225         uccf->rx_frames = 0;
 226         uccf->rx_discarded = 0;
 227 #endif                          /* STATISTICS */
 228
 229         /* Init Guemr register */
 230         if ((ret = ucc_init_guemr((struct ucc_common *) (uf_regs)))) {
 231                 printk(KERN_ERR "%s: cannot init GUEMR", __FUNCTION__);
 232                 ucc_fast_free(uccf);
 233                 return ret;
 234         }
 235
 236         /* Set UCC to fast type */
 237         if ((ret = ucc_set_type(uf_info->ucc_num,
 238                                 (struct ucc_common *) (uf_regs),
 239                                 UCC_SPEED_TYPE_FAST))) {
 240                 printk(KERN_ERR "%s: cannot set UCC type", __FUNCTION__);
 241                 ucc_fast_free(uccf);
 242                 return ret;
 243         }
 244
 245         uccf->mrblr = uf_info->max_rx_buf_length;
 246
 247         /* Set GUMR */
 248         /* For more details see the hardware spec. */
 249         gumr = uf_info->ttx_trx;
 250         if (uf_info->tci)
 251                 gumr |= UCC_FAST_GUMR_TCI;
 252         if (uf_info->cdp)
 253                 gumr |= UCC_FAST_GUMR_CDP;
 254         if (uf_info->ctsp)
 255                 gumr |= UCC_FAST_GUMR_CTSP;
 256         if (uf_info->cds)
 257                 gumr |= UCC_FAST_GUMR_CDS;
 258         if (uf_info->ctss)
 259                 gumr |= UCC_FAST_GUMR_CTSS;
 260         if (uf_info->txsy)
 261                 gumr |= UCC_FAST_GUMR_TXSY;
 262         if (uf_info->rsyn)
 263                 gumr |= UCC_FAST_GUMR_RSYN;
 264         gumr |= uf_info->synl;
 265         if (uf_info->rtsm)
 266                 gumr |= UCC_FAST_GUMR_RTSM;
 267         gumr |= uf_info->renc;
 268         if (uf_info->revd)
 269                 gumr |= UCC_FAST_GUMR_REVD;
 270         gumr |= uf_info->tenc;
 271         gumr |= uf_info->tcrc;
 272         gumr |= uf_info->mode;
 273         out_be32(&uf_regs->gumr, gumr);
 274
 275         /* Allocate memory for Tx Virtual Fifo */
 276         uccf->ucc_fast_tx_virtual_fifo_base_offset =
 277             qe_muram_alloc(uf_info->utfs, UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
 278         if (IS_ERR_VALUE(uccf->ucc_fast_tx_virtual_fifo_base_offset)) {
 279                 printk(KERN_ERR "%s: cannot allocate MURAM for TX FIFO", __FUNCTION__);
 280                 uccf->ucc_fast_tx_virtual_fifo_base_offset = 0;
 281                 ucc_fast_free(uccf);
 282                 return -ENOMEM;
 283         }
 284
 285         /* Allocate memory for Rx Virtual Fifo */
 286         uccf->ucc_fast_rx_virtual_fifo_base_offset =
 287                 qe_muram_alloc(uf_info->urfs +
 288                            UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR,
 289                            UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
 290         if (IS_ERR_VALUE(uccf->ucc_fast_rx_virtual_fifo_base_offset)) {
 291                 printk(KERN_ERR "%s: cannot allocate MURAM for RX FIFO", __FUNCTION__);
 292                 uccf->ucc_fast_rx_virtual_fifo_base_offset = 0;
 293                 ucc_fast_free(uccf);
 294                 return -ENOMEM;
 295         }
 296
 297         /* Set Virtual Fifo registers */
 298         out_be16(&uf_regs->urfs, uf_info->urfs);
 299         out_be16(&uf_regs->urfet, uf_info->urfet);
 300         out_be16(&uf_regs->urfset, uf_info->urfset);
 301         out_be16(&uf_regs->utfs, uf_info->utfs);
 302         out_be16(&uf_regs->utfet, uf_info->utfet);
 303         out_be16(&uf_regs->utftt, uf_info->utftt);
 304         /* utfb, urfb are offsets from MURAM base */
 305         out_be32(&uf_regs->utfb, uccf->ucc_fast_tx_virtual_fifo_base_offset);
 306         out_be32(&uf_regs->urfb, uccf->ucc_fast_rx_virtual_fifo_base_offset);
 307
 308         /* Mux clocking */
 309         /* Grant Support */
 310         ucc_set_qe_mux_grant(uf_info->ucc_num, uf_info->grant_support);
 311         /* Breakpoint Support */
 312         ucc_set_qe_mux_bkpt(uf_info->ucc_num, uf_info->brkpt_support);
 313         /* Set Tsa or NMSI mode. */
 314         ucc_set_qe_mux_tsa(uf_info->ucc_num, uf_info->tsa);
 315         /* If NMSI (not Tsa), set Tx and Rx clock. */
 316         if (!uf_info->tsa) {
 317                 /* Rx clock routing */
 318                 if ((uf_info->rx_clock != QE_CLK_NONE) &&
 319                     ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->rx_clock,
 320                                         COMM_DIR_RX)) {
 321                         printk(KERN_ERR "%s: illegal value for RX clock",
 322                                __FUNCTION__);
 323                         ucc_fast_free(uccf);
 324                         return -EINVAL;
 325                 }
 326                 /* Tx clock routing */
 327                 if ((uf_info->tx_clock != QE_CLK_NONE) &&
 328                     ucc_set_qe_mux_rxtx(uf_info->ucc_num, uf_info->tx_clock,
 329                                         COMM_DIR_TX)) {
 330                         printk(KERN_ERR "%s: illegal value for TX clock",
 331                                __FUNCTION__);
 332                         ucc_fast_free(uccf);
 333                         return -EINVAL;
 334                 }
 335         }
 336
 337         /* Set interrupt mask register at UCC level. */
 338         out_be32(&uf_regs->uccm, uf_info->uccm_mask);
 339
 340         /* First, clear anything pending at UCC level,
 341          * otherwise, old garbage may come through
 342          * as soon as the dam is opened. */
 343
 344         /* Writing '1' clears */
 345         out_be32(&uf_regs->ucce, 0xffffffff);
 346
 347         *uccf_ret = uccf;
 348         return 0;
 349 }
 350 EXPORT_SYMBOL(ucc_fast_init);
 351
 352 void ucc_fast_free(struct ucc_fast_private * uccf)
 353 {
 354         if (!uccf)
 355                 return;
 356
 357         if (uccf->ucc_fast_tx_virtual_fifo_base_offset)
 358                 qe_muram_free(uccf->ucc_fast_tx_virtual_fifo_base_offset);
 359
 360         if (uccf->ucc_fast_rx_virtual_fifo_base_offset)
 361                 qe_muram_free(uccf->ucc_fast_rx_virtual_fifo_base_offset);
 362
 363         kfree(uccf);
 364 }
 365 EXPORT_SYMBOL(ucc_fast_free);