Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
[linux-2.6] / drivers / usb / host / ohci-hcd.c
1 /*
2  * OHCI HCD (Host Controller Driver) for USB.
3  *
4  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5  * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
6  *
7  * [ Initialisation is based on Linus'  ]
8  * [ uhci code and gregs ohci fragments ]
9  * [ (C) Copyright 1999 Linus Torvalds  ]
10  * [ (C) Copyright 1999 Gregory P. Smith]
11  *
12  *
13  * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
14  * interfaces (though some non-x86 Intel chips use it).  It supports
15  * smarter hardware than UHCI.  A download link for the spec available
16  * through the http://www.usb.org website.
17  *
18  * This file is licenced under the GPL.
19  */
20
21 #include <linux/module.h>
22 #include <linux/moduleparam.h>
23 #include <linux/pci.h>
24 #include <linux/kernel.h>
25 #include <linux/delay.h>
26 #include <linux/ioport.h>
27 #include <linux/sched.h>
28 #include <linux/slab.h>
29 #include <linux/errno.h>
30 #include <linux/init.h>
31 #include <linux/timer.h>
32 #include <linux/list.h>
33 #include <linux/usb.h>
34 #include <linux/usb/otg.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/dmapool.h>
37 #include <linux/reboot.h>
38 #include <linux/workqueue.h>
39
40 #include <asm/io.h>
41 #include <asm/irq.h>
42 #include <asm/system.h>
43 #include <asm/unaligned.h>
44 #include <asm/byteorder.h>
45
46 #include "../core/hcd.h"
47
48 #define DRIVER_VERSION "2006 August 04"
49 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
50 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
51
52 /*-------------------------------------------------------------------------*/
53
54 #undef OHCI_VERBOSE_DEBUG       /* not always helpful */
55
56 /* For initializing controller (mask in an HCFS mode too) */
57 #define OHCI_CONTROL_INIT       OHCI_CTRL_CBSR
58 #define OHCI_INTR_INIT \
59                 (OHCI_INTR_MIE | OHCI_INTR_RHSC | OHCI_INTR_UE \
60                 | OHCI_INTR_RD | OHCI_INTR_WDH)
61
62 #ifdef __hppa__
63 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
64 #define IR_DISABLE
65 #endif
66
67 #ifdef CONFIG_ARCH_OMAP
68 /* OMAP doesn't support IR (no SMM; not needed) */
69 #define IR_DISABLE
70 #endif
71
72 /*-------------------------------------------------------------------------*/
73
74 static const char       hcd_name [] = "ohci_hcd";
75
76 #define STATECHANGE_DELAY       msecs_to_jiffies(300)
77
78 #include "ohci.h"
79
80 static void ohci_dump (struct ohci_hcd *ohci, int verbose);
81 static int ohci_init (struct ohci_hcd *ohci);
82 static void ohci_stop (struct usb_hcd *hcd);
83 static int ohci_restart (struct ohci_hcd *ohci);
84
85 #include "ohci-hub.c"
86 #include "ohci-dbg.c"
87 #include "ohci-mem.c"
88 #include "ohci-q.c"
89
90
91 /*
92  * On architectures with edge-triggered interrupts we must never return
93  * IRQ_NONE.
94  */
95 #if defined(CONFIG_SA1111)  /* ... or other edge-triggered systems */
96 #define IRQ_NOTMINE     IRQ_HANDLED
97 #else
98 #define IRQ_NOTMINE     IRQ_NONE
99 #endif
100
101
102 /* Some boards misreport power switching/overcurrent */
103 static int distrust_firmware = 1;
104 module_param (distrust_firmware, bool, 0);
105 MODULE_PARM_DESC (distrust_firmware,
106         "true to distrust firmware power/overcurrent setup");
107
108 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
109 static int no_handshake = 0;
110 module_param (no_handshake, bool, 0);
111 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
112
113 /*-------------------------------------------------------------------------*/
114
115 /*
116  * queue up an urb for anything except the root hub
117  */
118 static int ohci_urb_enqueue (
119         struct usb_hcd  *hcd,
120         struct urb      *urb,
121         gfp_t           mem_flags
122 ) {
123         struct ohci_hcd *ohci = hcd_to_ohci (hcd);
124         struct ed       *ed;
125         urb_priv_t      *urb_priv;
126         unsigned int    pipe = urb->pipe;
127         int             i, size = 0;
128         unsigned long   flags;
129         int             retval = 0;
130
131 #ifdef OHCI_VERBOSE_DEBUG
132         urb_print(urb, "SUB", usb_pipein(pipe), -EINPROGRESS);
133 #endif
134
135         /* every endpoint has a ed, locate and maybe (re)initialize it */
136         if (! (ed = ed_get (ohci, urb->ep, urb->dev, pipe, urb->interval)))
137                 return -ENOMEM;
138
139         /* for the private part of the URB we need the number of TDs (size) */
140         switch (ed->type) {
141                 case PIPE_CONTROL:
142                         /* td_submit_urb() doesn't yet handle these */
143                         if (urb->transfer_buffer_length > 4096)
144                                 return -EMSGSIZE;
145
146                         /* 1 TD for setup, 1 for ACK, plus ... */
147                         size = 2;
148                         /* FALLTHROUGH */
149                 // case PIPE_INTERRUPT:
150                 // case PIPE_BULK:
151                 default:
152                         /* one TD for every 4096 Bytes (can be upto 8K) */
153                         size += urb->transfer_buffer_length / 4096;
154                         /* ... and for any remaining bytes ... */
155                         if ((urb->transfer_buffer_length % 4096) != 0)
156                                 size++;
157                         /* ... and maybe a zero length packet to wrap it up */
158                         if (size == 0)
159                                 size++;
160                         else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
161                                 && (urb->transfer_buffer_length
162                                         % usb_maxpacket (urb->dev, pipe,
163                                                 usb_pipeout (pipe))) == 0)
164                                 size++;
165                         break;
166                 case PIPE_ISOCHRONOUS: /* number of packets from URB */
167                         size = urb->number_of_packets;
168                         break;
169         }
170
171         /* allocate the private part of the URB */
172         urb_priv = kzalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
173                         mem_flags);
174         if (!urb_priv)
175                 return -ENOMEM;
176         INIT_LIST_HEAD (&urb_priv->pending);
177         urb_priv->length = size;
178         urb_priv->ed = ed;
179
180         /* allocate the TDs (deferring hash chain updates) */
181         for (i = 0; i < size; i++) {
182                 urb_priv->td [i] = td_alloc (ohci, mem_flags);
183                 if (!urb_priv->td [i]) {
184                         urb_priv->length = i;
185                         urb_free_priv (ohci, urb_priv);
186                         return -ENOMEM;
187                 }
188         }
189
190         spin_lock_irqsave (&ohci->lock, flags);
191
192         /* don't submit to a dead HC */
193         if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
194                 retval = -ENODEV;
195                 goto fail;
196         }
197         if (!HC_IS_RUNNING(hcd->state)) {
198                 retval = -ENODEV;
199                 goto fail;
200         }
201         retval = usb_hcd_link_urb_to_ep(hcd, urb);
202         if (retval)
203                 goto fail;
204
205         /* schedule the ed if needed */
206         if (ed->state == ED_IDLE) {
207                 retval = ed_schedule (ohci, ed);
208                 if (retval < 0) {
209                         usb_hcd_unlink_urb_from_ep(hcd, urb);
210                         goto fail;
211                 }
212                 if (ed->type == PIPE_ISOCHRONOUS) {
213                         u16     frame = ohci_frame_no(ohci);
214
215                         /* delay a few frames before the first TD */
216                         frame += max_t (u16, 8, ed->interval);
217                         frame &= ~(ed->interval - 1);
218                         frame |= ed->branch;
219                         urb->start_frame = frame;
220
221                         /* yes, only URB_ISO_ASAP is supported, and
222                          * urb->start_frame is never used as input.
223                          */
224                 }
225         } else if (ed->type == PIPE_ISOCHRONOUS)
226                 urb->start_frame = ed->last_iso + ed->interval;
227
228         /* fill the TDs and link them to the ed; and
229          * enable that part of the schedule, if needed
230          * and update count of queued periodic urbs
231          */
232         urb->hcpriv = urb_priv;
233         td_submit_urb (ohci, urb);
234
235 fail:
236         if (retval)
237                 urb_free_priv (ohci, urb_priv);
238         spin_unlock_irqrestore (&ohci->lock, flags);
239         return retval;
240 }
241
242 /*
243  * decouple the URB from the HC queues (TDs, urb_priv).
244  * reporting is always done
245  * asynchronously, and we might be dealing with an urb that's
246  * partially transferred, or an ED with other urbs being unlinked.
247  */
248 static int ohci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
249 {
250         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
251         unsigned long           flags;
252         int                     rc;
253
254 #ifdef OHCI_VERBOSE_DEBUG
255         urb_print(urb, "UNLINK", 1, status);
256 #endif
257
258         spin_lock_irqsave (&ohci->lock, flags);
259         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
260         if (rc) {
261                 ;       /* Do nothing */
262         } else if (HC_IS_RUNNING(hcd->state)) {
263                 urb_priv_t  *urb_priv;
264
265                 /* Unless an IRQ completed the unlink while it was being
266                  * handed to us, flag it for unlink and giveback, and force
267                  * some upcoming INTR_SF to call finish_unlinks()
268                  */
269                 urb_priv = urb->hcpriv;
270                 if (urb_priv) {
271                         if (urb_priv->ed->state == ED_OPER)
272                                 start_ed_unlink (ohci, urb_priv->ed);
273                 }
274         } else {
275                 /*
276                  * with HC dead, we won't respect hc queue pointers
277                  * any more ... just clean up every urb's memory.
278                  */
279                 if (urb->hcpriv)
280                         finish_urb(ohci, urb, status);
281         }
282         spin_unlock_irqrestore (&ohci->lock, flags);
283         return rc;
284 }
285
286 /*-------------------------------------------------------------------------*/
287
288 /* frees config/altsetting state for endpoints,
289  * including ED memory, dummy TD, and bulk/intr data toggle
290  */
291
292 static void
293 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
294 {
295         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
296         unsigned long           flags;
297         struct ed               *ed = ep->hcpriv;
298         unsigned                limit = 1000;
299
300         /* ASSERT:  any requests/urbs are being unlinked */
301         /* ASSERT:  nobody can be submitting urbs for this any more */
302
303         if (!ed)
304                 return;
305
306 rescan:
307         spin_lock_irqsave (&ohci->lock, flags);
308
309         if (!HC_IS_RUNNING (hcd->state)) {
310 sanitize:
311                 ed->state = ED_IDLE;
312                 if (quirk_zfmicro(ohci) && ed->type == PIPE_INTERRUPT)
313                         ohci->eds_scheduled--;
314                 finish_unlinks (ohci, 0);
315         }
316
317         switch (ed->state) {
318         case ED_UNLINK:         /* wait for hw to finish? */
319                 /* major IRQ delivery trouble loses INTR_SF too... */
320                 if (limit-- == 0) {
321                         ohci_warn(ohci, "ED unlink timeout\n");
322                         if (quirk_zfmicro(ohci)) {
323                                 ohci_warn(ohci, "Attempting ZF TD recovery\n");
324                                 ohci->ed_to_check = ed;
325                                 ohci->zf_delay = 2;
326                         }
327                         goto sanitize;
328                 }
329                 spin_unlock_irqrestore (&ohci->lock, flags);
330                 schedule_timeout_uninterruptible(1);
331                 goto rescan;
332         case ED_IDLE:           /* fully unlinked */
333                 if (list_empty (&ed->td_list)) {
334                         td_free (ohci, ed->dummy);
335                         ed_free (ohci, ed);
336                         break;
337                 }
338                 /* else FALL THROUGH */
339         default:
340                 /* caller was supposed to have unlinked any requests;
341                  * that's not our job.  can't recover; must leak ed.
342                  */
343                 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
344                         ed, ep->desc.bEndpointAddress, ed->state,
345                         list_empty (&ed->td_list) ? "" : " (has tds)");
346                 td_free (ohci, ed->dummy);
347                 break;
348         }
349         ep->hcpriv = NULL;
350         spin_unlock_irqrestore (&ohci->lock, flags);
351         return;
352 }
353
354 static int ohci_get_frame (struct usb_hcd *hcd)
355 {
356         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
357
358         return ohci_frame_no(ohci);
359 }
360
361 static void ohci_usb_reset (struct ohci_hcd *ohci)
362 {
363         ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
364         ohci->hc_control &= OHCI_CTRL_RWC;
365         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
366 }
367
368 /* ohci_shutdown forcibly disables IRQs and DMA, helping kexec and
369  * other cases where the next software may expect clean state from the
370  * "firmware".  this is bus-neutral, unlike shutdown() methods.
371  */
372 static void
373 ohci_shutdown (struct usb_hcd *hcd)
374 {
375         struct ohci_hcd *ohci;
376
377         ohci = hcd_to_ohci (hcd);
378         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
379         ohci_usb_reset (ohci);
380         /* flush the writes */
381         (void) ohci_readl (ohci, &ohci->regs->control);
382 }
383
384 static int check_ed(struct ohci_hcd *ohci, struct ed *ed)
385 {
386         return (hc32_to_cpu(ohci, ed->hwINFO) & ED_IN) != 0
387                 && (hc32_to_cpu(ohci, ed->hwHeadP) & TD_MASK)
388                         == (hc32_to_cpu(ohci, ed->hwTailP) & TD_MASK)
389                 && !list_empty(&ed->td_list);
390 }
391
392 /* ZF Micro watchdog timer callback. The ZF Micro chipset sometimes completes
393  * an interrupt TD but neglects to add it to the donelist.  On systems with
394  * this chipset, we need to periodically check the state of the queues to look
395  * for such "lost" TDs.
396  */
397 static void unlink_watchdog_func(unsigned long _ohci)
398 {
399         long            flags;
400         unsigned        max;
401         unsigned        seen_count = 0;
402         unsigned        i;
403         struct ed       **seen = NULL;
404         struct ohci_hcd *ohci = (struct ohci_hcd *) _ohci;
405
406         spin_lock_irqsave(&ohci->lock, flags);
407         max = ohci->eds_scheduled;
408         if (!max)
409                 goto done;
410
411         if (ohci->ed_to_check)
412                 goto out;
413
414         seen = kcalloc(max, sizeof *seen, GFP_ATOMIC);
415         if (!seen)
416                 goto out;
417
418         for (i = 0; i < NUM_INTS; i++) {
419                 struct ed       *ed = ohci->periodic[i];
420
421                 while (ed) {
422                         unsigned        temp;
423
424                         /* scan this branch of the periodic schedule tree */
425                         for (temp = 0; temp < seen_count; temp++) {
426                                 if (seen[temp] == ed) {
427                                         /* we've checked it and what's after */
428                                         ed = NULL;
429                                         break;
430                                 }
431                         }
432                         if (!ed)
433                                 break;
434                         seen[seen_count++] = ed;
435                         if (!check_ed(ohci, ed)) {
436                                 ed = ed->ed_next;
437                                 continue;
438                         }
439
440                         /* HC's TD list is empty, but HCD sees at least one
441                          * TD that's not been sent through the donelist.
442                          */
443                         ohci->ed_to_check = ed;
444                         ohci->zf_delay = 2;
445
446                         /* The HC may wait until the next frame to report the
447                          * TD as done through the donelist and INTR_WDH.  (We
448                          * just *assume* it's not a multi-TD interrupt URB;
449                          * those could defer the IRQ more than one frame, using
450                          * DI...)  Check again after the next INTR_SF.
451                          */
452                         ohci_writel(ohci, OHCI_INTR_SF,
453                                         &ohci->regs->intrstatus);
454                         ohci_writel(ohci, OHCI_INTR_SF,
455                                         &ohci->regs->intrenable);
456
457                         /* flush those writes */
458                         (void) ohci_readl(ohci, &ohci->regs->control);
459
460                         goto out;
461                 }
462         }
463 out:
464         kfree(seen);
465         if (ohci->eds_scheduled)
466                 mod_timer(&ohci->unlink_watchdog, round_jiffies_relative(HZ));
467 done:
468         spin_unlock_irqrestore(&ohci->lock, flags);
469 }
470
471 /*-------------------------------------------------------------------------*
472  * HC functions
473  *-------------------------------------------------------------------------*/
474
475 /* init memory, and kick BIOS/SMM off */
476
477 static int ohci_init (struct ohci_hcd *ohci)
478 {
479         int ret;
480         struct usb_hcd *hcd = ohci_to_hcd(ohci);
481
482         disable (ohci);
483         ohci->regs = hcd->regs;
484
485         /* REVISIT this BIOS handshake is now moved into PCI "quirks", and
486          * was never needed for most non-PCI systems ... remove the code?
487          */
488
489 #ifndef IR_DISABLE
490         /* SMM owns the HC?  not for long! */
491         if (!no_handshake && ohci_readl (ohci,
492                                         &ohci->regs->control) & OHCI_CTRL_IR) {
493                 u32 temp;
494
495                 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
496
497                 /* this timeout is arbitrary.  we make it long, so systems
498                  * depending on usb keyboards may be usable even if the
499                  * BIOS/SMM code seems pretty broken.
500                  */
501                 temp = 500;     /* arbitrary: five seconds */
502
503                 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
504                 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
505                 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
506                         msleep (10);
507                         if (--temp == 0) {
508                                 ohci_err (ohci, "USB HC takeover failed!"
509                                         "  (BIOS/SMM bug)\n");
510                                 return -EBUSY;
511                         }
512                 }
513                 ohci_usb_reset (ohci);
514         }
515 #endif
516
517         /* Disable HC interrupts */
518         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
519
520         /* flush the writes, and save key bits like RWC */
521         if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC)
522                 ohci->hc_control |= OHCI_CTRL_RWC;
523
524         /* Read the number of ports unless overridden */
525         if (ohci->num_ports == 0)
526                 ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
527
528         if (ohci->hcca)
529                 return 0;
530
531         ohci->hcca = dma_alloc_coherent (hcd->self.controller,
532                         sizeof *ohci->hcca, &ohci->hcca_dma, 0);
533         if (!ohci->hcca)
534                 return -ENOMEM;
535
536         if ((ret = ohci_mem_init (ohci)) < 0)
537                 ohci_stop (hcd);
538         else {
539                 create_debug_files (ohci);
540         }
541
542         return ret;
543 }
544
545 /*-------------------------------------------------------------------------*/
546
547 /* Start an OHCI controller, set the BUS operational
548  * resets USB and controller
549  * enable interrupts
550  */
551 static int ohci_run (struct ohci_hcd *ohci)
552 {
553         u32                     mask, temp;
554         int                     first = ohci->fminterval == 0;
555         struct usb_hcd          *hcd = ohci_to_hcd(ohci);
556
557         disable (ohci);
558
559         /* boot firmware should have set this up (5.1.1.3.1) */
560         if (first) {
561
562                 temp = ohci_readl (ohci, &ohci->regs->fminterval);
563                 ohci->fminterval = temp & 0x3fff;
564                 if (ohci->fminterval != FI)
565                         ohci_dbg (ohci, "fminterval delta %d\n",
566                                 ohci->fminterval - FI);
567                 ohci->fminterval |= FSMP (ohci->fminterval) << 16;
568                 /* also: power/overcurrent flags in roothub.a */
569         }
570
571         /* Reset USB nearly "by the book".  RemoteWakeupConnected was
572          * saved if boot firmware (BIOS/SMM/...) told us it's connected,
573          * or if bus glue did the same (e.g. for PCI add-in cards with
574          * PCI PM support).
575          */
576         if ((ohci->hc_control & OHCI_CTRL_RWC) != 0
577                         && !device_may_wakeup(hcd->self.controller))
578                 device_init_wakeup(hcd->self.controller, 1);
579
580         switch (ohci->hc_control & OHCI_CTRL_HCFS) {
581         case OHCI_USB_OPER:
582                 temp = 0;
583                 break;
584         case OHCI_USB_SUSPEND:
585         case OHCI_USB_RESUME:
586                 ohci->hc_control &= OHCI_CTRL_RWC;
587                 ohci->hc_control |= OHCI_USB_RESUME;
588                 temp = 10 /* msec wait */;
589                 break;
590         // case OHCI_USB_RESET:
591         default:
592                 ohci->hc_control &= OHCI_CTRL_RWC;
593                 ohci->hc_control |= OHCI_USB_RESET;
594                 temp = 50 /* msec wait */;
595                 break;
596         }
597         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
598         // flush the writes
599         (void) ohci_readl (ohci, &ohci->regs->control);
600         msleep(temp);
601
602         memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
603
604         /* 2msec timelimit here means no irqs/preempt */
605         spin_lock_irq (&ohci->lock);
606
607 retry:
608         /* HC Reset requires max 10 us delay */
609         ohci_writel (ohci, OHCI_HCR,  &ohci->regs->cmdstatus);
610         temp = 30;      /* ... allow extra time */
611         while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
612                 if (--temp == 0) {
613                         spin_unlock_irq (&ohci->lock);
614                         ohci_err (ohci, "USB HC reset timed out!\n");
615                         return -1;
616                 }
617                 udelay (1);
618         }
619
620         /* now we're in the SUSPEND state ... must go OPERATIONAL
621          * within 2msec else HC enters RESUME
622          *
623          * ... but some hardware won't init fmInterval "by the book"
624          * (SiS, OPTi ...), so reset again instead.  SiS doesn't need
625          * this if we write fmInterval after we're OPERATIONAL.
626          * Unclear about ALi, ServerWorks, and others ... this could
627          * easily be a longstanding bug in chip init on Linux.
628          */
629         if (ohci->flags & OHCI_QUIRK_INITRESET) {
630                 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
631                 // flush those writes
632                 (void) ohci_readl (ohci, &ohci->regs->control);
633         }
634
635         /* Tell the controller where the control and bulk lists are
636          * The lists are empty now. */
637         ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
638         ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
639
640         /* a reset clears this */
641         ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
642
643         periodic_reinit (ohci);
644
645         /* some OHCI implementations are finicky about how they init.
646          * bogus values here mean not even enumeration could work.
647          */
648         if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
649                         || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
650                 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
651                         ohci->flags |= OHCI_QUIRK_INITRESET;
652                         ohci_dbg (ohci, "enabling initreset quirk\n");
653                         goto retry;
654                 }
655                 spin_unlock_irq (&ohci->lock);
656                 ohci_err (ohci, "init err (%08x %04x)\n",
657                         ohci_readl (ohci, &ohci->regs->fminterval),
658                         ohci_readl (ohci, &ohci->regs->periodicstart));
659                 return -EOVERFLOW;
660         }
661
662         /* use rhsc irqs after khubd is fully initialized */
663         hcd->poll_rh = 1;
664         hcd->uses_new_polling = 1;
665
666         /* start controller operations */
667         ohci->hc_control &= OHCI_CTRL_RWC;
668         ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
669         ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
670         hcd->state = HC_STATE_RUNNING;
671
672         /* wake on ConnectStatusChange, matching external hubs */
673         ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
674
675         /* Choose the interrupts we care about now, others later on demand */
676         mask = OHCI_INTR_INIT;
677         ohci_writel (ohci, ~0, &ohci->regs->intrstatus);
678         ohci_writel (ohci, mask, &ohci->regs->intrenable);
679
680         /* handle root hub init quirks ... */
681         temp = roothub_a (ohci);
682         temp &= ~(RH_A_PSM | RH_A_OCPM);
683         if (ohci->flags & OHCI_QUIRK_SUPERIO) {
684                 /* NSC 87560 and maybe others */
685                 temp |= RH_A_NOCP;
686                 temp &= ~(RH_A_POTPGT | RH_A_NPS);
687                 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
688         } else if ((ohci->flags & OHCI_QUIRK_AMD756) || distrust_firmware) {
689                 /* hub power always on; required for AMD-756 and some
690                  * Mac platforms.  ganged overcurrent reporting, if any.
691                  */
692                 temp |= RH_A_NPS;
693                 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
694         }
695         ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
696         ohci_writel (ohci, (temp & RH_A_NPS) ? 0 : RH_B_PPCM,
697                                                 &ohci->regs->roothub.b);
698         // flush those writes
699         (void) ohci_readl (ohci, &ohci->regs->control);
700
701         ohci->next_statechange = jiffies + STATECHANGE_DELAY;
702         spin_unlock_irq (&ohci->lock);
703
704         // POTPGT delay is bits 24-31, in 2 ms units.
705         mdelay ((temp >> 23) & 0x1fe);
706         hcd->state = HC_STATE_RUNNING;
707
708         if (quirk_zfmicro(ohci)) {
709                 /* Create timer to watch for bad queue state on ZF Micro */
710                 setup_timer(&ohci->unlink_watchdog, unlink_watchdog_func,
711                                 (unsigned long) ohci);
712
713                 ohci->eds_scheduled = 0;
714                 ohci->ed_to_check = NULL;
715         }
716
717         ohci_dump (ohci, 1);
718
719         return 0;
720 }
721
722 /*-------------------------------------------------------------------------*/
723
724 /* an interrupt happens */
725
726 static irqreturn_t ohci_irq (struct usb_hcd *hcd)
727 {
728         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
729         struct ohci_regs __iomem *regs = ohci->regs;
730         int                     ints;
731
732         /* we can eliminate a (slow) ohci_readl()
733          * if _only_ WDH caused this irq
734          */
735         if ((ohci->hcca->done_head != 0)
736                         && ! (hc32_to_cpup (ohci, &ohci->hcca->done_head)
737                                 & 0x01)) {
738                 ints =  OHCI_INTR_WDH;
739
740         /* cardbus/... hardware gone before remove() */
741         } else if ((ints = ohci_readl (ohci, &regs->intrstatus)) == ~(u32)0) {
742                 disable (ohci);
743                 ohci_dbg (ohci, "device removed!\n");
744                 return IRQ_HANDLED;
745
746         /* interrupt for some other device? */
747         } else if ((ints &= ohci_readl (ohci, &regs->intrenable)) == 0) {
748                 return IRQ_NOTMINE;
749         }
750
751         if (ints & OHCI_INTR_UE) {
752                 // e.g. due to PCI Master/Target Abort
753                 if (quirk_nec(ohci)) {
754                         /* Workaround for a silicon bug in some NEC chips used
755                          * in Apple's PowerBooks. Adapted from Darwin code.
756                          */
757                         ohci_err (ohci, "OHCI Unrecoverable Error, scheduling NEC chip restart\n");
758
759                         ohci_writel (ohci, OHCI_INTR_UE, &regs->intrdisable);
760
761                         schedule_work (&ohci->nec_work);
762                 } else {
763                         disable (ohci);
764                         ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
765                 }
766
767                 ohci_dump (ohci, 1);
768                 ohci_usb_reset (ohci);
769         }
770
771         if (ints & OHCI_INTR_RHSC) {
772                 ohci_vdbg(ohci, "rhsc\n");
773                 ohci->next_statechange = jiffies + STATECHANGE_DELAY;
774                 ohci_writel(ohci, OHCI_INTR_RD | OHCI_INTR_RHSC,
775                                 &regs->intrstatus);
776
777                 /* NOTE: Vendors didn't always make the same implementation
778                  * choices for RHSC.  Many followed the spec; RHSC triggers
779                  * on an edge, like setting and maybe clearing a port status
780                  * change bit.  With others it's level-triggered, active
781                  * until khubd clears all the port status change bits.  We'll
782                  * always disable it here and rely on polling until khubd
783                  * re-enables it.
784                  */
785                 ohci_writel(ohci, OHCI_INTR_RHSC, &regs->intrdisable);
786                 usb_hcd_poll_rh_status(hcd);
787         }
788
789         /* For connect and disconnect events, we expect the controller
790          * to turn on RHSC along with RD.  But for remote wakeup events
791          * this might not happen.
792          */
793         else if (ints & OHCI_INTR_RD) {
794                 ohci_vdbg(ohci, "resume detect\n");
795                 ohci_writel(ohci, OHCI_INTR_RD, &regs->intrstatus);
796                 hcd->poll_rh = 1;
797                 if (ohci->autostop) {
798                         spin_lock (&ohci->lock);
799                         ohci_rh_resume (ohci);
800                         spin_unlock (&ohci->lock);
801                 } else
802                         usb_hcd_resume_root_hub(hcd);
803         }
804
805         if (ints & OHCI_INTR_WDH) {
806                 if (HC_IS_RUNNING(hcd->state))
807                         ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrdisable);
808                 spin_lock (&ohci->lock);
809                 dl_done_list (ohci);
810                 spin_unlock (&ohci->lock);
811                 if (HC_IS_RUNNING(hcd->state))
812                         ohci_writel (ohci, OHCI_INTR_WDH, &regs->intrenable);
813         }
814
815         if (quirk_zfmicro(ohci) && (ints & OHCI_INTR_SF)) {
816                 spin_lock(&ohci->lock);
817                 if (ohci->ed_to_check) {
818                         struct ed *ed = ohci->ed_to_check;
819
820                         if (check_ed(ohci, ed)) {
821                                 /* HC thinks the TD list is empty; HCD knows
822                                  * at least one TD is outstanding
823                                  */
824                                 if (--ohci->zf_delay == 0) {
825                                         struct td *td = list_entry(
826                                                 ed->td_list.next,
827                                                 struct td, td_list);
828                                         ohci_warn(ohci,
829                                                   "Reclaiming orphan TD %p\n",
830                                                   td);
831                                         takeback_td(ohci, td);
832                                         ohci->ed_to_check = NULL;
833                                 }
834                         } else
835                                 ohci->ed_to_check = NULL;
836                 }
837                 spin_unlock(&ohci->lock);
838         }
839
840         /* could track INTR_SO to reduce available PCI/... bandwidth */
841
842         /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
843          * when there's still unlinking to be done (next frame).
844          */
845         spin_lock (&ohci->lock);
846         if (ohci->ed_rm_list)
847                 finish_unlinks (ohci, ohci_frame_no(ohci));
848         if ((ints & OHCI_INTR_SF) != 0
849                         && !ohci->ed_rm_list
850                         && !ohci->ed_to_check
851                         && HC_IS_RUNNING(hcd->state))
852                 ohci_writel (ohci, OHCI_INTR_SF, &regs->intrdisable);
853         spin_unlock (&ohci->lock);
854
855         if (HC_IS_RUNNING(hcd->state)) {
856                 ohci_writel (ohci, ints, &regs->intrstatus);
857                 ohci_writel (ohci, OHCI_INTR_MIE, &regs->intrenable);
858                 // flush those writes
859                 (void) ohci_readl (ohci, &ohci->regs->control);
860         }
861
862         return IRQ_HANDLED;
863 }
864
865 /*-------------------------------------------------------------------------*/
866
867 static void ohci_stop (struct usb_hcd *hcd)
868 {
869         struct ohci_hcd         *ohci = hcd_to_ohci (hcd);
870
871         ohci_dump (ohci, 1);
872
873         flush_scheduled_work();
874
875         ohci_usb_reset (ohci);
876         ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
877         free_irq(hcd->irq, hcd);
878         hcd->irq = -1;
879
880         if (quirk_zfmicro(ohci))
881                 del_timer(&ohci->unlink_watchdog);
882
883         remove_debug_files (ohci);
884         ohci_mem_cleanup (ohci);
885         if (ohci->hcca) {
886                 dma_free_coherent (hcd->self.controller,
887                                 sizeof *ohci->hcca,
888                                 ohci->hcca, ohci->hcca_dma);
889                 ohci->hcca = NULL;
890                 ohci->hcca_dma = 0;
891         }
892 }
893
894 /*-------------------------------------------------------------------------*/
895
896 /* must not be called from interrupt context */
897 static int ohci_restart (struct ohci_hcd *ohci)
898 {
899         int temp;
900         int i;
901         struct urb_priv *priv;
902
903         spin_lock_irq(&ohci->lock);
904         disable (ohci);
905
906         /* Recycle any "live" eds/tds (and urbs). */
907         if (!list_empty (&ohci->pending))
908                 ohci_dbg(ohci, "abort schedule...\n");
909         list_for_each_entry (priv, &ohci->pending, pending) {
910                 struct urb      *urb = priv->td[0]->urb;
911                 struct ed       *ed = priv->ed;
912
913                 switch (ed->state) {
914                 case ED_OPER:
915                         ed->state = ED_UNLINK;
916                         ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
917                         ed_deschedule (ohci, ed);
918
919                         ed->ed_next = ohci->ed_rm_list;
920                         ed->ed_prev = NULL;
921                         ohci->ed_rm_list = ed;
922                         /* FALLTHROUGH */
923                 case ED_UNLINK:
924                         break;
925                 default:
926                         ohci_dbg(ohci, "bogus ed %p state %d\n",
927                                         ed, ed->state);
928                 }
929
930                 if (!urb->unlinked)
931                         urb->unlinked = -ESHUTDOWN;
932         }
933         finish_unlinks (ohci, 0);
934         spin_unlock_irq(&ohci->lock);
935
936         /* paranoia, in case that didn't work: */
937
938         /* empty the interrupt branches */
939         for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
940         for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
941
942         /* no EDs to remove */
943         ohci->ed_rm_list = NULL;
944
945         /* empty control and bulk lists */
946         ohci->ed_controltail = NULL;
947         ohci->ed_bulktail    = NULL;
948
949         if ((temp = ohci_run (ohci)) < 0) {
950                 ohci_err (ohci, "can't restart, %d\n", temp);
951                 return temp;
952         }
953         ohci_dbg(ohci, "restart complete\n");
954         return 0;
955 }
956
957 /*-------------------------------------------------------------------------*/
958
959 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
960
961 MODULE_AUTHOR (DRIVER_AUTHOR);
962 MODULE_DESCRIPTION (DRIVER_INFO);
963 MODULE_LICENSE ("GPL");
964
965 #ifdef CONFIG_PCI
966 #include "ohci-pci.c"
967 #define PCI_DRIVER              ohci_pci_driver
968 #endif
969
970 #ifdef CONFIG_SA1111
971 #include "ohci-sa1111.c"
972 #define SA1111_DRIVER           ohci_hcd_sa1111_driver
973 #endif
974
975 #ifdef CONFIG_ARCH_S3C2410
976 #include "ohci-s3c2410.c"
977 #define PLATFORM_DRIVER         ohci_hcd_s3c2410_driver
978 #endif
979
980 #ifdef CONFIG_ARCH_OMAP
981 #include "ohci-omap.c"
982 #define PLATFORM_DRIVER         ohci_hcd_omap_driver
983 #endif
984
985 #ifdef CONFIG_ARCH_LH7A404
986 #include "ohci-lh7a404.c"
987 #define PLATFORM_DRIVER         ohci_hcd_lh7a404_driver
988 #endif
989
990 #ifdef CONFIG_PXA27x
991 #include "ohci-pxa27x.c"
992 #define PLATFORM_DRIVER         ohci_hcd_pxa27x_driver
993 #endif
994
995 #ifdef CONFIG_ARCH_EP93XX
996 #include "ohci-ep93xx.c"
997 #define PLATFORM_DRIVER         ohci_hcd_ep93xx_driver
998 #endif
999
1000 #ifdef CONFIG_SOC_AU1X00
1001 #include "ohci-au1xxx.c"
1002 #define PLATFORM_DRIVER         ohci_hcd_au1xxx_driver
1003 #endif
1004
1005 #ifdef CONFIG_PNX8550
1006 #include "ohci-pnx8550.c"
1007 #define PLATFORM_DRIVER         ohci_hcd_pnx8550_driver
1008 #endif
1009
1010 #ifdef CONFIG_USB_OHCI_HCD_PPC_SOC
1011 #include "ohci-ppc-soc.c"
1012 #define PLATFORM_DRIVER         ohci_hcd_ppc_soc_driver
1013 #endif
1014
1015 #ifdef CONFIG_ARCH_AT91
1016 #include "ohci-at91.c"
1017 #define PLATFORM_DRIVER         ohci_hcd_at91_driver
1018 #endif
1019
1020 #ifdef CONFIG_ARCH_PNX4008
1021 #include "ohci-pnx4008.c"
1022 #define PLATFORM_DRIVER         usb_hcd_pnx4008_driver
1023 #endif
1024
1025
1026 #ifdef CONFIG_USB_OHCI_HCD_PPC_OF
1027 #include "ohci-ppc-of.c"
1028 #define OF_PLATFORM_DRIVER      ohci_hcd_ppc_of_driver
1029 #endif
1030
1031 #ifdef CONFIG_PPC_PS3
1032 #include "ohci-ps3.c"
1033 #define PS3_SYSTEM_BUS_DRIVER   ps3_ohci_driver
1034 #endif
1035
1036 #ifdef CONFIG_USB_OHCI_HCD_SSB
1037 #include "ohci-ssb.c"
1038 #define SSB_OHCI_DRIVER         ssb_ohci_driver
1039 #endif
1040
1041 #if     !defined(PCI_DRIVER) &&         \
1042         !defined(PLATFORM_DRIVER) &&    \
1043         !defined(OF_PLATFORM_DRIVER) && \
1044         !defined(SA1111_DRIVER) &&      \
1045         !defined(PS3_SYSTEM_BUS_DRIVER) && \
1046         !defined(SSB_OHCI_DRIVER)
1047 #error "missing bus glue for ohci-hcd"
1048 #endif
1049
1050 static int __init ohci_hcd_mod_init(void)
1051 {
1052         int retval = 0;
1053
1054         if (usb_disabled())
1055                 return -ENODEV;
1056
1057         printk (KERN_DEBUG "%s: " DRIVER_INFO "\n", hcd_name);
1058         pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
1059                 sizeof (struct ed), sizeof (struct td));
1060
1061 #ifdef PS3_SYSTEM_BUS_DRIVER
1062         retval = ps3_ohci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1063         if (retval < 0)
1064                 goto error_ps3;
1065 #endif
1066
1067 #ifdef PLATFORM_DRIVER
1068         retval = platform_driver_register(&PLATFORM_DRIVER);
1069         if (retval < 0)
1070                 goto error_platform;
1071 #endif
1072
1073 #ifdef OF_PLATFORM_DRIVER
1074         retval = of_register_platform_driver(&OF_PLATFORM_DRIVER);
1075         if (retval < 0)
1076                 goto error_of_platform;
1077 #endif
1078
1079 #ifdef SA1111_DRIVER
1080         retval = sa1111_driver_register(&SA1111_DRIVER);
1081         if (retval < 0)
1082                 goto error_sa1111;
1083 #endif
1084
1085 #ifdef PCI_DRIVER
1086         retval = pci_register_driver(&PCI_DRIVER);
1087         if (retval < 0)
1088                 goto error_pci;
1089 #endif
1090
1091 #ifdef SSB_OHCI_DRIVER
1092         retval = ssb_driver_register(&SSB_OHCI_DRIVER);
1093         if (retval)
1094                 goto error_ssb;
1095 #endif
1096
1097         return retval;
1098
1099         /* Error path */
1100 #ifdef SSB_OHCI_DRIVER
1101  error_ssb:
1102 #endif
1103 #ifdef PCI_DRIVER
1104         pci_unregister_driver(&PCI_DRIVER);
1105  error_pci:
1106 #endif
1107 #ifdef SA1111_DRIVER
1108         sa1111_driver_unregister(&SA1111_DRIVER);
1109  error_sa1111:
1110 #endif
1111 #ifdef OF_PLATFORM_DRIVER
1112         of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1113  error_of_platform:
1114 #endif
1115 #ifdef PLATFORM_DRIVER
1116         platform_driver_unregister(&PLATFORM_DRIVER);
1117  error_platform:
1118 #endif
1119 #ifdef PS3_SYSTEM_BUS_DRIVER
1120         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1121  error_ps3:
1122 #endif
1123         return retval;
1124 }
1125 module_init(ohci_hcd_mod_init);
1126
1127 static void __exit ohci_hcd_mod_exit(void)
1128 {
1129 #ifdef SSB_OHCI_DRIVER
1130         ssb_driver_unregister(&SSB_OHCI_DRIVER);
1131 #endif
1132 #ifdef PCI_DRIVER
1133         pci_unregister_driver(&PCI_DRIVER);
1134 #endif
1135 #ifdef SA1111_DRIVER
1136         sa1111_driver_unregister(&SA1111_DRIVER);
1137 #endif
1138 #ifdef OF_PLATFORM_DRIVER
1139         of_unregister_platform_driver(&OF_PLATFORM_DRIVER);
1140 #endif
1141 #ifdef PLATFORM_DRIVER
1142         platform_driver_unregister(&PLATFORM_DRIVER);
1143 #endif
1144 #ifdef PS3_SYSTEM_BUS_DRIVER
1145         ps3_ohci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1146 #endif
1147 }
1148 module_exit(ohci_hcd_mod_exit);
1149