IB/ipath: Fix IB_EVENT_PORT_ERR event
[linux-2.6] / drivers / infiniband / hw / ipath / ipath_verbs.c
1 /*
2  * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
3  * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
4  *
5  * This software is available to you under a choice of one of two
6  * licenses.  You may choose to be licensed under the terms of the GNU
7  * General Public License (GPL) Version 2, available from the file
8  * COPYING in the main directory of this source tree, or the
9  * OpenIB.org BSD license below:
10  *
11  *     Redistribution and use in source and binary forms, with or
12  *     without modification, are permitted provided that the following
13  *     conditions are met:
14  *
15  *      - Redistributions of source code must retain the above
16  *        copyright notice, this list of conditions and the following
17  *        disclaimer.
18  *
19  *      - Redistributions in binary form must reproduce the above
20  *        copyright notice, this list of conditions and the following
21  *        disclaimer in the documentation and/or other materials
22  *        provided with the distribution.
23  *
24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31  * SOFTWARE.
32  */
33
34 #include <rdma/ib_mad.h>
35 #include <rdma/ib_user_verbs.h>
36 #include <linux/io.h>
37 #include <linux/utsname.h>
38
39 #include "ipath_kernel.h"
40 #include "ipath_verbs.h"
41 #include "ipath_common.h"
42
43 static unsigned int ib_ipath_qp_table_size = 251;
44 module_param_named(qp_table_size, ib_ipath_qp_table_size, uint, S_IRUGO);
45 MODULE_PARM_DESC(qp_table_size, "QP table size");
46
47 unsigned int ib_ipath_lkey_table_size = 12;
48 module_param_named(lkey_table_size, ib_ipath_lkey_table_size, uint,
49                    S_IRUGO);
50 MODULE_PARM_DESC(lkey_table_size,
51                  "LKEY table size in bits (2^n, 1 <= n <= 23)");
52
53 static unsigned int ib_ipath_max_pds = 0xFFFF;
54 module_param_named(max_pds, ib_ipath_max_pds, uint, S_IWUSR | S_IRUGO);
55 MODULE_PARM_DESC(max_pds,
56                  "Maximum number of protection domains to support");
57
58 static unsigned int ib_ipath_max_ahs = 0xFFFF;
59 module_param_named(max_ahs, ib_ipath_max_ahs, uint, S_IWUSR | S_IRUGO);
60 MODULE_PARM_DESC(max_ahs, "Maximum number of address handles to support");
61
62 unsigned int ib_ipath_max_cqes = 0x2FFFF;
63 module_param_named(max_cqes, ib_ipath_max_cqes, uint, S_IWUSR | S_IRUGO);
64 MODULE_PARM_DESC(max_cqes,
65                  "Maximum number of completion queue entries to support");
66
67 unsigned int ib_ipath_max_cqs = 0x1FFFF;
68 module_param_named(max_cqs, ib_ipath_max_cqs, uint, S_IWUSR | S_IRUGO);
69 MODULE_PARM_DESC(max_cqs, "Maximum number of completion queues to support");
70
71 unsigned int ib_ipath_max_qp_wrs = 0x3FFF;
72 module_param_named(max_qp_wrs, ib_ipath_max_qp_wrs, uint,
73                    S_IWUSR | S_IRUGO);
74 MODULE_PARM_DESC(max_qp_wrs, "Maximum number of QP WRs to support");
75
76 unsigned int ib_ipath_max_qps = 16384;
77 module_param_named(max_qps, ib_ipath_max_qps, uint, S_IWUSR | S_IRUGO);
78 MODULE_PARM_DESC(max_qps, "Maximum number of QPs to support");
79
80 unsigned int ib_ipath_max_sges = 0x60;
81 module_param_named(max_sges, ib_ipath_max_sges, uint, S_IWUSR | S_IRUGO);
82 MODULE_PARM_DESC(max_sges, "Maximum number of SGEs to support");
83
84 unsigned int ib_ipath_max_mcast_grps = 16384;
85 module_param_named(max_mcast_grps, ib_ipath_max_mcast_grps, uint,
86                    S_IWUSR | S_IRUGO);
87 MODULE_PARM_DESC(max_mcast_grps,
88                  "Maximum number of multicast groups to support");
89
90 unsigned int ib_ipath_max_mcast_qp_attached = 16;
91 module_param_named(max_mcast_qp_attached, ib_ipath_max_mcast_qp_attached,
92                    uint, S_IWUSR | S_IRUGO);
93 MODULE_PARM_DESC(max_mcast_qp_attached,
94                  "Maximum number of attached QPs to support");
95
96 unsigned int ib_ipath_max_srqs = 1024;
97 module_param_named(max_srqs, ib_ipath_max_srqs, uint, S_IWUSR | S_IRUGO);
98 MODULE_PARM_DESC(max_srqs, "Maximum number of SRQs to support");
99
100 unsigned int ib_ipath_max_srq_sges = 128;
101 module_param_named(max_srq_sges, ib_ipath_max_srq_sges,
102                    uint, S_IWUSR | S_IRUGO);
103 MODULE_PARM_DESC(max_srq_sges, "Maximum number of SRQ SGEs to support");
104
105 unsigned int ib_ipath_max_srq_wrs = 0x1FFFF;
106 module_param_named(max_srq_wrs, ib_ipath_max_srq_wrs,
107                    uint, S_IWUSR | S_IRUGO);
108 MODULE_PARM_DESC(max_srq_wrs, "Maximum number of SRQ WRs support");
109
110 static unsigned int ib_ipath_disable_sma;
111 module_param_named(disable_sma, ib_ipath_disable_sma, uint, S_IWUSR | S_IRUGO);
112 MODULE_PARM_DESC(ib_ipath_disable_sma, "Disable the SMA");
113
114 const int ib_ipath_state_ops[IB_QPS_ERR + 1] = {
115         [IB_QPS_RESET] = 0,
116         [IB_QPS_INIT] = IPATH_POST_RECV_OK,
117         [IB_QPS_RTR] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK,
118         [IB_QPS_RTS] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK |
119             IPATH_POST_SEND_OK | IPATH_PROCESS_SEND_OK,
120         [IB_QPS_SQD] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK |
121             IPATH_POST_SEND_OK,
122         [IB_QPS_SQE] = IPATH_POST_RECV_OK | IPATH_PROCESS_RECV_OK,
123         [IB_QPS_ERR] = 0,
124 };
125
126 struct ipath_ucontext {
127         struct ib_ucontext ibucontext;
128 };
129
130 static inline struct ipath_ucontext *to_iucontext(struct ib_ucontext
131                                                   *ibucontext)
132 {
133         return container_of(ibucontext, struct ipath_ucontext, ibucontext);
134 }
135
136 /*
137  * Translate ib_wr_opcode into ib_wc_opcode.
138  */
139 const enum ib_wc_opcode ib_ipath_wc_opcode[] = {
140         [IB_WR_RDMA_WRITE] = IB_WC_RDMA_WRITE,
141         [IB_WR_RDMA_WRITE_WITH_IMM] = IB_WC_RDMA_WRITE,
142         [IB_WR_SEND] = IB_WC_SEND,
143         [IB_WR_SEND_WITH_IMM] = IB_WC_SEND,
144         [IB_WR_RDMA_READ] = IB_WC_RDMA_READ,
145         [IB_WR_ATOMIC_CMP_AND_SWP] = IB_WC_COMP_SWAP,
146         [IB_WR_ATOMIC_FETCH_AND_ADD] = IB_WC_FETCH_ADD
147 };
148
149 /*
150  * System image GUID.
151  */
152 static __be64 sys_image_guid;
153
154 /**
155  * ipath_copy_sge - copy data to SGE memory
156  * @ss: the SGE state
157  * @data: the data to copy
158  * @length: the length of the data
159  */
160 void ipath_copy_sge(struct ipath_sge_state *ss, void *data, u32 length)
161 {
162         struct ipath_sge *sge = &ss->sge;
163
164         while (length) {
165                 u32 len = sge->length;
166
167                 if (len > length)
168                         len = length;
169                 if (len > sge->sge_length)
170                         len = sge->sge_length;
171                 BUG_ON(len == 0);
172                 memcpy(sge->vaddr, data, len);
173                 sge->vaddr += len;
174                 sge->length -= len;
175                 sge->sge_length -= len;
176                 if (sge->sge_length == 0) {
177                         if (--ss->num_sge)
178                                 *sge = *ss->sg_list++;
179                 } else if (sge->length == 0 && sge->mr != NULL) {
180                         if (++sge->n >= IPATH_SEGSZ) {
181                                 if (++sge->m >= sge->mr->mapsz)
182                                         break;
183                                 sge->n = 0;
184                         }
185                         sge->vaddr =
186                                 sge->mr->map[sge->m]->segs[sge->n].vaddr;
187                         sge->length =
188                                 sge->mr->map[sge->m]->segs[sge->n].length;
189                 }
190                 data += len;
191                 length -= len;
192         }
193 }
194
195 /**
196  * ipath_skip_sge - skip over SGE memory - XXX almost dup of prev func
197  * @ss: the SGE state
198  * @length: the number of bytes to skip
199  */
200 void ipath_skip_sge(struct ipath_sge_state *ss, u32 length)
201 {
202         struct ipath_sge *sge = &ss->sge;
203
204         while (length) {
205                 u32 len = sge->length;
206
207                 if (len > length)
208                         len = length;
209                 if (len > sge->sge_length)
210                         len = sge->sge_length;
211                 BUG_ON(len == 0);
212                 sge->vaddr += len;
213                 sge->length -= len;
214                 sge->sge_length -= len;
215                 if (sge->sge_length == 0) {
216                         if (--ss->num_sge)
217                                 *sge = *ss->sg_list++;
218                 } else if (sge->length == 0 && sge->mr != NULL) {
219                         if (++sge->n >= IPATH_SEGSZ) {
220                                 if (++sge->m >= sge->mr->mapsz)
221                                         break;
222                                 sge->n = 0;
223                         }
224                         sge->vaddr =
225                                 sge->mr->map[sge->m]->segs[sge->n].vaddr;
226                         sge->length =
227                                 sge->mr->map[sge->m]->segs[sge->n].length;
228                 }
229                 length -= len;
230         }
231 }
232
233 static void ipath_flush_wqe(struct ipath_qp *qp, struct ib_send_wr *wr)
234 {
235         struct ib_wc wc;
236
237         memset(&wc, 0, sizeof(wc));
238         wc.wr_id = wr->wr_id;
239         wc.status = IB_WC_WR_FLUSH_ERR;
240         wc.opcode = ib_ipath_wc_opcode[wr->opcode];
241         wc.qp = &qp->ibqp;
242         ipath_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 1);
243 }
244
245 /**
246  * ipath_post_one_send - post one RC, UC, or UD send work request
247  * @qp: the QP to post on
248  * @wr: the work request to send
249  */
250 static int ipath_post_one_send(struct ipath_qp *qp, struct ib_send_wr *wr)
251 {
252         struct ipath_swqe *wqe;
253         u32 next;
254         int i;
255         int j;
256         int acc;
257         int ret;
258         unsigned long flags;
259
260         spin_lock_irqsave(&qp->s_lock, flags);
261
262         /* Check that state is OK to post send. */
263         if (unlikely(!(ib_ipath_state_ops[qp->state] & IPATH_POST_SEND_OK))) {
264                 if (qp->state != IB_QPS_SQE && qp->state != IB_QPS_ERR)
265                         goto bail_inval;
266                 /* C10-96 says generate a flushed completion entry. */
267                 ipath_flush_wqe(qp, wr);
268                 ret = 0;
269                 goto bail;
270         }
271
272         /* IB spec says that num_sge == 0 is OK. */
273         if (wr->num_sge > qp->s_max_sge)
274                 goto bail_inval;
275
276         /*
277          * Don't allow RDMA reads or atomic operations on UC or
278          * undefined operations.
279          * Make sure buffer is large enough to hold the result for atomics.
280          */
281         if (qp->ibqp.qp_type == IB_QPT_UC) {
282                 if ((unsigned) wr->opcode >= IB_WR_RDMA_READ)
283                         goto bail_inval;
284         } else if (qp->ibqp.qp_type == IB_QPT_UD) {
285                 /* Check UD opcode */
286                 if (wr->opcode != IB_WR_SEND &&
287                     wr->opcode != IB_WR_SEND_WITH_IMM)
288                         goto bail_inval;
289                 /* Check UD destination address PD */
290                 if (qp->ibqp.pd != wr->wr.ud.ah->pd)
291                         goto bail_inval;
292         } else if ((unsigned) wr->opcode > IB_WR_ATOMIC_FETCH_AND_ADD)
293                 goto bail_inval;
294         else if (wr->opcode >= IB_WR_ATOMIC_CMP_AND_SWP &&
295                    (wr->num_sge == 0 ||
296                     wr->sg_list[0].length < sizeof(u64) ||
297                     wr->sg_list[0].addr & (sizeof(u64) - 1)))
298                 goto bail_inval;
299         else if (wr->opcode >= IB_WR_RDMA_READ && !qp->s_max_rd_atomic)
300                 goto bail_inval;
301
302         next = qp->s_head + 1;
303         if (next >= qp->s_size)
304                 next = 0;
305         if (next == qp->s_last)
306                 goto bail_inval;
307
308         wqe = get_swqe_ptr(qp, qp->s_head);
309         wqe->wr = *wr;
310         wqe->ssn = qp->s_ssn++;
311         wqe->length = 0;
312         if (wr->num_sge) {
313                 acc = wr->opcode >= IB_WR_RDMA_READ ?
314                         IB_ACCESS_LOCAL_WRITE : 0;
315                 for (i = 0, j = 0; i < wr->num_sge; i++) {
316                         u32 length = wr->sg_list[i].length;
317                         int ok;
318
319                         if (length == 0)
320                                 continue;
321                         ok = ipath_lkey_ok(qp, &wqe->sg_list[j],
322                                            &wr->sg_list[i], acc);
323                         if (!ok)
324                                 goto bail_inval;
325                         wqe->length += length;
326                         j++;
327                 }
328                 wqe->wr.num_sge = j;
329         }
330         if (qp->ibqp.qp_type == IB_QPT_UC ||
331             qp->ibqp.qp_type == IB_QPT_RC) {
332                 if (wqe->length > 0x80000000U)
333                         goto bail_inval;
334         } else if (wqe->length > to_idev(qp->ibqp.device)->dd->ipath_ibmtu)
335                 goto bail_inval;
336         qp->s_head = next;
337
338         ret = 0;
339         goto bail;
340
341 bail_inval:
342         ret = -EINVAL;
343 bail:
344         spin_unlock_irqrestore(&qp->s_lock, flags);
345         return ret;
346 }
347
348 /**
349  * ipath_post_send - post a send on a QP
350  * @ibqp: the QP to post the send on
351  * @wr: the list of work requests to post
352  * @bad_wr: the first bad WR is put here
353  *
354  * This may be called from interrupt context.
355  */
356 static int ipath_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
357                            struct ib_send_wr **bad_wr)
358 {
359         struct ipath_qp *qp = to_iqp(ibqp);
360         int err = 0;
361
362         for (; wr; wr = wr->next) {
363                 err = ipath_post_one_send(qp, wr);
364                 if (err) {
365                         *bad_wr = wr;
366                         goto bail;
367                 }
368         }
369
370         /* Try to do the send work in the caller's context. */
371         ipath_do_send((unsigned long) qp);
372
373 bail:
374         return err;
375 }
376
377 /**
378  * ipath_post_receive - post a receive on a QP
379  * @ibqp: the QP to post the receive on
380  * @wr: the WR to post
381  * @bad_wr: the first bad WR is put here
382  *
383  * This may be called from interrupt context.
384  */
385 static int ipath_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
386                               struct ib_recv_wr **bad_wr)
387 {
388         struct ipath_qp *qp = to_iqp(ibqp);
389         struct ipath_rwq *wq = qp->r_rq.wq;
390         unsigned long flags;
391         int ret;
392
393         /* Check that state is OK to post receive. */
394         if (!(ib_ipath_state_ops[qp->state] & IPATH_POST_RECV_OK) || !wq) {
395                 *bad_wr = wr;
396                 ret = -EINVAL;
397                 goto bail;
398         }
399
400         for (; wr; wr = wr->next) {
401                 struct ipath_rwqe *wqe;
402                 u32 next;
403                 int i;
404
405                 if ((unsigned) wr->num_sge > qp->r_rq.max_sge) {
406                         *bad_wr = wr;
407                         ret = -ENOMEM;
408                         goto bail;
409                 }
410
411                 spin_lock_irqsave(&qp->r_rq.lock, flags);
412                 next = wq->head + 1;
413                 if (next >= qp->r_rq.size)
414                         next = 0;
415                 if (next == wq->tail) {
416                         spin_unlock_irqrestore(&qp->r_rq.lock, flags);
417                         *bad_wr = wr;
418                         ret = -ENOMEM;
419                         goto bail;
420                 }
421
422                 wqe = get_rwqe_ptr(&qp->r_rq, wq->head);
423                 wqe->wr_id = wr->wr_id;
424                 wqe->num_sge = wr->num_sge;
425                 for (i = 0; i < wr->num_sge; i++)
426                         wqe->sg_list[i] = wr->sg_list[i];
427                 /* Make sure queue entry is written before the head index. */
428                 smp_wmb();
429                 wq->head = next;
430                 spin_unlock_irqrestore(&qp->r_rq.lock, flags);
431         }
432         ret = 0;
433
434 bail:
435         return ret;
436 }
437
438 /**
439  * ipath_qp_rcv - processing an incoming packet on a QP
440  * @dev: the device the packet came on
441  * @hdr: the packet header
442  * @has_grh: true if the packet has a GRH
443  * @data: the packet data
444  * @tlen: the packet length
445  * @qp: the QP the packet came on
446  *
447  * This is called from ipath_ib_rcv() to process an incoming packet
448  * for the given QP.
449  * Called at interrupt level.
450  */
451 static void ipath_qp_rcv(struct ipath_ibdev *dev,
452                          struct ipath_ib_header *hdr, int has_grh,
453                          void *data, u32 tlen, struct ipath_qp *qp)
454 {
455         /* Check for valid receive state. */
456         if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_RECV_OK)) {
457                 dev->n_pkt_drops++;
458                 return;
459         }
460
461         switch (qp->ibqp.qp_type) {
462         case IB_QPT_SMI:
463         case IB_QPT_GSI:
464                 if (ib_ipath_disable_sma)
465                         break;
466                 /* FALLTHROUGH */
467         case IB_QPT_UD:
468                 ipath_ud_rcv(dev, hdr, has_grh, data, tlen, qp);
469                 break;
470
471         case IB_QPT_RC:
472                 ipath_rc_rcv(dev, hdr, has_grh, data, tlen, qp);
473                 break;
474
475         case IB_QPT_UC:
476                 ipath_uc_rcv(dev, hdr, has_grh, data, tlen, qp);
477                 break;
478
479         default:
480                 break;
481         }
482 }
483
484 /**
485  * ipath_ib_rcv - process an incoming packet
486  * @arg: the device pointer
487  * @rhdr: the header of the packet
488  * @data: the packet data
489  * @tlen: the packet length
490  *
491  * This is called from ipath_kreceive() to process an incoming packet at
492  * interrupt level. Tlen is the length of the header + data + CRC in bytes.
493  */
494 void ipath_ib_rcv(struct ipath_ibdev *dev, void *rhdr, void *data,
495                   u32 tlen)
496 {
497         struct ipath_ib_header *hdr = rhdr;
498         struct ipath_other_headers *ohdr;
499         struct ipath_qp *qp;
500         u32 qp_num;
501         int lnh;
502         u8 opcode;
503         u16 lid;
504
505         if (unlikely(dev == NULL))
506                 goto bail;
507
508         if (unlikely(tlen < 24)) {      /* LRH+BTH+CRC */
509                 dev->rcv_errors++;
510                 goto bail;
511         }
512
513         /* Check for a valid destination LID (see ch. 7.11.1). */
514         lid = be16_to_cpu(hdr->lrh[1]);
515         if (lid < IPATH_MULTICAST_LID_BASE) {
516                 lid &= ~((1 << dev->dd->ipath_lmc) - 1);
517                 if (unlikely(lid != dev->dd->ipath_lid)) {
518                         dev->rcv_errors++;
519                         goto bail;
520                 }
521         }
522
523         /* Check for GRH */
524         lnh = be16_to_cpu(hdr->lrh[0]) & 3;
525         if (lnh == IPATH_LRH_BTH)
526                 ohdr = &hdr->u.oth;
527         else if (lnh == IPATH_LRH_GRH)
528                 ohdr = &hdr->u.l.oth;
529         else {
530                 dev->rcv_errors++;
531                 goto bail;
532         }
533
534         opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
535         dev->opstats[opcode].n_bytes += tlen;
536         dev->opstats[opcode].n_packets++;
537
538         /* Get the destination QP number. */
539         qp_num = be32_to_cpu(ohdr->bth[1]) & IPATH_QPN_MASK;
540         if (qp_num == IPATH_MULTICAST_QPN) {
541                 struct ipath_mcast *mcast;
542                 struct ipath_mcast_qp *p;
543
544                 if (lnh != IPATH_LRH_GRH) {
545                         dev->n_pkt_drops++;
546                         goto bail;
547                 }
548                 mcast = ipath_mcast_find(&hdr->u.l.grh.dgid);
549                 if (mcast == NULL) {
550                         dev->n_pkt_drops++;
551                         goto bail;
552                 }
553                 dev->n_multicast_rcv++;
554                 list_for_each_entry_rcu(p, &mcast->qp_list, list)
555                         ipath_qp_rcv(dev, hdr, 1, data, tlen, p->qp);
556                 /*
557                  * Notify ipath_multicast_detach() if it is waiting for us
558                  * to finish.
559                  */
560                 if (atomic_dec_return(&mcast->refcount) <= 1)
561                         wake_up(&mcast->wait);
562         } else {
563                 qp = ipath_lookup_qpn(&dev->qp_table, qp_num);
564                 if (qp) {
565                         dev->n_unicast_rcv++;
566                         ipath_qp_rcv(dev, hdr, lnh == IPATH_LRH_GRH, data,
567                                      tlen, qp);
568                         /*
569                          * Notify ipath_destroy_qp() if it is waiting
570                          * for us to finish.
571                          */
572                         if (atomic_dec_and_test(&qp->refcount))
573                                 wake_up(&qp->wait);
574                 } else
575                         dev->n_pkt_drops++;
576         }
577
578 bail:;
579 }
580
581 /**
582  * ipath_ib_timer - verbs timer
583  * @arg: the device pointer
584  *
585  * This is called from ipath_do_rcv_timer() at interrupt level to check for
586  * QPs which need retransmits and to collect performance numbers.
587  */
588 static void ipath_ib_timer(struct ipath_ibdev *dev)
589 {
590         struct ipath_qp *resend = NULL;
591         struct list_head *last;
592         struct ipath_qp *qp;
593         unsigned long flags;
594
595         if (dev == NULL)
596                 return;
597
598         spin_lock_irqsave(&dev->pending_lock, flags);
599         /* Start filling the next pending queue. */
600         if (++dev->pending_index >= ARRAY_SIZE(dev->pending))
601                 dev->pending_index = 0;
602         /* Save any requests still in the new queue, they have timed out. */
603         last = &dev->pending[dev->pending_index];
604         while (!list_empty(last)) {
605                 qp = list_entry(last->next, struct ipath_qp, timerwait);
606                 list_del_init(&qp->timerwait);
607                 qp->timer_next = resend;
608                 resend = qp;
609                 atomic_inc(&qp->refcount);
610         }
611         last = &dev->rnrwait;
612         if (!list_empty(last)) {
613                 qp = list_entry(last->next, struct ipath_qp, timerwait);
614                 if (--qp->s_rnr_timeout == 0) {
615                         do {
616                                 list_del_init(&qp->timerwait);
617                                 tasklet_hi_schedule(&qp->s_task);
618                                 if (list_empty(last))
619                                         break;
620                                 qp = list_entry(last->next, struct ipath_qp,
621                                                 timerwait);
622                         } while (qp->s_rnr_timeout == 0);
623                 }
624         }
625         /*
626          * We should only be in the started state if pma_sample_start != 0
627          */
628         if (dev->pma_sample_status == IB_PMA_SAMPLE_STATUS_STARTED &&
629             --dev->pma_sample_start == 0) {
630                 dev->pma_sample_status = IB_PMA_SAMPLE_STATUS_RUNNING;
631                 ipath_snapshot_counters(dev->dd, &dev->ipath_sword,
632                                         &dev->ipath_rword,
633                                         &dev->ipath_spkts,
634                                         &dev->ipath_rpkts,
635                                         &dev->ipath_xmit_wait);
636         }
637         if (dev->pma_sample_status == IB_PMA_SAMPLE_STATUS_RUNNING) {
638                 if (dev->pma_sample_interval == 0) {
639                         u64 ta, tb, tc, td, te;
640
641                         dev->pma_sample_status = IB_PMA_SAMPLE_STATUS_DONE;
642                         ipath_snapshot_counters(dev->dd, &ta, &tb,
643                                                 &tc, &td, &te);
644
645                         dev->ipath_sword = ta - dev->ipath_sword;
646                         dev->ipath_rword = tb - dev->ipath_rword;
647                         dev->ipath_spkts = tc - dev->ipath_spkts;
648                         dev->ipath_rpkts = td - dev->ipath_rpkts;
649                         dev->ipath_xmit_wait = te - dev->ipath_xmit_wait;
650                 }
651                 else
652                         dev->pma_sample_interval--;
653         }
654         spin_unlock_irqrestore(&dev->pending_lock, flags);
655
656         /* XXX What if timer fires again while this is running? */
657         for (qp = resend; qp != NULL; qp = qp->timer_next) {
658                 struct ib_wc wc;
659
660                 spin_lock_irqsave(&qp->s_lock, flags);
661                 if (qp->s_last != qp->s_tail && qp->state == IB_QPS_RTS) {
662                         dev->n_timeouts++;
663                         ipath_restart_rc(qp, qp->s_last_psn + 1, &wc);
664                 }
665                 spin_unlock_irqrestore(&qp->s_lock, flags);
666
667                 /* Notify ipath_destroy_qp() if it is waiting. */
668                 if (atomic_dec_and_test(&qp->refcount))
669                         wake_up(&qp->wait);
670         }
671 }
672
673 static void update_sge(struct ipath_sge_state *ss, u32 length)
674 {
675         struct ipath_sge *sge = &ss->sge;
676
677         sge->vaddr += length;
678         sge->length -= length;
679         sge->sge_length -= length;
680         if (sge->sge_length == 0) {
681                 if (--ss->num_sge)
682                         *sge = *ss->sg_list++;
683         } else if (sge->length == 0 && sge->mr != NULL) {
684                 if (++sge->n >= IPATH_SEGSZ) {
685                         if (++sge->m >= sge->mr->mapsz)
686                                 return;
687                         sge->n = 0;
688                 }
689                 sge->vaddr = sge->mr->map[sge->m]->segs[sge->n].vaddr;
690                 sge->length = sge->mr->map[sge->m]->segs[sge->n].length;
691         }
692 }
693
694 #ifdef __LITTLE_ENDIAN
695 static inline u32 get_upper_bits(u32 data, u32 shift)
696 {
697         return data >> shift;
698 }
699
700 static inline u32 set_upper_bits(u32 data, u32 shift)
701 {
702         return data << shift;
703 }
704
705 static inline u32 clear_upper_bytes(u32 data, u32 n, u32 off)
706 {
707         data <<= ((sizeof(u32) - n) * BITS_PER_BYTE);
708         data >>= ((sizeof(u32) - n - off) * BITS_PER_BYTE);
709         return data;
710 }
711 #else
712 static inline u32 get_upper_bits(u32 data, u32 shift)
713 {
714         return data << shift;
715 }
716
717 static inline u32 set_upper_bits(u32 data, u32 shift)
718 {
719         return data >> shift;
720 }
721
722 static inline u32 clear_upper_bytes(u32 data, u32 n, u32 off)
723 {
724         data >>= ((sizeof(u32) - n) * BITS_PER_BYTE);
725         data <<= ((sizeof(u32) - n - off) * BITS_PER_BYTE);
726         return data;
727 }
728 #endif
729
730 static void copy_io(u32 __iomem *piobuf, struct ipath_sge_state *ss,
731                     u32 length, unsigned flush_wc)
732 {
733         u32 extra = 0;
734         u32 data = 0;
735         u32 last;
736
737         while (1) {
738                 u32 len = ss->sge.length;
739                 u32 off;
740
741                 if (len > length)
742                         len = length;
743                 if (len > ss->sge.sge_length)
744                         len = ss->sge.sge_length;
745                 BUG_ON(len == 0);
746                 /* If the source address is not aligned, try to align it. */
747                 off = (unsigned long)ss->sge.vaddr & (sizeof(u32) - 1);
748                 if (off) {
749                         u32 *addr = (u32 *)((unsigned long)ss->sge.vaddr &
750                                             ~(sizeof(u32) - 1));
751                         u32 v = get_upper_bits(*addr, off * BITS_PER_BYTE);
752                         u32 y;
753
754                         y = sizeof(u32) - off;
755                         if (len > y)
756                                 len = y;
757                         if (len + extra >= sizeof(u32)) {
758                                 data |= set_upper_bits(v, extra *
759                                                        BITS_PER_BYTE);
760                                 len = sizeof(u32) - extra;
761                                 if (len == length) {
762                                         last = data;
763                                         break;
764                                 }
765                                 __raw_writel(data, piobuf);
766                                 piobuf++;
767                                 extra = 0;
768                                 data = 0;
769                         } else {
770                                 /* Clear unused upper bytes */
771                                 data |= clear_upper_bytes(v, len, extra);
772                                 if (len == length) {
773                                         last = data;
774                                         break;
775                                 }
776                                 extra += len;
777                         }
778                 } else if (extra) {
779                         /* Source address is aligned. */
780                         u32 *addr = (u32 *) ss->sge.vaddr;
781                         int shift = extra * BITS_PER_BYTE;
782                         int ushift = 32 - shift;
783                         u32 l = len;
784
785                         while (l >= sizeof(u32)) {
786                                 u32 v = *addr;
787
788                                 data |= set_upper_bits(v, shift);
789                                 __raw_writel(data, piobuf);
790                                 data = get_upper_bits(v, ushift);
791                                 piobuf++;
792                                 addr++;
793                                 l -= sizeof(u32);
794                         }
795                         /*
796                          * We still have 'extra' number of bytes leftover.
797                          */
798                         if (l) {
799                                 u32 v = *addr;
800
801                                 if (l + extra >= sizeof(u32)) {
802                                         data |= set_upper_bits(v, shift);
803                                         len -= l + extra - sizeof(u32);
804                                         if (len == length) {
805                                                 last = data;
806                                                 break;
807                                         }
808                                         __raw_writel(data, piobuf);
809                                         piobuf++;
810                                         extra = 0;
811                                         data = 0;
812                                 } else {
813                                         /* Clear unused upper bytes */
814                                         data |= clear_upper_bytes(v, l,
815                                                                   extra);
816                                         if (len == length) {
817                                                 last = data;
818                                                 break;
819                                         }
820                                         extra += l;
821                                 }
822                         } else if (len == length) {
823                                 last = data;
824                                 break;
825                         }
826                 } else if (len == length) {
827                         u32 w;
828
829                         /*
830                          * Need to round up for the last dword in the
831                          * packet.
832                          */
833                         w = (len + 3) >> 2;
834                         __iowrite32_copy(piobuf, ss->sge.vaddr, w - 1);
835                         piobuf += w - 1;
836                         last = ((u32 *) ss->sge.vaddr)[w - 1];
837                         break;
838                 } else {
839                         u32 w = len >> 2;
840
841                         __iowrite32_copy(piobuf, ss->sge.vaddr, w);
842                         piobuf += w;
843
844                         extra = len & (sizeof(u32) - 1);
845                         if (extra) {
846                                 u32 v = ((u32 *) ss->sge.vaddr)[w];
847
848                                 /* Clear unused upper bytes */
849                                 data = clear_upper_bytes(v, extra, 0);
850                         }
851                 }
852                 update_sge(ss, len);
853                 length -= len;
854         }
855         /* Update address before sending packet. */
856         update_sge(ss, length);
857         if (flush_wc) {
858                 /* must flush early everything before trigger word */
859                 ipath_flush_wc();
860                 __raw_writel(last, piobuf);
861                 /* be sure trigger word is written */
862                 ipath_flush_wc();
863         } else
864                 __raw_writel(last, piobuf);
865 }
866
867 static int ipath_verbs_send_pio(struct ipath_qp *qp, u32 *hdr, u32 hdrwords,
868                                 struct ipath_sge_state *ss, u32 len,
869                                 u32 plen, u32 dwords)
870 {
871         struct ipath_devdata *dd = to_idev(qp->ibqp.device)->dd;
872         u32 __iomem *piobuf;
873         unsigned flush_wc;
874         int ret;
875
876         piobuf = ipath_getpiobuf(dd, NULL);
877         if (unlikely(piobuf == NULL)) {
878                 ret = -EBUSY;
879                 goto bail;
880         }
881
882         /*
883          * Write len to control qword, no flags.
884          * We have to flush after the PBC for correctness on some cpus
885          * or WC buffer can be written out of order.
886          */
887         writeq(plen, piobuf);
888         piobuf += 2;
889
890         flush_wc = dd->ipath_flags & IPATH_PIO_FLUSH_WC;
891         if (len == 0) {
892                 /*
893                  * If there is just the header portion, must flush before
894                  * writing last word of header for correctness, and after
895                  * the last header word (trigger word).
896                  */
897                 if (flush_wc) {
898                         ipath_flush_wc();
899                         __iowrite32_copy(piobuf, hdr, hdrwords - 1);
900                         ipath_flush_wc();
901                         __raw_writel(hdr[hdrwords - 1], piobuf + hdrwords - 1);
902                         ipath_flush_wc();
903                 } else
904                         __iowrite32_copy(piobuf, hdr, hdrwords);
905                 goto done;
906         }
907
908         if (flush_wc)
909                 ipath_flush_wc();
910         __iowrite32_copy(piobuf, hdr, hdrwords);
911         piobuf += hdrwords;
912
913         /* The common case is aligned and contained in one segment. */
914         if (likely(ss->num_sge == 1 && len <= ss->sge.length &&
915                    !((unsigned long)ss->sge.vaddr & (sizeof(u32) - 1)))) {
916                 u32 *addr = (u32 *) ss->sge.vaddr;
917
918                 /* Update address before sending packet. */
919                 update_sge(ss, len);
920                 if (flush_wc) {
921                         __iowrite32_copy(piobuf, addr, dwords - 1);
922                         /* must flush early everything before trigger word */
923                         ipath_flush_wc();
924                         __raw_writel(addr[dwords - 1], piobuf + dwords - 1);
925                         /* be sure trigger word is written */
926                         ipath_flush_wc();
927                 } else
928                         __iowrite32_copy(piobuf, addr, dwords);
929                 goto done;
930         }
931         copy_io(piobuf, ss, len, flush_wc);
932 done:
933         if (qp->s_wqe)
934                 ipath_send_complete(qp, qp->s_wqe, IB_WC_SUCCESS);
935         ret = 0;
936 bail:
937         return ret;
938 }
939
940 /**
941  * ipath_verbs_send - send a packet
942  * @qp: the QP to send on
943  * @hdr: the packet header
944  * @hdrwords: the number of words in the header
945  * @ss: the SGE to send
946  * @len: the length of the packet in bytes
947  */
948 int ipath_verbs_send(struct ipath_qp *qp, struct ipath_ib_header *hdr,
949                      u32 hdrwords, struct ipath_sge_state *ss, u32 len)
950 {
951         struct ipath_devdata *dd = to_idev(qp->ibqp.device)->dd;
952         u32 plen;
953         int ret;
954         u32 dwords = (len + 3) >> 2;
955
956         /* +1 is for the qword padding of pbc */
957         plen = hdrwords + dwords + 1;
958
959         /* Drop non-VL15 packets if we are not in the active state */
960         if (!(dd->ipath_flags & IPATH_LINKACTIVE) &&
961             qp->ibqp.qp_type != IB_QPT_SMI) {
962                 if (qp->s_wqe)
963                         ipath_send_complete(qp, qp->s_wqe, IB_WC_SUCCESS);
964                 ret = 0;
965         } else
966                 ret = ipath_verbs_send_pio(qp, (u32 *) hdr, hdrwords,
967                                            ss, len, plen, dwords);
968
969         return ret;
970 }
971
972 int ipath_snapshot_counters(struct ipath_devdata *dd, u64 *swords,
973                             u64 *rwords, u64 *spkts, u64 *rpkts,
974                             u64 *xmit_wait)
975 {
976         int ret;
977
978         if (!(dd->ipath_flags & IPATH_INITTED)) {
979                 /* no hardware, freeze, etc. */
980                 ret = -EINVAL;
981                 goto bail;
982         }
983         *swords = ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordsendcnt);
984         *rwords = ipath_snap_cntr(dd, dd->ipath_cregs->cr_wordrcvcnt);
985         *spkts = ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktsendcnt);
986         *rpkts = ipath_snap_cntr(dd, dd->ipath_cregs->cr_pktrcvcnt);
987         *xmit_wait = ipath_snap_cntr(dd, dd->ipath_cregs->cr_sendstallcnt);
988
989         ret = 0;
990
991 bail:
992         return ret;
993 }
994
995 /**
996  * ipath_get_counters - get various chip counters
997  * @dd: the infinipath device
998  * @cntrs: counters are placed here
999  *
1000  * Return the counters needed by recv_pma_get_portcounters().
1001  */
1002 int ipath_get_counters(struct ipath_devdata *dd,
1003                        struct ipath_verbs_counters *cntrs)
1004 {
1005         struct ipath_cregs const *crp = dd->ipath_cregs;
1006         int ret;
1007
1008         if (!(dd->ipath_flags & IPATH_INITTED)) {
1009                 /* no hardware, freeze, etc. */
1010                 ret = -EINVAL;
1011                 goto bail;
1012         }
1013         cntrs->symbol_error_counter =
1014                 ipath_snap_cntr(dd, crp->cr_ibsymbolerrcnt);
1015         cntrs->link_error_recovery_counter =
1016                 ipath_snap_cntr(dd, crp->cr_iblinkerrrecovcnt);
1017         /*
1018          * The link downed counter counts when the other side downs the
1019          * connection.  We add in the number of times we downed the link
1020          * due to local link integrity errors to compensate.
1021          */
1022         cntrs->link_downed_counter =
1023                 ipath_snap_cntr(dd, crp->cr_iblinkdowncnt);
1024         cntrs->port_rcv_errors =
1025                 ipath_snap_cntr(dd, crp->cr_rxdroppktcnt) +
1026                 ipath_snap_cntr(dd, crp->cr_rcvovflcnt) +
1027                 ipath_snap_cntr(dd, crp->cr_portovflcnt) +
1028                 ipath_snap_cntr(dd, crp->cr_err_rlencnt) +
1029                 ipath_snap_cntr(dd, crp->cr_invalidrlencnt) +
1030                 ipath_snap_cntr(dd, crp->cr_errlinkcnt) +
1031                 ipath_snap_cntr(dd, crp->cr_erricrccnt) +
1032                 ipath_snap_cntr(dd, crp->cr_errvcrccnt) +
1033                 ipath_snap_cntr(dd, crp->cr_errlpcrccnt) +
1034                 ipath_snap_cntr(dd, crp->cr_badformatcnt) +
1035                 dd->ipath_rxfc_unsupvl_errs;
1036         cntrs->port_rcv_remphys_errors =
1037                 ipath_snap_cntr(dd, crp->cr_rcvebpcnt);
1038         cntrs->port_xmit_discards = ipath_snap_cntr(dd, crp->cr_unsupvlcnt);
1039         cntrs->port_xmit_data = ipath_snap_cntr(dd, crp->cr_wordsendcnt);
1040         cntrs->port_rcv_data = ipath_snap_cntr(dd, crp->cr_wordrcvcnt);
1041         cntrs->port_xmit_packets = ipath_snap_cntr(dd, crp->cr_pktsendcnt);
1042         cntrs->port_rcv_packets = ipath_snap_cntr(dd, crp->cr_pktrcvcnt);
1043         cntrs->local_link_integrity_errors =
1044                 (dd->ipath_flags & IPATH_GPIO_ERRINTRS) ?
1045                 dd->ipath_lli_errs : dd->ipath_lli_errors;
1046         cntrs->excessive_buffer_overrun_errors = dd->ipath_overrun_thresh_errs;
1047
1048         ret = 0;
1049
1050 bail:
1051         return ret;
1052 }
1053
1054 /**
1055  * ipath_ib_piobufavail - callback when a PIO buffer is available
1056  * @arg: the device pointer
1057  *
1058  * This is called from ipath_intr() at interrupt level when a PIO buffer is
1059  * available after ipath_verbs_send() returned an error that no buffers were
1060  * available.  Return 1 if we consumed all the PIO buffers and we still have
1061  * QPs waiting for buffers (for now, just do a tasklet_hi_schedule and
1062  * return zero).
1063  */
1064 int ipath_ib_piobufavail(struct ipath_ibdev *dev)
1065 {
1066         struct ipath_qp *qp;
1067         unsigned long flags;
1068
1069         if (dev == NULL)
1070                 goto bail;
1071
1072         spin_lock_irqsave(&dev->pending_lock, flags);
1073         while (!list_empty(&dev->piowait)) {
1074                 qp = list_entry(dev->piowait.next, struct ipath_qp,
1075                                 piowait);
1076                 list_del_init(&qp->piowait);
1077                 clear_bit(IPATH_S_BUSY, &qp->s_busy);
1078                 tasklet_hi_schedule(&qp->s_task);
1079         }
1080         spin_unlock_irqrestore(&dev->pending_lock, flags);
1081
1082 bail:
1083         return 0;
1084 }
1085
1086 static int ipath_query_device(struct ib_device *ibdev,
1087                               struct ib_device_attr *props)
1088 {
1089         struct ipath_ibdev *dev = to_idev(ibdev);
1090
1091         memset(props, 0, sizeof(*props));
1092
1093         props->device_cap_flags = IB_DEVICE_BAD_PKEY_CNTR |
1094                 IB_DEVICE_BAD_QKEY_CNTR | IB_DEVICE_SHUTDOWN_PORT |
1095                 IB_DEVICE_SYS_IMAGE_GUID;
1096         props->page_size_cap = PAGE_SIZE;
1097         props->vendor_id = dev->dd->ipath_vendorid;
1098         props->vendor_part_id = dev->dd->ipath_deviceid;
1099         props->hw_ver = dev->dd->ipath_pcirev;
1100
1101         props->sys_image_guid = dev->sys_image_guid;
1102
1103         props->max_mr_size = ~0ull;
1104         props->max_qp = ib_ipath_max_qps;
1105         props->max_qp_wr = ib_ipath_max_qp_wrs;
1106         props->max_sge = ib_ipath_max_sges;
1107         props->max_cq = ib_ipath_max_cqs;
1108         props->max_ah = ib_ipath_max_ahs;
1109         props->max_cqe = ib_ipath_max_cqes;
1110         props->max_mr = dev->lk_table.max;
1111         props->max_fmr = dev->lk_table.max;
1112         props->max_map_per_fmr = 32767;
1113         props->max_pd = ib_ipath_max_pds;
1114         props->max_qp_rd_atom = IPATH_MAX_RDMA_ATOMIC;
1115         props->max_qp_init_rd_atom = 255;
1116         /* props->max_res_rd_atom */
1117         props->max_srq = ib_ipath_max_srqs;
1118         props->max_srq_wr = ib_ipath_max_srq_wrs;
1119         props->max_srq_sge = ib_ipath_max_srq_sges;
1120         /* props->local_ca_ack_delay */
1121         props->atomic_cap = IB_ATOMIC_GLOB;
1122         props->max_pkeys = ipath_get_npkeys(dev->dd);
1123         props->max_mcast_grp = ib_ipath_max_mcast_grps;
1124         props->max_mcast_qp_attach = ib_ipath_max_mcast_qp_attached;
1125         props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
1126                 props->max_mcast_grp;
1127
1128         return 0;
1129 }
1130
1131 const u8 ipath_cvt_physportstate[16] = {
1132         [INFINIPATH_IBCS_LT_STATE_DISABLED] = 3,
1133         [INFINIPATH_IBCS_LT_STATE_LINKUP] = 5,
1134         [INFINIPATH_IBCS_LT_STATE_POLLACTIVE] = 2,
1135         [INFINIPATH_IBCS_LT_STATE_POLLQUIET] = 2,
1136         [INFINIPATH_IBCS_LT_STATE_SLEEPDELAY] = 1,
1137         [INFINIPATH_IBCS_LT_STATE_SLEEPQUIET] = 1,
1138         [INFINIPATH_IBCS_LT_STATE_CFGDEBOUNCE] = 4,
1139         [INFINIPATH_IBCS_LT_STATE_CFGRCVFCFG] = 4,
1140         [INFINIPATH_IBCS_LT_STATE_CFGWAITRMT] = 4,
1141         [INFINIPATH_IBCS_LT_STATE_CFGIDLE] = 4,
1142         [INFINIPATH_IBCS_LT_STATE_RECOVERRETRAIN] = 6,
1143         [INFINIPATH_IBCS_LT_STATE_RECOVERWAITRMT] = 6,
1144         [INFINIPATH_IBCS_LT_STATE_RECOVERIDLE] = 6,
1145 };
1146
1147 u32 ipath_get_cr_errpkey(struct ipath_devdata *dd)
1148 {
1149         return ipath_read_creg32(dd, dd->ipath_cregs->cr_errpkey);
1150 }
1151
1152 static int ipath_query_port(struct ib_device *ibdev,
1153                             u8 port, struct ib_port_attr *props)
1154 {
1155         struct ipath_ibdev *dev = to_idev(ibdev);
1156         struct ipath_devdata *dd = dev->dd;
1157         enum ib_mtu mtu;
1158         u16 lid = dd->ipath_lid;
1159         u64 ibcstat;
1160
1161         memset(props, 0, sizeof(*props));
1162         props->lid = lid ? lid : __constant_be16_to_cpu(IB_LID_PERMISSIVE);
1163         props->lmc = dd->ipath_lmc;
1164         props->sm_lid = dev->sm_lid;
1165         props->sm_sl = dev->sm_sl;
1166         ibcstat = dd->ipath_lastibcstat;
1167         props->state = ((ibcstat >> 4) & 0x3) + 1;
1168         /* See phys_state_show() */
1169         props->phys_state = ipath_cvt_physportstate[
1170                 dd->ipath_lastibcstat & 0xf];
1171         props->port_cap_flags = dev->port_cap_flags;
1172         props->gid_tbl_len = 1;
1173         props->max_msg_sz = 0x80000000;
1174         props->pkey_tbl_len = ipath_get_npkeys(dd);
1175         props->bad_pkey_cntr = ipath_get_cr_errpkey(dd) -
1176                 dev->z_pkey_violations;
1177         props->qkey_viol_cntr = dev->qkey_violations;
1178         props->active_width = IB_WIDTH_4X;
1179         /* See rate_show() */
1180         props->active_speed = 1;        /* Regular 10Mbs speed. */
1181         props->max_vl_num = 1;          /* VLCap = VL0 */
1182         props->init_type_reply = 0;
1183
1184         /*
1185          * Note: the chip supports a maximum MTU of 4096, but the driver
1186          * hasn't implemented this feature yet, so set the maximum value
1187          * to 2048.
1188          */
1189         props->max_mtu = IB_MTU_2048;
1190         switch (dd->ipath_ibmtu) {
1191         case 4096:
1192                 mtu = IB_MTU_4096;
1193                 break;
1194         case 2048:
1195                 mtu = IB_MTU_2048;
1196                 break;
1197         case 1024:
1198                 mtu = IB_MTU_1024;
1199                 break;
1200         case 512:
1201                 mtu = IB_MTU_512;
1202                 break;
1203         case 256:
1204                 mtu = IB_MTU_256;
1205                 break;
1206         default:
1207                 mtu = IB_MTU_2048;
1208         }
1209         props->active_mtu = mtu;
1210         props->subnet_timeout = dev->subnet_timeout;
1211
1212         return 0;
1213 }
1214
1215 static int ipath_modify_device(struct ib_device *device,
1216                                int device_modify_mask,
1217                                struct ib_device_modify *device_modify)
1218 {
1219         int ret;
1220
1221         if (device_modify_mask & ~(IB_DEVICE_MODIFY_SYS_IMAGE_GUID |
1222                                    IB_DEVICE_MODIFY_NODE_DESC)) {
1223                 ret = -EOPNOTSUPP;
1224                 goto bail;
1225         }
1226
1227         if (device_modify_mask & IB_DEVICE_MODIFY_NODE_DESC)
1228                 memcpy(device->node_desc, device_modify->node_desc, 64);
1229
1230         if (device_modify_mask & IB_DEVICE_MODIFY_SYS_IMAGE_GUID)
1231                 to_idev(device)->sys_image_guid =
1232                         cpu_to_be64(device_modify->sys_image_guid);
1233
1234         ret = 0;
1235
1236 bail:
1237         return ret;
1238 }
1239
1240 static int ipath_modify_port(struct ib_device *ibdev,
1241                              u8 port, int port_modify_mask,
1242                              struct ib_port_modify *props)
1243 {
1244         struct ipath_ibdev *dev = to_idev(ibdev);
1245
1246         dev->port_cap_flags |= props->set_port_cap_mask;
1247         dev->port_cap_flags &= ~props->clr_port_cap_mask;
1248         if (port_modify_mask & IB_PORT_SHUTDOWN)
1249                 ipath_set_linkstate(dev->dd, IPATH_IB_LINKDOWN);
1250         if (port_modify_mask & IB_PORT_RESET_QKEY_CNTR)
1251                 dev->qkey_violations = 0;
1252         return 0;
1253 }
1254
1255 static int ipath_query_gid(struct ib_device *ibdev, u8 port,
1256                            int index, union ib_gid *gid)
1257 {
1258         struct ipath_ibdev *dev = to_idev(ibdev);
1259         int ret;
1260
1261         if (index >= 1) {
1262                 ret = -EINVAL;
1263                 goto bail;
1264         }
1265         gid->global.subnet_prefix = dev->gid_prefix;
1266         gid->global.interface_id = dev->dd->ipath_guid;
1267
1268         ret = 0;
1269
1270 bail:
1271         return ret;
1272 }
1273
1274 static struct ib_pd *ipath_alloc_pd(struct ib_device *ibdev,
1275                                     struct ib_ucontext *context,
1276                                     struct ib_udata *udata)
1277 {
1278         struct ipath_ibdev *dev = to_idev(ibdev);
1279         struct ipath_pd *pd;
1280         struct ib_pd *ret;
1281
1282         /*
1283          * This is actually totally arbitrary.  Some correctness tests
1284          * assume there's a maximum number of PDs that can be allocated.
1285          * We don't actually have this limit, but we fail the test if
1286          * we allow allocations of more than we report for this value.
1287          */
1288
1289         pd = kmalloc(sizeof *pd, GFP_KERNEL);
1290         if (!pd) {
1291                 ret = ERR_PTR(-ENOMEM);
1292                 goto bail;
1293         }
1294
1295         spin_lock(&dev->n_pds_lock);
1296         if (dev->n_pds_allocated == ib_ipath_max_pds) {
1297                 spin_unlock(&dev->n_pds_lock);
1298                 kfree(pd);
1299                 ret = ERR_PTR(-ENOMEM);
1300                 goto bail;
1301         }
1302
1303         dev->n_pds_allocated++;
1304         spin_unlock(&dev->n_pds_lock);
1305
1306         /* ib_alloc_pd() will initialize pd->ibpd. */
1307         pd->user = udata != NULL;
1308
1309         ret = &pd->ibpd;
1310
1311 bail:
1312         return ret;
1313 }
1314
1315 static int ipath_dealloc_pd(struct ib_pd *ibpd)
1316 {
1317         struct ipath_pd *pd = to_ipd(ibpd);
1318         struct ipath_ibdev *dev = to_idev(ibpd->device);
1319
1320         spin_lock(&dev->n_pds_lock);
1321         dev->n_pds_allocated--;
1322         spin_unlock(&dev->n_pds_lock);
1323
1324         kfree(pd);
1325
1326         return 0;
1327 }
1328
1329 /**
1330  * ipath_create_ah - create an address handle
1331  * @pd: the protection domain
1332  * @ah_attr: the attributes of the AH
1333  *
1334  * This may be called from interrupt context.
1335  */
1336 static struct ib_ah *ipath_create_ah(struct ib_pd *pd,
1337                                      struct ib_ah_attr *ah_attr)
1338 {
1339         struct ipath_ah *ah;
1340         struct ib_ah *ret;
1341         struct ipath_ibdev *dev = to_idev(pd->device);
1342         unsigned long flags;
1343
1344         /* A multicast address requires a GRH (see ch. 8.4.1). */
1345         if (ah_attr->dlid >= IPATH_MULTICAST_LID_BASE &&
1346             ah_attr->dlid != IPATH_PERMISSIVE_LID &&
1347             !(ah_attr->ah_flags & IB_AH_GRH)) {
1348                 ret = ERR_PTR(-EINVAL);
1349                 goto bail;
1350         }
1351
1352         if (ah_attr->dlid == 0) {
1353                 ret = ERR_PTR(-EINVAL);
1354                 goto bail;
1355         }
1356
1357         if (ah_attr->port_num < 1 ||
1358             ah_attr->port_num > pd->device->phys_port_cnt) {
1359                 ret = ERR_PTR(-EINVAL);
1360                 goto bail;
1361         }
1362
1363         ah = kmalloc(sizeof *ah, GFP_ATOMIC);
1364         if (!ah) {
1365                 ret = ERR_PTR(-ENOMEM);
1366                 goto bail;
1367         }
1368
1369         spin_lock_irqsave(&dev->n_ahs_lock, flags);
1370         if (dev->n_ahs_allocated == ib_ipath_max_ahs) {
1371                 spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
1372                 kfree(ah);
1373                 ret = ERR_PTR(-ENOMEM);
1374                 goto bail;
1375         }
1376
1377         dev->n_ahs_allocated++;
1378         spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
1379
1380         /* ib_create_ah() will initialize ah->ibah. */
1381         ah->attr = *ah_attr;
1382
1383         ret = &ah->ibah;
1384
1385 bail:
1386         return ret;
1387 }
1388
1389 /**
1390  * ipath_destroy_ah - destroy an address handle
1391  * @ibah: the AH to destroy
1392  *
1393  * This may be called from interrupt context.
1394  */
1395 static int ipath_destroy_ah(struct ib_ah *ibah)
1396 {
1397         struct ipath_ibdev *dev = to_idev(ibah->device);
1398         struct ipath_ah *ah = to_iah(ibah);
1399         unsigned long flags;
1400
1401         spin_lock_irqsave(&dev->n_ahs_lock, flags);
1402         dev->n_ahs_allocated--;
1403         spin_unlock_irqrestore(&dev->n_ahs_lock, flags);
1404
1405         kfree(ah);
1406
1407         return 0;
1408 }
1409
1410 static int ipath_query_ah(struct ib_ah *ibah, struct ib_ah_attr *ah_attr)
1411 {
1412         struct ipath_ah *ah = to_iah(ibah);
1413
1414         *ah_attr = ah->attr;
1415
1416         return 0;
1417 }
1418
1419 /**
1420  * ipath_get_npkeys - return the size of the PKEY table for port 0
1421  * @dd: the infinipath device
1422  */
1423 unsigned ipath_get_npkeys(struct ipath_devdata *dd)
1424 {
1425         return ARRAY_SIZE(dd->ipath_pd[0]->port_pkeys);
1426 }
1427
1428 /**
1429  * ipath_get_pkey - return the indexed PKEY from the port 0 PKEY table
1430  * @dd: the infinipath device
1431  * @index: the PKEY index
1432  */
1433 unsigned ipath_get_pkey(struct ipath_devdata *dd, unsigned index)
1434 {
1435         unsigned ret;
1436
1437         if (index >= ARRAY_SIZE(dd->ipath_pd[0]->port_pkeys))
1438                 ret = 0;
1439         else
1440                 ret = dd->ipath_pd[0]->port_pkeys[index];
1441
1442         return ret;
1443 }
1444
1445 static int ipath_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
1446                             u16 *pkey)
1447 {
1448         struct ipath_ibdev *dev = to_idev(ibdev);
1449         int ret;
1450
1451         if (index >= ipath_get_npkeys(dev->dd)) {
1452                 ret = -EINVAL;
1453                 goto bail;
1454         }
1455
1456         *pkey = ipath_get_pkey(dev->dd, index);
1457         ret = 0;
1458
1459 bail:
1460         return ret;
1461 }
1462
1463 /**
1464  * ipath_alloc_ucontext - allocate a ucontest
1465  * @ibdev: the infiniband device
1466  * @udata: not used by the InfiniPath driver
1467  */
1468
1469 static struct ib_ucontext *ipath_alloc_ucontext(struct ib_device *ibdev,
1470                                                 struct ib_udata *udata)
1471 {
1472         struct ipath_ucontext *context;
1473         struct ib_ucontext *ret;
1474
1475         context = kmalloc(sizeof *context, GFP_KERNEL);
1476         if (!context) {
1477                 ret = ERR_PTR(-ENOMEM);
1478                 goto bail;
1479         }
1480
1481         ret = &context->ibucontext;
1482
1483 bail:
1484         return ret;
1485 }
1486
1487 static int ipath_dealloc_ucontext(struct ib_ucontext *context)
1488 {
1489         kfree(to_iucontext(context));
1490         return 0;
1491 }
1492
1493 static int ipath_verbs_register_sysfs(struct ib_device *dev);
1494
1495 static void __verbs_timer(unsigned long arg)
1496 {
1497         struct ipath_devdata *dd = (struct ipath_devdata *) arg;
1498
1499         /* Handle verbs layer timeouts. */
1500         ipath_ib_timer(dd->verbs_dev);
1501
1502         mod_timer(&dd->verbs_timer, jiffies + 1);
1503 }
1504
1505 static int enable_timer(struct ipath_devdata *dd)
1506 {
1507         /*
1508          * Early chips had a design flaw where the chip and kernel idea
1509          * of the tail register don't always agree, and therefore we won't
1510          * get an interrupt on the next packet received.
1511          * If the board supports per packet receive interrupts, use it.
1512          * Otherwise, the timer function periodically checks for packets
1513          * to cover this case.
1514          * Either way, the timer is needed for verbs layer related
1515          * processing.
1516          */
1517         if (dd->ipath_flags & IPATH_GPIO_INTR) {
1518                 ipath_write_kreg(dd, dd->ipath_kregs->kr_debugportselect,
1519                                  0x2074076542310ULL);
1520                 /* Enable GPIO bit 2 interrupt */
1521                 dd->ipath_gpio_mask |= (u64) (1 << IPATH_GPIO_PORT0_BIT);
1522                 ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_mask,
1523                                  dd->ipath_gpio_mask);
1524         }
1525
1526         init_timer(&dd->verbs_timer);
1527         dd->verbs_timer.function = __verbs_timer;
1528         dd->verbs_timer.data = (unsigned long)dd;
1529         dd->verbs_timer.expires = jiffies + 1;
1530         add_timer(&dd->verbs_timer);
1531
1532         return 0;
1533 }
1534
1535 static int disable_timer(struct ipath_devdata *dd)
1536 {
1537         /* Disable GPIO bit 2 interrupt */
1538         if (dd->ipath_flags & IPATH_GPIO_INTR) {
1539                 /* Disable GPIO bit 2 interrupt */
1540                 dd->ipath_gpio_mask &= ~((u64) (1 << IPATH_GPIO_PORT0_BIT));
1541                 ipath_write_kreg(dd, dd->ipath_kregs->kr_gpio_mask,
1542                                  dd->ipath_gpio_mask);
1543                 /*
1544                  * We might want to undo changes to debugportselect,
1545                  * but how?
1546                  */
1547         }
1548
1549         del_timer_sync(&dd->verbs_timer);
1550
1551         return 0;
1552 }
1553
1554 /**
1555  * ipath_register_ib_device - register our device with the infiniband core
1556  * @dd: the device data structure
1557  * Return the allocated ipath_ibdev pointer or NULL on error.
1558  */
1559 int ipath_register_ib_device(struct ipath_devdata *dd)
1560 {
1561         struct ipath_verbs_counters cntrs;
1562         struct ipath_ibdev *idev;
1563         struct ib_device *dev;
1564         int ret;
1565
1566         idev = (struct ipath_ibdev *)ib_alloc_device(sizeof *idev);
1567         if (idev == NULL) {
1568                 ret = -ENOMEM;
1569                 goto bail;
1570         }
1571
1572         dev = &idev->ibdev;
1573
1574         /* Only need to initialize non-zero fields. */
1575         spin_lock_init(&idev->n_pds_lock);
1576         spin_lock_init(&idev->n_ahs_lock);
1577         spin_lock_init(&idev->n_cqs_lock);
1578         spin_lock_init(&idev->n_qps_lock);
1579         spin_lock_init(&idev->n_srqs_lock);
1580         spin_lock_init(&idev->n_mcast_grps_lock);
1581
1582         spin_lock_init(&idev->qp_table.lock);
1583         spin_lock_init(&idev->lk_table.lock);
1584         idev->sm_lid = __constant_be16_to_cpu(IB_LID_PERMISSIVE);
1585         /* Set the prefix to the default value (see ch. 4.1.1) */
1586         idev->gid_prefix = __constant_cpu_to_be64(0xfe80000000000000ULL);
1587
1588         ret = ipath_init_qp_table(idev, ib_ipath_qp_table_size);
1589         if (ret)
1590                 goto err_qp;
1591
1592         /*
1593          * The top ib_ipath_lkey_table_size bits are used to index the
1594          * table.  The lower 8 bits can be owned by the user (copied from
1595          * the LKEY).  The remaining bits act as a generation number or tag.
1596          */
1597         idev->lk_table.max = 1 << ib_ipath_lkey_table_size;
1598         idev->lk_table.table = kzalloc(idev->lk_table.max *
1599                                        sizeof(*idev->lk_table.table),
1600                                        GFP_KERNEL);
1601         if (idev->lk_table.table == NULL) {
1602                 ret = -ENOMEM;
1603                 goto err_lk;
1604         }
1605         INIT_LIST_HEAD(&idev->pending_mmaps);
1606         spin_lock_init(&idev->pending_lock);
1607         idev->mmap_offset = PAGE_SIZE;
1608         spin_lock_init(&idev->mmap_offset_lock);
1609         INIT_LIST_HEAD(&idev->pending[0]);
1610         INIT_LIST_HEAD(&idev->pending[1]);
1611         INIT_LIST_HEAD(&idev->pending[2]);
1612         INIT_LIST_HEAD(&idev->piowait);
1613         INIT_LIST_HEAD(&idev->rnrwait);
1614         idev->pending_index = 0;
1615         idev->port_cap_flags =
1616                 IB_PORT_SYS_IMAGE_GUID_SUP | IB_PORT_CLIENT_REG_SUP;
1617         idev->pma_counter_select[0] = IB_PMA_PORT_XMIT_DATA;
1618         idev->pma_counter_select[1] = IB_PMA_PORT_RCV_DATA;
1619         idev->pma_counter_select[2] = IB_PMA_PORT_XMIT_PKTS;
1620         idev->pma_counter_select[3] = IB_PMA_PORT_RCV_PKTS;
1621         idev->pma_counter_select[4] = IB_PMA_PORT_XMIT_WAIT;
1622         idev->link_width_enabled = 3;   /* 1x or 4x */
1623
1624         /* Snapshot current HW counters to "clear" them. */
1625         ipath_get_counters(dd, &cntrs);
1626         idev->z_symbol_error_counter = cntrs.symbol_error_counter;
1627         idev->z_link_error_recovery_counter =
1628                 cntrs.link_error_recovery_counter;
1629         idev->z_link_downed_counter = cntrs.link_downed_counter;
1630         idev->z_port_rcv_errors = cntrs.port_rcv_errors;
1631         idev->z_port_rcv_remphys_errors =
1632                 cntrs.port_rcv_remphys_errors;
1633         idev->z_port_xmit_discards = cntrs.port_xmit_discards;
1634         idev->z_port_xmit_data = cntrs.port_xmit_data;
1635         idev->z_port_rcv_data = cntrs.port_rcv_data;
1636         idev->z_port_xmit_packets = cntrs.port_xmit_packets;
1637         idev->z_port_rcv_packets = cntrs.port_rcv_packets;
1638         idev->z_local_link_integrity_errors =
1639                 cntrs.local_link_integrity_errors;
1640         idev->z_excessive_buffer_overrun_errors =
1641                 cntrs.excessive_buffer_overrun_errors;
1642
1643         /*
1644          * The system image GUID is supposed to be the same for all
1645          * IB HCAs in a single system but since there can be other
1646          * device types in the system, we can't be sure this is unique.
1647          */
1648         if (!sys_image_guid)
1649                 sys_image_guid = dd->ipath_guid;
1650         idev->sys_image_guid = sys_image_guid;
1651         idev->ib_unit = dd->ipath_unit;
1652         idev->dd = dd;
1653
1654         strlcpy(dev->name, "ipath%d", IB_DEVICE_NAME_MAX);
1655         dev->owner = THIS_MODULE;
1656         dev->node_guid = dd->ipath_guid;
1657         dev->uverbs_abi_ver = IPATH_UVERBS_ABI_VERSION;
1658         dev->uverbs_cmd_mask =
1659                 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT)         |
1660                 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE)        |
1661                 (1ull << IB_USER_VERBS_CMD_QUERY_PORT)          |
1662                 (1ull << IB_USER_VERBS_CMD_ALLOC_PD)            |
1663                 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD)          |
1664                 (1ull << IB_USER_VERBS_CMD_CREATE_AH)           |
1665                 (1ull << IB_USER_VERBS_CMD_DESTROY_AH)          |
1666                 (1ull << IB_USER_VERBS_CMD_QUERY_AH)            |
1667                 (1ull << IB_USER_VERBS_CMD_REG_MR)              |
1668                 (1ull << IB_USER_VERBS_CMD_DEREG_MR)            |
1669                 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
1670                 (1ull << IB_USER_VERBS_CMD_CREATE_CQ)           |
1671                 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ)           |
1672                 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ)          |
1673                 (1ull << IB_USER_VERBS_CMD_POLL_CQ)             |
1674                 (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ)       |
1675                 (1ull << IB_USER_VERBS_CMD_CREATE_QP)           |
1676                 (1ull << IB_USER_VERBS_CMD_QUERY_QP)            |
1677                 (1ull << IB_USER_VERBS_CMD_MODIFY_QP)           |
1678                 (1ull << IB_USER_VERBS_CMD_DESTROY_QP)          |
1679                 (1ull << IB_USER_VERBS_CMD_POST_SEND)           |
1680                 (1ull << IB_USER_VERBS_CMD_POST_RECV)           |
1681                 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST)        |
1682                 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST)        |
1683                 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ)          |
1684                 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ)          |
1685                 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ)           |
1686                 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ)         |
1687                 (1ull << IB_USER_VERBS_CMD_POST_SRQ_RECV);
1688         dev->node_type = RDMA_NODE_IB_CA;
1689         dev->phys_port_cnt = 1;
1690         dev->num_comp_vectors = 1;
1691         dev->dma_device = &dd->pcidev->dev;
1692         dev->query_device = ipath_query_device;
1693         dev->modify_device = ipath_modify_device;
1694         dev->query_port = ipath_query_port;
1695         dev->modify_port = ipath_modify_port;
1696         dev->query_pkey = ipath_query_pkey;
1697         dev->query_gid = ipath_query_gid;
1698         dev->alloc_ucontext = ipath_alloc_ucontext;
1699         dev->dealloc_ucontext = ipath_dealloc_ucontext;
1700         dev->alloc_pd = ipath_alloc_pd;
1701         dev->dealloc_pd = ipath_dealloc_pd;
1702         dev->create_ah = ipath_create_ah;
1703         dev->destroy_ah = ipath_destroy_ah;
1704         dev->query_ah = ipath_query_ah;
1705         dev->create_srq = ipath_create_srq;
1706         dev->modify_srq = ipath_modify_srq;
1707         dev->query_srq = ipath_query_srq;
1708         dev->destroy_srq = ipath_destroy_srq;
1709         dev->create_qp = ipath_create_qp;
1710         dev->modify_qp = ipath_modify_qp;
1711         dev->query_qp = ipath_query_qp;
1712         dev->destroy_qp = ipath_destroy_qp;
1713         dev->post_send = ipath_post_send;
1714         dev->post_recv = ipath_post_receive;
1715         dev->post_srq_recv = ipath_post_srq_receive;
1716         dev->create_cq = ipath_create_cq;
1717         dev->destroy_cq = ipath_destroy_cq;
1718         dev->resize_cq = ipath_resize_cq;
1719         dev->poll_cq = ipath_poll_cq;
1720         dev->req_notify_cq = ipath_req_notify_cq;
1721         dev->get_dma_mr = ipath_get_dma_mr;
1722         dev->reg_phys_mr = ipath_reg_phys_mr;
1723         dev->reg_user_mr = ipath_reg_user_mr;
1724         dev->dereg_mr = ipath_dereg_mr;
1725         dev->alloc_fmr = ipath_alloc_fmr;
1726         dev->map_phys_fmr = ipath_map_phys_fmr;
1727         dev->unmap_fmr = ipath_unmap_fmr;
1728         dev->dealloc_fmr = ipath_dealloc_fmr;
1729         dev->attach_mcast = ipath_multicast_attach;
1730         dev->detach_mcast = ipath_multicast_detach;
1731         dev->process_mad = ipath_process_mad;
1732         dev->mmap = ipath_mmap;
1733         dev->dma_ops = &ipath_dma_mapping_ops;
1734
1735         snprintf(dev->node_desc, sizeof(dev->node_desc),
1736                  IPATH_IDSTR " %s", init_utsname()->nodename);
1737
1738         ret = ib_register_device(dev);
1739         if (ret)
1740                 goto err_reg;
1741
1742         if (ipath_verbs_register_sysfs(dev))
1743                 goto err_class;
1744
1745         enable_timer(dd);
1746
1747         goto bail;
1748
1749 err_class:
1750         ib_unregister_device(dev);
1751 err_reg:
1752         kfree(idev->lk_table.table);
1753 err_lk:
1754         kfree(idev->qp_table.table);
1755 err_qp:
1756         ib_dealloc_device(dev);
1757         ipath_dev_err(dd, "cannot register verbs: %d!\n", -ret);
1758         idev = NULL;
1759
1760 bail:
1761         dd->verbs_dev = idev;
1762         return ret;
1763 }
1764
1765 void ipath_unregister_ib_device(struct ipath_ibdev *dev)
1766 {
1767         struct ib_device *ibdev = &dev->ibdev;
1768
1769         disable_timer(dev->dd);
1770
1771         ib_unregister_device(ibdev);
1772
1773         if (!list_empty(&dev->pending[0]) ||
1774             !list_empty(&dev->pending[1]) ||
1775             !list_empty(&dev->pending[2]))
1776                 ipath_dev_err(dev->dd, "pending list not empty!\n");
1777         if (!list_empty(&dev->piowait))
1778                 ipath_dev_err(dev->dd, "piowait list not empty!\n");
1779         if (!list_empty(&dev->rnrwait))
1780                 ipath_dev_err(dev->dd, "rnrwait list not empty!\n");
1781         if (!ipath_mcast_tree_empty())
1782                 ipath_dev_err(dev->dd, "multicast table memory leak!\n");
1783         /*
1784          * Note that ipath_unregister_ib_device() can be called before all
1785          * the QPs are destroyed!
1786          */
1787         ipath_free_all_qps(&dev->qp_table);
1788         kfree(dev->qp_table.table);
1789         kfree(dev->lk_table.table);
1790         ib_dealloc_device(ibdev);
1791 }
1792
1793 static ssize_t show_rev(struct class_device *cdev, char *buf)
1794 {
1795         struct ipath_ibdev *dev =
1796                 container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
1797
1798         return sprintf(buf, "%x\n", dev->dd->ipath_pcirev);
1799 }
1800
1801 static ssize_t show_hca(struct class_device *cdev, char *buf)
1802 {
1803         struct ipath_ibdev *dev =
1804                 container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
1805         int ret;
1806
1807         ret = dev->dd->ipath_f_get_boardname(dev->dd, buf, 128);
1808         if (ret < 0)
1809                 goto bail;
1810         strcat(buf, "\n");
1811         ret = strlen(buf);
1812
1813 bail:
1814         return ret;
1815 }
1816
1817 static ssize_t show_stats(struct class_device *cdev, char *buf)
1818 {
1819         struct ipath_ibdev *dev =
1820                 container_of(cdev, struct ipath_ibdev, ibdev.class_dev);
1821         int i;
1822         int len;
1823
1824         len = sprintf(buf,
1825                       "RC resends  %d\n"
1826                       "RC no QACK  %d\n"
1827                       "RC ACKs     %d\n"
1828                       "RC SEQ NAKs %d\n"
1829                       "RC RDMA seq %d\n"
1830                       "RC RNR NAKs %d\n"
1831                       "RC OTH NAKs %d\n"
1832                       "RC timeouts %d\n"
1833                       "RC RDMA dup %d\n"
1834                       "RC stalls   %d\n"
1835                       "piobuf wait %d\n"
1836                       "no piobuf   %d\n"
1837                       "PKT drops   %d\n"
1838                       "WQE errs    %d\n",
1839                       dev->n_rc_resends, dev->n_rc_qacks, dev->n_rc_acks,
1840                       dev->n_seq_naks, dev->n_rdma_seq, dev->n_rnr_naks,
1841                       dev->n_other_naks, dev->n_timeouts,
1842                       dev->n_rdma_dup_busy, dev->n_rc_stalls, dev->n_piowait,
1843                       dev->n_no_piobuf, dev->n_pkt_drops, dev->n_wqe_errs);
1844         for (i = 0; i < ARRAY_SIZE(dev->opstats); i++) {
1845                 const struct ipath_opcode_stats *si = &dev->opstats[i];
1846
1847                 if (!si->n_packets && !si->n_bytes)
1848                         continue;
1849                 len += sprintf(buf + len, "%02x %llu/%llu\n", i,
1850                                (unsigned long long) si->n_packets,
1851                                (unsigned long long) si->n_bytes);
1852         }
1853         return len;
1854 }
1855
1856 static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1857 static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1858 static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_hca, NULL);
1859 static CLASS_DEVICE_ATTR(stats, S_IRUGO, show_stats, NULL);
1860
1861 static struct class_device_attribute *ipath_class_attributes[] = {
1862         &class_device_attr_hw_rev,
1863         &class_device_attr_hca_type,
1864         &class_device_attr_board_id,
1865         &class_device_attr_stats
1866 };
1867
1868 static int ipath_verbs_register_sysfs(struct ib_device *dev)
1869 {
1870         int i;
1871         int ret;
1872
1873         for (i = 0; i < ARRAY_SIZE(ipath_class_attributes); ++i)
1874                 if (class_device_create_file(&dev->class_dev,
1875                                              ipath_class_attributes[i])) {
1876                         ret = 1;
1877                         goto bail;
1878                 }
1879
1880         ret = 0;
1881
1882 bail:
1883         return ret;
1884 }