V4L/DVB (11970): gspca - ov519: Add support for the ov518 bridge.
[linux-2.6] / drivers / media / video / cx88 / cx88-tvaudio.c
1 /*
2
3     cx88x-audio.c - Conexant CX23880/23881 audio downstream driver driver
4
5      (c) 2001 Michael Eskin, Tom Zakrajsek [Windows version]
6      (c) 2002 Yurij Sysoev <yurij@naturesoft.net>
7      (c) 2003 Gerd Knorr <kraxel@bytesex.org>
8
9     -----------------------------------------------------------------------
10
11     Lot of voodoo here.  Even the data sheet doesn't help to
12     understand what is going on here, the documentation for the audio
13     part of the cx2388x chip is *very* bad.
14
15     Some of this comes from party done linux driver sources I got from
16     [undocumented].
17
18     Some comes from the dscaler sources, one of the dscaler driver guy works
19     for Conexant ...
20
21     -----------------------------------------------------------------------
22
23     This program is free software; you can redistribute it and/or modify
24     it under the terms of the GNU General Public License as published by
25     the Free Software Foundation; either version 2 of the License, or
26     (at your option) any later version.
27
28     This program is distributed in the hope that it will be useful,
29     but WITHOUT ANY WARRANTY; without even the implied warranty of
30     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
31     GNU General Public License for more details.
32
33     You should have received a copy of the GNU General Public License
34     along with this program; if not, write to the Free Software
35     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
36 */
37
38 #include <linux/module.h>
39 #include <linux/errno.h>
40 #include <linux/freezer.h>
41 #include <linux/kernel.h>
42 #include <linux/slab.h>
43 #include <linux/mm.h>
44 #include <linux/poll.h>
45 #include <linux/signal.h>
46 #include <linux/ioport.h>
47 #include <linux/types.h>
48 #include <linux/interrupt.h>
49 #include <linux/vmalloc.h>
50 #include <linux/init.h>
51 #include <linux/delay.h>
52 #include <linux/kthread.h>
53
54 #include "cx88.h"
55
56 static unsigned int audio_debug;
57 module_param(audio_debug, int, 0644);
58 MODULE_PARM_DESC(audio_debug, "enable debug messages [audio]");
59
60 static unsigned int always_analog;
61 module_param(always_analog,int,0644);
62 MODULE_PARM_DESC(always_analog,"force analog audio out");
63
64 static unsigned int radio_deemphasis;
65 module_param(radio_deemphasis,int,0644);
66 MODULE_PARM_DESC(radio_deemphasis, "Radio deemphasis time constant, "
67                  "0=None, 1=50us (elsewhere), 2=75us (USA)");
68
69 #define dprintk(fmt, arg...)    if (audio_debug) \
70         printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
71
72 /* ----------------------------------------------------------- */
73
74 static char *aud_ctl_names[64] = {
75         [EN_BTSC_FORCE_MONO] = "BTSC_FORCE_MONO",
76         [EN_BTSC_FORCE_STEREO] = "BTSC_FORCE_STEREO",
77         [EN_BTSC_FORCE_SAP] = "BTSC_FORCE_SAP",
78         [EN_BTSC_AUTO_STEREO] = "BTSC_AUTO_STEREO",
79         [EN_BTSC_AUTO_SAP] = "BTSC_AUTO_SAP",
80         [EN_A2_FORCE_MONO1] = "A2_FORCE_MONO1",
81         [EN_A2_FORCE_MONO2] = "A2_FORCE_MONO2",
82         [EN_A2_FORCE_STEREO] = "A2_FORCE_STEREO",
83         [EN_A2_AUTO_MONO2] = "A2_AUTO_MONO2",
84         [EN_A2_AUTO_STEREO] = "A2_AUTO_STEREO",
85         [EN_EIAJ_FORCE_MONO1] = "EIAJ_FORCE_MONO1",
86         [EN_EIAJ_FORCE_MONO2] = "EIAJ_FORCE_MONO2",
87         [EN_EIAJ_FORCE_STEREO] = "EIAJ_FORCE_STEREO",
88         [EN_EIAJ_AUTO_MONO2] = "EIAJ_AUTO_MONO2",
89         [EN_EIAJ_AUTO_STEREO] = "EIAJ_AUTO_STEREO",
90         [EN_NICAM_FORCE_MONO1] = "NICAM_FORCE_MONO1",
91         [EN_NICAM_FORCE_MONO2] = "NICAM_FORCE_MONO2",
92         [EN_NICAM_FORCE_STEREO] = "NICAM_FORCE_STEREO",
93         [EN_NICAM_AUTO_MONO2] = "NICAM_AUTO_MONO2",
94         [EN_NICAM_AUTO_STEREO] = "NICAM_AUTO_STEREO",
95         [EN_FMRADIO_FORCE_MONO] = "FMRADIO_FORCE_MONO",
96         [EN_FMRADIO_FORCE_STEREO] = "FMRADIO_FORCE_STEREO",
97         [EN_FMRADIO_AUTO_STEREO] = "FMRADIO_AUTO_STEREO",
98 };
99
100 struct rlist {
101         u32 reg;
102         u32 val;
103 };
104
105 static void set_audio_registers(struct cx88_core *core, const struct rlist *l)
106 {
107         int i;
108
109         for (i = 0; l[i].reg; i++) {
110                 switch (l[i].reg) {
111                 case AUD_PDF_DDS_CNST_BYTE2:
112                 case AUD_PDF_DDS_CNST_BYTE1:
113                 case AUD_PDF_DDS_CNST_BYTE0:
114                 case AUD_QAM_MODE:
115                 case AUD_PHACC_FREQ_8MSB:
116                 case AUD_PHACC_FREQ_8LSB:
117                         cx_writeb(l[i].reg, l[i].val);
118                         break;
119                 default:
120                         cx_write(l[i].reg, l[i].val);
121                         break;
122                 }
123         }
124 }
125
126 static void set_audio_start(struct cx88_core *core, u32 mode)
127 {
128         /* mute */
129         cx_write(AUD_VOL_CTL, (1 << 6));
130
131         /* start programming */
132         cx_write(AUD_INIT, mode);
133         cx_write(AUD_INIT_LD, 0x0001);
134         cx_write(AUD_SOFT_RESET, 0x0001);
135 }
136
137 static void set_audio_finish(struct cx88_core *core, u32 ctl)
138 {
139         u32 volume;
140
141         /* restart dma; This avoids buzz in NICAM and is good in others  */
142         cx88_stop_audio_dma(core);
143         cx_write(AUD_RATE_THRES_DMD, 0x000000C0);
144         cx88_start_audio_dma(core);
145
146         if (core->board.mpeg & CX88_MPEG_BLACKBIRD) {
147                 cx_write(AUD_I2SINPUTCNTL, 4);
148                 cx_write(AUD_BAUDRATE, 1);
149                 /* 'pass-thru mode': this enables the i2s output to the mpeg encoder */
150                 cx_set(AUD_CTL, EN_I2SOUT_ENABLE);
151                 cx_write(AUD_I2SOUTPUTCNTL, 1);
152                 cx_write(AUD_I2SCNTL, 0);
153                 /* cx_write(AUD_APB_IN_RATE_ADJ, 0); */
154         }
155         if ((always_analog) || (!(core->board.mpeg & CX88_MPEG_BLACKBIRD))) {
156                 ctl |= EN_DAC_ENABLE;
157                 cx_write(AUD_CTL, ctl);
158         }
159
160         /* finish programming */
161         cx_write(AUD_SOFT_RESET, 0x0000);
162
163         /* unmute */
164         volume = cx_sread(SHADOW_AUD_VOL_CTL);
165         cx_swrite(SHADOW_AUD_VOL_CTL, AUD_VOL_CTL, volume);
166 }
167
168 /* ----------------------------------------------------------- */
169
170 static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap,
171                                     u32 mode)
172 {
173         static const struct rlist btsc[] = {
174                 {AUD_AFE_12DB_EN, 0x00000001},
175                 {AUD_OUT1_SEL, 0x00000013},
176                 {AUD_OUT1_SHIFT, 0x00000000},
177                 {AUD_POLY0_DDS_CONSTANT, 0x0012010c},
178                 {AUD_DMD_RA_DDS, 0x00c3e7aa},
179                 {AUD_DBX_IN_GAIN, 0x00004734},
180                 {AUD_DBX_WBE_GAIN, 0x00004640},
181                 {AUD_DBX_SE_GAIN, 0x00008d31},
182                 {AUD_DCOC_0_SRC, 0x0000001a},
183                 {AUD_IIR1_4_SEL, 0x00000021},
184                 {AUD_DCOC_PASS_IN, 0x00000003},
185                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
186                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
187                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
188                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
189                 {AUD_DN0_FREQ, 0x0000283b},
190                 {AUD_DN2_SRC_SEL, 0x00000008},
191                 {AUD_DN2_FREQ, 0x00003000},
192                 {AUD_DN2_AFC, 0x00000002},
193                 {AUD_DN2_SHFT, 0x00000000},
194                 {AUD_IIR2_2_SEL, 0x00000020},
195                 {AUD_IIR2_2_SHIFT, 0x00000000},
196                 {AUD_IIR2_3_SEL, 0x0000001f},
197                 {AUD_IIR2_3_SHIFT, 0x00000000},
198                 {AUD_CRDC1_SRC_SEL, 0x000003ce},
199                 {AUD_CRDC1_SHIFT, 0x00000000},
200                 {AUD_CORDIC_SHIFT_1, 0x00000007},
201                 {AUD_DCOC_1_SRC, 0x0000001b},
202                 {AUD_DCOC1_SHIFT, 0x00000000},
203                 {AUD_RDSI_SEL, 0x00000008},
204                 {AUD_RDSQ_SEL, 0x00000008},
205                 {AUD_RDSI_SHIFT, 0x00000000},
206                 {AUD_RDSQ_SHIFT, 0x00000000},
207                 {AUD_POLYPH80SCALEFAC, 0x00000003},
208                 { /* end of list */ },
209         };
210         static const struct rlist btsc_sap[] = {
211                 {AUD_AFE_12DB_EN, 0x00000001},
212                 {AUD_DBX_IN_GAIN, 0x00007200},
213                 {AUD_DBX_WBE_GAIN, 0x00006200},
214                 {AUD_DBX_SE_GAIN, 0x00006200},
215                 {AUD_IIR1_1_SEL, 0x00000000},
216                 {AUD_IIR1_3_SEL, 0x00000001},
217                 {AUD_DN1_SRC_SEL, 0x00000007},
218                 {AUD_IIR1_4_SHIFT, 0x00000006},
219                 {AUD_IIR2_1_SHIFT, 0x00000000},
220                 {AUD_IIR2_2_SHIFT, 0x00000000},
221                 {AUD_IIR3_0_SHIFT, 0x00000000},
222                 {AUD_IIR3_1_SHIFT, 0x00000000},
223                 {AUD_IIR3_0_SEL, 0x0000000d},
224                 {AUD_IIR3_1_SEL, 0x0000000e},
225                 {AUD_DEEMPH1_SRC_SEL, 0x00000014},
226                 {AUD_DEEMPH1_SHIFT, 0x00000000},
227                 {AUD_DEEMPH1_G0, 0x00004000},
228                 {AUD_DEEMPH1_A0, 0x00000000},
229                 {AUD_DEEMPH1_B0, 0x00000000},
230                 {AUD_DEEMPH1_A1, 0x00000000},
231                 {AUD_DEEMPH1_B1, 0x00000000},
232                 {AUD_OUT0_SEL, 0x0000003f},
233                 {AUD_OUT1_SEL, 0x0000003f},
234                 {AUD_DN1_AFC, 0x00000002},
235                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
236                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
237                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
238                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
239                 {AUD_IIR1_0_SEL, 0x0000001d},
240                 {AUD_IIR1_2_SEL, 0x0000001e},
241                 {AUD_IIR2_1_SEL, 0x00000002},
242                 {AUD_IIR2_2_SEL, 0x00000004},
243                 {AUD_IIR3_2_SEL, 0x0000000f},
244                 {AUD_DCOC2_SHIFT, 0x00000001},
245                 {AUD_IIR3_2_SHIFT, 0x00000001},
246                 {AUD_DEEMPH0_SRC_SEL, 0x00000014},
247                 {AUD_CORDIC_SHIFT_1, 0x00000006},
248                 {AUD_POLY0_DDS_CONSTANT, 0x000e4db2},
249                 {AUD_DMD_RA_DDS, 0x00f696e6},
250                 {AUD_IIR2_3_SEL, 0x00000025},
251                 {AUD_IIR1_4_SEL, 0x00000021},
252                 {AUD_DN1_FREQ, 0x0000c965},
253                 {AUD_DCOC_PASS_IN, 0x00000003},
254                 {AUD_DCOC_0_SRC, 0x0000001a},
255                 {AUD_DCOC_1_SRC, 0x0000001b},
256                 {AUD_DCOC1_SHIFT, 0x00000000},
257                 {AUD_RDSI_SEL, 0x00000009},
258                 {AUD_RDSQ_SEL, 0x00000009},
259                 {AUD_RDSI_SHIFT, 0x00000000},
260                 {AUD_RDSQ_SHIFT, 0x00000000},
261                 {AUD_POLYPH80SCALEFAC, 0x00000003},
262                 { /* end of list */ },
263         };
264
265         mode |= EN_FMRADIO_EN_RDS;
266
267         if (sap) {
268                 dprintk("%s SAP (status: unknown)\n", __func__);
269                 set_audio_start(core, SEL_SAP);
270                 set_audio_registers(core, btsc_sap);
271                 set_audio_finish(core, mode);
272         } else {
273                 dprintk("%s (status: known-good)\n", __func__);
274                 set_audio_start(core, SEL_BTSC);
275                 set_audio_registers(core, btsc);
276                 set_audio_finish(core, mode);
277         }
278 }
279
280 static void set_audio_standard_NICAM(struct cx88_core *core, u32 mode)
281 {
282         static const struct rlist nicam_l[] = {
283                 {AUD_AFE_12DB_EN, 0x00000001},
284                 {AUD_RATE_ADJ1, 0x00000060},
285                 {AUD_RATE_ADJ2, 0x000000F9},
286                 {AUD_RATE_ADJ3, 0x000001CC},
287                 {AUD_RATE_ADJ4, 0x000002B3},
288                 {AUD_RATE_ADJ5, 0x00000726},
289                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
290                 {AUD_DEEMPHDENOM2_R, 0x00000000},
291                 {AUD_ERRLOGPERIOD_R, 0x00000064},
292                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
293                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
294                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
295                 {AUD_POLYPH80SCALEFAC, 0x00000003},
296                 {AUD_DMD_RA_DDS, 0x00C00000},
297                 {AUD_PLL_INT, 0x0000001E},
298                 {AUD_PLL_DDS, 0x00000000},
299                 {AUD_PLL_FRAC, 0x0000E542},
300                 {AUD_START_TIMER, 0x00000000},
301                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
302                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
303                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
304                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
305                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
306                 {AUD_QAM_MODE, 0x05},
307                 {AUD_PHACC_FREQ_8MSB, 0x34},
308                 {AUD_PHACC_FREQ_8LSB, 0x4C},
309                 {AUD_DEEMPHGAIN_R, 0x00006680},
310                 {AUD_RATE_THRES_DMD, 0x000000C0},
311                 { /* end of list */ },
312         };
313
314         static const struct rlist nicam_bgdki_common[] = {
315                 {AUD_AFE_12DB_EN, 0x00000001},
316                 {AUD_RATE_ADJ1, 0x00000010},
317                 {AUD_RATE_ADJ2, 0x00000040},
318                 {AUD_RATE_ADJ3, 0x00000100},
319                 {AUD_RATE_ADJ4, 0x00000400},
320                 {AUD_RATE_ADJ5, 0x00001000},
321                 {AUD_ERRLOGPERIOD_R, 0x00000fff},
322                 {AUD_ERRINTRPTTHSHLD1_R, 0x000003ff},
323                 {AUD_ERRINTRPTTHSHLD2_R, 0x000000ff},
324                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000003f},
325                 {AUD_POLYPH80SCALEFAC, 0x00000003},
326                 {AUD_DEEMPHGAIN_R, 0x000023c2},
327                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
328                 {AUD_DEEMPHNUMER2_R, 0x0003023e},
329                 {AUD_DEEMPHDENOM1_R, 0x0000f3d0},
330                 {AUD_DEEMPHDENOM2_R, 0x00000000},
331                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
332                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
333                 {AUD_QAM_MODE, 0x05},
334                 { /* end of list */ },
335         };
336
337         static const struct rlist nicam_i[] = {
338                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
339                 {AUD_PHACC_FREQ_8MSB, 0x3a},
340                 {AUD_PHACC_FREQ_8LSB, 0x93},
341                 { /* end of list */ },
342         };
343
344         static const struct rlist nicam_default[] = {
345                 {AUD_PDF_DDS_CNST_BYTE0, 0x16},
346                 {AUD_PHACC_FREQ_8MSB, 0x34},
347                 {AUD_PHACC_FREQ_8LSB, 0x4c},
348                 { /* end of list */ },
349         };
350
351         set_audio_start(core,SEL_NICAM);
352         switch (core->tvaudio) {
353         case WW_L:
354                 dprintk("%s SECAM-L NICAM (status: devel)\n", __func__);
355                 set_audio_registers(core, nicam_l);
356                 break;
357         case WW_I:
358                 dprintk("%s PAL-I NICAM (status: known-good)\n", __func__);
359                 set_audio_registers(core, nicam_bgdki_common);
360                 set_audio_registers(core, nicam_i);
361                 break;
362         default:
363                 dprintk("%s PAL-BGDK NICAM (status: known-good)\n", __func__);
364                 set_audio_registers(core, nicam_bgdki_common);
365                 set_audio_registers(core, nicam_default);
366                 break;
367         };
368
369         mode |= EN_DMTRX_LR | EN_DMTRX_BYPASS;
370         set_audio_finish(core, mode);
371 }
372
373 static void set_audio_standard_A2(struct cx88_core *core, u32 mode)
374 {
375         static const struct rlist a2_bgdk_common[] = {
376                 {AUD_ERRLOGPERIOD_R, 0x00000064},
377                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
378                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
379                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
380                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
381                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
382                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
383                 {AUD_QAM_MODE, 0x05},
384                 {AUD_PHACC_FREQ_8MSB, 0x34},
385                 {AUD_PHACC_FREQ_8LSB, 0x4c},
386                 {AUD_RATE_ADJ1, 0x00000100},
387                 {AUD_RATE_ADJ2, 0x00000200},
388                 {AUD_RATE_ADJ3, 0x00000300},
389                 {AUD_RATE_ADJ4, 0x00000400},
390                 {AUD_RATE_ADJ5, 0x00000500},
391                 {AUD_THR_FR, 0x00000000},
392                 {AAGC_HYST, 0x0000001a},
393                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
394                 {AUD_PILOT_BQD_1_K1, 0x00551340},
395                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
396                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
397                 {AUD_PILOT_BQD_1_K4, 0x00400000},
398                 {AUD_PILOT_BQD_2_K0, 0x00040000},
399                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
400                 {AUD_PILOT_BQD_2_K2, 0x00400000},
401                 {AUD_PILOT_BQD_2_K3, 0x00000000},
402                 {AUD_PILOT_BQD_2_K4, 0x00000000},
403                 {AUD_MODE_CHG_TIMER, 0x00000040},
404                 {AUD_AFE_12DB_EN, 0x00000001},
405                 {AUD_CORDIC_SHIFT_0, 0x00000007},
406                 {AUD_CORDIC_SHIFT_1, 0x00000007},
407                 {AUD_DEEMPH0_G0, 0x00000380},
408                 {AUD_DEEMPH1_G0, 0x00000380},
409                 {AUD_DCOC_0_SRC, 0x0000001a},
410                 {AUD_DCOC0_SHIFT, 0x00000000},
411                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
412                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
413                 {AUD_DCOC_PASS_IN, 0x00000003},
414                 {AUD_IIR3_0_SEL, 0x00000021},
415                 {AUD_DN2_AFC, 0x00000002},
416                 {AUD_DCOC_1_SRC, 0x0000001b},
417                 {AUD_DCOC1_SHIFT, 0x00000000},
418                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
419                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
420                 {AUD_IIR3_1_SEL, 0x00000023},
421                 {AUD_RDSI_SEL, 0x00000017},
422                 {AUD_RDSI_SHIFT, 0x00000000},
423                 {AUD_RDSQ_SEL, 0x00000017},
424                 {AUD_RDSQ_SHIFT, 0x00000000},
425                 {AUD_PLL_INT, 0x0000001e},
426                 {AUD_PLL_DDS, 0x00000000},
427                 {AUD_PLL_FRAC, 0x0000e542},
428                 {AUD_POLYPH80SCALEFAC, 0x00000001},
429                 {AUD_START_TIMER, 0x00000000},
430                 { /* end of list */ },
431         };
432
433         static const struct rlist a2_bg[] = {
434                 {AUD_DMD_RA_DDS, 0x002a4f2f},
435                 {AUD_C1_UP_THR, 0x00007000},
436                 {AUD_C1_LO_THR, 0x00005400},
437                 {AUD_C2_UP_THR, 0x00005400},
438                 {AUD_C2_LO_THR, 0x00003000},
439                 { /* end of list */ },
440         };
441
442         static const struct rlist a2_dk[] = {
443                 {AUD_DMD_RA_DDS, 0x002a4f2f},
444                 {AUD_C1_UP_THR, 0x00007000},
445                 {AUD_C1_LO_THR, 0x00005400},
446                 {AUD_C2_UP_THR, 0x00005400},
447                 {AUD_C2_LO_THR, 0x00003000},
448                 {AUD_DN0_FREQ, 0x00003a1c},
449                 {AUD_DN2_FREQ, 0x0000d2e0},
450                 { /* end of list */ },
451         };
452
453         static const struct rlist a1_i[] = {
454                 {AUD_ERRLOGPERIOD_R, 0x00000064},
455                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
456                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
457                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
458                 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
459                 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
460                 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
461                 {AUD_QAM_MODE, 0x05},
462                 {AUD_PHACC_FREQ_8MSB, 0x3a},
463                 {AUD_PHACC_FREQ_8LSB, 0x93},
464                 {AUD_DMD_RA_DDS, 0x002a4f2f},
465                 {AUD_PLL_INT, 0x0000001e},
466                 {AUD_PLL_DDS, 0x00000004},
467                 {AUD_PLL_FRAC, 0x0000e542},
468                 {AUD_RATE_ADJ1, 0x00000100},
469                 {AUD_RATE_ADJ2, 0x00000200},
470                 {AUD_RATE_ADJ3, 0x00000300},
471                 {AUD_RATE_ADJ4, 0x00000400},
472                 {AUD_RATE_ADJ5, 0x00000500},
473                 {AUD_THR_FR, 0x00000000},
474                 {AUD_PILOT_BQD_1_K0, 0x0000755b},
475                 {AUD_PILOT_BQD_1_K1, 0x00551340},
476                 {AUD_PILOT_BQD_1_K2, 0x006d30be},
477                 {AUD_PILOT_BQD_1_K3, 0xffd394af},
478                 {AUD_PILOT_BQD_1_K4, 0x00400000},
479                 {AUD_PILOT_BQD_2_K0, 0x00040000},
480                 {AUD_PILOT_BQD_2_K1, 0x002a4841},
481                 {AUD_PILOT_BQD_2_K2, 0x00400000},
482                 {AUD_PILOT_BQD_2_K3, 0x00000000},
483                 {AUD_PILOT_BQD_2_K4, 0x00000000},
484                 {AUD_MODE_CHG_TIMER, 0x00000060},
485                 {AUD_AFE_12DB_EN, 0x00000001},
486                 {AAGC_HYST, 0x0000000a},
487                 {AUD_CORDIC_SHIFT_0, 0x00000007},
488                 {AUD_CORDIC_SHIFT_1, 0x00000007},
489                 {AUD_C1_UP_THR, 0x00007000},
490                 {AUD_C1_LO_THR, 0x00005400},
491                 {AUD_C2_UP_THR, 0x00005400},
492                 {AUD_C2_LO_THR, 0x00003000},
493                 {AUD_DCOC_0_SRC, 0x0000001a},
494                 {AUD_DCOC0_SHIFT, 0x00000000},
495                 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
496                 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
497                 {AUD_DCOC_PASS_IN, 0x00000003},
498                 {AUD_IIR3_0_SEL, 0x00000021},
499                 {AUD_DN2_AFC, 0x00000002},
500                 {AUD_DCOC_1_SRC, 0x0000001b},
501                 {AUD_DCOC1_SHIFT, 0x00000000},
502                 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
503                 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
504                 {AUD_IIR3_1_SEL, 0x00000023},
505                 {AUD_DN0_FREQ, 0x000035a3},
506                 {AUD_DN2_FREQ, 0x000029c7},
507                 {AUD_CRDC0_SRC_SEL, 0x00000511},
508                 {AUD_IIR1_0_SEL, 0x00000001},
509                 {AUD_IIR1_1_SEL, 0x00000000},
510                 {AUD_IIR3_2_SEL, 0x00000003},
511                 {AUD_IIR3_2_SHIFT, 0x00000000},
512                 {AUD_IIR3_0_SEL, 0x00000002},
513                 {AUD_IIR2_0_SEL, 0x00000021},
514                 {AUD_IIR2_0_SHIFT, 0x00000002},
515                 {AUD_DEEMPH0_SRC_SEL, 0x0000000b},
516                 {AUD_DEEMPH1_SRC_SEL, 0x0000000b},
517                 {AUD_POLYPH80SCALEFAC, 0x00000001},
518                 {AUD_START_TIMER, 0x00000000},
519                 { /* end of list */ },
520         };
521
522         static const struct rlist am_l[] = {
523                 {AUD_ERRLOGPERIOD_R, 0x00000064},
524                 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
525                 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
526                 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
527                 {AUD_PDF_DDS_CNST_BYTE2, 0x48},
528                 {AUD_PDF_DDS_CNST_BYTE1, 0x3D},
529                 {AUD_QAM_MODE, 0x00},
530                 {AUD_PDF_DDS_CNST_BYTE0, 0xf5},
531                 {AUD_PHACC_FREQ_8MSB, 0x3a},
532                 {AUD_PHACC_FREQ_8LSB, 0x4a},
533                 {AUD_DEEMPHGAIN_R, 0x00006680},
534                 {AUD_DEEMPHNUMER1_R, 0x000353DE},
535                 {AUD_DEEMPHNUMER2_R, 0x000001B1},
536                 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
537                 {AUD_DEEMPHDENOM2_R, 0x00000000},
538                 {AUD_FM_MODE_ENABLE, 0x00000007},
539                 {AUD_POLYPH80SCALEFAC, 0x00000003},
540                 {AUD_AFE_12DB_EN, 0x00000001},
541                 {AAGC_GAIN, 0x00000000},
542                 {AAGC_HYST, 0x00000018},
543                 {AAGC_DEF, 0x00000020},
544                 {AUD_DN0_FREQ, 0x00000000},
545                 {AUD_POLY0_DDS_CONSTANT, 0x000E4DB2},
546                 {AUD_DCOC_0_SRC, 0x00000021},
547                 {AUD_IIR1_0_SEL, 0x00000000},
548                 {AUD_IIR1_0_SHIFT, 0x00000007},
549                 {AUD_IIR1_1_SEL, 0x00000002},
550                 {AUD_IIR1_1_SHIFT, 0x00000000},
551                 {AUD_DCOC_1_SRC, 0x00000003},
552                 {AUD_DCOC1_SHIFT, 0x00000000},
553                 {AUD_DCOC_PASS_IN, 0x00000000},
554                 {AUD_IIR1_2_SEL, 0x00000023},
555                 {AUD_IIR1_2_SHIFT, 0x00000000},
556                 {AUD_IIR1_3_SEL, 0x00000004},
557                 {AUD_IIR1_3_SHIFT, 0x00000007},
558                 {AUD_IIR1_4_SEL, 0x00000005},
559                 {AUD_IIR1_4_SHIFT, 0x00000007},
560                 {AUD_IIR3_0_SEL, 0x00000007},
561                 {AUD_IIR3_0_SHIFT, 0x00000000},
562                 {AUD_DEEMPH0_SRC_SEL, 0x00000011},
563                 {AUD_DEEMPH0_SHIFT, 0x00000000},
564                 {AUD_DEEMPH0_G0, 0x00007000},
565                 {AUD_DEEMPH0_A0, 0x00000000},
566                 {AUD_DEEMPH0_B0, 0x00000000},
567                 {AUD_DEEMPH0_A1, 0x00000000},
568                 {AUD_DEEMPH0_B1, 0x00000000},
569                 {AUD_DEEMPH1_SRC_SEL, 0x00000011},
570                 {AUD_DEEMPH1_SHIFT, 0x00000000},
571                 {AUD_DEEMPH1_G0, 0x00007000},
572                 {AUD_DEEMPH1_A0, 0x00000000},
573                 {AUD_DEEMPH1_B0, 0x00000000},
574                 {AUD_DEEMPH1_A1, 0x00000000},
575                 {AUD_DEEMPH1_B1, 0x00000000},
576                 {AUD_OUT0_SEL, 0x0000003F},
577                 {AUD_OUT1_SEL, 0x0000003F},
578                 {AUD_DMD_RA_DDS, 0x00F5C285},
579                 {AUD_PLL_INT, 0x0000001E},
580                 {AUD_PLL_DDS, 0x00000000},
581                 {AUD_PLL_FRAC, 0x0000E542},
582                 {AUD_RATE_ADJ1, 0x00000100},
583                 {AUD_RATE_ADJ2, 0x00000200},
584                 {AUD_RATE_ADJ3, 0x00000300},
585                 {AUD_RATE_ADJ4, 0x00000400},
586                 {AUD_RATE_ADJ5, 0x00000500},
587                 {AUD_RATE_THRES_DMD, 0x000000C0},
588                 { /* end of list */ },
589         };
590
591         static const struct rlist a2_deemph50[] = {
592                 {AUD_DEEMPH0_G0, 0x00000380},
593                 {AUD_DEEMPH1_G0, 0x00000380},
594                 {AUD_DEEMPHGAIN_R, 0x000011e1},
595                 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
596                 {AUD_DEEMPHNUMER2_R, 0x0003023c},
597                 { /* end of list */ },
598         };
599
600         set_audio_start(core, SEL_A2);
601         switch (core->tvaudio) {
602         case WW_BG:
603                 dprintk("%s PAL-BG A1/2 (status: known-good)\n", __func__);
604                 set_audio_registers(core, a2_bgdk_common);
605                 set_audio_registers(core, a2_bg);
606                 set_audio_registers(core, a2_deemph50);
607                 break;
608         case WW_DK:
609                 dprintk("%s PAL-DK A1/2 (status: known-good)\n", __func__);
610                 set_audio_registers(core, a2_bgdk_common);
611                 set_audio_registers(core, a2_dk);
612                 set_audio_registers(core, a2_deemph50);
613                 break;
614         case WW_I:
615                 dprintk("%s PAL-I A1 (status: known-good)\n", __func__);
616                 set_audio_registers(core, a1_i);
617                 set_audio_registers(core, a2_deemph50);
618                 break;
619         case WW_L:
620                 dprintk("%s AM-L (status: devel)\n", __func__);
621                 set_audio_registers(core, am_l);
622                 break;
623         default:
624                 dprintk("%s Warning: wrong value\n", __func__);
625                 return;
626                 break;
627         };
628
629         mode |= EN_FMRADIO_EN_RDS | EN_DMTRX_SUMDIFF;
630         set_audio_finish(core, mode);
631 }
632
633 static void set_audio_standard_EIAJ(struct cx88_core *core)
634 {
635         static const struct rlist eiaj[] = {
636                 /* TODO: eiaj register settings are not there yet ... */
637
638                 { /* end of list */ },
639         };
640         dprintk("%s (status: unknown)\n", __func__);
641
642         set_audio_start(core, SEL_EIAJ);
643         set_audio_registers(core, eiaj);
644         set_audio_finish(core, EN_EIAJ_AUTO_STEREO);
645 }
646
647 static void set_audio_standard_FM(struct cx88_core *core,
648                                   enum cx88_deemph_type deemph)
649 {
650         static const struct rlist fm_deemph_50[] = {
651                 {AUD_DEEMPH0_G0, 0x0C45},
652                 {AUD_DEEMPH0_A0, 0x6262},
653                 {AUD_DEEMPH0_B0, 0x1C29},
654                 {AUD_DEEMPH0_A1, 0x3FC66},
655                 {AUD_DEEMPH0_B1, 0x399A},
656
657                 {AUD_DEEMPH1_G0, 0x0D80},
658                 {AUD_DEEMPH1_A0, 0x6262},
659                 {AUD_DEEMPH1_B0, 0x1C29},
660                 {AUD_DEEMPH1_A1, 0x3FC66},
661                 {AUD_DEEMPH1_B1, 0x399A},
662
663                 {AUD_POLYPH80SCALEFAC, 0x0003},
664                 { /* end of list */ },
665         };
666         static const struct rlist fm_deemph_75[] = {
667                 {AUD_DEEMPH0_G0, 0x091B},
668                 {AUD_DEEMPH0_A0, 0x6B68},
669                 {AUD_DEEMPH0_B0, 0x11EC},
670                 {AUD_DEEMPH0_A1, 0x3FC66},
671                 {AUD_DEEMPH0_B1, 0x399A},
672
673                 {AUD_DEEMPH1_G0, 0x0AA0},
674                 {AUD_DEEMPH1_A0, 0x6B68},
675                 {AUD_DEEMPH1_B0, 0x11EC},
676                 {AUD_DEEMPH1_A1, 0x3FC66},
677                 {AUD_DEEMPH1_B1, 0x399A},
678
679                 {AUD_POLYPH80SCALEFAC, 0x0003},
680                 { /* end of list */ },
681         };
682
683         /* It is enough to leave default values? */
684         /* No, it's not!  The deemphasis registers are reset to the 75us
685          * values by default.  Analyzing the spectrum of the decoded audio
686          * reveals that "no deemphasis" is the same as 75 us, while the 50 us
687          * setting results in less deemphasis.  */
688         static const struct rlist fm_no_deemph[] = {
689
690                 {AUD_POLYPH80SCALEFAC, 0x0003},
691                 { /* end of list */ },
692         };
693
694         dprintk("%s (status: unknown)\n", __func__);
695         set_audio_start(core, SEL_FMRADIO);
696
697         switch (deemph) {
698         default:
699         case FM_NO_DEEMPH:
700                 set_audio_registers(core, fm_no_deemph);
701                 break;
702
703         case FM_DEEMPH_50:
704                 set_audio_registers(core, fm_deemph_50);
705                 break;
706
707         case FM_DEEMPH_75:
708                 set_audio_registers(core, fm_deemph_75);
709                 break;
710         }
711
712         set_audio_finish(core, EN_FMRADIO_AUTO_STEREO);
713 }
714
715 /* ----------------------------------------------------------- */
716
717 static int cx88_detect_nicam(struct cx88_core *core)
718 {
719         int i, j = 0;
720
721         dprintk("start nicam autodetect.\n");
722
723         for (i = 0; i < 6; i++) {
724                 /* if bit1=1 then nicam is detected */
725                 j += ((cx_read(AUD_NICAM_STATUS2) & 0x02) >> 1);
726
727                 if (j == 1) {
728                         dprintk("nicam is detected.\n");
729                         return 1;
730                 }
731
732                 /* wait a little bit for next reading status */
733                 msleep(10);
734         }
735
736         dprintk("nicam is not detected.\n");
737         return 0;
738 }
739
740 void cx88_set_tvaudio(struct cx88_core *core)
741 {
742         switch (core->tvaudio) {
743         case WW_BTSC:
744                 set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
745                 break;
746         case WW_BG:
747         case WW_DK:
748         case WW_I:
749         case WW_L:
750                 /* prepare all dsp registers */
751                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
752
753                 /* set nicam mode - otherwise
754                    AUD_NICAM_STATUS2 contains wrong values */
755                 set_audio_standard_NICAM(core, EN_NICAM_AUTO_STEREO);
756                 if (0 == cx88_detect_nicam(core)) {
757                         /* fall back to fm / am mono */
758                         set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
759                         core->use_nicam = 0;
760                 } else {
761                         core->use_nicam = 1;
762                 }
763                 break;
764         case WW_EIAJ:
765                 set_audio_standard_EIAJ(core);
766                 break;
767         case WW_FM:
768                 set_audio_standard_FM(core, radio_deemphasis);
769                 break;
770         case WW_I2SADC:
771                 set_audio_start(core, 0x01);
772                 /* Slave/Philips/Autobaud */
773                 cx_write(AUD_I2SINPUTCNTL, 0);
774                 /* Switch to "I2S ADC mode" */
775                 cx_write(AUD_I2SCNTL, 0x1);
776                 set_audio_finish(core, EN_I2SIN_ENABLE);
777                 break;
778         case WW_NONE:
779         default:
780                 printk("%s/0: unknown tv audio mode [%d]\n",
781                        core->name, core->tvaudio);
782                 break;
783         }
784         return;
785 }
786
787 void cx88_newstation(struct cx88_core *core)
788 {
789         core->audiomode_manual = UNSET;
790 }
791
792 void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
793 {
794         static char *m[] = { "stereo", "dual mono", "mono", "sap" };
795         static char *p[] = { "no pilot", "pilot c1", "pilot c2", "?" };
796         u32 reg, mode, pilot;
797
798         reg = cx_read(AUD_STATUS);
799         mode = reg & 0x03;
800         pilot = (reg >> 2) & 0x03;
801
802         if (core->astat != reg)
803                 dprintk("AUD_STATUS: 0x%x [%s/%s] ctl=%s\n",
804                         reg, m[mode], p[pilot],
805                         aud_ctl_names[cx_read(AUD_CTL) & 63]);
806         core->astat = reg;
807
808 /* TODO
809         Reading from AUD_STATUS is not enough
810         for auto-detecting sap/dual-fm/nicam.
811         Add some code here later.
812 */
813
814         return;
815 }
816
817 void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual)
818 {
819         u32 ctl = UNSET;
820         u32 mask = UNSET;
821
822         if (manual) {
823                 core->audiomode_manual = mode;
824         } else {
825                 if (UNSET != core->audiomode_manual)
826                         return;
827         }
828         core->audiomode_current = mode;
829
830         switch (core->tvaudio) {
831         case WW_BTSC:
832                 switch (mode) {
833                 case V4L2_TUNER_MODE_MONO:
834                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_MONO);
835                         break;
836                 case V4L2_TUNER_MODE_LANG1:
837                         set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
838                         break;
839                 case V4L2_TUNER_MODE_LANG2:
840                         set_audio_standard_BTSC(core, 1, EN_BTSC_FORCE_SAP);
841                         break;
842                 case V4L2_TUNER_MODE_STEREO:
843                 case V4L2_TUNER_MODE_LANG1_LANG2:
844                         set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_STEREO);
845                         break;
846                 }
847                 break;
848         case WW_BG:
849         case WW_DK:
850         case WW_I:
851         case WW_L:
852                 if (1 == core->use_nicam) {
853                         switch (mode) {
854                         case V4L2_TUNER_MODE_MONO:
855                         case V4L2_TUNER_MODE_LANG1:
856                                 set_audio_standard_NICAM(core,
857                                                          EN_NICAM_FORCE_MONO1);
858                                 break;
859                         case V4L2_TUNER_MODE_LANG2:
860                                 set_audio_standard_NICAM(core,
861                                                          EN_NICAM_FORCE_MONO2);
862                                 break;
863                         case V4L2_TUNER_MODE_STEREO:
864                         case V4L2_TUNER_MODE_LANG1_LANG2:
865                                 set_audio_standard_NICAM(core,
866                                                          EN_NICAM_FORCE_STEREO);
867                                 break;
868                         }
869                 } else {
870                         if ((core->tvaudio == WW_I) || (core->tvaudio == WW_L)) {
871                                 /* fall back to fm / am mono */
872                                 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
873                         } else {
874                                 /* TODO: Add A2 autodection */
875                                 switch (mode) {
876                                 case V4L2_TUNER_MODE_MONO:
877                                 case V4L2_TUNER_MODE_LANG1:
878                                         set_audio_standard_A2(core,
879                                                               EN_A2_FORCE_MONO1);
880                                         break;
881                                 case V4L2_TUNER_MODE_LANG2:
882                                         set_audio_standard_A2(core,
883                                                               EN_A2_FORCE_MONO2);
884                                         break;
885                                 case V4L2_TUNER_MODE_STEREO:
886                                 case V4L2_TUNER_MODE_LANG1_LANG2:
887                                         set_audio_standard_A2(core,
888                                                               EN_A2_FORCE_STEREO);
889                                         break;
890                                 }
891                         }
892                 }
893                 break;
894         case WW_FM:
895                 switch (mode) {
896                 case V4L2_TUNER_MODE_MONO:
897                         ctl = EN_FMRADIO_FORCE_MONO;
898                         mask = 0x3f;
899                         break;
900                 case V4L2_TUNER_MODE_STEREO:
901                         ctl = EN_FMRADIO_AUTO_STEREO;
902                         mask = 0x3f;
903                         break;
904                 }
905                 break;
906         case WW_I2SADC:
907                 /* DO NOTHING */
908                 break;
909         }
910
911         if (UNSET != ctl) {
912                 dprintk("cx88_set_stereo: mask 0x%x, ctl 0x%x "
913                         "[status=0x%x,ctl=0x%x,vol=0x%x]\n",
914                         mask, ctl, cx_read(AUD_STATUS),
915                         cx_read(AUD_CTL), cx_sread(SHADOW_AUD_VOL_CTL));
916                 cx_andor(AUD_CTL, mask, ctl);
917         }
918         return;
919 }
920
921 int cx88_audio_thread(void *data)
922 {
923         struct cx88_core *core = data;
924         struct v4l2_tuner t;
925         u32 mode = 0;
926
927         dprintk("cx88: tvaudio thread started\n");
928         set_freezable();
929         for (;;) {
930                 msleep_interruptible(1000);
931                 if (kthread_should_stop())
932                         break;
933                 try_to_freeze();
934
935                 /* just monitor the audio status for now ... */
936                 memset(&t, 0, sizeof(t));
937                 cx88_get_stereo(core, &t);
938
939                 if (UNSET != core->audiomode_manual)
940                         /* manually set, don't do anything. */
941                         continue;
942
943                 /* monitor signal */
944                 if (t.rxsubchans & V4L2_TUNER_SUB_STEREO)
945                         mode = V4L2_TUNER_MODE_STEREO;
946                 else
947                         mode = V4L2_TUNER_MODE_MONO;
948                 if (mode == core->audiomode_current)
949                         continue;
950
951                 /* automatically switch to best available mode */
952                 cx88_set_stereo(core, mode, 0);
953         }
954
955         dprintk("cx88: tvaudio thread exiting\n");
956         return 0;
957 }
958
959 /* ----------------------------------------------------------- */
960
961 EXPORT_SYMBOL(cx88_set_tvaudio);
962 EXPORT_SYMBOL(cx88_newstation);
963 EXPORT_SYMBOL(cx88_set_stereo);
964 EXPORT_SYMBOL(cx88_get_stereo);
965 EXPORT_SYMBOL(cx88_audio_thread);
966
967 /*
968  * Local variables:
969  * c-basic-offset: 8
970  * End:
971  * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
972  */