Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6
[linux-2.6] / arch / powerpc / boot / dts / c2k.dts
1 /* Device Tree Source for GEFanuc C2K
2  *
3  * Author: Remi Machet <rmachet@slac.stanford.edu>
4  *
5  * Originated from prpmc2800.dts
6  *
7  * 2008 (c) Stanford University
8  * 2007 (c) MontaVista, Software, Inc.
9  *
10  * This program is free software; you can redistribute it and/or modify it
11  * under the terms of the GNU General Public License version 2 as published
12  * by the Free Software Foundation.
13  */
14
15 /dts-v1/;
16
17 / {
18         #address-cells = <1>;
19         #size-cells = <1>;
20         model = "C2K";
21         compatible = "GEFanuc,C2K";
22         coherency-off;
23
24         aliases {
25                 pci0 = &PCI0;
26                 pci1 = &PCI1;
27         };
28
29         cpus {
30                 #address-cells = <1>;
31                 #size-cells = <0>;
32
33                 cpu@0 {
34                         device_type = "cpu";
35                         compatible = "PowerPC,7447";
36                         reg = <0>;
37                         clock-frequency = <996000000>;  /* 996 MHz */
38                         bus-frequency = <166666667>;    /* 166.6666 MHz */
39                         timebase-frequency = <41666667>;        /* 166.6666/4 MHz */
40                         i-cache-line-size = <32>;
41                         d-cache-line-size = <32>;
42                         i-cache-size = <32768>;
43                         d-cache-size = <32768>;
44                 };
45         };
46
47         memory {
48                 device_type = "memory";
49                 reg = <0x00000000 0x40000000>;  /* 1GB */
50         };
51
52         system-controller@d8000000 { /* Marvell Discovery */
53                 #address-cells = <1>;
54                 #size-cells = <1>;
55                 model = "mv64460";
56                 compatible = "marvell,mv64360";
57                 clock-frequency = <166666667>;          /* 166.66... MHz */
58                 reg = <0xd8000000 0x00010000>;
59                 virtual-reg = <0xd8000000>;
60                 ranges = <0xd4000000 0xd4000000 0x01000000      /* PCI 0 I/O Space */
61                           0x80000000 0x80000000 0x08000000      /* PCI 0 MEM Space */
62                           0xd0000000 0xd0000000 0x01000000      /* PCI 1 I/O Space */
63                           0xa0000000 0xa0000000 0x08000000      /* PCI 1 MEM Space */
64                           0xd8100000 0xd8100000 0x00010000      /* FPGA */
65                           0xd8110000 0xd8110000 0x00010000      /* FPGA USARTs */
66                           0xf8000000 0xf8000000 0x08000000      /* User FLASH */
67                           0x00000000 0xd8000000 0x00010000      /* Bridge's regs */
68                           0xd8140000 0xd8140000 0x00040000>;    /* Integrated SRAM */
69
70                 mdio@2000 {
71                         #address-cells = <1>;
72                         #size-cells = <0>;
73                         compatible = "marvell,mv64360-mdio";
74                         reg = <0x2000 4>;
75                         PHY0: ethernet-phy@0 {
76                                 device_type = "ethernet-phy";
77                                 interrupts = <76>;      /* GPP 12 */
78                                 interrupt-parent = <&PIC>;
79                                 reg = <0>;
80                         };
81                         PHY1: ethernet-phy@1 {
82                                 device_type = "ethernet-phy";
83                                 interrupts = <76>;      /* GPP 12 */
84                                 interrupt-parent = <&PIC>;
85                                 reg = <1>;
86                         };
87                         PHY2: ethernet-phy@2 {
88                                 device_type = "ethernet-phy";
89                                 interrupts = <76>;      /* GPP 12 */
90                                 interrupt-parent = <&PIC>;
91                                 reg = <2>;
92                         };
93                 };
94
95                 ethernet-group@2000 {
96                         #address-cells = <1>;
97                         #size-cells = <0>;
98                         compatible = "marvell,mv64360-eth-group";
99                         reg = <0x2000 0x2000>;
100                         ethernet@0 {
101                                 device_type = "network";
102                                 compatible = "marvell,mv64360-eth";
103                                 reg = <0>;
104                                 interrupts = <32>;
105                                 interrupt-parent = <&PIC>;
106                                 phy = <&PHY0>;
107                                 local-mac-address = [ 00 00 00 00 00 00 ];
108                         };
109                         ethernet@1 {
110                                 device_type = "network";
111                                 compatible = "marvell,mv64360-eth";
112                                 reg = <1>;
113                                 interrupts = <33>;
114                                 interrupt-parent = <&PIC>;
115                                 phy = <&PHY1>;
116                                 local-mac-address = [ 00 00 00 00 00 00 ];
117                         };
118                         ethernet@2 {
119                                 device_type = "network";
120                                 compatible = "marvell,mv64360-eth";
121                                 reg = <2>;
122                                 interrupts = <34>;
123                                 interrupt-parent = <&PIC>;
124                                 phy = <&PHY2>;
125                                 local-mac-address = [ 00 00 00 00 00 00 ];
126                         };
127                 };
128
129                 SDMA0: sdma@4000 {
130                         compatible = "marvell,mv64360-sdma";
131                         reg = <0x4000 0xc18>;
132                         virtual-reg = <0xd8004000>;
133                         interrupt-base = <0>;
134                         interrupts = <36>;
135                         interrupt-parent = <&PIC>;
136                 };
137
138                 SDMA1: sdma@6000 {
139                         compatible = "marvell,mv64360-sdma";
140                         reg = <0x6000 0xc18>;
141                         virtual-reg = <0xd8006000>;
142                         interrupt-base = <0>;
143                         interrupts = <38>;
144                         interrupt-parent = <&PIC>;
145                 };
146
147                 BRG0: brg@b200 {
148                         compatible = "marvell,mv64360-brg";
149                         reg = <0xb200 0x8>;
150                         clock-src = <8>;
151                         clock-frequency = <133333333>;
152                         current-speed = <115200>;
153                 };
154
155                 BRG1: brg@b208 {
156                         compatible = "marvell,mv64360-brg";
157                         reg = <0xb208 0x8>;
158                         clock-src = <8>;
159                         clock-frequency = <133333333>;
160                         current-speed = <115200>;
161                 };
162
163                 CUNIT: cunit@f200 {
164                         reg = <0xf200 0x200>;
165                 };
166
167                 MPSCROUTING: mpscrouting@b400 {
168                         reg = <0xb400 0xc>;
169                 };
170
171                 MPSCINTR: mpscintr@b800 {
172                         reg = <0xb800 0x100>;
173                         virtual-reg = <0xd800b800>;
174                 };
175
176                 MPSC0: mpsc@8000 {
177                         device_type = "serial";
178                         compatible = "marvell,mv64360-mpsc";
179                         reg = <0x8000 0x38>;
180                         virtual-reg = <0xd8008000>;
181                         sdma = <&SDMA0>;
182                         brg = <&BRG0>;
183                         cunit = <&CUNIT>;
184                         mpscrouting = <&MPSCROUTING>;
185                         mpscintr = <&MPSCINTR>;
186                         cell-index = <0>;
187                         interrupts = <40>;
188                         interrupt-parent = <&PIC>;
189                 };
190
191                 MPSC1: mpsc@9000 {
192                         device_type = "serial";
193                         compatible = "marvell,mv64360-mpsc";
194                         reg = <0x9000 0x38>;
195                         virtual-reg = <0xd8009000>;
196                         sdma = <&SDMA1>;
197                         brg = <&BRG1>;
198                         cunit = <&CUNIT>;
199                         mpscrouting = <&MPSCROUTING>;
200                         mpscintr = <&MPSCINTR>;
201                         cell-index = <1>;
202                         interrupts = <42>;
203                         interrupt-parent = <&PIC>;
204                 };
205
206                 wdt@b410 {                      /* watchdog timer */
207                         compatible = "marvell,mv64360-wdt";
208                         reg = <0xb410 0x8>;
209                 };
210
211                 i2c@c000 {
212                         compatible = "marvell,mv64360-i2c";
213                         reg = <0xc000 0x20>;
214                         virtual-reg = <0xd800c000>;
215                         interrupts = <37>;
216                         interrupt-parent = <&PIC>;
217                 };
218
219                 PIC: pic {
220                         #interrupt-cells = <1>;
221                         #address-cells = <0>;
222                         compatible = "marvell,mv64360-pic";
223                         reg = <0x0000 0x88>;
224                         interrupt-controller;
225                 };
226
227                 mpp@f000 {
228                         compatible = "marvell,mv64360-mpp";
229                         reg = <0xf000 0x10>;
230                 };
231
232                 gpp@f100 {
233                         compatible = "marvell,mv64360-gpp";
234                         reg = <0xf100 0x20>;
235                 };
236
237                 PCI0: pci@80000000 {
238                         #address-cells = <3>;
239                         #size-cells = <2>;
240                         #interrupt-cells = <1>;
241                         device_type = "pci";
242                         compatible = "marvell,mv64360-pci";
243                         reg = <0x0cf8 0x8>;
244                         ranges = <0x01000000 0x0 0x00000000 0xd4000000 0x0 0x01000000
245                                   0x02000000 0x0 0x80000000 0x80000000 0x0 0x08000000>;
246                         bus-range = <0 255>;
247                         clock-frequency = <66000000>;
248                         interrupt-pci-iack = <0x0c34>;
249                         interrupt-parent = <&PIC>;
250                         interrupt-map-mask = <0x0000 0x0 0x0 0x7>;
251                         interrupt-map = <
252                                 /* Only one interrupt line for PMC0 slot (INTA) */
253                                 0x0000 0 0 1 &PIC 88
254                         >;
255                 };
256
257
258                 PCI1: pci@a0000000 {
259                         #address-cells = <3>;
260                         #size-cells = <2>;
261                         #interrupt-cells = <1>;
262                         device_type = "pci";
263                         compatible = "marvell,mv64360-pci";
264                         reg = <0x0c78 0x8>;
265                         ranges = <0x01000000 0x0 0x00000000 0xd0000000 0x0 0x01000000
266                                   0x02000000 0x0 0x80000000 0xa0000000 0x0 0x08000000>;
267                         bus-range = <0 255>;
268                         clock-frequency = <66000000>;
269                         interrupt-pci-iack = <0x0cb4>;
270                         interrupt-parent = <&PIC>;
271                         interrupt-map-mask = <0xf800 0x00 0x00 0x7>;
272                         interrupt-map = <
273                                 /* IDSEL 0x01: PMC1 ? */
274                                 0x0800 0 0 1 &PIC 88
275                                 /* IDSEL 0x02: cPCI bridge */
276                                 0x1000 0 0 1 &PIC 88
277                                 /* IDSEL 0x03: USB controller */
278                                 0x1800 0 0 1 &PIC 91
279                                 /* IDSEL 0x04: SATA controller */
280                                 0x2000 0 0 1 &PIC 95
281                         >;
282                 };
283
284                 cpu-error@0070 {
285                         compatible = "marvell,mv64360-cpu-error";
286                         reg = <0x0070 0x10 0x0128 0x28>;
287                         interrupts = <3>;
288                         interrupt-parent = <&PIC>;
289                 };
290
291                 sram-ctrl@0380 {
292                         compatible = "marvell,mv64360-sram-ctrl";
293                         reg = <0x0380 0x80>;
294                         interrupts = <13>;
295                         interrupt-parent = <&PIC>;
296                 };
297
298                 pci-error@1d40 {
299                         compatible = "marvell,mv64360-pci-error";
300                         reg = <0x1d40 0x40 0x0c28 0x4>;
301                         interrupts = <12>;
302                         interrupt-parent = <&PIC>;
303                 };
304
305                 pci-error@1dc0 {
306                         compatible = "marvell,mv64360-pci-error";
307                         reg = <0x1dc0 0x40 0x0ca8 0x4>;
308                         interrupts = <16>;
309                         interrupt-parent = <&PIC>;
310                 };
311
312                 mem-ctrl@1400 {
313                         compatible = "marvell,mv64360-mem-ctrl";
314                         reg = <0x1400 0x60>;
315                         interrupts = <17>;
316                         interrupt-parent = <&PIC>;
317                 };
318                 /* Devices attached to the device controller */
319                 devicebus@045c {
320                         #address-cells = <2>;
321                         #size-cells = <1>;
322                         compatible = "marvell,mv64306-devctrl";
323                         reg = <0x45C 0x88>;
324                         interrupts = <1>;
325                         interrupt-parent = <&PIC>;
326                         ranges =        <0 0 0xd8100000 0x10000
327                                          2 0 0xd8110000 0x10000
328                                          4 0 0xf8000000 0x8000000>;
329                         fpga@0,0 {
330                                 compatible = "sbs,fpga-c2k";
331                                 reg = <0 0 0x10000>;
332                         };
333                         fpga_usart@2,0 {
334                                 compatible = "sbs,fpga_usart-c2k";
335                                 reg = <2 0 0x10000>;
336                         };
337                         nor_flash@4,0 {
338                                 compatible = "cfi-flash";
339                                 reg = <4 0 0x8000000>; /* 128MB */
340                                 bank-width = <4>;
341                                 device-width = <1>;
342                                 #address-cells = <1>;
343                                 #size-cells = <1>;
344                                 partition@0 {
345                                         label = "boot";
346                                         reg = <0x00000000 0x00080000>;
347                                 };
348                                 partition@40000 {
349                                         label = "kernel";
350                                         reg = <0x00080000 0x00400000>;
351                                 };
352                                 partition@440000 {
353                                         label = "initrd";
354                                         reg = <0x00480000 0x00B80000>;
355                                 };
356                                 partition@1000000 {
357                                         label = "rootfs";
358                                         reg = <0x01000000 0x06800000>;
359                                 };
360                                 partition@7800000 {
361                                         label = "recovery";
362                                         reg = <0x07800000 0x00800000>;
363                                         read-only;
364                                 };
365                         };
366                 };
367         };
368         chosen {
369                 linux,stdout-path = &MPSC0;
370         };
371 };