git.oblomov.eu Git - linux-2.6/blob - drivers/net/pasemi_mac.c

   1 /*
   2  * Copyright (C) 2006-2007 PA Semi, Inc
   3  *
   4  * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  18  */
  19
  20 #include <linux/init.h>
  21 #include <linux/module.h>
  22 #include <linux/pci.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/dmaengine.h>
  25 #include <linux/delay.h>
  26 #include <linux/netdevice.h>
  27 #include <linux/etherdevice.h>
  28 #include <asm/dma-mapping.h>
  29 #include <linux/in.h>
  30 #include <linux/skbuff.h>
  31
  32 #include <linux/ip.h>
  33 #include <linux/tcp.h>
  34 #include <net/checksum.h>
  35 #include <linux/inet_lro.h>
  36
  37 #include <asm/irq.h>
  38 #include <asm/firmware.h>
  39 #include <asm/pasemi_dma.h>
  40
  41 #include "pasemi_mac.h"
  42
  43 /* We have our own align, since ppc64 in general has it at 0 because
  44  * of design flaws in some of the server bridge chips. However, for
  45  * PWRficient doing the unaligned copies is more expensive than doing
  46  * unaligned DMA, so make sure the data is aligned instead.
  47  */
  48 #define LOCAL_SKB_ALIGN 2
  49
  50 /* TODO list
  51  *
  52  * - Multicast support
  53  * - Large MTU support
  54  * - SW LRO
  55  * - Multiqueue RX/TX
  56  */
  57
  58 #define LRO_MAX_AGGR 64
  59
  60 #define PE_MIN_MTU      64
  61 #define PE_MAX_MTU      9000
  62 #define PE_DEF_MTU      ETH_DATA_LEN
  63
  64 #define DEFAULT_MSG_ENABLE        \
  65         (NETIF_MSG_DRV          | \
  66          NETIF_MSG_PROBE        | \
  67          NETIF_MSG_LINK         | \
  68          NETIF_MSG_TIMER        | \
  69          NETIF_MSG_IFDOWN       | \
  70          NETIF_MSG_IFUP         | \
  71          NETIF_MSG_RX_ERR       | \
  72          NETIF_MSG_TX_ERR)
  73
  74 MODULE_LICENSE("GPL");
  75 MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
  76 MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
  77
  78 static int debug = -1;  /* -1 == use DEFAULT_MSG_ENABLE as value */
  79 module_param(debug, int, 0);
  80 MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
  81
  82 extern const struct ethtool_ops pasemi_mac_ethtool_ops;
  83
  84 static int translation_enabled(void)
  85 {
  86 #if defined(CONFIG_PPC_PASEMI_IOMMU_DMA_FORCE)
  87         return 1;
  88 #else
  89         return firmware_has_feature(FW_FEATURE_LPAR);
  90 #endif
  91 }
  92
  93 static void write_iob_reg(unsigned int reg, unsigned int val)
  94 {
  95         pasemi_write_iob_reg(reg, val);
  96 }
  97
  98 static unsigned int read_mac_reg(const struct pasemi_mac *mac, unsigned int reg)
  99 {
 100         return pasemi_read_mac_reg(mac->dma_if, reg);
 101 }
 102
 103 static void write_mac_reg(const struct pasemi_mac *mac, unsigned int reg,
 104                           unsigned int val)
 105 {
 106         pasemi_write_mac_reg(mac->dma_if, reg, val);
 107 }
 108
 109 static unsigned int read_dma_reg(unsigned int reg)
 110 {
 111         return pasemi_read_dma_reg(reg);
 112 }
 113
 114 static void write_dma_reg(unsigned int reg, unsigned int val)
 115 {
 116         pasemi_write_dma_reg(reg, val);
 117 }
 118
 119 static struct pasemi_mac_rxring *rx_ring(const struct pasemi_mac *mac)
 120 {
 121         return mac->rx;
 122 }
 123
 124 static struct pasemi_mac_txring *tx_ring(const struct pasemi_mac *mac)
 125 {
 126         return mac->tx;
 127 }
 128
 129 static inline void prefetch_skb(const struct sk_buff *skb)
 130 {
 131         const void *d = skb;
 132
 133         prefetch(d);
 134         prefetch(d+64);
 135         prefetch(d+128);
 136         prefetch(d+192);
 137 }
 138
 139 static int mac_to_intf(struct pasemi_mac *mac)
 140 {
 141         struct pci_dev *pdev = mac->pdev;
 142         u32 tmp;
 143         int nintf, off, i, j;
 144         int devfn = pdev->devfn;
 145
 146         tmp = read_dma_reg(PAS_DMA_CAP_IFI);
 147         nintf = (tmp & PAS_DMA_CAP_IFI_NIN_M) >> PAS_DMA_CAP_IFI_NIN_S;
 148         off = (tmp & PAS_DMA_CAP_IFI_IOFF_M) >> PAS_DMA_CAP_IFI_IOFF_S;
 149
 150         /* IOFF contains the offset to the registers containing the
 151          * DMA interface-to-MAC-pci-id mappings, and NIN contains number
 152          * of total interfaces. Each register contains 4 devfns.
 153          * Just do a linear search until we find the devfn of the MAC
 154          * we're trying to look up.
 155          */
 156
 157         for (i = 0; i < (nintf+3)/4; i++) {
 158                 tmp = read_dma_reg(off+4*i);
 159                 for (j = 0; j < 4; j++) {
 160                         if (((tmp >> (8*j)) & 0xff) == devfn)
 161                                 return i*4 + j;
 162                 }
 163         }
 164         return -1;
 165 }
 166
 167 static void pasemi_mac_intf_disable(struct pasemi_mac *mac)
 168 {
 169         unsigned int flags;
 170
 171         flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
 172         flags &= ~PAS_MAC_CFG_PCFG_PE;
 173         write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
 174 }
 175
 176 static void pasemi_mac_intf_enable(struct pasemi_mac *mac)
 177 {
 178         unsigned int flags;
 179
 180         flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
 181         flags |= PAS_MAC_CFG_PCFG_PE;
 182         write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
 183 }
 184
 185 static int pasemi_get_mac_addr(struct pasemi_mac *mac)
 186 {
 187         struct pci_dev *pdev = mac->pdev;
 188         struct device_node *dn = pci_device_to_OF_node(pdev);
 189         int len;
 190         const u8 *maddr;
 191         u8 addr[6];
 192
 193         if (!dn) {
 194                 dev_dbg(&pdev->dev,
 195                           "No device node for mac, not configuring\n");
 196                 return -ENOENT;
 197         }
 198
 199         maddr = of_get_property(dn, "local-mac-address", &len);
 200
 201         if (maddr && len == 6) {
 202                 memcpy(mac->mac_addr, maddr, 6);
 203                 return 0;
 204         }
 205
 206         /* Some old versions of firmware mistakenly uses mac-address
 207          * (and as a string) instead of a byte array in local-mac-address.
 208          */
 209
 210         if (maddr == NULL)
 211                 maddr = of_get_property(dn, "mac-address", NULL);
 212
 213         if (maddr == NULL) {
 214                 dev_warn(&pdev->dev,
 215                          "no mac address in device tree, not configuring\n");
 216                 return -ENOENT;
 217         }
 218
 219         if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
 220                    &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
 221                 dev_warn(&pdev->dev,
 222                          "can't parse mac address, not configuring\n");
 223                 return -EINVAL;
 224         }
 225
 226         memcpy(mac->mac_addr, addr, 6);
 227
 228         return 0;
 229 }
 230
 231 static int pasemi_mac_set_mac_addr(struct net_device *dev, void *p)
 232 {
 233         struct pasemi_mac *mac = netdev_priv(dev);
 234         struct sockaddr *addr = p;
 235         unsigned int adr0, adr1;
 236
 237         if (!is_valid_ether_addr(addr->sa_data))
 238                 return -EINVAL;
 239
 240         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
 241
 242         adr0 = dev->dev_addr[2] << 24 |
 243                dev->dev_addr[3] << 16 |
 244                dev->dev_addr[4] << 8 |
 245                dev->dev_addr[5];
 246         adr1 = read_mac_reg(mac, PAS_MAC_CFG_ADR1);
 247         adr1 &= ~0xffff;
 248         adr1 |= dev->dev_addr[0] << 8 | dev->dev_addr[1];
 249
 250         pasemi_mac_intf_disable(mac);
 251         write_mac_reg(mac, PAS_MAC_CFG_ADR0, adr0);
 252         write_mac_reg(mac, PAS_MAC_CFG_ADR1, adr1);
 253         pasemi_mac_intf_enable(mac);
 254
 255         return 0;
 256 }
 257
 258 static int get_skb_hdr(struct sk_buff *skb, void **iphdr,
 259                        void **tcph, u64 *hdr_flags, void *data)
 260 {
 261         u64 macrx = (u64) data;
 262         unsigned int ip_len;
 263         struct iphdr *iph;
 264
 265         /* IPv4 header checksum failed */
 266         if ((macrx & XCT_MACRX_HTY_M) != XCT_MACRX_HTY_IPV4_OK)
 267                 return -1;
 268
 269         /* non tcp packet */
 270         skb_reset_network_header(skb);
 271         iph = ip_hdr(skb);
 272         if (iph->protocol != IPPROTO_TCP)
 273                 return -1;
 274
 275         ip_len = ip_hdrlen(skb);
 276         skb_set_transport_header(skb, ip_len);
 277         *tcph = tcp_hdr(skb);
 278
 279         /* check if ip header and tcp header are complete */
 280         if (ntohs(iph->tot_len) < ip_len + tcp_hdrlen(skb))
 281                 return -1;
 282
 283         *hdr_flags = LRO_IPV4 | LRO_TCP;
 284         *iphdr = iph;
 285
 286         return 0;
 287 }
 288
 289 static int pasemi_mac_unmap_tx_skb(struct pasemi_mac *mac,
 290                                     const int nfrags,
 291                                     struct sk_buff *skb,
 292                                     const dma_addr_t *dmas)
 293 {
 294         int f;
 295         struct pci_dev *pdev = mac->dma_pdev;
 296
 297         pci_unmap_single(pdev, dmas[0], skb_headlen(skb), PCI_DMA_TODEVICE);
 298
 299         for (f = 0; f < nfrags; f++) {
 300                 skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
 301
 302                 pci_unmap_page(pdev, dmas[f+1], frag->size, PCI_DMA_TODEVICE);
 303         }
 304         dev_kfree_skb_irq(skb);
 305
 306         /* Freed descriptor slot + main SKB ptr + nfrags additional ptrs,
 307          * aligned up to a power of 2
 308          */
 309         return (nfrags + 3) & ~1;
 310 }
 311
 312 static struct pasemi_mac_csring *pasemi_mac_setup_csring(struct pasemi_mac *mac)
 313 {
 314         struct pasemi_mac_csring *ring;
 315         u32 val;
 316         unsigned int cfg;
 317         int chno;
 318
 319         ring = pasemi_dma_alloc_chan(TXCHAN, sizeof(struct pasemi_mac_csring),
 320                                        offsetof(struct pasemi_mac_csring, chan));
 321
 322         if (!ring) {
 323                 dev_err(&mac->pdev->dev, "Can't allocate checksum channel\n");
 324                 goto out_chan;
 325         }
 326
 327         chno = ring->chan.chno;
 328
 329         ring->size = CS_RING_SIZE;
 330         ring->next_to_fill = 0;
 331
 332         /* Allocate descriptors */
 333         if (pasemi_dma_alloc_ring(&ring->chan, CS_RING_SIZE))
 334                 goto out_ring_desc;
 335
 336         write_dma_reg(PAS_DMA_TXCHAN_BASEL(chno),
 337                       PAS_DMA_TXCHAN_BASEL_BRBL(ring->chan.ring_dma));
 338         val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32);
 339         val |= PAS_DMA_TXCHAN_BASEU_SIZ(CS_RING_SIZE >> 3);
 340
 341         write_dma_reg(PAS_DMA_TXCHAN_BASEU(chno), val);
 342
 343         ring->events[0] = pasemi_dma_alloc_flag();
 344         ring->events[1] = pasemi_dma_alloc_flag();
 345         if (ring->events[0] < 0 || ring->events[1] < 0)
 346                 goto out_flags;
 347
 348         pasemi_dma_clear_flag(ring->events[0]);
 349         pasemi_dma_clear_flag(ring->events[1]);
 350
 351         ring->fun = pasemi_dma_alloc_fun();
 352         if (ring->fun < 0)
 353                 goto out_fun;
 354
 355         cfg = PAS_DMA_TXCHAN_CFG_TY_FUNC | PAS_DMA_TXCHAN_CFG_UP |
 356               PAS_DMA_TXCHAN_CFG_TATTR(ring->fun) |
 357               PAS_DMA_TXCHAN_CFG_LPSQ | PAS_DMA_TXCHAN_CFG_LPDQ;
 358
 359         if (translation_enabled())
 360                 cfg |= PAS_DMA_TXCHAN_CFG_TRD | PAS_DMA_TXCHAN_CFG_TRR;
 361
 362         write_dma_reg(PAS_DMA_TXCHAN_CFG(chno), cfg);
 363
 364         /* enable channel */
 365         pasemi_dma_start_chan(&ring->chan, PAS_DMA_TXCHAN_TCMDSTA_SZ |
 366                                            PAS_DMA_TXCHAN_TCMDSTA_DB |
 367                                            PAS_DMA_TXCHAN_TCMDSTA_DE |
 368                                            PAS_DMA_TXCHAN_TCMDSTA_DA);
 369
 370         return ring;
 371
 372 out_fun:
 373 out_flags:
 374         if (ring->events[0] >= 0)
 375                 pasemi_dma_free_flag(ring->events[0]);
 376         if (ring->events[1] >= 0)
 377                 pasemi_dma_free_flag(ring->events[1]);
 378         pasemi_dma_free_ring(&ring->chan);
 379 out_ring_desc:
 380         pasemi_dma_free_chan(&ring->chan);
 381 out_chan:
 382
 383         return NULL;
 384 }
 385
 386 static void pasemi_mac_setup_csrings(struct pasemi_mac *mac)
 387 {
 388         int i;
 389         mac->cs[0] = pasemi_mac_setup_csring(mac);
 390         if (mac->type == MAC_TYPE_XAUI)
 391                 mac->cs[1] = pasemi_mac_setup_csring(mac);
 392         else
 393                 mac->cs[1] = 0;
 394
 395         for (i = 0; i < MAX_CS; i++)
 396                 if (mac->cs[i])
 397                         mac->num_cs++;
 398 }
 399
 400 static void pasemi_mac_free_csring(struct pasemi_mac_csring *csring)
 401 {
 402         pasemi_dma_stop_chan(&csring->chan);
 403         pasemi_dma_free_flag(csring->events[0]);
 404         pasemi_dma_free_flag(csring->events[1]);
 405         pasemi_dma_free_ring(&csring->chan);
 406         pasemi_dma_free_chan(&csring->chan);
 407         pasemi_dma_free_fun(csring->fun);
 408 }
 409
 410 static int pasemi_mac_setup_rx_resources(const struct net_device *dev)
 411 {
 412         struct pasemi_mac_rxring *ring;
 413         struct pasemi_mac *mac = netdev_priv(dev);
 414         int chno;
 415         unsigned int cfg;
 416
 417         ring = pasemi_dma_alloc_chan(RXCHAN, sizeof(struct pasemi_mac_rxring),
 418                                      offsetof(struct pasemi_mac_rxring, chan));
 419
 420         if (!ring) {
 421                 dev_err(&mac->pdev->dev, "Can't allocate RX channel\n");
 422                 goto out_chan;
 423         }
 424         chno = ring->chan.chno;
 425
 426         spin_lock_init(&ring->lock);
 427
 428         ring->size = RX_RING_SIZE;
 429         ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
 430                                   RX_RING_SIZE, GFP_KERNEL);
 431
 432         if (!ring->ring_info)
 433                 goto out_ring_info;
 434
 435         /* Allocate descriptors */
 436         if (pasemi_dma_alloc_ring(&ring->chan, RX_RING_SIZE))
 437                 goto out_ring_desc;
 438
 439         ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
 440                                            RX_RING_SIZE * sizeof(u64),
 441                                            &ring->buf_dma, GFP_KERNEL);
 442         if (!ring->buffers)
 443                 goto out_ring_desc;
 444
 445         memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
 446
 447         write_dma_reg(PAS_DMA_RXCHAN_BASEL(chno),
 448                       PAS_DMA_RXCHAN_BASEL_BRBL(ring->chan.ring_dma));
 449
 450         write_dma_reg(PAS_DMA_RXCHAN_BASEU(chno),
 451                       PAS_DMA_RXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32) |
 452                       PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 3));
 453
 454         cfg = PAS_DMA_RXCHAN_CFG_HBU(2);
 455
 456         if (translation_enabled())
 457                 cfg |= PAS_DMA_RXCHAN_CFG_CTR;
 458
 459         write_dma_reg(PAS_DMA_RXCHAN_CFG(chno), cfg);
 460
 461         write_dma_reg(PAS_DMA_RXINT_BASEL(mac->dma_if),
 462                       PAS_DMA_RXINT_BASEL_BRBL(ring->buf_dma));
 463
 464         write_dma_reg(PAS_DMA_RXINT_BASEU(mac->dma_if),
 465                       PAS_DMA_RXINT_BASEU_BRBH(ring->buf_dma >> 32) |
 466                       PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
 467
 468         cfg = PAS_DMA_RXINT_CFG_DHL(2) | PAS_DMA_RXINT_CFG_L2 |
 469               PAS_DMA_RXINT_CFG_LW | PAS_DMA_RXINT_CFG_RBP |
 470               PAS_DMA_RXINT_CFG_HEN;
 471
 472         if (translation_enabled())
 473                 cfg |= PAS_DMA_RXINT_CFG_ITRR | PAS_DMA_RXINT_CFG_ITR;
 474
 475         write_dma_reg(PAS_DMA_RXINT_CFG(mac->dma_if), cfg);
 476
 477         ring->next_to_fill = 0;
 478         ring->next_to_clean = 0;
 479         ring->mac = mac;
 480         mac->rx = ring;
 481
 482         return 0;
 483
 484 out_ring_desc:
 485         kfree(ring->ring_info);
 486 out_ring_info:
 487         pasemi_dma_free_chan(&ring->chan);
 488 out_chan:
 489         return -ENOMEM;
 490 }
 491
 492 static struct pasemi_mac_txring *
 493 pasemi_mac_setup_tx_resources(const struct net_device *dev)
 494 {
 495         struct pasemi_mac *mac = netdev_priv(dev);
 496         u32 val;
 497         struct pasemi_mac_txring *ring;
 498         unsigned int cfg;
 499         int chno;
 500
 501         ring = pasemi_dma_alloc_chan(TXCHAN, sizeof(struct pasemi_mac_txring),
 502                                      offsetof(struct pasemi_mac_txring, chan));
 503
 504         if (!ring) {
 505                 dev_err(&mac->pdev->dev, "Can't allocate TX channel\n");
 506                 goto out_chan;
 507         }
 508
 509         chno = ring->chan.chno;
 510
 511         spin_lock_init(&ring->lock);
 512
 513         ring->size = TX_RING_SIZE;
 514         ring->ring_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
 515                                   TX_RING_SIZE, GFP_KERNEL);
 516         if (!ring->ring_info)
 517                 goto out_ring_info;
 518
 519         /* Allocate descriptors */
 520         if (pasemi_dma_alloc_ring(&ring->chan, TX_RING_SIZE))
 521                 goto out_ring_desc;
 522
 523         write_dma_reg(PAS_DMA_TXCHAN_BASEL(chno),
 524                       PAS_DMA_TXCHAN_BASEL_BRBL(ring->chan.ring_dma));
 525         val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32);
 526         val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 3);
 527
 528         write_dma_reg(PAS_DMA_TXCHAN_BASEU(chno), val);
 529
 530         cfg = PAS_DMA_TXCHAN_CFG_TY_IFACE |
 531               PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
 532               PAS_DMA_TXCHAN_CFG_UP |
 533               PAS_DMA_TXCHAN_CFG_WT(4);
 534
 535         if (translation_enabled())
 536                 cfg |= PAS_DMA_TXCHAN_CFG_TRD | PAS_DMA_TXCHAN_CFG_TRR;
 537
 538         write_dma_reg(PAS_DMA_TXCHAN_CFG(chno), cfg);
 539
 540         ring->next_to_fill = 0;
 541         ring->next_to_clean = 0;
 542         ring->mac = mac;
 543
 544         return ring;
 545
 546 out_ring_desc:
 547         kfree(ring->ring_info);
 548 out_ring_info:
 549         pasemi_dma_free_chan(&ring->chan);
 550 out_chan:
 551         return NULL;
 552 }
 553
 554 static void pasemi_mac_free_tx_resources(struct pasemi_mac *mac)
 555 {
 556         struct pasemi_mac_txring *txring = tx_ring(mac);
 557         unsigned int i, j;
 558         struct pasemi_mac_buffer *info;
 559         dma_addr_t dmas[MAX_SKB_FRAGS+1];
 560         int freed, nfrags;
 561         int start, limit;
 562
 563         start = txring->next_to_clean;
 564         limit = txring->next_to_fill;
 565
 566         /* Compensate for when fill has wrapped and clean has not */
 567         if (start > limit)
 568                 limit += TX_RING_SIZE;
 569
 570         for (i = start; i < limit; i += freed) {
 571                 info = &txring->ring_info[(i+1) & (TX_RING_SIZE-1)];
 572                 if (info->dma && info->skb) {
 573                         nfrags = skb_shinfo(info->skb)->nr_frags;
 574                         for (j = 0; j <= nfrags; j++)
 575                                 dmas[j] = txring->ring_info[(i+1+j) &
 576                                                 (TX_RING_SIZE-1)].dma;
 577                         freed = pasemi_mac_unmap_tx_skb(mac, nfrags,
 578                                                         info->skb, dmas);
 579                 } else
 580                         freed = 2;
 581         }
 582
 583         kfree(txring->ring_info);
 584         pasemi_dma_free_chan(&txring->chan);
 585
 586 }
 587
 588 static void pasemi_mac_free_rx_buffers(struct pasemi_mac *mac)
 589 {
 590         struct pasemi_mac_rxring *rx = rx_ring(mac);
 591         unsigned int i;
 592         struct pasemi_mac_buffer *info;
 593
 594         for (i = 0; i < RX_RING_SIZE; i++) {
 595                 info = &RX_DESC_INFO(rx, i);
 596                 if (info->skb && info->dma) {
 597                         pci_unmap_single(mac->dma_pdev,
 598                                          info->dma,
 599                                          info->skb->len,
 600                                          PCI_DMA_FROMDEVICE);
 601                         dev_kfree_skb_any(info->skb);
 602                 }
 603                 info->dma = 0;
 604                 info->skb = NULL;
 605         }
 606
 607         for (i = 0; i < RX_RING_SIZE; i++)
 608                 RX_BUFF(rx, i) = 0;
 609 }
 610
 611 static void pasemi_mac_free_rx_resources(struct pasemi_mac *mac)
 612 {
 613         pasemi_mac_free_rx_buffers(mac);
 614
 615         dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
 616                           rx_ring(mac)->buffers, rx_ring(mac)->buf_dma);
 617
 618         kfree(rx_ring(mac)->ring_info);
 619         pasemi_dma_free_chan(&rx_ring(mac)->chan);
 620         mac->rx = NULL;
 621 }
 622
 623 static void pasemi_mac_replenish_rx_ring(const struct net_device *dev,
 624                                          const int limit)
 625 {
 626         const struct pasemi_mac *mac = netdev_priv(dev);
 627         struct pasemi_mac_rxring *rx = rx_ring(mac);
 628         int fill, count;
 629
 630         if (limit <= 0)
 631                 return;
 632
 633         fill = rx_ring(mac)->next_to_fill;
 634         for (count = 0; count < limit; count++) {
 635                 struct pasemi_mac_buffer *info = &RX_DESC_INFO(rx, fill);
 636                 u64 *buff = &RX_BUFF(rx, fill);
 637                 struct sk_buff *skb;
 638                 dma_addr_t dma;
 639
 640                 /* Entry in use? */
 641                 WARN_ON(*buff);
 642
 643                 skb = dev_alloc_skb(mac->bufsz);
 644                 skb_reserve(skb, LOCAL_SKB_ALIGN);
 645
 646                 if (unlikely(!skb))
 647                         break;
 648
 649                 dma = pci_map_single(mac->dma_pdev, skb->data,
 650                                      mac->bufsz - LOCAL_SKB_ALIGN,
 651                                      PCI_DMA_FROMDEVICE);
 652
 653                 if (unlikely(pci_dma_mapping_error(mac->dma_pdev, dma))) {
 654                         dev_kfree_skb_irq(info->skb);
 655                         break;
 656                 }
 657
 658                 info->skb = skb;
 659                 info->dma = dma;
 660                 *buff = XCT_RXB_LEN(mac->bufsz) | XCT_RXB_ADDR(dma);
 661                 fill++;
 662         }
 663
 664         wmb();
 665
 666         write_dma_reg(PAS_DMA_RXINT_INCR(mac->dma_if), count);
 667
 668         rx_ring(mac)->next_to_fill = (rx_ring(mac)->next_to_fill + count) &
 669                                 (RX_RING_SIZE - 1);
 670 }
 671
 672 static void pasemi_mac_restart_rx_intr(const struct pasemi_mac *mac)
 673 {
 674         struct pasemi_mac_rxring *rx = rx_ring(mac);
 675         unsigned int reg, pcnt;
 676         /* Re-enable packet count interrupts: finally
 677          * ack the packet count interrupt we got in rx_intr.
 678          */
 679
 680         pcnt = *rx->chan.status & PAS_STATUS_PCNT_M;
 681
 682         reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
 683
 684         if (*rx->chan.status & PAS_STATUS_TIMER)
 685                 reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
 686
 687         write_iob_reg(PAS_IOB_DMA_RXCH_RESET(mac->rx->chan.chno), reg);
 688 }
 689
 690 static void pasemi_mac_restart_tx_intr(const struct pasemi_mac *mac)
 691 {
 692         unsigned int reg, pcnt;
 693
 694         /* Re-enable packet count interrupts */
 695         pcnt = *tx_ring(mac)->chan.status & PAS_STATUS_PCNT_M;
 696
 697         reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
 698
 699         write_iob_reg(PAS_IOB_DMA_TXCH_RESET(tx_ring(mac)->chan.chno), reg);
 700 }
 701
 702
 703 static inline void pasemi_mac_rx_error(const struct pasemi_mac *mac,
 704                                        const u64 macrx)
 705 {
 706         unsigned int rcmdsta, ccmdsta;
 707         struct pasemi_dmachan *chan = &rx_ring(mac)->chan;
 708
 709         if (!netif_msg_rx_err(mac))
 710                 return;
 711
 712         rcmdsta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
 713         ccmdsta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(chan->chno));
 714
 715         printk(KERN_ERR "pasemi_mac: rx error. macrx %016llx, rx status %llx\n",
 716                 macrx, *chan->status);
 717
 718         printk(KERN_ERR "pasemi_mac: rcmdsta %08x ccmdsta %08x\n",
 719                 rcmdsta, ccmdsta);
 720 }
 721
 722 static inline void pasemi_mac_tx_error(const struct pasemi_mac *mac,
 723                                        const u64 mactx)
 724 {
 725         unsigned int cmdsta;
 726         struct pasemi_dmachan *chan = &tx_ring(mac)->chan;
 727
 728         if (!netif_msg_tx_err(mac))
 729                 return;
 730
 731         cmdsta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(chan->chno));
 732
 733         printk(KERN_ERR "pasemi_mac: tx error. mactx 0x%016llx, "\
 734                 "tx status 0x%016llx\n", mactx, *chan->status);
 735
 736         printk(KERN_ERR "pasemi_mac: tcmdsta 0x%08x\n", cmdsta);
 737 }
 738
 739 static int pasemi_mac_clean_rx(struct pasemi_mac_rxring *rx,
 740                                const int limit)
 741 {
 742         const struct pasemi_dmachan *chan = &rx->chan;
 743         struct pasemi_mac *mac = rx->mac;
 744         struct pci_dev *pdev = mac->dma_pdev;
 745         unsigned int n;
 746         int count, buf_index, tot_bytes, packets;
 747         struct pasemi_mac_buffer *info;
 748         struct sk_buff *skb;
 749         unsigned int len;
 750         u64 macrx, eval;
 751         dma_addr_t dma;
 752
 753         tot_bytes = 0;
 754         packets = 0;
 755
 756         spin_lock(&rx->lock);
 757
 758         n = rx->next_to_clean;
 759
 760         prefetch(&RX_DESC(rx, n));
 761
 762         for (count = 0; count < limit; count++) {
 763                 macrx = RX_DESC(rx, n);
 764                 prefetch(&RX_DESC(rx, n+4));
 765
 766                 if ((macrx & XCT_MACRX_E) ||
 767                     (*chan->status & PAS_STATUS_ERROR))
 768                         pasemi_mac_rx_error(mac, macrx);
 769
 770                 if (!(macrx & XCT_MACRX_O))
 771                         break;
 772
 773                 info = NULL;
 774
 775                 BUG_ON(!(macrx & XCT_MACRX_RR_8BRES));
 776
 777                 eval = (RX_DESC(rx, n+1) & XCT_RXRES_8B_EVAL_M) >>
 778                         XCT_RXRES_8B_EVAL_S;
 779                 buf_index = eval-1;
 780
 781                 dma = (RX_DESC(rx, n+2) & XCT_PTR_ADDR_M);
 782                 info = &RX_DESC_INFO(rx, buf_index);
 783
 784                 skb = info->skb;
 785
 786                 prefetch_skb(skb);
 787
 788                 len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
 789
 790                 pci_unmap_single(pdev, dma, mac->bufsz - LOCAL_SKB_ALIGN,
 791                                  PCI_DMA_FROMDEVICE);
 792
 793                 if (macrx & XCT_MACRX_CRC) {
 794                         /* CRC error flagged */
 795                         mac->netdev->stats.rx_errors++;
 796                         mac->netdev->stats.rx_crc_errors++;
 797                         /* No need to free skb, it'll be reused */
 798                         goto next;
 799                 }
 800
 801                 info->skb = NULL;
 802                 info->dma = 0;
 803
 804                 if (likely((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK)) {
 805                         skb->ip_summed = CHECKSUM_UNNECESSARY;
 806                         skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
 807                                            XCT_MACRX_CSUM_S;
 808                 } else
 809                         skb->ip_summed = CHECKSUM_NONE;
 810
 811                 packets++;
 812                 tot_bytes += len;
 813
 814                 /* Don't include CRC */
 815                 skb_put(skb, len-4);
 816
 817                 skb->protocol = eth_type_trans(skb, mac->netdev);
 818                 lro_receive_skb(&mac->lro_mgr, skb, (void *)macrx);
 819
 820 next:
 821                 RX_DESC(rx, n) = 0;
 822                 RX_DESC(rx, n+1) = 0;
 823
 824                 /* Need to zero it out since hardware doesn't, since the
 825                  * replenish loop uses it to tell when it's done.
 826                  */
 827                 RX_BUFF(rx, buf_index) = 0;
 828
 829                 n += 4;
 830         }
 831
 832         if (n > RX_RING_SIZE) {
 833                 /* Errata 5971 workaround: L2 target of headers */
 834                 write_iob_reg(PAS_IOB_COM_PKTHDRCNT, 0);
 835                 n &= (RX_RING_SIZE-1);
 836         }
 837
 838         rx_ring(mac)->next_to_clean = n;
 839
 840         lro_flush_all(&mac->lro_mgr);
 841
 842         /* Increase is in number of 16-byte entries, and since each descriptor
 843          * with an 8BRES takes up 3x8 bytes (padded to 4x8), increase with
 844          * count*2.
 845          */
 846         write_dma_reg(PAS_DMA_RXCHAN_INCR(mac->rx->chan.chno), count << 1);
 847
 848         pasemi_mac_replenish_rx_ring(mac->netdev, count);
 849
 850         mac->netdev->stats.rx_bytes += tot_bytes;
 851         mac->netdev->stats.rx_packets += packets;
 852
 853         spin_unlock(&rx_ring(mac)->lock);
 854
 855         return count;
 856 }
 857
 858 /* Can't make this too large or we blow the kernel stack limits */
 859 #define TX_CLEAN_BATCHSIZE (128/MAX_SKB_FRAGS)
 860
 861 static int pasemi_mac_clean_tx(struct pasemi_mac_txring *txring)
 862 {
 863         struct pasemi_dmachan *chan = &txring->chan;
 864         struct pasemi_mac *mac = txring->mac;
 865         int i, j;
 866         unsigned int start, descr_count, buf_count, batch_limit;
 867         unsigned int ring_limit;
 868         unsigned int total_count;
 869         unsigned long flags;
 870         struct sk_buff *skbs[TX_CLEAN_BATCHSIZE];
 871         dma_addr_t dmas[TX_CLEAN_BATCHSIZE][MAX_SKB_FRAGS+1];
 872         int nf[TX_CLEAN_BATCHSIZE];
 873         int nr_frags;
 874
 875         total_count = 0;
 876         batch_limit = TX_CLEAN_BATCHSIZE;
 877 restart:
 878         spin_lock_irqsave(&txring->lock, flags);
 879
 880         start = txring->next_to_clean;
 881         ring_limit = txring->next_to_fill;
 882
 883         prefetch(&TX_DESC_INFO(txring, start+1).skb);
 884
 885         /* Compensate for when fill has wrapped but clean has not */
 886         if (start > ring_limit)
 887                 ring_limit += TX_RING_SIZE;
 888
 889         buf_count = 0;
 890         descr_count = 0;
 891
 892         for (i = start;
 893              descr_count < batch_limit && i < ring_limit;
 894              i += buf_count) {
 895                 u64 mactx = TX_DESC(txring, i);
 896                 struct sk_buff *skb;
 897
 898                 if ((mactx  & XCT_MACTX_E) ||
 899                     (*chan->status & PAS_STATUS_ERROR))
 900                         pasemi_mac_tx_error(mac, mactx);
 901
 902                 /* Skip over control descriptors */
 903                 if (!(mactx & XCT_MACTX_LLEN_M)) {
 904                         TX_DESC(txring, i) = 0;
 905                         TX_DESC(txring, i+1) = 0;
 906                         buf_count = 2;
 907                         continue;
 908                 }
 909
 910                 skb = TX_DESC_INFO(txring, i+1).skb;
 911                 nr_frags = TX_DESC_INFO(txring, i).dma;
 912
 913                 if (unlikely(mactx & XCT_MACTX_O))
 914                         /* Not yet transmitted */
 915                         break;
 916
 917                 buf_count = 2 + nr_frags;
 918                 /* Since we always fill with an even number of entries, make
 919                  * sure we skip any unused one at the end as well.
 920                  */
 921                 if (buf_count & 1)
 922                         buf_count++;
 923
 924                 for (j = 0; j <= nr_frags; j++)
 925                         dmas[descr_count][j] = TX_DESC_INFO(txring, i+1+j).dma;
 926
 927                 skbs[descr_count] = skb;
 928                 nf[descr_count] = nr_frags;
 929
 930                 TX_DESC(txring, i) = 0;
 931                 TX_DESC(txring, i+1) = 0;
 932
 933                 descr_count++;
 934         }
 935         txring->next_to_clean = i & (TX_RING_SIZE-1);
 936
 937         spin_unlock_irqrestore(&txring->lock, flags);
 938         netif_wake_queue(mac->netdev);
 939
 940         for (i = 0; i < descr_count; i++)
 941                 pasemi_mac_unmap_tx_skb(mac, nf[i], skbs[i], dmas[i]);
 942
 943         total_count += descr_count;
 944
 945         /* If the batch was full, try to clean more */
 946         if (descr_count == batch_limit)
 947                 goto restart;
 948
 949         return total_count;
 950 }
 951
 952
 953 static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
 954 {
 955         const struct pasemi_mac_rxring *rxring = data;
 956         struct pasemi_mac *mac = rxring->mac;
 957         const struct pasemi_dmachan *chan = &rxring->chan;
 958         unsigned int reg;
 959
 960         if (!(*chan->status & PAS_STATUS_CAUSE_M))
 961                 return IRQ_NONE;
 962
 963         /* Don't reset packet count so it won't fire again but clear
 964          * all others.
 965          */
 966
 967         reg = 0;
 968         if (*chan->status & PAS_STATUS_SOFT)
 969                 reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
 970         if (*chan->status & PAS_STATUS_ERROR)
 971                 reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
 972
 973         netif_rx_schedule(&mac->napi);
 974
 975         write_iob_reg(PAS_IOB_DMA_RXCH_RESET(chan->chno), reg);
 976
 977         return IRQ_HANDLED;
 978 }
 979
 980 #define TX_CLEAN_INTERVAL HZ
 981
 982 static void pasemi_mac_tx_timer(unsigned long data)
 983 {
 984         struct pasemi_mac_txring *txring = (struct pasemi_mac_txring *)data;
 985         struct pasemi_mac *mac = txring->mac;
 986
 987         pasemi_mac_clean_tx(txring);
 988
 989         mod_timer(&txring->clean_timer, jiffies + TX_CLEAN_INTERVAL);
 990
 991         pasemi_mac_restart_tx_intr(mac);
 992 }
 993
 994 static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
 995 {
 996         struct pasemi_mac_txring *txring = data;
 997         const struct pasemi_dmachan *chan = &txring->chan;
 998         struct pasemi_mac *mac = txring->mac;
 999         unsigned int reg;
1000
1001         if (!(*chan->status & PAS_STATUS_CAUSE_M))
1002                 return IRQ_NONE;
1003
1004         reg = 0;
1005
1006         if (*chan->status & PAS_STATUS_SOFT)
1007                 reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
1008         if (*chan->status & PAS_STATUS_ERROR)
1009                 reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
1010
1011         mod_timer(&txring->clean_timer, jiffies + (TX_CLEAN_INTERVAL)*2);
1012
1013         netif_rx_schedule(&mac->napi);
1014
1015         if (reg)
1016                 write_iob_reg(PAS_IOB_DMA_TXCH_RESET(chan->chno), reg);
1017
1018         return IRQ_HANDLED;
1019 }
1020
1021 static void pasemi_adjust_link(struct net_device *dev)
1022 {
1023         struct pasemi_mac *mac = netdev_priv(dev);
1024         int msg;
1025         unsigned int flags;
1026         unsigned int new_flags;
1027
1028         if (!mac->phydev->link) {
1029                 /* If no link, MAC speed settings don't matter. Just report
1030                  * link down and return.
1031                  */
1032                 if (mac->link && netif_msg_link(mac))
1033                         printk(KERN_INFO "%s: Link is down.\n", dev->name);
1034
1035                 netif_carrier_off(dev);
1036                 pasemi_mac_intf_disable(mac);
1037                 mac->link = 0;
1038
1039                 return;
1040         } else {
1041                 pasemi_mac_intf_enable(mac);
1042                 netif_carrier_on(dev);
1043         }
1044
1045         flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
1046         new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
1047                               PAS_MAC_CFG_PCFG_TSR_M);
1048
1049         if (!mac->phydev->duplex)
1050                 new_flags |= PAS_MAC_CFG_PCFG_HD;
1051
1052         switch (mac->phydev->speed) {
1053         case 1000:
1054                 new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
1055                              PAS_MAC_CFG_PCFG_TSR_1G;
1056                 break;
1057         case 100:
1058                 new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
1059                              PAS_MAC_CFG_PCFG_TSR_100M;
1060                 break;
1061         case 10:
1062                 new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
1063                              PAS_MAC_CFG_PCFG_TSR_10M;
1064                 break;
1065         default:
1066                 printk("Unsupported speed %d\n", mac->phydev->speed);
1067         }
1068
1069         /* Print on link or speed/duplex change */
1070         msg = mac->link != mac->phydev->link || flags != new_flags;
1071
1072         mac->duplex = mac->phydev->duplex;
1073         mac->speed = mac->phydev->speed;
1074         mac->link = mac->phydev->link;
1075
1076         if (new_flags != flags)
1077                 write_mac_reg(mac, PAS_MAC_CFG_PCFG, new_flags);
1078
1079         if (msg && netif_msg_link(mac))
1080                 printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
1081                        dev->name, mac->speed, mac->duplex ? "full" : "half");
1082 }
1083
1084 static int pasemi_mac_phy_init(struct net_device *dev)
1085 {
1086         struct pasemi_mac *mac = netdev_priv(dev);
1087         struct device_node *dn, *phy_dn;
1088         struct phy_device *phydev;
1089         unsigned int phy_id;
1090         const phandle *ph;
1091         const unsigned int *prop;
1092         struct resource r;
1093         int ret;
1094
1095         dn = pci_device_to_OF_node(mac->pdev);
1096         ph = of_get_property(dn, "phy-handle", NULL);
1097         if (!ph)
1098                 return -ENODEV;
1099         phy_dn = of_find_node_by_phandle(*ph);
1100
1101         prop = of_get_property(phy_dn, "reg", NULL);
1102         ret = of_address_to_resource(phy_dn->parent, 0, &r);
1103         if (ret)
1104                 goto err;
1105
1106         phy_id = *prop;
1107         snprintf(mac->phy_id, sizeof(mac->phy_id), "%x:%02x",
1108                  (int)r.start, phy_id);
1109
1110         of_node_put(phy_dn);
1111
1112         mac->link = 0;
1113         mac->speed = 0;
1114         mac->duplex = -1;
1115
1116         phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
1117
1118         if (IS_ERR(phydev)) {
1119                 printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
1120                 return PTR_ERR(phydev);
1121         }
1122
1123         mac->phydev = phydev;
1124
1125         return 0;
1126
1127 err:
1128         of_node_put(phy_dn);
1129         return -ENODEV;
1130 }
1131
1132
1133 static int pasemi_mac_open(struct net_device *dev)
1134 {
1135         struct pasemi_mac *mac = netdev_priv(dev);
1136         unsigned int flags;
1137         int i, ret;
1138
1139         flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
1140                 PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
1141                 PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
1142
1143         write_mac_reg(mac, PAS_MAC_CFG_TXP, flags);
1144
1145         ret = pasemi_mac_setup_rx_resources(dev);
1146         if (ret)
1147                 goto out_rx_resources;
1148
1149         mac->tx = pasemi_mac_setup_tx_resources(dev);
1150
1151         if (!mac->tx)
1152                 goto out_tx_ring;
1153
1154         /* We might already have allocated rings in case mtu was changed
1155          * before interface was brought up.
1156          */
1157         if (dev->mtu > 1500 && !mac->num_cs) {
1158                 pasemi_mac_setup_csrings(mac);
1159                 if (!mac->num_cs)
1160                         goto out_tx_ring;
1161         }
1162
1163         /* Zero out rmon counters */
1164         for (i = 0; i < 32; i++)
1165                 write_mac_reg(mac, PAS_MAC_RMON(i), 0);
1166
1167         /* 0x3ff with 33MHz clock is about 31us */
1168         write_iob_reg(PAS_IOB_DMA_COM_TIMEOUTCFG,
1169                       PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0x3ff));
1170
1171         write_iob_reg(PAS_IOB_DMA_RXCH_CFG(mac->rx->chan.chno),
1172                       PAS_IOB_DMA_RXCH_CFG_CNTTH(256));
1173
1174         write_iob_reg(PAS_IOB_DMA_TXCH_CFG(mac->tx->chan.chno),
1175                       PAS_IOB_DMA_TXCH_CFG_CNTTH(32));
1176
1177         write_mac_reg(mac, PAS_MAC_IPC_CHNL,
1178                       PAS_MAC_IPC_CHNL_DCHNO(mac->rx->chan.chno) |
1179                       PAS_MAC_IPC_CHNL_BCH(mac->rx->chan.chno));
1180
1181         /* enable rx if */
1182         write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
1183                       PAS_DMA_RXINT_RCMDSTA_EN |
1184                       PAS_DMA_RXINT_RCMDSTA_DROPS_M |
1185                       PAS_DMA_RXINT_RCMDSTA_BP |
1186                       PAS_DMA_RXINT_RCMDSTA_OO |
1187                       PAS_DMA_RXINT_RCMDSTA_BT);
1188
1189         /* enable rx channel */
1190         pasemi_dma_start_chan(&rx_ring(mac)->chan, PAS_DMA_RXCHAN_CCMDSTA_DU |
1191                                                    PAS_DMA_RXCHAN_CCMDSTA_OD |
1192                                                    PAS_DMA_RXCHAN_CCMDSTA_FD |
1193                                                    PAS_DMA_RXCHAN_CCMDSTA_DT);
1194
1195         /* enable tx channel */
1196         pasemi_dma_start_chan(&tx_ring(mac)->chan, PAS_DMA_TXCHAN_TCMDSTA_SZ |
1197                                                    PAS_DMA_TXCHAN_TCMDSTA_DB |
1198                                                    PAS_DMA_TXCHAN_TCMDSTA_DE |
1199                                                    PAS_DMA_TXCHAN_TCMDSTA_DA);
1200
1201         pasemi_mac_replenish_rx_ring(dev, RX_RING_SIZE);
1202
1203         write_dma_reg(PAS_DMA_RXCHAN_INCR(rx_ring(mac)->chan.chno),
1204                       RX_RING_SIZE>>1);
1205
1206         /* Clear out any residual packet count state from firmware */
1207         pasemi_mac_restart_rx_intr(mac);
1208         pasemi_mac_restart_tx_intr(mac);
1209
1210         flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
1211
1212         if (mac->type == MAC_TYPE_GMAC)
1213                 flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
1214         else
1215                 flags |= PAS_MAC_CFG_PCFG_TSR_10G | PAS_MAC_CFG_PCFG_SPD_10G;
1216
1217         /* Enable interface in MAC */
1218         write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
1219
1220         ret = pasemi_mac_phy_init(dev);
1221         if (ret) {
1222                 /* Since we won't get link notification, just enable RX */
1223                 pasemi_mac_intf_enable(mac);
1224                 if (mac->type == MAC_TYPE_GMAC) {
1225                         /* Warn for missing PHY on SGMII (1Gig) ports */
1226                         dev_warn(&mac->pdev->dev,
1227                                  "PHY init failed: %d.\n", ret);
1228                         dev_warn(&mac->pdev->dev,
1229                                  "Defaulting to 1Gbit full duplex\n");
1230                 }
1231         }
1232
1233         netif_start_queue(dev);
1234         napi_enable(&mac->napi);
1235
1236         snprintf(mac->tx_irq_name, sizeof(mac->tx_irq_name), "%s tx",
1237                  dev->name);
1238
1239         ret = request_irq(mac->tx->chan.irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
1240                           mac->tx_irq_name, mac->tx);
1241         if (ret) {
1242                 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
1243                         mac->tx->chan.irq, ret);
1244                 goto out_tx_int;
1245         }
1246
1247         snprintf(mac->rx_irq_name, sizeof(mac->rx_irq_name), "%s rx",
1248                  dev->name);
1249
1250         ret = request_irq(mac->rx->chan.irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
1251                           mac->rx_irq_name, mac->rx);
1252         if (ret) {
1253                 dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
1254                         mac->rx->chan.irq, ret);
1255                 goto out_rx_int;
1256         }
1257
1258         if (mac->phydev)
1259                 phy_start(mac->phydev);
1260
1261         init_timer(&mac->tx->clean_timer);
1262         mac->tx->clean_timer.function = pasemi_mac_tx_timer;
1263         mac->tx->clean_timer.data = (unsigned long)mac->tx;
1264         mac->tx->clean_timer.expires = jiffies+HZ;
1265         add_timer(&mac->tx->clean_timer);
1266
1267         return 0;
1268
1269 out_rx_int:
1270         free_irq(mac->tx->chan.irq, mac->tx);
1271 out_tx_int:
1272         napi_disable(&mac->napi);
1273         netif_stop_queue(dev);
1274 out_tx_ring:
1275         if (mac->tx)
1276                 pasemi_mac_free_tx_resources(mac);
1277         pasemi_mac_free_rx_resources(mac);
1278 out_rx_resources:
1279
1280         return ret;
1281 }
1282
1283 #define MAX_RETRIES 5000
1284
1285 static void pasemi_mac_pause_txchan(struct pasemi_mac *mac)
1286 {
1287         unsigned int sta, retries;
1288         int txch = tx_ring(mac)->chan.chno;
1289
1290         write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch),
1291                       PAS_DMA_TXCHAN_TCMDSTA_ST);
1292
1293         for (retries = 0; retries < MAX_RETRIES; retries++) {
1294                 sta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch));
1295                 if (!(sta & PAS_DMA_TXCHAN_TCMDSTA_ACT))
1296                         break;
1297                 cond_resched();
1298         }
1299
1300         if (sta & PAS_DMA_TXCHAN_TCMDSTA_ACT)
1301                 dev_err(&mac->dma_pdev->dev,
1302                         "Failed to stop tx channel, tcmdsta %08x\n", sta);
1303
1304         write_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch), 0);
1305 }
1306
1307 static void pasemi_mac_pause_rxchan(struct pasemi_mac *mac)
1308 {
1309         unsigned int sta, retries;
1310         int rxch = rx_ring(mac)->chan.chno;
1311
1312         write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch),
1313                       PAS_DMA_RXCHAN_CCMDSTA_ST);
1314         for (retries = 0; retries < MAX_RETRIES; retries++) {
1315                 sta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch));
1316                 if (!(sta & PAS_DMA_RXCHAN_CCMDSTA_ACT))
1317                         break;
1318                 cond_resched();
1319         }
1320
1321         if (sta & PAS_DMA_RXCHAN_CCMDSTA_ACT)
1322                 dev_err(&mac->dma_pdev->dev,
1323                         "Failed to stop rx channel, ccmdsta 08%x\n", sta);
1324         write_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch), 0);
1325 }
1326
1327 static void pasemi_mac_pause_rxint(struct pasemi_mac *mac)
1328 {
1329         unsigned int sta, retries;
1330
1331         write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
1332                       PAS_DMA_RXINT_RCMDSTA_ST);
1333         for (retries = 0; retries < MAX_RETRIES; retries++) {
1334                 sta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1335                 if (!(sta & PAS_DMA_RXINT_RCMDSTA_ACT))
1336                         break;
1337                 cond_resched();
1338         }
1339
1340         if (sta & PAS_DMA_RXINT_RCMDSTA_ACT)
1341                 dev_err(&mac->dma_pdev->dev,
1342                         "Failed to stop rx interface, rcmdsta %08x\n", sta);
1343         write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
1344 }
1345
1346 static int pasemi_mac_close(struct net_device *dev)
1347 {
1348         struct pasemi_mac *mac = netdev_priv(dev);
1349         unsigned int sta;
1350         int rxch, txch, i;
1351
1352         rxch = rx_ring(mac)->chan.chno;
1353         txch = tx_ring(mac)->chan.chno;
1354
1355         if (mac->phydev) {
1356                 phy_stop(mac->phydev);
1357                 phy_disconnect(mac->phydev);
1358         }
1359
1360         del_timer_sync(&mac->tx->clean_timer);
1361
1362         netif_stop_queue(dev);
1363         napi_disable(&mac->napi);
1364
1365         sta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1366         if (sta & (PAS_DMA_RXINT_RCMDSTA_BP |
1367                       PAS_DMA_RXINT_RCMDSTA_OO |
1368                       PAS_DMA_RXINT_RCMDSTA_BT))
1369                 printk(KERN_DEBUG "pasemi_mac: rcmdsta error: 0x%08x\n", sta);
1370
1371         sta = read_dma_reg(PAS_DMA_RXCHAN_CCMDSTA(rxch));
1372         if (sta & (PAS_DMA_RXCHAN_CCMDSTA_DU |
1373                      PAS_DMA_RXCHAN_CCMDSTA_OD |
1374                      PAS_DMA_RXCHAN_CCMDSTA_FD |
1375                      PAS_DMA_RXCHAN_CCMDSTA_DT))
1376                 printk(KERN_DEBUG "pasemi_mac: ccmdsta error: 0x%08x\n", sta);
1377
1378         sta = read_dma_reg(PAS_DMA_TXCHAN_TCMDSTA(txch));
1379         if (sta & (PAS_DMA_TXCHAN_TCMDSTA_SZ | PAS_DMA_TXCHAN_TCMDSTA_DB |
1380                       PAS_DMA_TXCHAN_TCMDSTA_DE | PAS_DMA_TXCHAN_TCMDSTA_DA))
1381                 printk(KERN_DEBUG "pasemi_mac: tcmdsta error: 0x%08x\n", sta);
1382
1383         /* Clean out any pending buffers */
1384         pasemi_mac_clean_tx(tx_ring(mac));
1385         pasemi_mac_clean_rx(rx_ring(mac), RX_RING_SIZE);
1386
1387         pasemi_mac_pause_txchan(mac);
1388         pasemi_mac_pause_rxint(mac);
1389         pasemi_mac_pause_rxchan(mac);
1390         pasemi_mac_intf_disable(mac);
1391
1392         free_irq(mac->tx->chan.irq, mac->tx);
1393         free_irq(mac->rx->chan.irq, mac->rx);
1394
1395         for (i = 0; i < mac->num_cs; i++) {
1396                 pasemi_mac_free_csring(mac->cs[i]);
1397                 mac->cs[i] = NULL;
1398         }
1399
1400         mac->num_cs = 0;
1401
1402         /* Free resources */
1403         pasemi_mac_free_rx_resources(mac);
1404         pasemi_mac_free_tx_resources(mac);
1405
1406         return 0;
1407 }
1408
1409 static void pasemi_mac_queue_csdesc(const struct sk_buff *skb,
1410                                     const dma_addr_t *map,
1411                                     const unsigned int *map_size,
1412                                     struct pasemi_mac_txring *txring,
1413                                     struct pasemi_mac_csring *csring)
1414 {
1415         u64 fund;
1416         dma_addr_t cs_dest;
1417         const int nh_off = skb_network_offset(skb);
1418         const int nh_len = skb_network_header_len(skb);
1419         const int nfrags = skb_shinfo(skb)->nr_frags;
1420         int cs_size, i, fill, hdr, cpyhdr, evt;
1421         dma_addr_t csdma;
1422
1423         fund = XCT_FUN_ST | XCT_FUN_RR_8BRES |
1424                XCT_FUN_O | XCT_FUN_FUN(csring->fun) |
1425                XCT_FUN_CRM_SIG | XCT_FUN_LLEN(skb->len - nh_off) |
1426                XCT_FUN_SHL(nh_len >> 2) | XCT_FUN_SE;
1427
1428         switch (ip_hdr(skb)->protocol) {
1429         case IPPROTO_TCP:
1430                 fund |= XCT_FUN_SIG_TCP4;
1431                 /* TCP checksum is 16 bytes into the header */
1432                 cs_dest = map[0] + skb_transport_offset(skb) + 16;
1433                 break;
1434         case IPPROTO_UDP:
1435                 fund |= XCT_FUN_SIG_UDP4;
1436                 /* UDP checksum is 6 bytes into the header */
1437                 cs_dest = map[0] + skb_transport_offset(skb) + 6;
1438                 break;
1439         default:
1440                 BUG();
1441         }
1442
1443         /* Do the checksum offloaded */
1444         fill = csring->next_to_fill;
1445         hdr = fill;
1446
1447         CS_DESC(csring, fill++) = fund;
1448         /* Room for 8BRES. Checksum result is really 2 bytes into it */
1449         csdma = csring->chan.ring_dma + (fill & (CS_RING_SIZE-1)) * 8 + 2;
1450         CS_DESC(csring, fill++) = 0;
1451
1452         CS_DESC(csring, fill) = XCT_PTR_LEN(map_size[0]-nh_off) | XCT_PTR_ADDR(map[0]+nh_off);
1453         for (i = 1; i <= nfrags; i++)
1454                 CS_DESC(csring, fill+i) = XCT_PTR_LEN(map_size[i]) | XCT_PTR_ADDR(map[i]);
1455
1456         fill += i;
1457         if (fill & 1)
1458                 fill++;
1459
1460         /* Copy the result into the TCP packet */
1461         cpyhdr = fill;
1462         CS_DESC(csring, fill++) = XCT_FUN_O | XCT_FUN_FUN(csring->fun) |
1463                                   XCT_FUN_LLEN(2) | XCT_FUN_SE;
1464         CS_DESC(csring, fill++) = XCT_PTR_LEN(2) | XCT_PTR_ADDR(cs_dest) | XCT_PTR_T;
1465         CS_DESC(csring, fill++) = XCT_PTR_LEN(2) | XCT_PTR_ADDR(csdma);
1466         fill++;
1467
1468         evt = !csring->last_event;
1469         csring->last_event = evt;
1470
1471         /* Event handshaking with MAC TX */
1472         CS_DESC(csring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O |
1473                                   CTRL_CMD_ETYPE_SET | CTRL_CMD_REG(csring->events[evt]);
1474         CS_DESC(csring, fill++) = 0;
1475         CS_DESC(csring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O |
1476                                   CTRL_CMD_ETYPE_WCLR | CTRL_CMD_REG(csring->events[!evt]);
1477         CS_DESC(csring, fill++) = 0;
1478         csring->next_to_fill = fill & (CS_RING_SIZE-1);
1479
1480         cs_size = fill - hdr;
1481         write_dma_reg(PAS_DMA_TXCHAN_INCR(csring->chan.chno), (cs_size) >> 1);
1482
1483         /* TX-side event handshaking */
1484         fill = txring->next_to_fill;
1485         TX_DESC(txring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O |
1486                                   CTRL_CMD_ETYPE_WSET | CTRL_CMD_REG(csring->events[evt]);
1487         TX_DESC(txring, fill++) = 0;
1488         TX_DESC(txring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O |
1489                                   CTRL_CMD_ETYPE_CLR | CTRL_CMD_REG(csring->events[!evt]);
1490         TX_DESC(txring, fill++) = 0;
1491         txring->next_to_fill = fill;
1492
1493         write_dma_reg(PAS_DMA_TXCHAN_INCR(txring->chan.chno), 2);
1494
1495         return;
1496 }
1497
1498 static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
1499 {
1500         struct pasemi_mac * const mac = netdev_priv(dev);
1501         struct pasemi_mac_txring * const txring = tx_ring(mac);
1502         struct pasemi_mac_csring *csring;
1503         u64 dflags = 0;
1504         u64 mactx;
1505         dma_addr_t map[MAX_SKB_FRAGS+1];
1506         unsigned int map_size[MAX_SKB_FRAGS+1];
1507         unsigned long flags;
1508         int i, nfrags;
1509         int fill;
1510         const int nh_off = skb_network_offset(skb);
1511         const int nh_len = skb_network_header_len(skb);
1512
1513         prefetch(&txring->ring_info);
1514
1515         dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_CRC_PAD;
1516
1517         nfrags = skb_shinfo(skb)->nr_frags;
1518
1519         map[0] = pci_map_single(mac->dma_pdev, skb->data, skb_headlen(skb),
1520                                 PCI_DMA_TODEVICE);
1521         map_size[0] = skb_headlen(skb);
1522         if (pci_dma_mapping_error(mac->dma_pdev, map[0]))
1523                 goto out_err_nolock;
1524
1525         for (i = 0; i < nfrags; i++) {
1526                 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1527
1528                 map[i+1] = pci_map_page(mac->dma_pdev, frag->page,
1529                                         frag->page_offset, frag->size,
1530                                         PCI_DMA_TODEVICE);
1531                 map_size[i+1] = frag->size;
1532                 if (pci_dma_mapping_error(mac->dma_pdev, map[i+1])) {
1533                         nfrags = i;
1534                         goto out_err_nolock;
1535                 }
1536         }
1537
1538         if (skb->ip_summed == CHECKSUM_PARTIAL && skb->len <= 1540) {
1539                 switch (ip_hdr(skb)->protocol) {
1540                 case IPPROTO_TCP:
1541                         dflags |= XCT_MACTX_CSUM_TCP;
1542                         dflags |= XCT_MACTX_IPH(nh_len >> 2);
1543                         dflags |= XCT_MACTX_IPO(nh_off);
1544                         break;
1545                 case IPPROTO_UDP:
1546                         dflags |= XCT_MACTX_CSUM_UDP;
1547                         dflags |= XCT_MACTX_IPH(nh_len >> 2);
1548                         dflags |= XCT_MACTX_IPO(nh_off);
1549                         break;
1550                 default:
1551                         WARN_ON(1);
1552                 }
1553         }
1554
1555         mactx = dflags | XCT_MACTX_LLEN(skb->len);
1556
1557         spin_lock_irqsave(&txring->lock, flags);
1558
1559         /* Avoid stepping on the same cache line that the DMA controller
1560          * is currently about to send, so leave at least 8 words available.
1561          * Total free space needed is mactx + fragments + 8
1562          */
1563         if (RING_AVAIL(txring) < nfrags + 14) {
1564                 /* no room -- stop the queue and wait for tx intr */
1565                 netif_stop_queue(dev);
1566                 goto out_err;
1567         }
1568
1569         /* Queue up checksum + event descriptors, if needed */
1570         if (mac->num_cs && skb->ip_summed == CHECKSUM_PARTIAL && skb->len > 1540) {
1571                 csring = mac->cs[mac->last_cs];
1572                 mac->last_cs = (mac->last_cs + 1) % mac->num_cs;
1573
1574                 pasemi_mac_queue_csdesc(skb, map, map_size, txring, csring);
1575         }
1576
1577         fill = txring->next_to_fill;
1578         TX_DESC(txring, fill) = mactx;
1579         TX_DESC_INFO(txring, fill).dma = nfrags;
1580         fill++;
1581         TX_DESC_INFO(txring, fill).skb = skb;
1582         for (i = 0; i <= nfrags; i++) {
1583                 TX_DESC(txring, fill+i) =
1584                         XCT_PTR_LEN(map_size[i]) | XCT_PTR_ADDR(map[i]);
1585                 TX_DESC_INFO(txring, fill+i).dma = map[i];
1586         }
1587
1588         /* We have to add an even number of 8-byte entries to the ring
1589          * even if the last one is unused. That means always an odd number
1590          * of pointers + one mactx descriptor.
1591          */
1592         if (nfrags & 1)
1593                 nfrags++;
1594
1595         txring->next_to_fill = (fill + nfrags + 1) & (TX_RING_SIZE-1);
1596
1597         dev->stats.tx_packets++;
1598         dev->stats.tx_bytes += skb->len;
1599
1600         spin_unlock_irqrestore(&txring->lock, flags);
1601
1602         write_dma_reg(PAS_DMA_TXCHAN_INCR(txring->chan.chno), (nfrags+2) >> 1);
1603
1604         return NETDEV_TX_OK;
1605
1606 out_err:
1607         spin_unlock_irqrestore(&txring->lock, flags);
1608 out_err_nolock:
1609         while (nfrags--)
1610                 pci_unmap_single(mac->dma_pdev, map[nfrags], map_size[nfrags],
1611                                  PCI_DMA_TODEVICE);
1612
1613         return NETDEV_TX_BUSY;
1614 }
1615
1616 static void pasemi_mac_set_rx_mode(struct net_device *dev)
1617 {
1618         const struct pasemi_mac *mac = netdev_priv(dev);
1619         unsigned int flags;
1620
1621         flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
1622
1623         /* Set promiscuous */
1624         if (dev->flags & IFF_PROMISC)
1625                 flags |= PAS_MAC_CFG_PCFG_PR;
1626         else
1627                 flags &= ~PAS_MAC_CFG_PCFG_PR;
1628
1629         write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
1630 }
1631
1632
1633 static int pasemi_mac_poll(struct napi_struct *napi, int budget)
1634 {
1635         struct pasemi_mac *mac = container_of(napi, struct pasemi_mac, napi);
1636         int pkts;
1637
1638         pasemi_mac_clean_tx(tx_ring(mac));
1639         pkts = pasemi_mac_clean_rx(rx_ring(mac), budget);
1640         if (pkts < budget) {
1641                 /* all done, no more packets present */
1642                 netif_rx_complete(napi);
1643
1644                 pasemi_mac_restart_rx_intr(mac);
1645                 pasemi_mac_restart_tx_intr(mac);
1646         }
1647         return pkts;
1648 }
1649
1650 #ifdef CONFIG_NET_POLL_CONTROLLER
1651 /*
1652  * Polling 'interrupt' - used by things like netconsole to send skbs
1653  * without having to re-enable interrupts. It's not called while
1654  * the interrupt routine is executing.
1655  */
1656 static void pasemi_mac_netpoll(struct net_device *dev)
1657 {
1658         const struct pasemi_mac *mac = netdev_priv(dev);
1659
1660         disable_irq(mac->tx->chan.irq);
1661         pasemi_mac_tx_intr(mac->tx->chan.irq, mac->tx);
1662         enable_irq(mac->tx->chan.irq);
1663
1664         disable_irq(mac->rx->chan.irq);
1665         pasemi_mac_rx_intr(mac->rx->chan.irq, mac->rx);
1666         enable_irq(mac->rx->chan.irq);
1667 }
1668 #endif
1669
1670 static int pasemi_mac_change_mtu(struct net_device *dev, int new_mtu)
1671 {
1672         struct pasemi_mac *mac = netdev_priv(dev);
1673         unsigned int reg;
1674         unsigned int rcmdsta = 0;
1675         int running;
1676         int ret = 0;
1677
1678         if (new_mtu < PE_MIN_MTU || new_mtu > PE_MAX_MTU)
1679                 return -EINVAL;
1680
1681         running = netif_running(dev);
1682
1683         if (running) {
1684                 /* Need to stop the interface, clean out all already
1685                  * received buffers, free all unused buffers on the RX
1686                  * interface ring, then finally re-fill the rx ring with
1687                  * the new-size buffers and restart.
1688                  */
1689
1690                 napi_disable(&mac->napi);
1691                 netif_tx_disable(dev);
1692                 pasemi_mac_intf_disable(mac);
1693
1694                 rcmdsta = read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
1695                 pasemi_mac_pause_rxint(mac);
1696                 pasemi_mac_clean_rx(rx_ring(mac), RX_RING_SIZE);
1697                 pasemi_mac_free_rx_buffers(mac);
1698
1699         }
1700
1701         /* Setup checksum channels if large MTU and none already allocated */
1702         if (new_mtu > 1500 && !mac->num_cs) {
1703                 pasemi_mac_setup_csrings(mac);
1704                 if (!mac->num_cs) {
1705                         ret = -ENOMEM;
1706                         goto out;
1707                 }
1708         }
1709
1710         /* Change maxf, i.e. what size frames are accepted.
1711          * Need room for ethernet header and CRC word
1712          */
1713         reg = read_mac_reg(mac, PAS_MAC_CFG_MACCFG);
1714         reg &= ~PAS_MAC_CFG_MACCFG_MAXF_M;
1715         reg |= PAS_MAC_CFG_MACCFG_MAXF(new_mtu + ETH_HLEN + 4);
1716         write_mac_reg(mac, PAS_MAC_CFG_MACCFG, reg);
1717
1718         dev->mtu = new_mtu;
1719         /* MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
1720         mac->bufsz = new_mtu + ETH_HLEN + ETH_FCS_LEN + LOCAL_SKB_ALIGN + 128;
1721
1722 out:
1723         if (running) {
1724                 write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
1725                               rcmdsta | PAS_DMA_RXINT_RCMDSTA_EN);
1726
1727                 rx_ring(mac)->next_to_fill = 0;
1728                 pasemi_mac_replenish_rx_ring(dev, RX_RING_SIZE-1);
1729
1730                 napi_enable(&mac->napi);
1731                 netif_start_queue(dev);
1732                 pasemi_mac_intf_enable(mac);
1733         }
1734
1735         return ret;
1736 }
1737
1738 static int __devinit
1739 pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1740 {
1741         struct net_device *dev;
1742         struct pasemi_mac *mac;
1743         int err;
1744
1745         err = pci_enable_device(pdev);
1746         if (err)
1747                 return err;
1748
1749         dev = alloc_etherdev(sizeof(struct pasemi_mac));
1750         if (dev == NULL) {
1751                 dev_err(&pdev->dev,
1752                         "pasemi_mac: Could not allocate ethernet device.\n");
1753                 err = -ENOMEM;
1754                 goto out_disable_device;
1755         }
1756
1757         pci_set_drvdata(pdev, dev);
1758         SET_NETDEV_DEV(dev, &pdev->dev);
1759
1760         mac = netdev_priv(dev);
1761
1762         mac->pdev = pdev;
1763         mac->netdev = dev;
1764
1765         netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
1766
1767         dev->features = NETIF_F_IP_CSUM | NETIF_F_LLTX | NETIF_F_SG |
1768                         NETIF_F_HIGHDMA | NETIF_F_GSO;
1769
1770         mac->lro_mgr.max_aggr = LRO_MAX_AGGR;
1771         mac->lro_mgr.max_desc = MAX_LRO_DESCRIPTORS;
1772         mac->lro_mgr.lro_arr = mac->lro_desc;
1773         mac->lro_mgr.get_skb_header = get_skb_hdr;
1774         mac->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
1775         mac->lro_mgr.dev = mac->netdev;
1776         mac->lro_mgr.ip_summed = CHECKSUM_UNNECESSARY;
1777         mac->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1778
1779
1780         mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
1781         if (!mac->dma_pdev) {
1782                 dev_err(&mac->pdev->dev, "Can't find DMA Controller\n");
1783                 err = -ENODEV;
1784                 goto out;
1785         }
1786
1787         mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
1788         if (!mac->iob_pdev) {
1789                 dev_err(&mac->pdev->dev, "Can't find I/O Bridge\n");
1790                 err = -ENODEV;
1791                 goto out;
1792         }
1793
1794         /* get mac addr from device tree */
1795         if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
1796                 err = -ENODEV;
1797                 goto out;
1798         }
1799         memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
1800
1801         mac->dma_if = mac_to_intf(mac);
1802         if (mac->dma_if < 0) {
1803                 dev_err(&mac->pdev->dev, "Can't map DMA interface\n");
1804                 err = -ENODEV;
1805                 goto out;
1806         }
1807
1808         switch (pdev->device) {
1809         case 0xa005:
1810                 mac->type = MAC_TYPE_GMAC;
1811                 break;
1812         case 0xa006:
1813                 mac->type = MAC_TYPE_XAUI;
1814                 break;
1815         default:
1816                 err = -ENODEV;
1817                 goto out;
1818         }
1819
1820         dev->open = pasemi_mac_open;
1821         dev->stop = pasemi_mac_close;
1822         dev->hard_start_xmit = pasemi_mac_start_tx;
1823         dev->set_multicast_list = pasemi_mac_set_rx_mode;
1824         dev->set_mac_address = pasemi_mac_set_mac_addr;
1825         dev->mtu = PE_DEF_MTU;
1826         /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
1827         mac->bufsz = dev->mtu + ETH_HLEN + ETH_FCS_LEN + LOCAL_SKB_ALIGN + 128;
1828 #ifdef CONFIG_NET_POLL_CONTROLLER
1829         dev->poll_controller = pasemi_mac_netpoll;
1830 #endif
1831
1832         dev->change_mtu = pasemi_mac_change_mtu;
1833         dev->ethtool_ops = &pasemi_mac_ethtool_ops;
1834
1835         if (err)
1836                 goto out;
1837
1838         mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
1839
1840         /* Enable most messages by default */
1841         mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
1842
1843         err = register_netdev(dev);
1844
1845         if (err) {
1846                 dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
1847                         err);
1848                 goto out;
1849         } else if netif_msg_probe(mac)
1850                 printk(KERN_INFO "%s: PA Semi %s: intf %d, hw addr %pM\n",
1851                        dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
1852                        mac->dma_if, dev->dev_addr);
1853
1854         return err;
1855
1856 out:
1857         if (mac->iob_pdev)
1858                 pci_dev_put(mac->iob_pdev);
1859         if (mac->dma_pdev)
1860                 pci_dev_put(mac->dma_pdev);
1861
1862         free_netdev(dev);
1863 out_disable_device:
1864         pci_disable_device(pdev);
1865         return err;
1866
1867 }
1868
1869 static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
1870 {
1871         struct net_device *netdev = pci_get_drvdata(pdev);
1872         struct pasemi_mac *mac;
1873
1874         if (!netdev)
1875                 return;
1876
1877         mac = netdev_priv(netdev);
1878
1879         unregister_netdev(netdev);
1880
1881         pci_disable_device(pdev);
1882         pci_dev_put(mac->dma_pdev);
1883         pci_dev_put(mac->iob_pdev);
1884
1885         pasemi_dma_free_chan(&mac->tx->chan);
1886         pasemi_dma_free_chan(&mac->rx->chan);
1887
1888         pci_set_drvdata(pdev, NULL);
1889         free_netdev(netdev);
1890 }
1891
1892 static struct pci_device_id pasemi_mac_pci_tbl[] = {
1893         { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
1894         { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
1895         { },
1896 };
1897
1898 MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
1899
1900 static struct pci_driver pasemi_mac_driver = {
1901         .name           = "pasemi_mac",
1902         .id_table       = pasemi_mac_pci_tbl,
1903         .probe          = pasemi_mac_probe,
1904         .remove         = __devexit_p(pasemi_mac_remove),
1905 };
1906
1907 static void __exit pasemi_mac_cleanup_module(void)
1908 {
1909         pci_unregister_driver(&pasemi_mac_driver);
1910 }
1911
1912 int pasemi_mac_init_module(void)
1913 {
1914         int err;
1915
1916         err = pasemi_dma_init();
1917         if (err)
1918                 return err;
1919
1920         return pci_register_driver(&pasemi_mac_driver);
1921 }
1922
1923 module_init(pasemi_mac_init_module);
1924 module_exit(pasemi_mac_cleanup_module);