1 /* Various workarounds for chipset bugs.
2 This code runs very early and can't use the regular PCI subsystem
3 The entries are keyed to PCI bridges which usually identify chipsets
5 This is only for whole classes of chipsets with specific problems which
6 need early invasive action (e.g. before the timers are initialized).
7 Most PCI device specific workarounds can be done later and should be
9 Mainboard specific bugs should be handled by DMI entries.
10 CPU specific bugs in setup.c */
12 #include <linux/pci.h>
13 #include <linux/acpi.h>
14 #include <linux/pci_ids.h>
15 #include <asm/pci-direct.h>
17 #include <asm/io_apic.h>
20 #ifdef CONFIG_GART_IOMMU
24 static void __init fix_hypertransport_config(int num, int slot, int func)
28 * we found a hypertransport bus
29 * make sure that we are broadcasting
30 * interrupts to all cpus on the ht bus
31 * if we're using extended apic ids
33 htcfg = read_pci_config(num, slot, func, 0x68);
34 if (htcfg & (1 << 18)) {
35 printk(KERN_INFO "Detected use of extended apic ids "
36 "on hypertransport bus\n");
37 if ((htcfg & (1 << 17)) == 0) {
38 printk(KERN_INFO "Enabling hypertransport extended "
39 "apic interrupt broadcast\n");
40 printk(KERN_INFO "Note this is a bios bug, "
41 "please contact your hw vendor\n");
43 write_pci_config(num, slot, func, 0x68, htcfg);
50 static void __init via_bugs(int num, int slot, int func)
52 #ifdef CONFIG_GART_IOMMU
53 if ((max_pfn > MAX_DMA32_PFN || force_iommu) &&
54 !gart_iommu_aperture_allowed) {
56 "Looks like a VIA chipset. Disabling IOMMU."
57 " Override with iommu=allowed\n");
58 gart_iommu_aperture_disabled = 1;
64 #ifdef CONFIG_X86_IO_APIC
66 static int __init nvidia_hpet_check(struct acpi_table_header *header)
70 #endif /* CONFIG_X86_IO_APIC */
71 #endif /* CONFIG_ACPI */
73 static void __init nvidia_bugs(int num, int slot, int func)
76 #ifdef CONFIG_X86_IO_APIC
78 * All timer overrides on Nvidia are
79 * wrong unless HPET is enabled.
80 * Unfortunately that's not true on many Asus boards.
81 * We don't know yet how to detect this automatically, but
82 * at least allow a command line override.
84 if (acpi_use_timer_override)
87 if (acpi_table_parse(ACPI_SIG_HPET, nvidia_hpet_check)) {
88 acpi_skip_timer_override = 1;
89 printk(KERN_INFO "Nvidia board "
90 "detected. Ignoring ACPI "
92 printk(KERN_INFO "If you got timer trouble "
93 "try acpi_use_timer_override\n");
97 /* RED-PEN skip them on mptables too? */
101 #define QFLAG_APPLY_ONCE 0x1
102 #define QFLAG_APPLIED 0x2
103 #define QFLAG_DONE (QFLAG_APPLY_ONCE|QFLAG_APPLIED)
110 void (*f)(int num, int slot, int func);
113 static struct chipset early_qrk[] __initdata = {
114 { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
115 PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, nvidia_bugs },
116 { PCI_VENDOR_ID_VIA, PCI_ANY_ID,
117 PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, via_bugs },
118 { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB,
119 PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, fix_hypertransport_config },
123 static void __init check_dev_quirk(int num, int slot, int func)
131 class = read_pci_config_16(num, slot, func, PCI_CLASS_DEVICE);
136 vendor = read_pci_config_16(num, slot, func, PCI_VENDOR_ID);
138 device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID);
140 for (i = 0; early_qrk[i].f != NULL; i++) {
141 if (((early_qrk[i].vendor == PCI_ANY_ID) ||
142 (early_qrk[i].vendor == vendor)) &&
143 ((early_qrk[i].device == PCI_ANY_ID) ||
144 (early_qrk[i].device == device)) &&
145 (!((early_qrk[i].class ^ class) &
146 early_qrk[i].class_mask))) {
147 if ((early_qrk[i].flags &
148 QFLAG_DONE) != QFLAG_DONE)
149 early_qrk[i].f(num, slot, func);
150 early_qrk[i].flags |= QFLAG_APPLIED;
154 type = read_pci_config_byte(num, slot, func,
160 void __init early_quirks(void)
164 if (!early_pci_allowed())
167 /* Poor man's PCI discovery */
168 for (num = 0; num < 32; num++)
169 for (slot = 0; slot < 32; slot++)
170 for (func = 0; func < 8; func++)
171 check_dev_quirk(num, slot, func);