2 * wm8750.c -- WM8750 ALSA SoC audio driver
4 * Copyright 2005 Openedhand Ltd.
6 * Author: Richard Purdie <richard@openedhand.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/module.h>
16 #include <linux/moduleparam.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
20 #include <linux/i2c.h>
21 #include <linux/platform_device.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/soc.h>
26 #include <sound/soc-dapm.h>
27 #include <sound/initval.h>
31 #define AUDIO_NAME "WM8750"
32 #define WM8750_VERSION "0.12"
34 /* codec private data */
40 * wm8750 register cache
41 * We can't read the WM8750 register space when we
42 * are using 2 wire for device control, so we cache them instead.
44 static const u16 wm8750_reg[] = {
45 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */
46 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */
47 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */
48 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */
49 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */
50 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */
51 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */
52 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */
53 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */
54 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */
55 0x0079, 0x0079, 0x0079, /* 40 */
59 * read wm8750 register cache
61 static inline unsigned int wm8750_read_reg_cache(struct snd_soc_codec *codec,
64 u16 *cache = codec->reg_cache;
65 if (reg > WM8750_CACHE_REGNUM)
71 * write wm8750 register cache
73 static inline void wm8750_write_reg_cache(struct snd_soc_codec *codec,
74 unsigned int reg, unsigned int value)
76 u16 *cache = codec->reg_cache;
77 if (reg > WM8750_CACHE_REGNUM)
82 static int wm8750_write(struct snd_soc_codec *codec, unsigned int reg,
88 * D15..D9 WM8753 register offset
89 * D8...D0 register data
91 data[0] = (reg << 1) | ((value >> 8) & 0x0001);
92 data[1] = value & 0x00ff;
94 wm8750_write_reg_cache(codec, reg, value);
95 if (codec->hw_write(codec->control_data, data, 2) == 2)
101 #define wm8750_reset(c) wm8750_write(c, WM8750_RESET, 0)
106 static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"};
107 static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
108 static const char *wm8750_treble[] = {"8kHz", "4kHz"};
109 static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"};
110 static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"};
111 static const char *wm8750_3d_func[] = {"Capture", "Playback"};
112 static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"};
113 static const char *wm8750_ng_type[] = {"Constant PGA Gain",
115 static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA",
117 static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3",
119 static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut",
121 static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"};
122 static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert",
124 static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
125 static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)",
126 "Mono (Right)", "Digital Mono"};
128 static const struct soc_enum wm8750_enum[] = {
129 SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass),
130 SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter),
131 SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble),
132 SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc),
133 SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc),
134 SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func),
135 SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func),
136 SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type),
137 SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux),
138 SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux),
139 SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */
140 SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel),
141 SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3),
142 SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel),
143 SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol),
144 SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph),
145 SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */
149 static const struct snd_kcontrol_new wm8750_snd_controls[] = {
151 SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0),
152 SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0),
153 SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1),
155 SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V,
156 WM8750_ROUT1V, 7, 1, 0),
157 SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V,
158 WM8750_ROUT2V, 7, 1, 0),
160 SOC_ENUM("Playback De-emphasis", wm8750_enum[15]),
162 SOC_ENUM("Capture Polarity", wm8750_enum[14]),
163 SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0),
164 SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0),
166 SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0),
168 SOC_ENUM("Bass Boost", wm8750_enum[0]),
169 SOC_ENUM("Bass Filter", wm8750_enum[1]),
170 SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1),
172 SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 1),
173 SOC_ENUM("Treble Cut-off", wm8750_enum[2]),
175 SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0),
176 SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0),
177 SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]),
178 SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]),
179 SOC_ENUM("3D Mode", wm8750_enum[5]),
181 SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0),
182 SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0),
183 SOC_ENUM("ALC Capture Function", wm8750_enum[6]),
184 SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0),
185 SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0),
186 SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0),
187 SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0),
188 SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0),
189 SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]),
190 SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0),
192 SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0),
193 SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0),
195 SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0),
196 SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0),
198 SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0),
201 /* ADCDAC Bit 0 - ADCHPD */
202 /* ADCDAC Bit 4 - HPOR */
203 /* ADCTL1 Bit 2,3 - DATSEL */
204 /* ADCTL1 Bit 4,5 - DMONOMIX */
205 /* ADCTL1 Bit 6,7 - VSEL */
206 /* ADCTL2 Bit 2 - LRCM */
207 /* ADCTL2 Bit 3 - TRI */
208 /* ADCTL3 Bit 5 - HPFLREN */
209 /* ADCTL3 Bit 6 - VROI */
210 /* ADCTL3 Bit 7,8 - ADCLRM */
211 /* ADCIN Bit 4 - LDCM */
212 /* ADCIN Bit 5 - RDCM */
214 SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0),
216 SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1,
217 WM8750_LOUTM2, 4, 7, 1),
218 SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1,
219 WM8750_ROUTM2, 4, 7, 1),
220 SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1,
221 WM8750_MOUTM2, 4, 7, 1),
223 SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0),
225 SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V,
227 SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V,
230 SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0),
234 /* add non dapm controls */
235 static int wm8750_add_controls(struct snd_soc_codec *codec)
239 for (i = 0; i < ARRAY_SIZE(wm8750_snd_controls); i++) {
240 err = snd_ctl_add(codec->card,
241 snd_soc_cnew(&wm8750_snd_controls[i],
254 static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = {
255 SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0),
256 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0),
257 SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0),
258 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0),
262 static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = {
263 SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0),
264 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0),
265 SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0),
266 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0),
270 static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = {
271 SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0),
272 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0),
273 SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0),
274 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0),
278 static const struct snd_kcontrol_new wm8750_left_line_controls =
279 SOC_DAPM_ENUM("Route", wm8750_enum[8]);
282 static const struct snd_kcontrol_new wm8750_right_line_controls =
283 SOC_DAPM_ENUM("Route", wm8750_enum[9]);
286 static const struct snd_kcontrol_new wm8750_left_pga_controls =
287 SOC_DAPM_ENUM("Route", wm8750_enum[10]);
290 static const struct snd_kcontrol_new wm8750_right_pga_controls =
291 SOC_DAPM_ENUM("Route", wm8750_enum[11]);
294 static const struct snd_kcontrol_new wm8750_out3_controls =
295 SOC_DAPM_ENUM("Route", wm8750_enum[12]);
297 /* Differential Mux */
298 static const struct snd_kcontrol_new wm8750_diffmux_controls =
299 SOC_DAPM_ENUM("Route", wm8750_enum[13]);
302 static const struct snd_kcontrol_new wm8750_monomux_controls =
303 SOC_DAPM_ENUM("Route", wm8750_enum[16]);
305 static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = {
306 SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
307 &wm8750_left_mixer_controls[0],
308 ARRAY_SIZE(wm8750_left_mixer_controls)),
309 SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
310 &wm8750_right_mixer_controls[0],
311 ARRAY_SIZE(wm8750_right_mixer_controls)),
312 SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0,
313 &wm8750_mono_mixer_controls[0],
314 ARRAY_SIZE(wm8750_mono_mixer_controls)),
316 SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0),
317 SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0),
318 SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0),
319 SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0),
320 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0),
321 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0),
323 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0),
324 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0),
325 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0),
327 SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0,
328 &wm8750_left_pga_controls),
329 SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0,
330 &wm8750_right_pga_controls),
331 SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
332 &wm8750_left_line_controls),
333 SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
334 &wm8750_right_line_controls),
336 SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls),
337 SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0),
338 SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0),
340 SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
341 &wm8750_diffmux_controls),
342 SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
343 &wm8750_monomux_controls),
344 SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
345 &wm8750_monomux_controls),
347 SND_SOC_DAPM_OUTPUT("LOUT1"),
348 SND_SOC_DAPM_OUTPUT("ROUT1"),
349 SND_SOC_DAPM_OUTPUT("LOUT2"),
350 SND_SOC_DAPM_OUTPUT("ROUT2"),
351 SND_SOC_DAPM_OUTPUT("MONO1"),
352 SND_SOC_DAPM_OUTPUT("OUT3"),
353 SND_SOC_DAPM_OUTPUT("VREF"),
355 SND_SOC_DAPM_INPUT("LINPUT1"),
356 SND_SOC_DAPM_INPUT("LINPUT2"),
357 SND_SOC_DAPM_INPUT("LINPUT3"),
358 SND_SOC_DAPM_INPUT("RINPUT1"),
359 SND_SOC_DAPM_INPUT("RINPUT2"),
360 SND_SOC_DAPM_INPUT("RINPUT3"),
363 static const struct snd_soc_dapm_route audio_map[] = {
365 {"Left Mixer", "Playback Switch", "Left DAC"},
366 {"Left Mixer", "Left Bypass Switch", "Left Line Mux"},
367 {"Left Mixer", "Right Playback Switch", "Right DAC"},
368 {"Left Mixer", "Right Bypass Switch", "Right Line Mux"},
371 {"Right Mixer", "Left Playback Switch", "Left DAC"},
372 {"Right Mixer", "Left Bypass Switch", "Left Line Mux"},
373 {"Right Mixer", "Playback Switch", "Right DAC"},
374 {"Right Mixer", "Right Bypass Switch", "Right Line Mux"},
377 {"Left Out 1", NULL, "Left Mixer"},
378 {"LOUT1", NULL, "Left Out 1"},
381 {"Left Out 2", NULL, "Left Mixer"},
382 {"LOUT2", NULL, "Left Out 2"},
385 {"Right Out 1", NULL, "Right Mixer"},
386 {"ROUT1", NULL, "Right Out 1"},
389 {"Right Out 2", NULL, "Right Mixer"},
390 {"ROUT2", NULL, "Right Out 2"},
393 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
394 {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"},
395 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
396 {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"},
399 {"Mono Out 1", NULL, "Mono Mixer"},
400 {"MONO1", NULL, "Mono Out 1"},
403 {"Out3 Mux", "VREF", "VREF"},
404 {"Out3 Mux", "ROUT1 + Vol", "ROUT1"},
405 {"Out3 Mux", "ROUT1", "Right Mixer"},
406 {"Out3 Mux", "MonoOut", "MONO1"},
407 {"Out 3", NULL, "Out3 Mux"},
408 {"OUT3", NULL, "Out 3"},
411 {"Left Line Mux", "Line 1", "LINPUT1"},
412 {"Left Line Mux", "Line 2", "LINPUT2"},
413 {"Left Line Mux", "Line 3", "LINPUT3"},
414 {"Left Line Mux", "PGA", "Left PGA Mux"},
415 {"Left Line Mux", "Differential", "Differential Mux"},
418 {"Right Line Mux", "Line 1", "RINPUT1"},
419 {"Right Line Mux", "Line 2", "RINPUT2"},
420 {"Right Line Mux", "Line 3", "RINPUT3"},
421 {"Right Line Mux", "PGA", "Right PGA Mux"},
422 {"Right Line Mux", "Differential", "Differential Mux"},
425 {"Left PGA Mux", "Line 1", "LINPUT1"},
426 {"Left PGA Mux", "Line 2", "LINPUT2"},
427 {"Left PGA Mux", "Line 3", "LINPUT3"},
428 {"Left PGA Mux", "Differential", "Differential Mux"},
431 {"Right PGA Mux", "Line 1", "RINPUT1"},
432 {"Right PGA Mux", "Line 2", "RINPUT2"},
433 {"Right PGA Mux", "Line 3", "RINPUT3"},
434 {"Right PGA Mux", "Differential", "Differential Mux"},
436 /* Differential Mux */
437 {"Differential Mux", "Line 1", "LINPUT1"},
438 {"Differential Mux", "Line 1", "RINPUT1"},
439 {"Differential Mux", "Line 2", "LINPUT2"},
440 {"Differential Mux", "Line 2", "RINPUT2"},
443 {"Left ADC Mux", "Stereo", "Left PGA Mux"},
444 {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"},
445 {"Left ADC Mux", "Digital Mono", "Left PGA Mux"},
448 {"Right ADC Mux", "Stereo", "Right PGA Mux"},
449 {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"},
450 {"Right ADC Mux", "Digital Mono", "Right PGA Mux"},
453 {"Left ADC", NULL, "Left ADC Mux"},
454 {"Right ADC", NULL, "Right ADC Mux"},
457 static int wm8750_add_widgets(struct snd_soc_codec *codec)
459 snd_soc_dapm_new_controls(codec, wm8750_dapm_widgets,
460 ARRAY_SIZE(wm8750_dapm_widgets));
462 snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
464 snd_soc_dapm_new_widgets(codec);
476 /* codec hifi mclk clock divider coefficients */
477 static const struct _coeff_div coeff_div[] = {
479 {12288000, 8000, 1536, 0x6, 0x0},
480 {11289600, 8000, 1408, 0x16, 0x0},
481 {18432000, 8000, 2304, 0x7, 0x0},
482 {16934400, 8000, 2112, 0x17, 0x0},
483 {12000000, 8000, 1500, 0x6, 0x1},
486 {11289600, 11025, 1024, 0x18, 0x0},
487 {16934400, 11025, 1536, 0x19, 0x0},
488 {12000000, 11025, 1088, 0x19, 0x1},
491 {12288000, 16000, 768, 0xa, 0x0},
492 {18432000, 16000, 1152, 0xb, 0x0},
493 {12000000, 16000, 750, 0xa, 0x1},
496 {11289600, 22050, 512, 0x1a, 0x0},
497 {16934400, 22050, 768, 0x1b, 0x0},
498 {12000000, 22050, 544, 0x1b, 0x1},
501 {12288000, 32000, 384, 0xc, 0x0},
502 {18432000, 32000, 576, 0xd, 0x0},
503 {12000000, 32000, 375, 0xa, 0x1},
506 {11289600, 44100, 256, 0x10, 0x0},
507 {16934400, 44100, 384, 0x11, 0x0},
508 {12000000, 44100, 272, 0x11, 0x1},
511 {12288000, 48000, 256, 0x0, 0x0},
512 {18432000, 48000, 384, 0x1, 0x0},
513 {12000000, 48000, 250, 0x0, 0x1},
516 {11289600, 88200, 128, 0x1e, 0x0},
517 {16934400, 88200, 192, 0x1f, 0x0},
518 {12000000, 88200, 136, 0x1f, 0x1},
521 {12288000, 96000, 128, 0xe, 0x0},
522 {18432000, 96000, 192, 0xf, 0x0},
523 {12000000, 96000, 125, 0xe, 0x1},
526 static inline int get_coeff(int mclk, int rate)
530 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
531 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
535 printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n",
540 static int wm8750_set_dai_sysclk(struct snd_soc_dai *codec_dai,
541 int clk_id, unsigned int freq, int dir)
543 struct snd_soc_codec *codec = codec_dai->codec;
544 struct wm8750_priv *wm8750 = codec->private_data;
552 wm8750->sysclk = freq;
558 static int wm8750_set_dai_fmt(struct snd_soc_dai *codec_dai,
561 struct snd_soc_codec *codec = codec_dai->codec;
564 /* set master/slave audio interface */
565 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
566 case SND_SOC_DAIFMT_CBM_CFM:
569 case SND_SOC_DAIFMT_CBS_CFS:
575 /* interface format */
576 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
577 case SND_SOC_DAIFMT_I2S:
580 case SND_SOC_DAIFMT_RIGHT_J:
582 case SND_SOC_DAIFMT_LEFT_J:
585 case SND_SOC_DAIFMT_DSP_A:
588 case SND_SOC_DAIFMT_DSP_B:
595 /* clock inversion */
596 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
597 case SND_SOC_DAIFMT_NB_NF:
599 case SND_SOC_DAIFMT_IB_IF:
602 case SND_SOC_DAIFMT_IB_NF:
605 case SND_SOC_DAIFMT_NB_IF:
612 wm8750_write(codec, WM8750_IFACE, iface);
616 static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream,
617 struct snd_pcm_hw_params *params)
619 struct snd_soc_pcm_runtime *rtd = substream->private_data;
620 struct snd_soc_device *socdev = rtd->socdev;
621 struct snd_soc_codec *codec = socdev->codec;
622 struct wm8750_priv *wm8750 = codec->private_data;
623 u16 iface = wm8750_read_reg_cache(codec, WM8750_IFACE) & 0x1f3;
624 u16 srate = wm8750_read_reg_cache(codec, WM8750_SRATE) & 0x1c0;
625 int coeff = get_coeff(wm8750->sysclk, params_rate(params));
628 switch (params_format(params)) {
629 case SNDRV_PCM_FORMAT_S16_LE:
631 case SNDRV_PCM_FORMAT_S20_3LE:
634 case SNDRV_PCM_FORMAT_S24_LE:
637 case SNDRV_PCM_FORMAT_S32_LE:
642 /* set iface & srate */
643 wm8750_write(codec, WM8750_IFACE, iface);
645 wm8750_write(codec, WM8750_SRATE, srate |
646 (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
651 static int wm8750_mute(struct snd_soc_dai *dai, int mute)
653 struct snd_soc_codec *codec = dai->codec;
654 u16 mute_reg = wm8750_read_reg_cache(codec, WM8750_ADCDAC) & 0xfff7;
657 wm8750_write(codec, WM8750_ADCDAC, mute_reg | 0x8);
659 wm8750_write(codec, WM8750_ADCDAC, mute_reg);
663 static int wm8750_set_bias_level(struct snd_soc_codec *codec,
664 enum snd_soc_bias_level level)
666 u16 pwr_reg = wm8750_read_reg_cache(codec, WM8750_PWR1) & 0xfe3e;
669 case SND_SOC_BIAS_ON:
670 /* set vmid to 50k and unmute dac */
671 wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x00c0);
673 case SND_SOC_BIAS_PREPARE:
674 /* set vmid to 5k for quick power up */
675 wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x01c1);
677 case SND_SOC_BIAS_STANDBY:
678 /* mute dac and set vmid to 500k, enable VREF */
679 wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x0141);
681 case SND_SOC_BIAS_OFF:
682 wm8750_write(codec, WM8750_PWR1, 0x0001);
685 codec->bias_level = level;
689 #define WM8750_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
690 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
691 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
693 #define WM8750_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
694 SNDRV_PCM_FMTBIT_S24_LE)
696 struct snd_soc_dai wm8750_dai = {
699 .stream_name = "Playback",
702 .rates = WM8750_RATES,
703 .formats = WM8750_FORMATS,},
705 .stream_name = "Capture",
708 .rates = WM8750_RATES,
709 .formats = WM8750_FORMATS,},
711 .hw_params = wm8750_pcm_hw_params,
714 .digital_mute = wm8750_mute,
715 .set_fmt = wm8750_set_dai_fmt,
716 .set_sysclk = wm8750_set_dai_sysclk,
719 EXPORT_SYMBOL_GPL(wm8750_dai);
721 static void wm8750_work(struct work_struct *work)
723 struct snd_soc_codec *codec =
724 container_of(work, struct snd_soc_codec, delayed_work.work);
725 wm8750_set_bias_level(codec, codec->bias_level);
728 static int wm8750_suspend(struct platform_device *pdev, pm_message_t state)
730 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
731 struct snd_soc_codec *codec = socdev->codec;
733 wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF);
737 static int wm8750_resume(struct platform_device *pdev)
739 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
740 struct snd_soc_codec *codec = socdev->codec;
743 u16 *cache = codec->reg_cache;
745 /* Sync reg_cache with the hardware */
746 for (i = 0; i < ARRAY_SIZE(wm8750_reg); i++) {
747 if (i == WM8750_RESET)
749 data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
750 data[1] = cache[i] & 0x00ff;
751 codec->hw_write(codec->control_data, data, 2);
754 wm8750_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
756 /* charge wm8750 caps */
757 if (codec->suspend_bias_level == SND_SOC_BIAS_ON) {
758 wm8750_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
759 codec->bias_level = SND_SOC_BIAS_ON;
760 schedule_delayed_work(&codec->delayed_work,
761 msecs_to_jiffies(1000));
768 * initialise the WM8750 driver
769 * register the mixer and dsp interfaces with the kernel
771 static int wm8750_init(struct snd_soc_device *socdev)
773 struct snd_soc_codec *codec = socdev->codec;
776 codec->name = "WM8750";
777 codec->owner = THIS_MODULE;
778 codec->read = wm8750_read_reg_cache;
779 codec->write = wm8750_write;
780 codec->set_bias_level = wm8750_set_bias_level;
781 codec->dai = &wm8750_dai;
783 codec->reg_cache_size = ARRAY_SIZE(wm8750_reg);
784 codec->reg_cache = kmemdup(wm8750_reg, sizeof(wm8750_reg), GFP_KERNEL);
785 if (codec->reg_cache == NULL)
791 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
793 printk(KERN_ERR "wm8750: failed to create pcms\n");
797 /* charge output caps */
798 wm8750_set_bias_level(codec, SND_SOC_BIAS_PREPARE);
799 codec->bias_level = SND_SOC_BIAS_STANDBY;
800 schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000));
802 /* set the update bits */
803 reg = wm8750_read_reg_cache(codec, WM8750_LDAC);
804 wm8750_write(codec, WM8750_LDAC, reg | 0x0100);
805 reg = wm8750_read_reg_cache(codec, WM8750_RDAC);
806 wm8750_write(codec, WM8750_RDAC, reg | 0x0100);
807 reg = wm8750_read_reg_cache(codec, WM8750_LOUT1V);
808 wm8750_write(codec, WM8750_LOUT1V, reg | 0x0100);
809 reg = wm8750_read_reg_cache(codec, WM8750_ROUT1V);
810 wm8750_write(codec, WM8750_ROUT1V, reg | 0x0100);
811 reg = wm8750_read_reg_cache(codec, WM8750_LOUT2V);
812 wm8750_write(codec, WM8750_LOUT2V, reg | 0x0100);
813 reg = wm8750_read_reg_cache(codec, WM8750_ROUT2V);
814 wm8750_write(codec, WM8750_ROUT2V, reg | 0x0100);
815 reg = wm8750_read_reg_cache(codec, WM8750_LINVOL);
816 wm8750_write(codec, WM8750_LINVOL, reg | 0x0100);
817 reg = wm8750_read_reg_cache(codec, WM8750_RINVOL);
818 wm8750_write(codec, WM8750_RINVOL, reg | 0x0100);
820 wm8750_add_controls(codec);
821 wm8750_add_widgets(codec);
822 ret = snd_soc_register_card(socdev);
824 printk(KERN_ERR "wm8750: failed to register card\n");
830 snd_soc_free_pcms(socdev);
831 snd_soc_dapm_free(socdev);
833 kfree(codec->reg_cache);
837 /* If the i2c layer weren't so broken, we could pass this kind of data
839 static struct snd_soc_device *wm8750_socdev;
841 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
844 * WM8731 2 wire address is determined by GPIO5
845 * state during powerup.
849 static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END };
851 /* Magic definition of all other variables and things */
854 static struct i2c_driver wm8750_i2c_driver;
855 static struct i2c_client client_template;
857 static int wm8750_codec_probe(struct i2c_adapter *adap, int addr, int kind)
859 struct snd_soc_device *socdev = wm8750_socdev;
860 struct wm8750_setup_data *setup = socdev->codec_data;
861 struct snd_soc_codec *codec = socdev->codec;
862 struct i2c_client *i2c;
865 if (addr != setup->i2c_address)
868 client_template.adapter = adap;
869 client_template.addr = addr;
871 i2c = kmemdup(&client_template, sizeof(client_template), GFP_KERNEL);
875 i2c_set_clientdata(i2c, codec);
876 codec->control_data = i2c;
878 ret = i2c_attach_client(i2c);
880 pr_err("failed to attach codec at addr %x\n", addr);
884 ret = wm8750_init(socdev);
886 pr_err("failed to initialise WM8750\n");
896 static int wm8750_i2c_detach(struct i2c_client *client)
898 struct snd_soc_codec *codec = i2c_get_clientdata(client);
899 i2c_detach_client(client);
900 kfree(codec->reg_cache);
905 static int wm8750_i2c_attach(struct i2c_adapter *adap)
907 return i2c_probe(adap, &addr_data, wm8750_codec_probe);
910 /* corgi i2c codec control layer */
911 static struct i2c_driver wm8750_i2c_driver = {
913 .name = "WM8750 I2C Codec",
914 .owner = THIS_MODULE,
916 .id = I2C_DRIVERID_WM8750,
917 .attach_adapter = wm8750_i2c_attach,
918 .detach_client = wm8750_i2c_detach,
922 static struct i2c_client client_template = {
924 .driver = &wm8750_i2c_driver,
928 static int wm8750_probe(struct platform_device *pdev)
930 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
931 struct wm8750_setup_data *setup = socdev->codec_data;
932 struct snd_soc_codec *codec;
933 struct wm8750_priv *wm8750;
936 pr_info("WM8750 Audio Codec %s", WM8750_VERSION);
937 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
941 wm8750 = kzalloc(sizeof(struct wm8750_priv), GFP_KERNEL);
942 if (wm8750 == NULL) {
947 codec->private_data = wm8750;
948 socdev->codec = codec;
949 mutex_init(&codec->mutex);
950 INIT_LIST_HEAD(&codec->dapm_widgets);
951 INIT_LIST_HEAD(&codec->dapm_paths);
952 wm8750_socdev = socdev;
953 INIT_DELAYED_WORK(&codec->delayed_work, wm8750_work);
955 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
956 if (setup->i2c_address) {
957 normal_i2c[0] = setup->i2c_address;
958 codec->hw_write = (hw_write_t)i2c_master_send;
959 ret = i2c_add_driver(&wm8750_i2c_driver);
961 printk(KERN_ERR "can't add i2c driver");
964 /* Add other interfaces here */
968 kfree(codec->private_data);
975 * This function forces any delayed work to be queued and run.
977 static int run_delayed_work(struct delayed_work *dwork)
981 /* cancel any work waiting to be queued. */
982 ret = cancel_delayed_work(dwork);
984 /* if there was any work waiting then we run it now and
985 * wait for it's completion */
987 schedule_delayed_work(dwork, 0);
988 flush_scheduled_work();
993 /* power down chip */
994 static int wm8750_remove(struct platform_device *pdev)
996 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
997 struct snd_soc_codec *codec = socdev->codec;
999 if (codec->control_data)
1000 wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF);
1001 run_delayed_work(&codec->delayed_work);
1002 snd_soc_free_pcms(socdev);
1003 snd_soc_dapm_free(socdev);
1004 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1005 i2c_del_driver(&wm8750_i2c_driver);
1007 kfree(codec->private_data);
1013 struct snd_soc_codec_device soc_codec_dev_wm8750 = {
1014 .probe = wm8750_probe,
1015 .remove = wm8750_remove,
1016 .suspend = wm8750_suspend,
1017 .resume = wm8750_resume,
1019 EXPORT_SYMBOL_GPL(soc_codec_dev_wm8750);
1021 MODULE_DESCRIPTION("ASoC WM8750 driver");
1022 MODULE_AUTHOR("Liam Girdwood");
1023 MODULE_LICENSE("GPL");