1 /******************************************************************************
5 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <net/mac80211.h>
33 #include "iwl-eeprom.h"
34 #include "iwl-dev.h" /* FIXME: remove */
35 #include "iwl-debug.h"
38 #include "iwl-rfkill.h"
39 #include "iwl-power.h"
43 MODULE_DESCRIPTION("iwl core");
44 MODULE_VERSION(IWLWIFI_VERSION);
45 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
46 MODULE_LICENSE("GPL");
48 #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
49 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
50 IWL_RATE_SISO_##s##M_PLCP, \
51 IWL_RATE_MIMO2_##s##M_PLCP,\
52 IWL_RATE_MIMO3_##s##M_PLCP,\
53 IWL_RATE_##r##M_IEEE, \
54 IWL_RATE_##ip##M_INDEX, \
55 IWL_RATE_##in##M_INDEX, \
56 IWL_RATE_##rp##M_INDEX, \
57 IWL_RATE_##rn##M_INDEX, \
58 IWL_RATE_##pp##M_INDEX, \
59 IWL_RATE_##np##M_INDEX }
63 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
65 * If there isn't a valid next or previous rate then INV is used which
66 * maps to IWL_RATE_INVALID
69 const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
70 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
71 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
72 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
73 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
74 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
75 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
76 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
77 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
78 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
79 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
80 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
81 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
82 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
83 /* FIXME:RS: ^^ should be INV (legacy) */
85 EXPORT_SYMBOL(iwl_rates);
88 * translate ucode response to mac80211 tx status control values
90 void iwl_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
91 struct ieee80211_tx_info *info)
94 struct ieee80211_tx_rate *r = &info->control.rates[0];
96 info->antenna_sel_tx =
97 ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
98 if (rate_n_flags & RATE_MCS_HT_MSK)
99 r->flags |= IEEE80211_TX_RC_MCS;
100 if (rate_n_flags & RATE_MCS_GF_MSK)
101 r->flags |= IEEE80211_TX_RC_GREEN_FIELD;
102 if (rate_n_flags & RATE_MCS_FAT_MSK)
103 r->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
104 if (rate_n_flags & RATE_MCS_DUP_MSK)
105 r->flags |= IEEE80211_TX_RC_DUP_DATA;
106 if (rate_n_flags & RATE_MCS_SGI_MSK)
107 r->flags |= IEEE80211_TX_RC_SHORT_GI;
108 rate_index = iwl_hwrate_to_plcp_idx(rate_n_flags);
109 if (info->band == IEEE80211_BAND_5GHZ)
110 rate_index -= IWL_FIRST_OFDM_RATE;
113 EXPORT_SYMBOL(iwl_hwrate_to_tx_control);
115 int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
120 if (rate_n_flags & RATE_MCS_HT_MSK) {
121 idx = (rate_n_flags & 0xff);
123 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
124 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
125 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
126 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
128 idx += IWL_FIRST_OFDM_RATE;
129 /* skip 9M not supported in ht*/
130 if (idx >= IWL_RATE_9M_INDEX)
132 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
135 /* legacy rate format, search for match in table */
137 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
138 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
144 EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
146 u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
150 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
151 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
152 if (priv->hw_params.valid_tx_ant & BIT(ind))
158 const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
159 EXPORT_SYMBOL(iwl_bcast_addr);
162 /* This function both allocates and initializes hw and priv. */
163 struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
164 struct ieee80211_ops *hw_ops)
166 struct iwl_priv *priv;
168 /* mac80211 allocates memory for this device instance, including
169 * space for this driver's private structure */
170 struct ieee80211_hw *hw =
171 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
173 printk(KERN_ERR "%s: Can not allocate network device\n",
184 EXPORT_SYMBOL(iwl_alloc_all);
186 void iwl_hw_detect(struct iwl_priv *priv)
188 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
189 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
190 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
192 EXPORT_SYMBOL(iwl_hw_detect);
194 int iwl_hw_nic_init(struct iwl_priv *priv)
197 struct iwl_rx_queue *rxq = &priv->rxq;
201 spin_lock_irqsave(&priv->lock, flags);
202 priv->cfg->ops->lib->apm_ops.init(priv);
203 iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
204 spin_unlock_irqrestore(&priv->lock, flags);
206 ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
208 priv->cfg->ops->lib->apm_ops.config(priv);
210 /* Allocate the RX queue, or reset if it is already allocated */
212 ret = iwl_rx_queue_alloc(priv);
214 IWL_ERR(priv, "Unable to initialize Rx queue\n");
218 iwl_rx_queue_reset(priv, rxq);
220 iwl_rx_replenish(priv);
222 iwl_rx_init(priv, rxq);
224 spin_lock_irqsave(&priv->lock, flags);
226 rxq->need_update = 1;
227 iwl_rx_queue_update_write_ptr(priv, rxq);
229 spin_unlock_irqrestore(&priv->lock, flags);
231 /* Allocate and init all Tx and Command queues */
232 ret = iwl_txq_ctx_reset(priv);
236 set_bit(STATUS_INIT, &priv->status);
240 EXPORT_SYMBOL(iwl_hw_nic_init);
242 void iwl_reset_qos(struct iwl_priv *priv)
247 bool is_legacy = false;
251 spin_lock_irqsave(&priv->lock, flags);
252 /* QoS always active in AP and ADHOC mode
253 * In STA mode wait for association
255 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
256 priv->iw_mode == NL80211_IFTYPE_AP)
257 priv->qos_data.qos_active = 1;
259 priv->qos_data.qos_active = 0;
261 /* check for legacy mode */
262 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC &&
263 (priv->active_rate & IWL_OFDM_RATES_MASK) == 0) ||
264 (priv->iw_mode == NL80211_IFTYPE_STATION &&
265 (priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK) == 0)) {
270 if (priv->qos_data.qos_active)
273 priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
274 priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
275 priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
276 priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
277 priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
279 if (priv->qos_data.qos_active) {
281 priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
282 priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
283 priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
284 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
285 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
288 priv->qos_data.def_qos_parm.ac[i].cw_min =
289 cpu_to_le16((cw_min + 1) / 2 - 1);
290 priv->qos_data.def_qos_parm.ac[i].cw_max =
292 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
294 priv->qos_data.def_qos_parm.ac[i].edca_txop =
297 priv->qos_data.def_qos_parm.ac[i].edca_txop =
299 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
302 priv->qos_data.def_qos_parm.ac[i].cw_min =
303 cpu_to_le16((cw_min + 1) / 4 - 1);
304 priv->qos_data.def_qos_parm.ac[i].cw_max =
305 cpu_to_le16((cw_max + 1) / 2 - 1);
306 priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
307 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
309 priv->qos_data.def_qos_parm.ac[i].edca_txop =
312 priv->qos_data.def_qos_parm.ac[i].edca_txop =
315 for (i = 1; i < 4; i++) {
316 priv->qos_data.def_qos_parm.ac[i].cw_min =
318 priv->qos_data.def_qos_parm.ac[i].cw_max =
320 priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
321 priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
322 priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
325 IWL_DEBUG_QOS("set QoS to default \n");
327 spin_unlock_irqrestore(&priv->lock, flags);
329 EXPORT_SYMBOL(iwl_reset_qos);
331 #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
332 #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
333 static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
334 struct ieee80211_sta_ht_cap *ht_info,
335 enum ieee80211_band band)
337 u16 max_bit_rate = 0;
338 u8 rx_chains_num = priv->hw_params.rx_chains_num;
339 u8 tx_chains_num = priv->hw_params.tx_chains_num;
342 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
344 ht_info->ht_supported = true;
346 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
347 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
348 ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
349 (WLAN_HT_CAP_SM_PS_DISABLED << 2));
351 max_bit_rate = MAX_BIT_RATE_20_MHZ;
352 if (priv->hw_params.fat_channel & BIT(band)) {
353 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
354 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
355 ht_info->mcs.rx_mask[4] = 0x01;
356 max_bit_rate = MAX_BIT_RATE_40_MHZ;
359 if (priv->cfg->mod_params->amsdu_size_8K)
360 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
362 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
363 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
365 ht_info->mcs.rx_mask[0] = 0xFF;
366 if (rx_chains_num >= 2)
367 ht_info->mcs.rx_mask[1] = 0xFF;
368 if (rx_chains_num >= 3)
369 ht_info->mcs.rx_mask[2] = 0xFF;
371 /* Highest supported Rx data rate */
372 max_bit_rate *= rx_chains_num;
373 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
374 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
376 /* Tx MCS capabilities */
377 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
378 if (tx_chains_num != rx_chains_num) {
379 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
380 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
381 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
385 static void iwlcore_init_hw_rates(struct iwl_priv *priv,
386 struct ieee80211_rate *rates)
390 for (i = 0; i < IWL_RATE_COUNT; i++) {
391 rates[i].bitrate = iwl_rates[i].ieee * 5;
392 rates[i].hw_value = i; /* Rate scaling will work on indexes */
393 rates[i].hw_value_short = i;
395 if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
397 * If CCK != 1M then set short preamble rate flag.
400 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
401 0 : IEEE80211_RATE_SHORT_PREAMBLE;
407 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
409 static int iwlcore_init_geos(struct iwl_priv *priv)
411 struct iwl_channel_info *ch;
412 struct ieee80211_supported_band *sband;
413 struct ieee80211_channel *channels;
414 struct ieee80211_channel *geo_ch;
415 struct ieee80211_rate *rates;
418 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
419 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
420 IWL_DEBUG_INFO("Geography modes already initialized.\n");
421 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
425 channels = kzalloc(sizeof(struct ieee80211_channel) *
426 priv->channel_count, GFP_KERNEL);
430 rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
437 /* 5.2GHz channels start after the 2.4GHz channels */
438 sband = &priv->bands[IEEE80211_BAND_5GHZ];
439 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
441 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
442 sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
444 if (priv->cfg->sku & IWL_SKU_N)
445 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
446 IEEE80211_BAND_5GHZ);
448 sband = &priv->bands[IEEE80211_BAND_2GHZ];
449 sband->channels = channels;
451 sband->bitrates = rates;
452 sband->n_bitrates = IWL_RATE_COUNT;
454 if (priv->cfg->sku & IWL_SKU_N)
455 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
456 IEEE80211_BAND_2GHZ);
458 priv->ieee_channels = channels;
459 priv->ieee_rates = rates;
461 iwlcore_init_hw_rates(priv, rates);
463 for (i = 0; i < priv->channel_count; i++) {
464 ch = &priv->channel_info[i];
466 /* FIXME: might be removed if scan is OK */
467 if (!is_channel_valid(ch))
470 if (is_channel_a_band(ch))
471 sband = &priv->bands[IEEE80211_BAND_5GHZ];
473 sband = &priv->bands[IEEE80211_BAND_2GHZ];
475 geo_ch = &sband->channels[sband->n_channels++];
477 geo_ch->center_freq =
478 ieee80211_channel_to_frequency(ch->channel);
479 geo_ch->max_power = ch->max_power_avg;
480 geo_ch->max_antenna_gain = 0xff;
481 geo_ch->hw_value = ch->channel;
483 if (is_channel_valid(ch)) {
484 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
485 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
487 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
488 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
490 if (ch->flags & EEPROM_CHANNEL_RADAR)
491 geo_ch->flags |= IEEE80211_CHAN_RADAR;
493 geo_ch->flags |= ch->fat_extension_channel;
495 if (ch->max_power_avg > priv->tx_power_channel_lmt)
496 priv->tx_power_channel_lmt = ch->max_power_avg;
498 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
501 /* Save flags for reg domain usage */
502 geo_ch->orig_flags = geo_ch->flags;
504 IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
505 ch->channel, geo_ch->center_freq,
506 is_channel_a_band(ch) ? "5.2" : "2.4",
507 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
508 "restricted" : "valid",
512 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
513 priv->cfg->sku & IWL_SKU_A) {
514 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
515 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
516 priv->pci_dev->device,
517 priv->pci_dev->subsystem_device);
518 priv->cfg->sku &= ~IWL_SKU_A;
521 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
522 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
523 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
525 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
531 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
533 static void iwlcore_free_geos(struct iwl_priv *priv)
535 kfree(priv->ieee_channels);
536 kfree(priv->ieee_rates);
537 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
540 static bool is_single_rx_stream(struct iwl_priv *priv)
542 return !priv->current_ht_config.is_ht ||
543 ((priv->current_ht_config.mcs.rx_mask[1] == 0) &&
544 (priv->current_ht_config.mcs.rx_mask[2] == 0));
547 static u8 iwl_is_channel_extension(struct iwl_priv *priv,
548 enum ieee80211_band band,
549 u16 channel, u8 extension_chan_offset)
551 const struct iwl_channel_info *ch_info;
553 ch_info = iwl_get_channel_info(priv, band, channel);
554 if (!is_channel_valid(ch_info))
557 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
558 return !(ch_info->fat_extension_channel &
559 IEEE80211_CHAN_NO_FAT_ABOVE);
560 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
561 return !(ch_info->fat_extension_channel &
562 IEEE80211_CHAN_NO_FAT_BELOW);
567 u8 iwl_is_fat_tx_allowed(struct iwl_priv *priv,
568 struct ieee80211_sta_ht_cap *sta_ht_inf)
570 struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
572 if ((!iwl_ht_conf->is_ht) ||
573 (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ) ||
574 (iwl_ht_conf->extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_NONE))
578 if ((!sta_ht_inf->ht_supported) ||
579 (!(sta_ht_inf->cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40)))
583 return iwl_is_channel_extension(priv, priv->band,
584 le16_to_cpu(priv->staging_rxon.channel),
585 iwl_ht_conf->extension_chan_offset);
587 EXPORT_SYMBOL(iwl_is_fat_tx_allowed);
589 void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
591 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
594 if (!ht_info->is_ht) {
595 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
596 RXON_FLG_CHANNEL_MODE_PURE_40_MSK |
597 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
598 RXON_FLG_FAT_PROT_MSK |
599 RXON_FLG_HT_PROT_MSK);
603 /* Set up channel bandwidth: 20 MHz only, or 20/40 mixed if fat ok */
604 if (iwl_is_fat_tx_allowed(priv, NULL))
605 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED_MSK;
607 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
608 RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
610 /* Note: control channel is opposite of extension channel */
611 switch (ht_info->extension_chan_offset) {
612 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
613 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
615 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
616 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
618 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
620 rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK;
624 val = ht_info->ht_protection;
626 rxon->flags |= cpu_to_le32(val << RXON_FLG_HT_OPERATING_MODE_POS);
628 iwl_set_rxon_chain(priv);
630 IWL_DEBUG_ASSOC("supported HT rate 0x%X 0x%X 0x%X "
631 "rxon flags 0x%X operation mode :0x%X "
632 "extension channel offset 0x%x\n",
633 ht_info->mcs.rx_mask[0],
634 ht_info->mcs.rx_mask[1],
635 ht_info->mcs.rx_mask[2],
636 le32_to_cpu(rxon->flags), ht_info->ht_protection,
637 ht_info->extension_chan_offset);
640 EXPORT_SYMBOL(iwl_set_rxon_ht);
642 #define IWL_NUM_RX_CHAINS_MULTIPLE 3
643 #define IWL_NUM_RX_CHAINS_SINGLE 2
644 #define IWL_NUM_IDLE_CHAINS_DUAL 2
645 #define IWL_NUM_IDLE_CHAINS_SINGLE 1
647 /* Determine how many receiver/antenna chains to use.
648 * More provides better reception via diversity. Fewer saves power.
649 * MIMO (dual stream) requires at least 2, but works better with 3.
650 * This does not determine *which* chains to use, just how many.
652 static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
654 bool is_single = is_single_rx_stream(priv);
655 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
657 /* # of Rx chains to use when expecting MIMO. */
658 if (is_single || (!is_cam && (priv->current_ht_config.sm_ps ==
659 WLAN_HT_CAP_SM_PS_STATIC)))
660 return IWL_NUM_RX_CHAINS_SINGLE;
662 return IWL_NUM_RX_CHAINS_MULTIPLE;
665 static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
668 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
669 /* # Rx chains when idling and maybe trying to save power */
670 switch (priv->current_ht_config.sm_ps) {
671 case WLAN_HT_CAP_SM_PS_STATIC:
672 case WLAN_HT_CAP_SM_PS_DYNAMIC:
673 idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL :
674 IWL_NUM_IDLE_CHAINS_SINGLE;
676 case WLAN_HT_CAP_SM_PS_DISABLED:
677 idle_cnt = (is_cam) ? active_cnt : IWL_NUM_IDLE_CHAINS_SINGLE;
679 case WLAN_HT_CAP_SM_PS_INVALID:
681 IWL_ERR(priv, "invalid mimo ps mode %d\n",
682 priv->current_ht_config.sm_ps);
691 static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
694 res = (chain_bitmap & BIT(0)) >> 0;
695 res += (chain_bitmap & BIT(1)) >> 1;
696 res += (chain_bitmap & BIT(2)) >> 2;
697 res += (chain_bitmap & BIT(4)) >> 4;
702 * iwl_is_monitor_mode - Determine if interface in monitor mode
704 * priv->iw_mode is set in add_interface, but add_interface is
705 * never called for monitor mode. The only way mac80211 informs us about
706 * monitor mode is through configuring filters (call to configure_filter).
708 static bool iwl_is_monitor_mode(struct iwl_priv *priv)
710 return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
714 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
716 * Selects how many and which Rx receivers/antennas/chains to use.
717 * This should not be used for scan command ... it puts data in wrong place.
719 void iwl_set_rxon_chain(struct iwl_priv *priv)
721 bool is_single = is_single_rx_stream(priv);
722 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
723 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
727 /* Tell uCode which antennas are actually connected.
728 * Before first association, we assume all antennas are connected.
729 * Just after first association, iwl_chain_noise_calibration()
730 * checks which antennas actually *are* connected. */
731 if (priv->chain_noise_data.active_chains)
732 active_chains = priv->chain_noise_data.active_chains;
734 active_chains = priv->hw_params.valid_rx_ant;
736 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
738 /* How many receivers should we use? */
739 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
740 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
743 /* correct rx chain count according hw settings
744 * and chain noise calibration
746 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
747 if (valid_rx_cnt < active_rx_cnt)
748 active_rx_cnt = valid_rx_cnt;
750 if (valid_rx_cnt < idle_rx_cnt)
751 idle_rx_cnt = valid_rx_cnt;
753 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
754 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
756 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
758 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
759 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
761 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
763 IWL_DEBUG_ASSOC("rx_chain=0x%X active=%d idle=%d\n",
764 priv->staging_rxon.rx_chain,
765 active_rx_cnt, idle_rx_cnt);
767 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
768 active_rx_cnt < idle_rx_cnt);
770 EXPORT_SYMBOL(iwl_set_rxon_chain);
773 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
774 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
775 * @channel: Any channel valid for the requested phymode
777 * In addition to setting the staging RXON, priv->phymode is also set.
779 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
780 * in the staging RXON flag structure based on the phymode
782 int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
784 enum ieee80211_band band = ch->band;
785 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
787 if (!iwl_get_channel_info(priv, band, channel)) {
788 IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
793 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
794 (priv->band == band))
797 priv->staging_rxon.channel = cpu_to_le16(channel);
798 if (band == IEEE80211_BAND_5GHZ)
799 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
801 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
805 IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
809 EXPORT_SYMBOL(iwl_set_rxon_channel);
811 int iwl_setup_mac(struct iwl_priv *priv)
814 struct ieee80211_hw *hw = priv->hw;
815 hw->rate_control_algorithm = "iwl-agn-rs";
817 /* Tell mac80211 our characteristics */
818 hw->flags = IEEE80211_HW_SIGNAL_DBM |
819 IEEE80211_HW_NOISE_DBM |
820 IEEE80211_HW_AMPDU_AGGREGATION |
821 IEEE80211_HW_SUPPORTS_PS;
822 hw->wiphy->interface_modes =
823 BIT(NL80211_IFTYPE_STATION) |
824 BIT(NL80211_IFTYPE_ADHOC);
826 hw->wiphy->custom_regulatory = true;
828 /* Default value; 4 EDCA QOS priorities */
830 /* queues to support 11n aggregation */
831 if (priv->cfg->sku & IWL_SKU_N)
832 hw->ampdu_queues = priv->cfg->mod_params->num_of_ampdu_queues;
834 hw->conf.beacon_int = 100;
835 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
837 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
838 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
839 &priv->bands[IEEE80211_BAND_2GHZ];
840 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
841 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
842 &priv->bands[IEEE80211_BAND_5GHZ];
844 ret = ieee80211_register_hw(priv->hw);
846 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
849 priv->mac80211_registered = 1;
853 EXPORT_SYMBOL(iwl_setup_mac);
855 int iwl_set_hw_params(struct iwl_priv *priv)
857 priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
858 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
859 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
860 if (priv->cfg->mod_params->amsdu_size_8K)
861 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
863 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
864 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
866 if (priv->cfg->mod_params->disable_11n)
867 priv->cfg->sku &= ~IWL_SKU_N;
869 /* Device-specific setup */
870 return priv->cfg->ops->lib->set_hw_params(priv);
872 EXPORT_SYMBOL(iwl_set_hw_params);
874 int iwl_init_drv(struct iwl_priv *priv)
878 priv->ibss_beacon = NULL;
880 spin_lock_init(&priv->lock);
881 spin_lock_init(&priv->power_data.lock);
882 spin_lock_init(&priv->sta_lock);
883 spin_lock_init(&priv->hcmd_lock);
885 INIT_LIST_HEAD(&priv->free_frames);
887 mutex_init(&priv->mutex);
889 /* Clear the driver's (not device's) station table */
890 iwl_clear_stations_table(priv);
892 priv->data_retry_limit = -1;
893 priv->ieee_channels = NULL;
894 priv->ieee_rates = NULL;
895 priv->band = IEEE80211_BAND_2GHZ;
897 priv->iw_mode = NL80211_IFTYPE_STATION;
899 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
901 /* Choose which receivers/antennas to use */
902 iwl_set_rxon_chain(priv);
903 iwl_init_scan_params(priv);
907 priv->qos_data.qos_active = 0;
908 priv->qos_data.qos_cap.val = 0;
910 priv->rates_mask = IWL_RATES_MASK;
911 /* If power management is turned on, default to AC mode */
912 priv->power_mode = IWL_POWER_AC;
913 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MAX;
915 ret = iwl_init_channel_map(priv);
917 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
921 ret = iwlcore_init_geos(priv);
923 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
924 goto err_free_channel_map;
929 err_free_channel_map:
930 iwl_free_channel_map(priv);
934 EXPORT_SYMBOL(iwl_init_drv);
936 int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
939 if (tx_power < IWL_TX_POWER_TARGET_POWER_MIN) {
940 IWL_WARN(priv, "Requested user TXPOWER %d below limit.\n",
941 priv->tx_power_user_lmt);
945 if (tx_power > IWL_TX_POWER_TARGET_POWER_MAX) {
946 IWL_WARN(priv, "Requested user TXPOWER %d above limit.\n",
947 priv->tx_power_user_lmt);
951 if (priv->tx_power_user_lmt != tx_power)
954 priv->tx_power_user_lmt = tx_power;
956 if (force && priv->cfg->ops->lib->send_tx_power)
957 ret = priv->cfg->ops->lib->send_tx_power(priv);
961 EXPORT_SYMBOL(iwl_set_tx_power);
963 void iwl_uninit_drv(struct iwl_priv *priv)
965 iwl_calib_free_results(priv);
966 iwlcore_free_geos(priv);
967 iwl_free_channel_map(priv);
970 EXPORT_SYMBOL(iwl_uninit_drv);
973 void iwl_disable_interrupts(struct iwl_priv *priv)
975 clear_bit(STATUS_INT_ENABLED, &priv->status);
977 /* disable interrupts from uCode/NIC to host */
978 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
980 /* acknowledge/clear/reset any interrupts still pending
981 * from uCode or flow handler (Rx/Tx DMA) */
982 iwl_write32(priv, CSR_INT, 0xffffffff);
983 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
984 IWL_DEBUG_ISR("Disabled interrupts\n");
986 EXPORT_SYMBOL(iwl_disable_interrupts);
988 void iwl_enable_interrupts(struct iwl_priv *priv)
990 IWL_DEBUG_ISR("Enabling interrupts\n");
991 set_bit(STATUS_INT_ENABLED, &priv->status);
992 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
994 EXPORT_SYMBOL(iwl_enable_interrupts);
996 int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags)
999 struct iwl_host_cmd cmd = {
1000 .id = REPLY_STATISTICS_CMD,
1001 .meta.flags = flags,
1002 .len = sizeof(stat_flags),
1003 .data = (u8 *) &stat_flags,
1005 return iwl_send_cmd(priv, &cmd);
1007 EXPORT_SYMBOL(iwl_send_statistics_request);
1010 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
1011 * using sample data 100 bytes apart. If these sample points are good,
1012 * it's a pretty good bet that everything between them is good, too.
1014 static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1021 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
1023 ret = iwl_grab_nic_access(priv);
1027 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1028 /* read data comes through single port, auto-incr addr */
1029 /* NOTE: Use the debugless read so we don't flood kernel log
1030 * if IWL_DL_IO is set */
1031 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1032 i + IWL49_RTC_INST_LOWER_BOUND);
1033 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1034 if (val != le32_to_cpu(*image)) {
1042 iwl_release_nic_access(priv);
1048 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
1049 * looking at all data.
1051 static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
1059 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
1061 ret = iwl_grab_nic_access(priv);
1065 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1066 IWL49_RTC_INST_LOWER_BOUND);
1069 for (; len > 0; len -= sizeof(u32), image++) {
1070 /* read data comes through single port, auto-incr addr */
1071 /* NOTE: Use the debugless read so we don't flood kernel log
1072 * if IWL_DL_IO is set */
1073 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1074 if (val != le32_to_cpu(*image)) {
1075 IWL_ERR(priv, "uCode INST section is invalid at "
1076 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1077 save_len - len, val, le32_to_cpu(*image));
1085 iwl_release_nic_access(priv);
1089 ("ucode image in INSTRUCTION memory is good\n");
1095 * iwl_verify_ucode - determine which instruction image is in SRAM,
1096 * and verify its contents
1098 int iwl_verify_ucode(struct iwl_priv *priv)
1105 image = (__le32 *)priv->ucode_boot.v_addr;
1106 len = priv->ucode_boot.len;
1107 ret = iwlcore_verify_inst_sparse(priv, image, len);
1109 IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
1113 /* Try initialize */
1114 image = (__le32 *)priv->ucode_init.v_addr;
1115 len = priv->ucode_init.len;
1116 ret = iwlcore_verify_inst_sparse(priv, image, len);
1118 IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
1122 /* Try runtime/protocol */
1123 image = (__le32 *)priv->ucode_code.v_addr;
1124 len = priv->ucode_code.len;
1125 ret = iwlcore_verify_inst_sparse(priv, image, len);
1127 IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
1131 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
1133 /* Since nothing seems to match, show first several data entries in
1134 * instruction SRAM, so maybe visual inspection will give a clue.
1135 * Selection of bootstrap image (vs. other images) is arbitrary. */
1136 image = (__le32 *)priv->ucode_boot.v_addr;
1137 len = priv->ucode_boot.len;
1138 ret = iwl_verify_inst_full(priv, image, len);
1142 EXPORT_SYMBOL(iwl_verify_ucode);
1145 static const char *desc_lookup_text[] = {
1150 "NMI_INTERRUPT_WDG",
1154 "HW_ERROR_TUNE_LOCK",
1155 "HW_ERROR_TEMPERATURE",
1156 "ILLEGAL_CHAN_FREQ",
1159 "NMI_INTERRUPT_HOST",
1160 "NMI_INTERRUPT_ACTION_PT",
1161 "NMI_INTERRUPT_UNKNOWN",
1162 "UCODE_VERSION_MISMATCH",
1163 "HW_ERROR_ABS_LOCK",
1164 "HW_ERROR_CAL_LOCK_FAIL",
1165 "NMI_INTERRUPT_INST_ACTION_PT",
1166 "NMI_INTERRUPT_DATA_ACTION_PT",
1168 "NMI_INTERRUPT_TRM",
1169 "NMI_INTERRUPT_BREAK_POINT"
1177 static const char *desc_lookup(int i)
1179 int max = ARRAY_SIZE(desc_lookup_text) - 1;
1181 if (i < 0 || i > max)
1184 return desc_lookup_text[i];
1187 #define ERROR_START_OFFSET (1 * sizeof(u32))
1188 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1190 void iwl_dump_nic_error_log(struct iwl_priv *priv)
1193 u32 desc, time, count, base, data1;
1194 u32 blink1, blink2, ilink1, ilink2;
1197 if (priv->ucode_type == UCODE_INIT)
1198 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
1200 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1202 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1203 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1207 ret = iwl_grab_nic_access(priv);
1209 IWL_WARN(priv, "Can not read from adapter at this time.\n");
1213 count = iwl_read_targ_mem(priv, base);
1215 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1216 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1217 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1218 priv->status, count);
1221 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
1222 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
1223 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
1224 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
1225 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
1226 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
1227 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
1228 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1229 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1231 IWL_ERR(priv, "Desc Time "
1232 "data1 data2 line\n");
1233 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
1234 desc_lookup(desc), desc, time, data1, data2, line);
1235 IWL_ERR(priv, "blink1 blink2 ilink1 ilink2\n");
1236 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
1239 iwl_release_nic_access(priv);
1241 EXPORT_SYMBOL(iwl_dump_nic_error_log);
1243 #define EVENT_START_OFFSET (4 * sizeof(u32))
1246 * iwl_print_event_log - Dump error event log to syslog
1248 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
1250 static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1251 u32 num_events, u32 mode)
1254 u32 base; /* SRAM byte address of event log header */
1255 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1256 u32 ptr; /* SRAM byte address of log data */
1257 u32 ev, time, data; /* event log data */
1259 if (num_events == 0)
1261 if (priv->ucode_type == UCODE_INIT)
1262 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1264 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1267 event_size = 2 * sizeof(u32);
1269 event_size = 3 * sizeof(u32);
1271 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1273 /* "time" is actually "data" for mode 0 (no timestamp).
1274 * place event id # at far right for easier visual parsing. */
1275 for (i = 0; i < num_events; i++) {
1276 ev = iwl_read_targ_mem(priv, ptr);
1278 time = iwl_read_targ_mem(priv, ptr);
1282 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev);
1284 data = iwl_read_targ_mem(priv, ptr);
1286 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1292 void iwl_dump_nic_event_log(struct iwl_priv *priv)
1295 u32 base; /* SRAM byte address of event log header */
1296 u32 capacity; /* event log capacity in # entries */
1297 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
1298 u32 num_wraps; /* # times uCode wrapped to top of log */
1299 u32 next_entry; /* index of next entry to be written by uCode */
1300 u32 size; /* # entries that we'll print */
1302 if (priv->ucode_type == UCODE_INIT)
1303 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1305 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1307 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1308 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1312 ret = iwl_grab_nic_access(priv);
1314 IWL_WARN(priv, "Can not read from adapter at this time.\n");
1318 /* event log header */
1319 capacity = iwl_read_targ_mem(priv, base);
1320 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
1321 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1322 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1324 size = num_wraps ? capacity : next_entry;
1326 /* bail out if nothing in log */
1328 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1329 iwl_release_nic_access(priv);
1333 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
1336 /* if uCode has wrapped back to top of log, start at the oldest entry,
1337 * i.e the next one that uCode would fill. */
1339 iwl_print_event_log(priv, next_entry,
1340 capacity - next_entry, mode);
1341 /* (then/else) start at top of log */
1342 iwl_print_event_log(priv, 0, next_entry, mode);
1344 iwl_release_nic_access(priv);
1346 EXPORT_SYMBOL(iwl_dump_nic_event_log);
1348 void iwl_rf_kill_ct_config(struct iwl_priv *priv)
1350 struct iwl_ct_kill_config cmd;
1351 unsigned long flags;
1354 spin_lock_irqsave(&priv->lock, flags);
1355 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1356 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1357 spin_unlock_irqrestore(&priv->lock, flags);
1359 cmd.critical_temperature_R =
1360 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1362 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1365 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1367 IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded, "
1368 "critical temperature is %d\n",
1369 cmd.critical_temperature_R);
1371 EXPORT_SYMBOL(iwl_rf_kill_ct_config);
1377 * Use: Sets the device's internal card state to enable, disable, or halt
1379 * When in the 'enable' state the card operates as normal.
1380 * When in the 'disable' state, the card enters into a low power mode.
1381 * When in the 'halt' state, the card is shut down and must be fully
1382 * restarted to come back on.
1384 int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
1386 struct iwl_host_cmd cmd = {
1387 .id = REPLY_CARD_STATE_CMD,
1390 .meta.flags = meta_flag,
1393 return iwl_send_cmd(priv, &cmd);
1395 EXPORT_SYMBOL(iwl_send_card_state);
1397 void iwl_radio_kill_sw_disable_radio(struct iwl_priv *priv)
1399 unsigned long flags;
1401 if (test_bit(STATUS_RF_KILL_SW, &priv->status))
1404 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO OFF\n");
1406 iwl_scan_cancel(priv);
1407 /* FIXME: This is a workaround for AP */
1408 if (priv->iw_mode != NL80211_IFTYPE_AP) {
1409 spin_lock_irqsave(&priv->lock, flags);
1410 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
1411 CSR_UCODE_SW_BIT_RFKILL);
1412 spin_unlock_irqrestore(&priv->lock, flags);
1413 /* call the host command only if no hw rf-kill set */
1414 if (!test_bit(STATUS_RF_KILL_HW, &priv->status) &&
1416 iwl_send_card_state(priv,
1417 CARD_STATE_CMD_DISABLE, 0);
1418 set_bit(STATUS_RF_KILL_SW, &priv->status);
1419 /* make sure mac80211 stop sending Tx frame */
1420 if (priv->mac80211_registered)
1421 ieee80211_stop_queues(priv->hw);
1424 EXPORT_SYMBOL(iwl_radio_kill_sw_disable_radio);
1426 int iwl_radio_kill_sw_enable_radio(struct iwl_priv *priv)
1428 unsigned long flags;
1430 if (!test_bit(STATUS_RF_KILL_SW, &priv->status))
1433 IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO ON\n");
1435 spin_lock_irqsave(&priv->lock, flags);
1436 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
1438 /* If the driver is up it will receive CARD_STATE_NOTIFICATION
1439 * notification where it will clear SW rfkill status.
1440 * Setting it here would break the handler. Only if the
1441 * interface is down we can set here since we don't
1442 * receive any further notification.
1445 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1446 spin_unlock_irqrestore(&priv->lock, flags);
1451 spin_lock_irqsave(&priv->lock, flags);
1452 iwl_read32(priv, CSR_UCODE_DRV_GP1);
1453 if (!iwl_grab_nic_access(priv))
1454 iwl_release_nic_access(priv);
1455 spin_unlock_irqrestore(&priv->lock, flags);
1457 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
1458 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
1459 "disabled by HW switch\n");
1463 /* when driver is up while rfkill is on, it wont receive
1464 * any CARD_STATE_NOTIFICATION notifications so we have to
1465 * restart it in here
1467 if (priv->is_open && !test_bit(STATUS_ALIVE, &priv->status)) {
1468 clear_bit(STATUS_RF_KILL_SW, &priv->status);
1469 if (!iwl_is_rfkill(priv))
1470 queue_work(priv->workqueue, &priv->up);
1473 /* If the driver is already loaded, it will receive
1474 * CARD_STATE_NOTIFICATION notifications and the handler will
1475 * call restart to reload the driver.
1479 EXPORT_SYMBOL(iwl_radio_kill_sw_enable_radio);
1481 void iwl_bg_rf_kill(struct work_struct *work)
1483 struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
1485 wake_up_interruptible(&priv->wait_command_queue);
1487 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1490 mutex_lock(&priv->mutex);
1492 if (!iwl_is_rfkill(priv)) {
1493 IWL_DEBUG(IWL_DL_RF_KILL,
1494 "HW and/or SW RF Kill no longer active, restarting "
1496 if (!test_bit(STATUS_EXIT_PENDING, &priv->status) &&
1497 test_bit(STATUS_ALIVE, &priv->status))
1498 queue_work(priv->workqueue, &priv->restart);
1500 /* make sure mac80211 stop sending Tx frame */
1501 if (priv->mac80211_registered)
1502 ieee80211_stop_queues(priv->hw);
1504 if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
1505 IWL_DEBUG_RF_KILL("Can not turn radio back on - "
1506 "disabled by SW switch\n");
1508 IWL_WARN(priv, "Radio Frequency Kill Switch is On:\n"
1509 "Kill switch must be turned off for "
1510 "wireless networking to work.\n");
1512 mutex_unlock(&priv->mutex);
1513 iwl_rfkill_set_hw_state(priv);
1515 EXPORT_SYMBOL(iwl_bg_rf_kill);