2 * drivers/net/ibm_emac/ibm_emac_debug.c
4 * Driver for PowerPC 4xx on-chip ethernet controller, debug print routines.
6 * Copyright (c) 2004, 2005 Zultys Technologies
7 * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/kernel.h>
18 #include <linux/netdevice.h>
19 #include <linux/sysrq.h>
22 #include "ibm_emac_core.h"
24 static void emac_desc_dump(int idx, struct ocp_enet_private *p)
27 printk("** EMAC%d TX BDs **\n"
28 " tx_cnt = %d tx_slot = %d ack_slot = %d\n",
29 idx, p->tx_cnt, p->tx_slot, p->ack_slot);
30 for (i = 0; i < NUM_TX_BUFF / 2; ++i)
32 ("bd[%2d] 0x%08x %c 0x%04x %4u - bd[%2d] 0x%08x %c 0x%04x %4u\n",
33 i, p->tx_desc[i].data_ptr, p->tx_skb[i] ? 'V' : ' ',
34 p->tx_desc[i].ctrl, p->tx_desc[i].data_len,
36 p->tx_desc[NUM_TX_BUFF / 2 + i].data_ptr,
37 p->tx_skb[NUM_TX_BUFF / 2 + i] ? 'V' : ' ',
38 p->tx_desc[NUM_TX_BUFF / 2 + i].ctrl,
39 p->tx_desc[NUM_TX_BUFF / 2 + i].data_len);
41 printk("** EMAC%d RX BDs **\n"
42 " rx_slot = %d rx_stopped = %d rx_skb_size = %d rx_sync_size = %d\n"
43 " rx_sg_skb = 0x%p\n",
44 idx, p->rx_slot, p->commac.rx_stopped, p->rx_skb_size,
45 p->rx_sync_size, p->rx_sg_skb);
46 for (i = 0; i < NUM_RX_BUFF / 2; ++i)
48 ("bd[%2d] 0x%08x %c 0x%04x %4u - bd[%2d] 0x%08x %c 0x%04x %4u\n",
49 i, p->rx_desc[i].data_ptr, p->rx_skb[i] ? 'V' : ' ',
50 p->rx_desc[i].ctrl, p->rx_desc[i].data_len,
52 p->rx_desc[NUM_RX_BUFF / 2 + i].data_ptr,
53 p->rx_skb[NUM_RX_BUFF / 2 + i] ? 'V' : ' ',
54 p->rx_desc[NUM_RX_BUFF / 2 + i].ctrl,
55 p->rx_desc[NUM_RX_BUFF / 2 + i].data_len);
58 static void emac_mac_dump(int idx, struct ocp_enet_private *dev)
60 struct emac_regs __iomem *p = dev->emacp;
62 printk("** EMAC%d registers **\n"
63 "MR0 = 0x%08x MR1 = 0x%08x TMR0 = 0x%08x TMR1 = 0x%08x\n"
64 "RMR = 0x%08x ISR = 0x%08x ISER = 0x%08x\n"
65 "IAR = %04x%08x VTPID = 0x%04x VTCI = 0x%04x\n"
66 "IAHT: 0x%04x 0x%04x 0x%04x 0x%04x "
67 "GAHT: 0x%04x 0x%04x 0x%04x 0x%04x\n"
68 "LSA = %04x%08x IPGVR = 0x%04x\n"
69 "STACR = 0x%08x TRTR = 0x%08x RWMR = 0x%08x\n"
70 "OCTX = 0x%08x OCRX = 0x%08x IPCR = 0x%08x\n",
71 idx, in_be32(&p->mr0), in_be32(&p->mr1),
72 in_be32(&p->tmr0), in_be32(&p->tmr1),
73 in_be32(&p->rmr), in_be32(&p->isr), in_be32(&p->iser),
74 in_be32(&p->iahr), in_be32(&p->ialr), in_be32(&p->vtpid),
76 in_be32(&p->iaht1), in_be32(&p->iaht2), in_be32(&p->iaht3),
78 in_be32(&p->gaht1), in_be32(&p->gaht2), in_be32(&p->gaht3),
80 in_be32(&p->lsah), in_be32(&p->lsal), in_be32(&p->ipgvr),
81 in_be32(&p->stacr), in_be32(&p->trtr), in_be32(&p->rwmr),
82 in_be32(&p->octx), in_be32(&p->ocrx), in_be32(&p->ipcr)
85 emac_desc_dump(idx, dev);
88 static void emac_mal_dump(struct ibm_ocp_mal *mal)
90 struct ocp_func_mal_data *maldata = mal->def->additions;
93 printk("** MAL%d Registers **\n"
94 "CFG = 0x%08x ESR = 0x%08x IER = 0x%08x\n"
95 "TX|CASR = 0x%08x CARR = 0x%08x EOBISR = 0x%08x DEIR = 0x%08x\n"
96 "RX|CASR = 0x%08x CARR = 0x%08x EOBISR = 0x%08x DEIR = 0x%08x\n",
98 get_mal_dcrn(mal, MAL_CFG), get_mal_dcrn(mal, MAL_ESR),
99 get_mal_dcrn(mal, MAL_IER),
100 get_mal_dcrn(mal, MAL_TXCASR), get_mal_dcrn(mal, MAL_TXCARR),
101 get_mal_dcrn(mal, MAL_TXEOBISR), get_mal_dcrn(mal, MAL_TXDEIR),
102 get_mal_dcrn(mal, MAL_RXCASR), get_mal_dcrn(mal, MAL_RXCARR),
103 get_mal_dcrn(mal, MAL_RXEOBISR), get_mal_dcrn(mal, MAL_RXDEIR)
107 for (i = 0; i < maldata->num_tx_chans; ++i) {
110 printk("CTP%d = 0x%08x ", i, get_mal_dcrn(mal, MAL_TXCTPR(i)));
113 for (i = 0; i < maldata->num_rx_chans; ++i) {
116 printk("CTP%d = 0x%08x ", i, get_mal_dcrn(mal, MAL_RXCTPR(i)));
119 for (i = 0; i < maldata->num_rx_chans; ++i) {
120 u32 r = get_mal_dcrn(mal, MAL_RCBS(i));
123 printk("RCBS%d = 0x%08x (%d) ", i, r, r * 16);
128 static struct ocp_enet_private *__emacs[4];
129 static struct ibm_ocp_mal *__mals[1];
131 void emac_dbg_register(int idx, struct ocp_enet_private *dev)
135 if (idx >= ARRAY_SIZE(__emacs)) {
137 "invalid index %d when registering EMAC for debugging\n",
142 local_irq_save(flags);
144 local_irq_restore(flags);
147 void mal_dbg_register(int idx, struct ibm_ocp_mal *mal)
151 if (idx >= ARRAY_SIZE(__mals)) {
153 "invalid index %d when registering MAL for debugging\n",
158 local_irq_save(flags);
160 local_irq_restore(flags);
163 void emac_dbg_dump_all(void)
168 local_irq_save(flags);
170 for (i = 0; i < ARRAY_SIZE(__mals); ++i)
172 emac_mal_dump(__mals[i]);
174 for (i = 0; i < ARRAY_SIZE(__emacs); ++i)
176 emac_mac_dump(i, __emacs[i]);
178 local_irq_restore(flags);
181 #if defined(CONFIG_MAGIC_SYSRQ)
182 static void emac_sysrq_handler(int key, struct tty_struct *tty)
187 static struct sysrq_key_op emac_sysrq_op = {
188 .handler = emac_sysrq_handler,
190 .action_msg = "Show EMAC(s) status",
193 int __init emac_init_debug(void)
195 return register_sysrq_key('c', &emac_sysrq_op);
198 void __exit emac_fini_debug(void)
200 unregister_sysrq_key('c', &emac_sysrq_op);
204 int __init emac_init_debug(void)
208 void __exit emac_fini_debug(void)
211 #endif /* CONFIG_MAGIC_SYSRQ */