2 * Copyright (C) 2003 - 2006 NetXen, Inc.
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
23 * Contact Information:
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
30 * Structures, enums, and macros for the MAC
34 #ifndef __NETXEN_NIC_HW_H_
35 #define __NETXEN_NIC_HW_H_
37 #include "netxen_nic_hdr.h"
39 /* Hardware memory size of 128 meg */
40 #define NETXEN_MEMADDR_MAX (128 * 1024 * 1024)
43 static inline u64 readq(void __iomem * addr)
45 return readl(addr) | (((u64) readl(addr + 4)) << 32LL);
50 static inline void writeq(u64 val, void __iomem * addr)
52 writel(((u32) (val)), (addr));
53 writel(((u32) (val >> 32)), (addr + 4));
57 struct netxen_adapter;
59 #define NETXEN_PCI_MAPSIZE_BYTES (NETXEN_PCI_MAPSIZE << 20)
62 void netxen_nic_set_link_parameters(struct netxen_adapter *adapter);
63 void netxen_nic_flash_print(struct netxen_adapter *adapter);
65 typedef u8 netxen_ethernet_macaddr_t[6];
67 /* Nibble or Byte mode for phy interface (GbE mode only) */
69 NETXEN_NIU_10_100_MB = 0,
71 } netxen_niu_gbe_ifmode_t;
73 #define _netxen_crb_get_bit(var, bit) ((var >> bit) & 0x1)
76 * NIU GB MAC Config Register 0 (applies to GB0, GB1, GB2, GB3)
78 * Bit 0 : enable_tx => 1:enable frame xmit, 0:disable
79 * Bit 1 : tx_synced => R/O: xmit enable synched to xmit stream
80 * Bit 2 : enable_rx => 1:enable frame recv, 0:disable
81 * Bit 3 : rx_synced => R/O: recv enable synched to recv stream
82 * Bit 4 : tx_flowctl => 1:enable pause frame generation, 0:disable
83 * Bit 5 : rx_flowctl => 1:act on recv'd pause frames, 0:ignore
84 * Bit 8 : loopback => 1:loop MAC xmits to MAC recvs, 0:normal
85 * Bit 16: tx_reset_pb => 1:reset frame xmit protocol blk, 0:no-op
86 * Bit 17: rx_reset_pb => 1:reset frame recv protocol blk, 0:no-op
87 * Bit 18: tx_reset_mac => 1:reset data/ctl multiplexer blk, 0:no-op
88 * Bit 19: rx_reset_mac => 1:reset ctl frames & timers blk, 0:no-op
89 * Bit 31: soft_reset => 1:reset the MAC and the SERDES, 0:no-op
92 #define netxen_gb_enable_tx(config_word) \
93 ((config_word) |= 1 << 0)
94 #define netxen_gb_enable_rx(config_word) \
95 ((config_word) |= 1 << 2)
96 #define netxen_gb_tx_flowctl(config_word) \
97 ((config_word) |= 1 << 4)
98 #define netxen_gb_rx_flowctl(config_word) \
99 ((config_word) |= 1 << 5)
100 #define netxen_gb_tx_reset_pb(config_word) \
101 ((config_word) |= 1 << 16)
102 #define netxen_gb_rx_reset_pb(config_word) \
103 ((config_word) |= 1 << 17)
104 #define netxen_gb_tx_reset_mac(config_word) \
105 ((config_word) |= 1 << 18)
106 #define netxen_gb_rx_reset_mac(config_word) \
107 ((config_word) |= 1 << 19)
108 #define netxen_gb_soft_reset(config_word) \
109 ((config_word) |= 1 << 31)
111 #define netxen_gb_unset_tx_flowctl(config_word) \
112 ((config_word) &= ~(1 << 4))
113 #define netxen_gb_unset_rx_flowctl(config_word) \
114 ((config_word) &= ~(1 << 5))
116 #define netxen_gb_get_tx_synced(config_word) \
117 _netxen_crb_get_bit((config_word), 1)
118 #define netxen_gb_get_rx_synced(config_word) \
119 _netxen_crb_get_bit((config_word), 3)
120 #define netxen_gb_get_tx_flowctl(config_word) \
121 _netxen_crb_get_bit((config_word), 4)
122 #define netxen_gb_get_rx_flowctl(config_word) \
123 _netxen_crb_get_bit((config_word), 5)
124 #define netxen_gb_get_soft_reset(config_word) \
125 _netxen_crb_get_bit((config_word), 31)
127 #define netxen_gb_get_stationaddress_low(config_word) ((config_word) >> 16)
129 #define netxen_gb_set_mii_mgmt_clockselect(config_word, val) \
130 ((config_word) |= ((val) & 0x07))
131 #define netxen_gb_mii_mgmt_reset(config_word) \
132 ((config_word) |= 1 << 31)
133 #define netxen_gb_mii_mgmt_unset(config_word) \
134 ((config_word) &= ~(1 << 31))
137 * NIU GB MII Mgmt Command Register (applies to GB0, GB1, GB2, GB3)
138 * Bit 0 : read_cycle => 1:perform single read cycle, 0:no-op
139 * Bit 1 : scan_cycle => 1:perform continuous read cycles, 0:no-op
142 #define netxen_gb_mii_mgmt_set_read_cycle(config_word) \
143 ((config_word) |= 1 << 0)
144 #define netxen_gb_mii_mgmt_reg_addr(config_word, val) \
145 ((config_word) |= ((val) & 0x1F))
146 #define netxen_gb_mii_mgmt_phy_addr(config_word, val) \
147 ((config_word) |= (((val) & 0x1F) << 8))
150 * NIU GB MII Mgmt Indicators Register (applies to GB0, GB1, GB2, GB3)
151 * Read-only register.
152 * Bit 0 : busy => 1:performing an MII mgmt cycle, 0:idle
153 * Bit 1 : scanning => 1:scan operation in progress, 0:idle
154 * Bit 2 : notvalid => :mgmt result data not yet valid, 0:idle
156 #define netxen_get_gb_mii_mgmt_busy(config_word) \
157 _netxen_crb_get_bit(config_word, 0)
158 #define netxen_get_gb_mii_mgmt_scanning(config_word) \
159 _netxen_crb_get_bit(config_word, 1)
160 #define netxen_get_gb_mii_mgmt_notvalid(config_word) \
161 _netxen_crb_get_bit(config_word, 2)
163 * NIU XG Pause Ctl Register
165 * Bit 0 : xg0_mask => 1:disable tx pause frames
166 * Bit 1 : xg0_request => 1:request single pause frame
167 * Bit 2 : xg0_on_off => 1:request is pause on, 0:off
168 * Bit 3 : xg1_mask => 1:disable tx pause frames
169 * Bit 4 : xg1_request => 1:request single pause frame
170 * Bit 5 : xg1_on_off => 1:request is pause on, 0:off
173 #define netxen_xg_set_xg0_mask(config_word) \
174 ((config_word) |= 1 << 0)
175 #define netxen_xg_set_xg1_mask(config_word) \
176 ((config_word) |= 1 << 3)
178 #define netxen_xg_get_xg0_mask(config_word) \
179 _netxen_crb_get_bit((config_word), 0)
180 #define netxen_xg_get_xg1_mask(config_word) \
181 _netxen_crb_get_bit((config_word), 3)
183 #define netxen_xg_unset_xg0_mask(config_word) \
184 ((config_word) &= ~(1 << 0))
185 #define netxen_xg_unset_xg1_mask(config_word) \
186 ((config_word) &= ~(1 << 3))
189 * NIU XG Pause Ctl Register
191 * Bit 0 : xg0_mask => 1:disable tx pause frames
192 * Bit 1 : xg0_request => 1:request single pause frame
193 * Bit 2 : xg0_on_off => 1:request is pause on, 0:off
194 * Bit 3 : xg1_mask => 1:disable tx pause frames
195 * Bit 4 : xg1_request => 1:request single pause frame
196 * Bit 5 : xg1_on_off => 1:request is pause on, 0:off
198 #define netxen_gb_set_gb0_mask(config_word) \
199 ((config_word) |= 1 << 0)
200 #define netxen_gb_set_gb1_mask(config_word) \
201 ((config_word) |= 1 << 2)
202 #define netxen_gb_set_gb2_mask(config_word) \
203 ((config_word) |= 1 << 4)
204 #define netxen_gb_set_gb3_mask(config_word) \
205 ((config_word) |= 1 << 6)
207 #define netxen_gb_get_gb0_mask(config_word) \
208 _netxen_crb_get_bit((config_word), 0)
209 #define netxen_gb_get_gb1_mask(config_word) \
210 _netxen_crb_get_bit((config_word), 2)
211 #define netxen_gb_get_gb2_mask(config_word) \
212 _netxen_crb_get_bit((config_word), 4)
213 #define netxen_gb_get_gb3_mask(config_word) \
214 _netxen_crb_get_bit((config_word), 6)
216 #define netxen_gb_unset_gb0_mask(config_word) \
217 ((config_word) &= ~(1 << 0))
218 #define netxen_gb_unset_gb1_mask(config_word) \
219 ((config_word) &= ~(1 << 2))
220 #define netxen_gb_unset_gb2_mask(config_word) \
221 ((config_word) &= ~(1 << 4))
222 #define netxen_gb_unset_gb3_mask(config_word) \
223 ((config_word) &= ~(1 << 6))
227 * PHY-Specific MII control/status registers.
230 NETXEN_NIU_GB_MII_MGMT_ADDR_CONTROL = 0,
231 NETXEN_NIU_GB_MII_MGMT_ADDR_STATUS = 1,
232 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_ID_0 = 2,
233 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_ID_1 = 3,
234 NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG = 4,
235 NETXEN_NIU_GB_MII_MGMT_ADDR_LNKPART = 5,
236 NETXEN_NIU_GB_MII_MGMT_ADDR_AUTONEG_MORE = 6,
237 NETXEN_NIU_GB_MII_MGMT_ADDR_NEXTPAGE_XMIT = 7,
238 NETXEN_NIU_GB_MII_MGMT_ADDR_LNKPART_NEXTPAGE = 8,
239 NETXEN_NIU_GB_MII_MGMT_ADDR_1000BT_CONTROL = 9,
240 NETXEN_NIU_GB_MII_MGMT_ADDR_1000BT_STATUS = 10,
241 NETXEN_NIU_GB_MII_MGMT_ADDR_EXTENDED_STATUS = 15,
242 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_CONTROL = 16,
243 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS = 17,
244 NETXEN_NIU_GB_MII_MGMT_ADDR_INT_ENABLE = 18,
245 NETXEN_NIU_GB_MII_MGMT_ADDR_INT_STATUS = 19,
246 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_CONTROL_MORE = 20,
247 NETXEN_NIU_GB_MII_MGMT_ADDR_RECV_ERROR_COUNT = 21,
248 NETXEN_NIU_GB_MII_MGMT_ADDR_LED_CONTROL = 24,
249 NETXEN_NIU_GB_MII_MGMT_ADDR_LED_OVERRIDE = 25,
250 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_CONTROL_MORE_YET = 26,
251 NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS_MORE = 27
252 } netxen_niu_phy_register_t;
255 * PHY-Specific Status Register (reg 17).
257 * Bit 0 : jabber => 1:jabber detected, 0:not
258 * Bit 1 : polarity => 1:polarity reversed, 0:normal
259 * Bit 2 : recvpause => 1:receive pause enabled, 0:disabled
260 * Bit 3 : xmitpause => 1:transmit pause enabled, 0:disabled
261 * Bit 4 : energydetect => 1:sleep, 0:active
262 * Bit 5 : downshift => 1:downshift, 0:no downshift
263 * Bit 6 : crossover => 1:MDIX (crossover), 0:MDI (no crossover)
264 * Bits 7-9 : cablelen => not valid in 10Mb/s mode
265 * 0:<50m, 1:50-80m, 2:80-110m, 3:110-140m, 4:>140m
266 * Bit 10 : link => 1:link up, 0:link down
267 * Bit 11 : resolved => 1:speed and duplex resolved, 0:not yet
268 * Bit 12 : pagercvd => 1:page received, 0:page not received
269 * Bit 13 : duplex => 1:full duplex, 0:half duplex
270 * Bits 14-15 : speed => 0:10Mb/s, 1:100Mb/s, 2:1000Mb/s, 3:rsvd
273 #define netxen_get_phy_cablelen(config_word) (((config_word) >> 7) & 0x07)
274 #define netxen_get_phy_speed(config_word) (((config_word) >> 14) & 0x03)
276 #define netxen_set_phy_speed(config_word, val) \
277 ((config_word) |= ((val & 0x03) << 14))
278 #define netxen_set_phy_duplex(config_word) \
279 ((config_word) |= 1 << 13)
280 #define netxen_clear_phy_duplex(config_word) \
281 ((config_word) &= ~(1 << 13))
283 #define netxen_get_phy_jabber(config_word) \
284 _netxen_crb_get_bit(config_word, 0)
285 #define netxen_get_phy_polarity(config_word) \
286 _netxen_crb_get_bit(config_word, 1)
287 #define netxen_get_phy_recvpause(config_word) \
288 _netxen_crb_get_bit(config_word, 2)
289 #define netxen_get_phy_xmitpause(config_word) \
290 _netxen_crb_get_bit(config_word, 3)
291 #define netxen_get_phy_energydetect(config_word) \
292 _netxen_crb_get_bit(config_word, 4)
293 #define netxen_get_phy_downshift(config_word) \
294 _netxen_crb_get_bit(config_word, 5)
295 #define netxen_get_phy_crossover(config_word) \
296 _netxen_crb_get_bit(config_word, 6)
297 #define netxen_get_phy_link(config_word) \
298 _netxen_crb_get_bit(config_word, 10)
299 #define netxen_get_phy_resolved(config_word) \
300 _netxen_crb_get_bit(config_word, 11)
301 #define netxen_get_phy_pagercvd(config_word) \
302 _netxen_crb_get_bit(config_word, 12)
303 #define netxen_get_phy_duplex(config_word) \
304 _netxen_crb_get_bit(config_word, 13)
307 * Interrupt Register definition
308 * This definition applies to registers 18 and 19 (int enable and int status).
310 * Bit 1 : polarity_changed
311 * Bit 4 : energy_detect
313 * Bit 6 : mdi_xover_changed
314 * Bit 7 : fifo_over_underflow
315 * Bit 8 : false_carrier
316 * Bit 9 : symbol_error
317 * Bit 10: link_status_changed
318 * Bit 11: autoneg_completed
319 * Bit 12: page_received
320 * Bit 13: duplex_changed
321 * Bit 14: speed_changed
322 * Bit 15: autoneg_error
325 #define netxen_get_phy_int_jabber(config_word) \
326 _netxen_crb_get_bit(config_word, 0)
327 #define netxen_get_phy_int_polarity_changed(config_word) \
328 _netxen_crb_get_bit(config_word, 1)
329 #define netxen_get_phy_int_energy_detect(config_word) \
330 _netxen_crb_get_bit(config_word, 4)
331 #define netxen_get_phy_int_downshift(config_word) \
332 _netxen_crb_get_bit(config_word, 5)
333 #define netxen_get_phy_int_mdi_xover_changed(config_word) \
334 _netxen_crb_get_bit(config_word, 6)
335 #define netxen_get_phy_int_fifo_over_underflow(config_word) \
336 _netxen_crb_get_bit(config_word, 7)
337 #define netxen_get_phy_int_false_carrier(config_word) \
338 _netxen_crb_get_bit(config_word, 8)
339 #define netxen_get_phy_int_symbol_error(config_word) \
340 _netxen_crb_get_bit(config_word, 9)
341 #define netxen_get_phy_int_link_status_changed(config_word) \
342 _netxen_crb_get_bit(config_word, 10)
343 #define netxen_get_phy_int_autoneg_completed(config_word) \
344 _netxen_crb_get_bit(config_word, 11)
345 #define netxen_get_phy_int_page_received(config_word) \
346 _netxen_crb_get_bit(config_word, 12)
347 #define netxen_get_phy_int_duplex_changed(config_word) \
348 _netxen_crb_get_bit(config_word, 13)
349 #define netxen_get_phy_int_speed_changed(config_word) \
350 _netxen_crb_get_bit(config_word, 14)
351 #define netxen_get_phy_int_autoneg_error(config_word) \
352 _netxen_crb_get_bit(config_word, 15)
354 #define netxen_set_phy_int_link_status_changed(config_word) \
355 ((config_word) |= 1 << 10)
356 #define netxen_set_phy_int_autoneg_completed(config_word) \
357 ((config_word) |= 1 << 11)
358 #define netxen_set_phy_int_speed_changed(config_word) \
359 ((config_word) |= 1 << 14)
363 * Bit 0 : enable FibreChannel
364 * Bit 1 : enable 10/100/1000 Ethernet
365 * Bit 2 : enable 10Gb Ethernet
368 #define netxen_get_niu_enable_ge(config_word) \
369 _netxen_crb_get_bit(config_word, 1)
371 #define NETXEN_NIU_NON_PROMISC_MODE 0
372 #define NETXEN_NIU_PROMISC_MODE 1
373 #define NETXEN_NIU_ALLMULTI_MODE 2
376 * NIU GB Drop CRC Register
378 * Bit 0 : drop_gb0 => 1:drop pkts with bad CRCs, 0:pass them on
379 * Bit 1 : drop_gb1 => 1:drop pkts with bad CRCs, 0:pass them on
380 * Bit 2 : drop_gb2 => 1:drop pkts with bad CRCs, 0:pass them on
381 * Bit 3 : drop_gb3 => 1:drop pkts with bad CRCs, 0:pass them on
384 #define netxen_set_gb_drop_gb0(config_word) \
385 ((config_word) |= 1 << 0)
386 #define netxen_set_gb_drop_gb1(config_word) \
387 ((config_word) |= 1 << 1)
388 #define netxen_set_gb_drop_gb2(config_word) \
389 ((config_word) |= 1 << 2)
390 #define netxen_set_gb_drop_gb3(config_word) \
391 ((config_word) |= 1 << 3)
393 #define netxen_clear_gb_drop_gb0(config_word) \
394 ((config_word) &= ~(1 << 0))
395 #define netxen_clear_gb_drop_gb1(config_word) \
396 ((config_word) &= ~(1 << 1))
397 #define netxen_clear_gb_drop_gb2(config_word) \
398 ((config_word) &= ~(1 << 2))
399 #define netxen_clear_gb_drop_gb3(config_word) \
400 ((config_word) &= ~(1 << 3))
403 * NIU XG MAC Config Register
405 * Bit 0 : tx_enable => 1:enable frame xmit, 0:disable
406 * Bit 2 : rx_enable => 1:enable frame recv, 0:disable
407 * Bit 4 : soft_reset => 1:reset the MAC , 0:no-op
408 * Bit 27: xaui_framer_reset
409 * Bit 28: xaui_rx_reset
410 * Bit 29: xaui_tx_reset
411 * Bit 30: xg_ingress_afifo_reset
412 * Bit 31: xg_egress_afifo_reset
415 #define netxen_xg_soft_reset(config_word) \
416 ((config_word) |= 1 << 4)
418 /* Set promiscuous mode for a GbE interface */
419 int netxen_niu_set_promiscuous_mode(struct netxen_adapter *adapter,
421 int netxen_niu_xg_set_promiscuous_mode(struct netxen_adapter *adapter,
424 /* set the MAC address for a given MAC */
425 int netxen_niu_macaddr_set(struct netxen_adapter *adapter,
426 netxen_ethernet_macaddr_t addr);
429 int netxen_niu_xg_macaddr_set(struct netxen_adapter *adapter,
430 netxen_ethernet_macaddr_t addr);
432 /* Generic enable for GbE ports. Will detect the speed of the link. */
433 int netxen_niu_gbe_init_port(struct netxen_adapter *adapter, int port);
435 int netxen_niu_xg_init_port(struct netxen_adapter *adapter, int port);
437 /* Disable a GbE interface */
438 int netxen_niu_disable_gbe_port(struct netxen_adapter *adapter);
440 int netxen_niu_disable_xg_port(struct netxen_adapter *adapter);
447 } crb_128M_2M_sub_block_map_t;
450 crb_128M_2M_sub_block_map_t sub_block[16];
451 } crb_128M_2M_block_map_t;
453 #endif /* __NETXEN_NIC_HW_H_ */