1 /******************************************************************************
5 * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
7 * IMPORTANT: The included file nicstarmac.c was NOT WRITTEN BY ME.
8 * It was taken from the frle-0.22 device driver.
9 * As the file doesn't have a copyright notice, in the file
10 * nicstarmac.copyright I put the copyright notice from the
11 * frle-0.22 device driver.
12 * Some code is based on the nicstar driver by M. Welsh.
14 * Author: Rui Prior (rprior@inescn.pt)
15 * PowerPC support by Jay Talbott (jay_talbott@mcg.mot.com) April 1999
21 ******************************************************************************/
24 /**** IMPORTANT INFORMATION ***************************************************
26 * There are currently three types of spinlocks:
28 * 1 - Per card interrupt spinlock (to protect structures and such)
29 * 2 - Per SCQ scq spinlock
30 * 3 - Per card resource spinlock (to access registers, etc.)
32 * These must NEVER be grabbed in reverse order.
34 ******************************************************************************/
36 /* Header files ***************************************************************/
38 #include <linux/module.h>
39 #include <linux/config.h>
40 #include <linux/kernel.h>
41 #include <linux/skbuff.h>
42 #include <linux/atmdev.h>
43 #include <linux/atm.h>
44 #include <linux/pci.h>
45 #include <linux/types.h>
46 #include <linux/string.h>
47 #include <linux/delay.h>
48 #include <linux/init.h>
49 #include <linux/sched.h>
50 #include <linux/timer.h>
51 #include <linux/interrupt.h>
52 #include <linux/bitops.h>
54 #include <asm/uaccess.h>
55 #include <asm/atomic.h>
57 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
59 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
60 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
62 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
64 #if BITS_PER_LONG != 32
65 # error FIXME: this driver requires a 32-bit platform
68 /* Additional code ************************************************************/
70 #include "nicstarmac.c"
73 /* Configurable parameters ****************************************************/
81 #undef NS_USE_DESTRUCTORS /* For now keep this undefined unless you know
82 you're going to use only raw ATM */
85 /* Do not touch these *********************************************************/
88 #define TXPRINTK(args...) printk(args)
90 #define TXPRINTK(args...)
94 #define RXPRINTK(args...) printk(args)
96 #define RXPRINTK(args...)
100 #define PRINTK(args...) printk(args)
102 #define PRINTK(args...)
103 #endif /* GENERAL_DEBUG */
106 #define XPRINTK(args...) printk(args)
108 #define XPRINTK(args...)
109 #endif /* EXTRA_DEBUG */
112 /* Macros *********************************************************************/
114 #define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
116 #define NS_DELAY mdelay(1)
118 #define ALIGN_BUS_ADDR(addr, alignment) \
119 ((((u32) (addr)) + (((u32) (alignment)) - 1)) & ~(((u32) (alignment)) - 1))
120 #define ALIGN_ADDRESS(addr, alignment) \
121 bus_to_virt(ALIGN_BUS_ADDR(virt_to_bus(addr), alignment))
126 #define ATM_SKB(s) (&(s)->atm)
129 /* Spinlock debugging stuff */
130 #ifdef NS_DEBUG_SPINLOCKS /* See nicstar.h */
131 #define ns_grab_int_lock(card,flags) \
133 unsigned long nsdsf, nsdsf2; \
134 local_irq_save(flags); \
135 save_flags(nsdsf); cli();\
136 if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
137 (flags)&(1<<9)?"en":"dis"); \
138 if (spin_is_locked(&(card)->int_lock) && \
139 (card)->cpu_int == smp_processor_id()) { \
140 printk("nicstar.c: line %d (cpu %d) int_lock already locked at line %d (cpu %d)\n", \
141 __LINE__, smp_processor_id(), (card)->has_int_lock, \
143 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
145 if (spin_is_locked(&(card)->res_lock) && \
146 (card)->cpu_res == smp_processor_id()) { \
147 printk("nicstar.c: line %d (cpu %d) res_lock locked at line %d (cpu %d)(trying int)\n", \
148 __LINE__, smp_processor_id(), (card)->has_res_lock, \
150 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
152 spin_lock_irq(&(card)->int_lock); \
153 (card)->has_int_lock = __LINE__; \
154 (card)->cpu_int = smp_processor_id(); \
155 restore_flags(nsdsf); } while (0)
156 #define ns_grab_res_lock(card,flags) \
158 unsigned long nsdsf, nsdsf2; \
159 local_irq_save(flags); \
160 save_flags(nsdsf); cli();\
161 if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
162 (flags)&(1<<9)?"en":"dis"); \
163 if (spin_is_locked(&(card)->res_lock) && \
164 (card)->cpu_res == smp_processor_id()) { \
165 printk("nicstar.c: line %d (cpu %d) res_lock already locked at line %d (cpu %d)\n", \
166 __LINE__, smp_processor_id(), (card)->has_res_lock, \
168 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
170 spin_lock_irq(&(card)->res_lock); \
171 (card)->has_res_lock = __LINE__; \
172 (card)->cpu_res = smp_processor_id(); \
173 restore_flags(nsdsf); } while (0)
174 #define ns_grab_scq_lock(card,scq,flags) \
176 unsigned long nsdsf, nsdsf2; \
177 local_irq_save(flags); \
178 save_flags(nsdsf); cli();\
179 if (nsdsf & (1<<9)) printk ("nicstar.c: ints %sabled -> enabled.\n", \
180 (flags)&(1<<9)?"en":"dis"); \
181 if (spin_is_locked(&(scq)->lock) && \
182 (scq)->cpu_lock == smp_processor_id()) { \
183 printk("nicstar.c: line %d (cpu %d) this scq_lock already locked at line %d (cpu %d)\n", \
184 __LINE__, smp_processor_id(), (scq)->has_lock, \
186 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
188 if (spin_is_locked(&(card)->res_lock) && \
189 (card)->cpu_res == smp_processor_id()) { \
190 printk("nicstar.c: line %d (cpu %d) res_lock locked at line %d (cpu %d)(trying scq)\n", \
191 __LINE__, smp_processor_id(), (card)->has_res_lock, \
193 printk("nicstar.c: ints were %sabled.\n", ((flags)&(1<<9)?"en":"dis")); \
195 spin_lock_irq(&(scq)->lock); \
196 (scq)->has_lock = __LINE__; \
197 (scq)->cpu_lock = smp_processor_id(); \
198 restore_flags(nsdsf); } while (0)
199 #else /* !NS_DEBUG_SPINLOCKS */
200 #define ns_grab_int_lock(card,flags) \
201 spin_lock_irqsave(&(card)->int_lock,(flags))
202 #define ns_grab_res_lock(card,flags) \
203 spin_lock_irqsave(&(card)->res_lock,(flags))
204 #define ns_grab_scq_lock(card,scq,flags) \
205 spin_lock_irqsave(&(scq)->lock,flags)
206 #endif /* NS_DEBUG_SPINLOCKS */
209 /* Function declarations ******************************************************/
211 static u32 ns_read_sram(ns_dev *card, u32 sram_address);
212 static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count);
213 static int __devinit ns_init_card(int i, struct pci_dev *pcidev);
214 static void __devinit ns_init_card_error(ns_dev *card, int error);
215 static scq_info *get_scq(int size, u32 scd);
216 static void free_scq(scq_info *scq, struct atm_vcc *vcc);
217 static void push_rxbufs(ns_dev *, struct sk_buff *);
218 static irqreturn_t ns_irq_handler(int irq, void *dev_id, struct pt_regs *regs);
219 static int ns_open(struct atm_vcc *vcc);
220 static void ns_close(struct atm_vcc *vcc);
221 static void fill_tst(ns_dev *card, int n, vc_map *vc);
222 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
223 static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
224 struct sk_buff *skb);
225 static void process_tsq(ns_dev *card);
226 static void drain_scq(ns_dev *card, scq_info *scq, int pos);
227 static void process_rsq(ns_dev *card);
228 static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe);
229 #ifdef NS_USE_DESTRUCTORS
230 static void ns_sb_destructor(struct sk_buff *sb);
231 static void ns_lb_destructor(struct sk_buff *lb);
232 static void ns_hb_destructor(struct sk_buff *hb);
233 #endif /* NS_USE_DESTRUCTORS */
234 static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb);
235 static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count);
236 static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb);
237 static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb);
238 static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb);
239 static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page);
240 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg);
241 static void which_list(ns_dev *card, struct sk_buff *skb);
242 static void ns_poll(unsigned long arg);
243 static int ns_parse_mac(char *mac, unsigned char *esi);
244 static short ns_h2i(char c);
245 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
247 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
251 /* Global variables ***********************************************************/
253 static struct ns_dev *cards[NS_MAX_CARDS];
254 static unsigned num_cards;
255 static struct atmdev_ops atm_ops =
261 .phy_put = ns_phy_put,
262 .phy_get = ns_phy_get,
263 .proc_read = ns_proc_read,
264 .owner = THIS_MODULE,
266 static struct timer_list ns_timer;
267 static char *mac[NS_MAX_CARDS];
268 module_param_array(mac, charp, NULL, 0);
269 MODULE_LICENSE("GPL");
272 /* Functions*******************************************************************/
274 static int __devinit nicstar_init_one(struct pci_dev *pcidev,
275 const struct pci_device_id *ent)
277 static int index = -1;
283 error = ns_init_card(index, pcidev);
285 cards[index--] = NULL; /* don't increment index */
296 static void __devexit nicstar_remove_one(struct pci_dev *pcidev)
299 ns_dev *card = pci_get_drvdata(pcidev);
301 struct sk_buff *iovb;
307 if (cards[i] == NULL)
310 if (card->atmdev->phy && card->atmdev->phy->stop)
311 card->atmdev->phy->stop(card->atmdev);
313 /* Stop everything */
314 writel(0x00000000, card->membase + CFG);
316 /* De-register device */
317 atm_dev_deregister(card->atmdev);
319 /* Disable PCI device */
320 pci_disable_device(pcidev);
322 /* Free up resources */
324 PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
325 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
327 dev_kfree_skb_any(hb);
330 PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
332 PRINTK("nicstar%d: freeing %d iovec buffers.\n", i, card->iovpool.count);
333 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
335 dev_kfree_skb_any(iovb);
338 PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j);
339 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
340 dev_kfree_skb_any(lb);
341 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
342 dev_kfree_skb_any(sb);
343 free_scq(card->scq0, NULL);
344 for (j = 0; j < NS_FRSCD_NUM; j++)
346 if (card->scd2vc[j] != NULL)
347 free_scq(card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
349 kfree(card->rsq.org);
350 kfree(card->tsq.org);
351 free_irq(card->pcidev->irq, card);
352 iounmap(card->membase);
358 static struct pci_device_id nicstar_pci_tbl[] __devinitdata =
360 {PCI_VENDOR_ID_IDT, PCI_DEVICE_ID_IDT_IDT77201,
361 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
362 {0,} /* terminate list */
364 MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
368 static struct pci_driver nicstar_driver = {
370 .id_table = nicstar_pci_tbl,
371 .probe = nicstar_init_one,
372 .remove = __devexit_p(nicstar_remove_one),
377 static int __init nicstar_init(void)
379 unsigned error = 0; /* Initialized to remove compile warning */
381 XPRINTK("nicstar: nicstar_init() called.\n");
383 error = pci_register_driver(&nicstar_driver);
385 TXPRINTK("nicstar: TX debug enabled.\n");
386 RXPRINTK("nicstar: RX debug enabled.\n");
387 PRINTK("nicstar: General debug enabled.\n");
389 printk("nicstar: using PHY loopback.\n");
390 #endif /* PHY_LOOPBACK */
391 XPRINTK("nicstar: nicstar_init() returned.\n");
394 init_timer(&ns_timer);
395 ns_timer.expires = jiffies + NS_POLL_PERIOD;
397 ns_timer.function = ns_poll;
398 add_timer(&ns_timer);
406 static void __exit nicstar_cleanup(void)
408 XPRINTK("nicstar: nicstar_cleanup() called.\n");
410 del_timer(&ns_timer);
412 pci_unregister_driver(&nicstar_driver);
414 XPRINTK("nicstar: nicstar_cleanup() returned.\n");
419 static u32 ns_read_sram(ns_dev *card, u32 sram_address)
424 sram_address &= 0x0007FFFC; /* address must be dword aligned */
425 sram_address |= 0x50000000; /* SRAM read command */
426 ns_grab_res_lock(card, flags);
427 while (CMD_BUSY(card));
428 writel(sram_address, card->membase + CMD);
429 while (CMD_BUSY(card));
430 data = readl(card->membase + DR0);
431 spin_unlock_irqrestore(&card->res_lock, flags);
437 static void ns_write_sram(ns_dev *card, u32 sram_address, u32 *value, int count)
441 count--; /* count range now is 0..3 instead of 1..4 */
443 c <<= 2; /* to use increments of 4 */
444 ns_grab_res_lock(card, flags);
445 while (CMD_BUSY(card));
446 for (i = 0; i <= c; i += 4)
447 writel(*(value++), card->membase + i);
448 /* Note: DR# registers are the first 4 dwords in nicstar's memspace,
449 so card->membase + DR0 == card->membase */
451 sram_address &= 0x0007FFFC;
452 sram_address |= (0x40000000 | count);
453 writel(sram_address, card->membase + CMD);
454 spin_unlock_irqrestore(&card->res_lock, flags);
458 static int __devinit ns_init_card(int i, struct pci_dev *pcidev)
461 struct ns_dev *card = NULL;
462 unsigned char pci_latency;
468 unsigned long membase;
472 if (pci_enable_device(pcidev))
474 printk("nicstar%d: can't enable PCI device\n", i);
476 ns_init_card_error(card, error);
480 if ((card = kmalloc(sizeof(ns_dev), GFP_KERNEL)) == NULL)
482 printk("nicstar%d: can't allocate memory for device structure.\n", i);
484 ns_init_card_error(card, error);
488 spin_lock_init(&card->int_lock);
489 spin_lock_init(&card->res_lock);
491 pci_set_drvdata(pcidev, card);
495 card->pcidev = pcidev;
496 membase = pci_resource_start(pcidev, 1);
497 card->membase = ioremap(membase, NS_IOREMAP_SIZE);
498 if (card->membase == 0)
500 printk("nicstar%d: can't ioremap() membase.\n",i);
502 ns_init_card_error(card, error);
505 PRINTK("nicstar%d: membase at 0x%x.\n", i, card->membase);
507 pci_set_master(pcidev);
509 if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0)
511 printk("nicstar%d: can't read PCI latency timer.\n", i);
513 ns_init_card_error(card, error);
516 #ifdef NS_PCI_LATENCY
517 if (pci_latency < NS_PCI_LATENCY)
519 PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
520 for (j = 1; j < 4; j++)
522 if (pci_write_config_byte(pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
527 printk("nicstar%d: can't set PCI latency timer to %d.\n", i, NS_PCI_LATENCY);
529 ns_init_card_error(card, error);
533 #endif /* NS_PCI_LATENCY */
535 /* Clear timer overflow */
536 data = readl(card->membase + STAT);
537 if (data & NS_STAT_TMROF)
538 writel(NS_STAT_TMROF, card->membase + STAT);
541 writel(NS_CFG_SWRST, card->membase + CFG);
543 writel(0x00000000, card->membase + CFG);
546 writel(0x00000008, card->membase + GP);
548 writel(0x00000001, card->membase + GP);
550 while (CMD_BUSY(card));
551 writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */
554 /* Detect PHY type */
555 while (CMD_BUSY(card));
556 writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
557 while (CMD_BUSY(card));
558 data = readl(card->membase + DR0);
561 printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
562 card->max_pcr = ATM_25_PCR;
563 while(CMD_BUSY(card));
564 writel(0x00000008, card->membase + DR0);
565 writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
566 /* Clear an eventual pending interrupt */
567 writel(NS_STAT_SFBQF, card->membase + STAT);
569 while(CMD_BUSY(card));
570 writel(0x00000022, card->membase + DR0);
571 writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
572 #endif /* PHY_LOOPBACK */
576 printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
577 card->max_pcr = ATM_OC3_PCR;
579 while(CMD_BUSY(card));
580 writel(0x00000002, card->membase + DR0);
581 writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
582 #endif /* PHY_LOOPBACK */
585 printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data);
587 ns_init_card_error(card, error);
590 writel(0x00000000, card->membase + GP);
592 /* Determine SRAM size */
594 ns_write_sram(card, 0x1C003, &data, 1);
596 ns_write_sram(card, 0x14003, &data, 1);
597 if (ns_read_sram(card, 0x14003) == 0x89ABCDEF &&
598 ns_read_sram(card, 0x1C003) == 0x76543210)
599 card->sram_size = 128;
601 card->sram_size = 32;
602 PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size);
604 card->rct_size = NS_MAX_RCTSIZE;
606 #if (NS_MAX_RCTSIZE == 4096)
607 if (card->sram_size == 128)
608 printk("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n", i);
609 #elif (NS_MAX_RCTSIZE == 16384)
610 if (card->sram_size == 32)
612 printk("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n", i);
613 card->rct_size = 4096;
616 #error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c
619 card->vpibits = NS_VPIBITS;
620 if (card->rct_size == 4096)
621 card->vcibits = 12 - NS_VPIBITS;
622 else /* card->rct_size == 16384 */
623 card->vcibits = 14 - NS_VPIBITS;
625 /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */
627 nicstar_init_eprom(card->membase);
629 if (request_irq(pcidev->irq, &ns_irq_handler, SA_INTERRUPT | SA_SHIRQ, "nicstar", card) != 0)
631 printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
633 ns_init_card_error(card, error);
637 /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */
638 writel(0x00000000, card->membase + VPM);
641 card->tsq.org = kmalloc(NS_TSQSIZE + NS_TSQ_ALIGNMENT, GFP_KERNEL);
642 if (card->tsq.org == NULL)
644 printk("nicstar%d: can't allocate TSQ.\n", i);
646 ns_init_card_error(card, error);
649 card->tsq.base = (ns_tsi *) ALIGN_ADDRESS(card->tsq.org, NS_TSQ_ALIGNMENT);
650 card->tsq.next = card->tsq.base;
651 card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
652 for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
653 ns_tsi_init(card->tsq.base + j);
654 writel(0x00000000, card->membase + TSQH);
655 writel((u32) virt_to_bus(card->tsq.base), card->membase + TSQB);
656 PRINTK("nicstar%d: TSQ base at 0x%x 0x%x 0x%x.\n", i, (u32) card->tsq.base,
657 (u32) virt_to_bus(card->tsq.base), readl(card->membase + TSQB));
660 card->rsq.org = kmalloc(NS_RSQSIZE + NS_RSQ_ALIGNMENT, GFP_KERNEL);
661 if (card->rsq.org == NULL)
663 printk("nicstar%d: can't allocate RSQ.\n", i);
665 ns_init_card_error(card, error);
668 card->rsq.base = (ns_rsqe *) ALIGN_ADDRESS(card->rsq.org, NS_RSQ_ALIGNMENT);
669 card->rsq.next = card->rsq.base;
670 card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
671 for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
672 ns_rsqe_init(card->rsq.base + j);
673 writel(0x00000000, card->membase + RSQH);
674 writel((u32) virt_to_bus(card->rsq.base), card->membase + RSQB);
675 PRINTK("nicstar%d: RSQ base at 0x%x.\n", i, (u32) card->rsq.base);
677 /* Initialize SCQ0, the only VBR SCQ used */
680 card->scq0 = get_scq(VBR_SCQSIZE, NS_VRSCD0);
681 if (card->scq0 == NULL)
683 printk("nicstar%d: can't get SCQ0.\n", i);
685 ns_init_card_error(card, error);
688 u32d[0] = (u32) virt_to_bus(card->scq0->base);
689 u32d[1] = (u32) 0x00000000;
690 u32d[2] = (u32) 0xffffffff;
691 u32d[3] = (u32) 0x00000000;
692 ns_write_sram(card, NS_VRSCD0, u32d, 4);
693 ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */
694 ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */
695 card->scq0->scd = NS_VRSCD0;
696 PRINTK("nicstar%d: VBR-SCQ0 base at 0x%x.\n", i, (u32) card->scq0->base);
698 /* Initialize TSTs */
699 card->tst_addr = NS_TST0;
700 card->tst_free_entries = NS_TST_NUM_ENTRIES;
701 data = NS_TST_OPCODE_VARIABLE;
702 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
703 ns_write_sram(card, NS_TST0 + j, &data, 1);
704 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0);
705 ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1);
706 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
707 ns_write_sram(card, NS_TST1 + j, &data, 1);
708 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1);
709 ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1);
710 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
711 card->tste2vc[j] = NULL;
712 writel(NS_TST0 << 2, card->membase + TSTB);
715 /* Initialize RCT. AAL type is set on opening the VC. */
717 u32d[0] = NS_RCTE_RAWCELLINTEN;
719 u32d[0] = 0x00000000;
720 #endif /* RCQ_SUPPORT */
721 u32d[1] = 0x00000000;
722 u32d[2] = 0x00000000;
723 u32d[3] = 0xFFFFFFFF;
724 for (j = 0; j < card->rct_size; j++)
725 ns_write_sram(card, j * 4, u32d, 4);
727 memset(card->vcmap, 0, NS_MAX_RCTSIZE * sizeof(vc_map));
729 for (j = 0; j < NS_FRSCD_NUM; j++)
730 card->scd2vc[j] = NULL;
732 /* Initialize buffer levels */
733 card->sbnr.min = MIN_SB;
734 card->sbnr.init = NUM_SB;
735 card->sbnr.max = MAX_SB;
736 card->lbnr.min = MIN_LB;
737 card->lbnr.init = NUM_LB;
738 card->lbnr.max = MAX_LB;
739 card->iovnr.min = MIN_IOVB;
740 card->iovnr.init = NUM_IOVB;
741 card->iovnr.max = MAX_IOVB;
742 card->hbnr.min = MIN_HB;
743 card->hbnr.init = NUM_HB;
744 card->hbnr.max = MAX_HB;
746 card->sm_handle = 0x00000000;
747 card->sm_addr = 0x00000000;
748 card->lg_handle = 0x00000000;
749 card->lg_addr = 0x00000000;
751 card->efbie = 1; /* To prevent push_rxbufs from enabling the interrupt */
753 /* Pre-allocate some huge buffers */
754 skb_queue_head_init(&card->hbpool.queue);
755 card->hbpool.count = 0;
756 for (j = 0; j < NUM_HB; j++)
759 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
762 printk("nicstar%d: can't allocate %dth of %d huge buffers.\n",
765 ns_init_card_error(card, error);
768 NS_SKB_CB(hb)->buf_type = BUF_NONE;
769 skb_queue_tail(&card->hbpool.queue, hb);
770 card->hbpool.count++;
774 /* Allocate large buffers */
775 skb_queue_head_init(&card->lbpool.queue);
776 card->lbpool.count = 0; /* Not used */
777 for (j = 0; j < NUM_LB; j++)
780 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
783 printk("nicstar%d: can't allocate %dth of %d large buffers.\n",
786 ns_init_card_error(card, error);
789 NS_SKB_CB(lb)->buf_type = BUF_LG;
790 skb_queue_tail(&card->lbpool.queue, lb);
791 skb_reserve(lb, NS_SMBUFSIZE);
792 push_rxbufs(card, lb);
793 /* Due to the implementation of push_rxbufs() this is 1, not 0 */
797 card->rawch = (u32) virt_to_bus(lb->data);
800 /* Test for strange behaviour which leads to crashes */
801 if ((bcount = ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min)
803 printk("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
806 ns_init_card_error(card, error);
811 /* Allocate small buffers */
812 skb_queue_head_init(&card->sbpool.queue);
813 card->sbpool.count = 0; /* Not used */
814 for (j = 0; j < NUM_SB; j++)
817 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
820 printk("nicstar%d: can't allocate %dth of %d small buffers.\n",
823 ns_init_card_error(card, error);
826 NS_SKB_CB(sb)->buf_type = BUF_SM;
827 skb_queue_tail(&card->sbpool.queue, sb);
828 skb_reserve(sb, NS_AAL0_HEADER);
829 push_rxbufs(card, sb);
831 /* Test for strange behaviour which leads to crashes */
832 if ((bcount = ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min)
834 printk("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
837 ns_init_card_error(card, error);
842 /* Allocate iovec buffers */
843 skb_queue_head_init(&card->iovpool.queue);
844 card->iovpool.count = 0;
845 for (j = 0; j < NUM_IOVB; j++)
847 struct sk_buff *iovb;
848 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
851 printk("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
854 ns_init_card_error(card, error);
857 NS_SKB_CB(iovb)->buf_type = BUF_NONE;
858 skb_queue_tail(&card->iovpool.queue, iovb);
859 card->iovpool.count++;
864 /* Configure NICStAR */
865 if (card->rct_size == 4096)
866 ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES;
867 else /* (card->rct_size == 16384) */
868 ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES;
872 /* Register device */
873 card->atmdev = atm_dev_register("nicstar", &atm_ops, -1, NULL);
874 if (card->atmdev == NULL)
876 printk("nicstar%d: can't register device.\n", i);
878 ns_init_card_error(card, error);
882 if (ns_parse_mac(mac[i], card->atmdev->esi)) {
883 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
884 card->atmdev->esi, 6);
885 if (memcmp(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00", 6) == 0) {
886 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
887 card->atmdev->esi, 6);
891 printk("nicstar%d: MAC address %02X:%02X:%02X:%02X:%02X:%02X\n", i,
892 card->atmdev->esi[0], card->atmdev->esi[1], card->atmdev->esi[2],
893 card->atmdev->esi[3], card->atmdev->esi[4], card->atmdev->esi[5]);
895 card->atmdev->dev_data = card;
896 card->atmdev->ci_range.vpi_bits = card->vpibits;
897 card->atmdev->ci_range.vci_bits = card->vcibits;
898 card->atmdev->link_rate = card->max_pcr;
899 card->atmdev->phy = NULL;
901 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
902 if (card->max_pcr == ATM_OC3_PCR)
903 suni_init(card->atmdev);
904 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
906 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
907 if (card->max_pcr == ATM_25_PCR)
908 idt77105_init(card->atmdev);
909 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
911 if (card->atmdev->phy && card->atmdev->phy->start)
912 card->atmdev->phy->start(card->atmdev);
914 writel(NS_CFG_RXPATH |
921 NS_CFG_RXINT_NODELAY |
922 NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
926 NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
928 card->membase + CFG);
937 static void __devinit ns_init_card_error(ns_dev *card, int error)
941 writel(0x00000000, card->membase + CFG);
945 struct sk_buff *iovb;
946 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
947 dev_kfree_skb_any(iovb);
952 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
953 dev_kfree_skb_any(sb);
954 free_scq(card->scq0, NULL);
959 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
960 dev_kfree_skb_any(lb);
965 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
966 dev_kfree_skb_any(hb);
970 kfree(card->rsq.org);
974 kfree(card->tsq.org);
978 free_irq(card->pcidev->irq, card);
982 iounmap(card->membase);
986 pci_disable_device(card->pcidev);
993 static scq_info *get_scq(int size, u32 scd)
998 if (size != VBR_SCQSIZE && size != CBR_SCQSIZE)
1001 scq = (scq_info *) kmalloc(sizeof(scq_info), GFP_KERNEL);
1004 scq->org = kmalloc(2 * size, GFP_KERNEL);
1005 if (scq->org == NULL)
1010 scq->skb = (struct sk_buff **) kmalloc(sizeof(struct sk_buff *) *
1011 (size / NS_SCQE_SIZE), GFP_KERNEL);
1012 if (scq->skb == NULL)
1018 scq->num_entries = size / NS_SCQE_SIZE;
1019 scq->base = (ns_scqe *) ALIGN_ADDRESS(scq->org, size);
1020 scq->next = scq->base;
1021 scq->last = scq->base + (scq->num_entries - 1);
1022 scq->tail = scq->last;
1024 scq->num_entries = size / NS_SCQE_SIZE;
1026 init_waitqueue_head(&scq->scqfull_waitq);
1028 spin_lock_init(&scq->lock);
1030 for (i = 0; i < scq->num_entries; i++)
1038 /* For variable rate SCQ vcc must be NULL */
1039 static void free_scq(scq_info *scq, struct atm_vcc *vcc)
1043 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
1044 for (i = 0; i < scq->num_entries; i++)
1046 if (scq->skb[i] != NULL)
1048 vcc = ATM_SKB(scq->skb[i])->vcc;
1049 if (vcc->pop != NULL)
1050 vcc->pop(vcc, scq->skb[i]);
1052 dev_kfree_skb_any(scq->skb[i]);
1055 else /* vcc must be != NULL */
1059 printk("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
1060 for (i = 0; i < scq->num_entries; i++)
1061 dev_kfree_skb_any(scq->skb[i]);
1064 for (i = 0; i < scq->num_entries; i++)
1066 if (scq->skb[i] != NULL)
1068 if (vcc->pop != NULL)
1069 vcc->pop(vcc, scq->skb[i]);
1071 dev_kfree_skb_any(scq->skb[i]);
1082 /* The handles passed must be pointers to the sk_buff containing the small
1083 or large buffer(s) cast to u32. */
1084 static void push_rxbufs(ns_dev *card, struct sk_buff *skb)
1086 struct ns_skb_cb *cb = NS_SKB_CB(skb);
1090 unsigned long flags;
1093 handle2 = addr2 = 0;
1095 addr1 = (u32)virt_to_bus(skb->data);
1097 #ifdef GENERAL_DEBUG
1099 printk("nicstar%d: push_rxbufs called with addr1 = 0.\n", card->index);
1100 #endif /* GENERAL_DEBUG */
1102 stat = readl(card->membase + STAT);
1103 card->sbfqc = ns_stat_sfbqc_get(stat);
1104 card->lbfqc = ns_stat_lfbqc_get(stat);
1105 if (cb->buf_type == BUF_SM)
1111 addr2 = card->sm_addr;
1112 handle2 = card->sm_handle;
1113 card->sm_addr = 0x00000000;
1114 card->sm_handle = 0x00000000;
1116 else /* (!sm_addr) */
1118 card->sm_addr = addr1;
1119 card->sm_handle = handle1;
1123 else /* buf_type == BUF_LG */
1129 addr2 = card->lg_addr;
1130 handle2 = card->lg_handle;
1131 card->lg_addr = 0x00000000;
1132 card->lg_handle = 0x00000000;
1134 else /* (!lg_addr) */
1136 card->lg_addr = addr1;
1137 card->lg_handle = handle1;
1144 if (cb->buf_type == BUF_SM)
1146 if (card->sbfqc >= card->sbnr.max)
1148 skb_unlink((struct sk_buff *) handle1, &card->sbpool.queue);
1149 dev_kfree_skb_any((struct sk_buff *) handle1);
1150 skb_unlink((struct sk_buff *) handle2, &card->sbpool.queue);
1151 dev_kfree_skb_any((struct sk_buff *) handle2);
1157 else /* (buf_type == BUF_LG) */
1159 if (card->lbfqc >= card->lbnr.max)
1161 skb_unlink((struct sk_buff *) handle1, &card->lbpool.queue);
1162 dev_kfree_skb_any((struct sk_buff *) handle1);
1163 skb_unlink((struct sk_buff *) handle2, &card->lbpool.queue);
1164 dev_kfree_skb_any((struct sk_buff *) handle2);
1171 ns_grab_res_lock(card, flags);
1173 while (CMD_BUSY(card));
1174 writel(addr2, card->membase + DR3);
1175 writel(handle2, card->membase + DR2);
1176 writel(addr1, card->membase + DR1);
1177 writel(handle1, card->membase + DR0);
1178 writel(NS_CMD_WRITE_FREEBUFQ | cb->buf_type, card->membase + CMD);
1180 spin_unlock_irqrestore(&card->res_lock, flags);
1182 XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n", card->index,
1183 (cb->buf_type == BUF_SM ? "small" : "large"), addr1, addr2);
1186 if (!card->efbie && card->sbfqc >= card->sbnr.min &&
1187 card->lbfqc >= card->lbnr.min)
1190 writel((readl(card->membase + CFG) | NS_CFG_EFBIE), card->membase + CFG);
1198 static irqreturn_t ns_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
1202 struct atm_dev *dev;
1203 unsigned long flags;
1205 card = (ns_dev *) dev_id;
1209 PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index);
1211 ns_grab_int_lock(card, flags);
1213 stat_r = readl(card->membase + STAT);
1215 /* Transmit Status Indicator has been written to T. S. Queue */
1216 if (stat_r & NS_STAT_TSIF)
1218 TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
1220 writel(NS_STAT_TSIF, card->membase + STAT);
1223 /* Incomplete CS-PDU has been transmitted */
1224 if (stat_r & NS_STAT_TXICP)
1226 writel(NS_STAT_TXICP, card->membase + STAT);
1227 TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
1231 /* Transmit Status Queue 7/8 full */
1232 if (stat_r & NS_STAT_TSQF)
1234 writel(NS_STAT_TSQF, card->membase + STAT);
1235 PRINTK("nicstar%d: TSQ full.\n", card->index);
1239 /* Timer overflow */
1240 if (stat_r & NS_STAT_TMROF)
1242 writel(NS_STAT_TMROF, card->membase + STAT);
1243 PRINTK("nicstar%d: Timer overflow.\n", card->index);
1246 /* PHY device interrupt signal active */
1247 if (stat_r & NS_STAT_PHYI)
1249 writel(NS_STAT_PHYI, card->membase + STAT);
1250 PRINTK("nicstar%d: PHY interrupt.\n", card->index);
1251 if (dev->phy && dev->phy->interrupt) {
1252 dev->phy->interrupt(dev);
1256 /* Small Buffer Queue is full */
1257 if (stat_r & NS_STAT_SFBQF)
1259 writel(NS_STAT_SFBQF, card->membase + STAT);
1260 printk("nicstar%d: Small free buffer queue is full.\n", card->index);
1263 /* Large Buffer Queue is full */
1264 if (stat_r & NS_STAT_LFBQF)
1266 writel(NS_STAT_LFBQF, card->membase + STAT);
1267 printk("nicstar%d: Large free buffer queue is full.\n", card->index);
1270 /* Receive Status Queue is full */
1271 if (stat_r & NS_STAT_RSQF)
1273 writel(NS_STAT_RSQF, card->membase + STAT);
1274 printk("nicstar%d: RSQ full.\n", card->index);
1278 /* Complete CS-PDU received */
1279 if (stat_r & NS_STAT_EOPDU)
1281 RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
1283 writel(NS_STAT_EOPDU, card->membase + STAT);
1286 /* Raw cell received */
1287 if (stat_r & NS_STAT_RAWCF)
1289 writel(NS_STAT_RAWCF, card->membase + STAT);
1291 printk("nicstar%d: Raw cell received and no support yet...\n",
1293 #endif /* RCQ_SUPPORT */
1294 /* NOTE: the following procedure may keep a raw cell pending until the
1295 next interrupt. As this preliminary support is only meant to
1296 avoid buffer leakage, this is not an issue. */
1297 while (readl(card->membase + RAWCT) != card->rawch)
1301 rawcell = (ns_rcqe *) bus_to_virt(card->rawch);
1302 if (ns_rcqe_islast(rawcell))
1304 struct sk_buff *oldbuf;
1306 oldbuf = card->rcbuf;
1307 card->rcbuf = (struct sk_buff *) ns_rcqe_nextbufhandle(rawcell);
1308 card->rawch = (u32) virt_to_bus(card->rcbuf->data);
1309 recycle_rx_buf(card, oldbuf);
1312 card->rawch += NS_RCQE_SIZE;
1316 /* Small buffer queue is empty */
1317 if (stat_r & NS_STAT_SFBQE)
1322 writel(NS_STAT_SFBQE, card->membase + STAT);
1323 printk("nicstar%d: Small free buffer queue empty.\n",
1325 for (i = 0; i < card->sbnr.min; i++)
1327 sb = dev_alloc_skb(NS_SMSKBSIZE);
1330 writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
1334 NS_SKB_CB(sb)->buf_type = BUF_SM;
1335 skb_queue_tail(&card->sbpool.queue, sb);
1336 skb_reserve(sb, NS_AAL0_HEADER);
1337 push_rxbufs(card, sb);
1343 /* Large buffer queue empty */
1344 if (stat_r & NS_STAT_LFBQE)
1349 writel(NS_STAT_LFBQE, card->membase + STAT);
1350 printk("nicstar%d: Large free buffer queue empty.\n",
1352 for (i = 0; i < card->lbnr.min; i++)
1354 lb = dev_alloc_skb(NS_LGSKBSIZE);
1357 writel(readl(card->membase + CFG) & ~NS_CFG_EFBIE, card->membase + CFG);
1361 NS_SKB_CB(lb)->buf_type = BUF_LG;
1362 skb_queue_tail(&card->lbpool.queue, lb);
1363 skb_reserve(lb, NS_SMBUFSIZE);
1364 push_rxbufs(card, lb);
1370 /* Receive Status Queue is 7/8 full */
1371 if (stat_r & NS_STAT_RSQAF)
1373 writel(NS_STAT_RSQAF, card->membase + STAT);
1374 RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
1378 spin_unlock_irqrestore(&card->int_lock, flags);
1379 PRINTK("nicstar%d: end of interrupt service\n", card->index);
1385 static int ns_open(struct atm_vcc *vcc)
1389 unsigned long tmpl, modl;
1390 int tcr, tcra; /* target cell rate, and absolute value */
1391 int n = 0; /* Number of entries in the TST. Initialized to remove
1392 the compiler warning. */
1394 int frscdi = 0; /* Index of the SCD. Initialized to remove the compiler
1395 warning. How I wish compilers were clever enough to
1396 tell which variables can truly be used
1398 int inuse; /* tx or rx vc already in use by another vcc */
1399 short vpi = vcc->vpi;
1402 card = (ns_dev *) vcc->dev->dev_data;
1403 PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int) vpi, vci);
1404 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
1406 PRINTK("nicstar%d: unsupported AAL.\n", card->index);
1410 vc = &(card->vcmap[vpi << card->vcibits | vci]);
1414 if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx)
1416 if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
1420 printk("nicstar%d: %s vci already in use.\n", card->index,
1421 inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
1425 set_bit(ATM_VF_ADDR,&vcc->flags);
1427 /* NOTE: You are not allowed to modify an open connection's QOS. To change
1428 that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
1429 needed to do that. */
1430 if (!test_bit(ATM_VF_PARTIAL,&vcc->flags))
1434 set_bit(ATM_VF_PARTIAL,&vcc->flags);
1435 if (vcc->qos.txtp.traffic_class == ATM_CBR)
1437 /* Check requested cell rate and availability of SCD */
1438 if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0 &&
1439 vcc->qos.txtp.min_pcr == 0)
1441 PRINTK("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
1443 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1444 clear_bit(ATM_VF_ADDR,&vcc->flags);
1448 tcr = atm_pcr_goal(&(vcc->qos.txtp));
1449 tcra = tcr >= 0 ? tcr : -tcr;
1451 PRINTK("nicstar%d: target cell rate = %d.\n", card->index,
1452 vcc->qos.txtp.max_pcr);
1454 tmpl = (unsigned long)tcra * (unsigned long)NS_TST_NUM_ENTRIES;
1455 modl = tmpl % card->max_pcr;
1457 n = (int)(tmpl / card->max_pcr);
1464 if ((n = (card->tst_free_entries - NS_TST_RESERVED)) <= 0)
1466 PRINTK("nicstar%d: no CBR bandwidth free.\n", card->index);
1467 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1468 clear_bit(ATM_VF_ADDR,&vcc->flags);
1475 printk("nicstar%d: selected bandwidth < granularity.\n", card->index);
1476 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1477 clear_bit(ATM_VF_ADDR,&vcc->flags);
1481 if (n > (card->tst_free_entries - NS_TST_RESERVED))
1483 PRINTK("nicstar%d: not enough free CBR bandwidth.\n", card->index);
1484 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1485 clear_bit(ATM_VF_ADDR,&vcc->flags);
1489 card->tst_free_entries -= n;
1491 XPRINTK("nicstar%d: writing %d tst entries.\n", card->index, n);
1492 for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++)
1494 if (card->scd2vc[frscdi] == NULL)
1496 card->scd2vc[frscdi] = vc;
1500 if (frscdi == NS_FRSCD_NUM)
1502 PRINTK("nicstar%d: no SCD available for CBR channel.\n", card->index);
1503 card->tst_free_entries += n;
1504 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1505 clear_bit(ATM_VF_ADDR,&vcc->flags);
1509 vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
1511 scq = get_scq(CBR_SCQSIZE, vc->cbr_scd);
1514 PRINTK("nicstar%d: can't get fixed rate SCQ.\n", card->index);
1515 card->scd2vc[frscdi] = NULL;
1516 card->tst_free_entries += n;
1517 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1518 clear_bit(ATM_VF_ADDR,&vcc->flags);
1522 u32d[0] = (u32) virt_to_bus(scq->base);
1523 u32d[1] = (u32) 0x00000000;
1524 u32d[2] = (u32) 0xffffffff;
1525 u32d[3] = (u32) 0x00000000;
1526 ns_write_sram(card, vc->cbr_scd, u32d, 4);
1528 fill_tst(card, n, vc);
1530 else if (vcc->qos.txtp.traffic_class == ATM_UBR)
1532 vc->cbr_scd = 0x00000000;
1533 vc->scq = card->scq0;
1536 if (vcc->qos.txtp.traffic_class != ATM_NONE)
1542 if (vcc->qos.rxtp.traffic_class != ATM_NONE)
1550 /* Open the connection in hardware */
1551 if (vcc->qos.aal == ATM_AAL5)
1552 status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
1553 else /* vcc->qos.aal == ATM_AAL0 */
1554 status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
1556 status |= NS_RCTE_RAWCELLINTEN;
1557 #endif /* RCQ_SUPPORT */
1558 ns_write_sram(card, NS_RCT + (vpi << card->vcibits | vci) *
1559 NS_RCT_ENTRY_SIZE, &status, 1);
1564 set_bit(ATM_VF_READY,&vcc->flags);
1570 static void ns_close(struct atm_vcc *vcc)
1578 card = vcc->dev->dev_data;
1579 PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
1580 (int) vcc->vpi, vcc->vci);
1582 clear_bit(ATM_VF_READY,&vcc->flags);
1584 if (vcc->qos.rxtp.traffic_class != ATM_NONE)
1587 unsigned long flags;
1589 addr = NS_RCT + (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
1590 ns_grab_res_lock(card, flags);
1591 while(CMD_BUSY(card));
1592 writel(NS_CMD_CLOSE_CONNECTION | addr << 2, card->membase + CMD);
1593 spin_unlock_irqrestore(&card->res_lock, flags);
1596 if (vc->rx_iov != NULL)
1598 struct sk_buff *iovb;
1601 stat = readl(card->membase + STAT);
1602 card->sbfqc = ns_stat_sfbqc_get(stat);
1603 card->lbfqc = ns_stat_lfbqc_get(stat);
1605 PRINTK("nicstar%d: closing a VC with pending rx buffers.\n",
1608 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
1609 NS_SKB(iovb)->iovcnt);
1610 NS_SKB(iovb)->iovcnt = 0;
1611 NS_SKB(iovb)->vcc = NULL;
1612 ns_grab_int_lock(card, flags);
1613 recycle_iov_buf(card, iovb);
1614 spin_unlock_irqrestore(&card->int_lock, flags);
1619 if (vcc->qos.txtp.traffic_class != ATM_NONE)
1624 if (vcc->qos.txtp.traffic_class == ATM_CBR)
1626 unsigned long flags;
1634 ns_grab_scq_lock(card, scq, flags);
1636 if (scqep == scq->base)
1640 if (scqep == scq->tail)
1642 spin_unlock_irqrestore(&scq->lock, flags);
1645 /* If the last entry is not a TSR, place one in the SCQ in order to
1646 be able to completely drain it and then close. */
1647 if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next)
1654 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1655 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1656 scqi = scq->next - scq->base;
1657 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1658 tsr.word_3 = 0x00000000;
1659 tsr.word_4 = 0x00000000;
1662 scq->skb[index] = NULL;
1663 if (scq->next == scq->last)
1664 scq->next = scq->base;
1667 data = (u32) virt_to_bus(scq->next);
1668 ns_write_sram(card, scq->scd, &data, 1);
1670 spin_unlock_irqrestore(&scq->lock, flags);
1674 /* Free all TST entries */
1675 data = NS_TST_OPCODE_VARIABLE;
1676 for (i = 0; i < NS_TST_NUM_ENTRIES; i++)
1678 if (card->tste2vc[i] == vc)
1680 ns_write_sram(card, card->tst_addr + i, &data, 1);
1681 card->tste2vc[i] = NULL;
1682 card->tst_free_entries++;
1686 card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL;
1687 free_scq(vc->scq, vcc);
1690 /* remove all references to vcc before deleting it */
1691 if (vcc->qos.txtp.traffic_class != ATM_NONE)
1693 unsigned long flags;
1694 scq_info *scq = card->scq0;
1696 ns_grab_scq_lock(card, scq, flags);
1698 for(i = 0; i < scq->num_entries; i++) {
1699 if(scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) {
1700 ATM_SKB(scq->skb[i])->vcc = NULL;
1701 atm_return(vcc, scq->skb[i]->truesize);
1702 PRINTK("nicstar: deleted pending vcc mapping\n");
1706 spin_unlock_irqrestore(&scq->lock, flags);
1709 vcc->dev_data = NULL;
1710 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1711 clear_bit(ATM_VF_ADDR,&vcc->flags);
1716 stat = readl(card->membase + STAT);
1717 cfg = readl(card->membase + CFG);
1718 printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg);
1719 printk("TSQ: base = 0x%08X next = 0x%08X last = 0x%08X TSQT = 0x%08X \n",
1720 (u32) card->tsq.base, (u32) card->tsq.next,(u32) card->tsq.last,
1721 readl(card->membase + TSQT));
1722 printk("RSQ: base = 0x%08X next = 0x%08X last = 0x%08X RSQT = 0x%08X \n",
1723 (u32) card->rsq.base, (u32) card->rsq.next,(u32) card->rsq.last,
1724 readl(card->membase + RSQT));
1725 printk("Empty free buffer queue interrupt %s \n",
1726 card->efbie ? "enabled" : "disabled");
1727 printk("SBCNT = %d count = %d LBCNT = %d count = %d \n",
1728 ns_stat_sfbqc_get(stat), card->sbpool.count,
1729 ns_stat_lfbqc_get(stat), card->lbpool.count);
1730 printk("hbpool.count = %d iovpool.count = %d \n",
1731 card->hbpool.count, card->iovpool.count);
1733 #endif /* RX_DEBUG */
1738 static void fill_tst(ns_dev *card, int n, vc_map *vc)
1745 /* It would be very complicated to keep the two TSTs synchronized while
1746 assuring that writes are only made to the inactive TST. So, for now I
1747 will use only one TST. If problems occur, I will change this again */
1749 new_tst = card->tst_addr;
1751 /* Fill procedure */
1753 for (e = 0; e < NS_TST_NUM_ENTRIES; e++)
1755 if (card->tste2vc[e] == NULL)
1758 if (e == NS_TST_NUM_ENTRIES) {
1759 printk("nicstar%d: No free TST entries found. \n", card->index);
1764 cl = NS_TST_NUM_ENTRIES;
1765 data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
1769 if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL)
1771 card->tste2vc[e] = vc;
1772 ns_write_sram(card, new_tst + e, &data, 1);
1773 cl -= NS_TST_NUM_ENTRIES;
1777 if (++e == NS_TST_NUM_ENTRIES) {
1783 /* End of fill procedure */
1785 data = ns_tste_make(NS_TST_OPCODE_END, new_tst);
1786 ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
1787 ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
1788 card->tst_addr = new_tst;
1793 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
1798 unsigned long buflen;
1800 u32 flags; /* TBD flags, not CPU flags */
1802 card = vcc->dev->dev_data;
1803 TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
1804 if ((vc = (vc_map *) vcc->dev_data) == NULL)
1806 printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n", card->index);
1807 atomic_inc(&vcc->stats->tx_err);
1808 dev_kfree_skb_any(skb);
1814 printk("nicstar%d: Trying to transmit on a non-tx VC.\n", card->index);
1815 atomic_inc(&vcc->stats->tx_err);
1816 dev_kfree_skb_any(skb);
1820 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0)
1822 printk("nicstar%d: Only AAL0 and AAL5 are supported.\n", card->index);
1823 atomic_inc(&vcc->stats->tx_err);
1824 dev_kfree_skb_any(skb);
1828 if (skb_shinfo(skb)->nr_frags != 0)
1830 printk("nicstar%d: No scatter-gather yet.\n", card->index);
1831 atomic_inc(&vcc->stats->tx_err);
1832 dev_kfree_skb_any(skb);
1836 ATM_SKB(skb)->vcc = vcc;
1838 if (vcc->qos.aal == ATM_AAL5)
1840 buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
1841 flags = NS_TBD_AAL5;
1842 scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data));
1843 scqe.word_3 = cpu_to_le32((u32) skb->len);
1844 scqe.word_4 = ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
1845 ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ? 1 : 0);
1846 flags |= NS_TBD_EOPDU;
1848 else /* (vcc->qos.aal == ATM_AAL0) */
1850 buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */
1851 flags = NS_TBD_AAL0;
1852 scqe.word_2 = cpu_to_le32((u32) virt_to_bus(skb->data) + NS_AAL0_HEADER);
1853 scqe.word_3 = cpu_to_le32(0x00000000);
1854 if (*skb->data & 0x02) /* Payload type 1 - end of pdu */
1855 flags |= NS_TBD_EOPDU;
1856 scqe.word_4 = cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
1857 /* Force the VPI/VCI to be the same as in VCC struct */
1858 scqe.word_4 |= cpu_to_le32((((u32) vcc->vpi) << NS_TBD_VPI_SHIFT |
1859 ((u32) vcc->vci) << NS_TBD_VCI_SHIFT) &
1863 if (vcc->qos.txtp.traffic_class == ATM_CBR)
1865 scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
1866 scq = ((vc_map *) vcc->dev_data)->scq;
1870 scqe.word_1 = ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
1874 if (push_scqe(card, vc, scq, &scqe, skb) != 0)
1876 atomic_inc(&vcc->stats->tx_err);
1877 dev_kfree_skb_any(skb);
1880 atomic_inc(&vcc->stats->tx);
1887 static int push_scqe(ns_dev *card, vc_map *vc, scq_info *scq, ns_scqe *tbd,
1888 struct sk_buff *skb)
1890 unsigned long flags;
1897 ns_grab_scq_lock(card, scq, flags);
1898 while (scq->tail == scq->next)
1900 if (in_interrupt()) {
1901 spin_unlock_irqrestore(&scq->lock, flags);
1902 printk("nicstar%d: Error pushing TBD.\n", card->index);
1907 spin_unlock_irqrestore(&scq->lock, flags);
1908 interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
1909 ns_grab_scq_lock(card, scq, flags);
1912 spin_unlock_irqrestore(&scq->lock, flags);
1913 printk("nicstar%d: Timeout pushing TBD.\n", card->index);
1918 index = (int) (scq->next - scq->base);
1919 scq->skb[index] = skb;
1920 XPRINTK("nicstar%d: sending skb at 0x%x (pos %d).\n",
1921 card->index, (u32) skb, index);
1922 XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
1923 card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
1924 le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
1926 if (scq->next == scq->last)
1927 scq->next = scq->base;
1932 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
1940 if (vc->tbd_count >= MAX_TBD_PER_VC || scq->tbd_count >= MAX_TBD_PER_SCQ)
1944 while (scq->tail == scq->next)
1946 if (in_interrupt()) {
1947 data = (u32) virt_to_bus(scq->next);
1948 ns_write_sram(card, scq->scd, &data, 1);
1949 spin_unlock_irqrestore(&scq->lock, flags);
1950 printk("nicstar%d: Error pushing TSR.\n", card->index);
1955 if (has_run++) break;
1956 spin_unlock_irqrestore(&scq->lock, flags);
1957 interruptible_sleep_on_timeout(&scq->scqfull_waitq, SCQFULL_TIMEOUT);
1958 ns_grab_scq_lock(card, scq, flags);
1963 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1965 scdi = NS_TSR_SCDISVBR;
1967 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1968 scqi = scq->next - scq->base;
1969 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1970 tsr.word_3 = 0x00000000;
1971 tsr.word_4 = 0x00000000;
1975 scq->skb[index] = NULL;
1976 XPRINTK("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%x.\n",
1977 card->index, le32_to_cpu(tsr.word_1), le32_to_cpu(tsr.word_2),
1978 le32_to_cpu(tsr.word_3), le32_to_cpu(tsr.word_4),
1980 if (scq->next == scq->last)
1981 scq->next = scq->base;
1988 PRINTK("nicstar%d: Timeout pushing TSR.\n", card->index);
1990 data = (u32) virt_to_bus(scq->next);
1991 ns_write_sram(card, scq->scd, &data, 1);
1993 spin_unlock_irqrestore(&scq->lock, flags);
2000 static void process_tsq(ns_dev *card)
2004 ns_tsi *previous = NULL, *one_ahead, *two_ahead;
2005 int serviced_entries; /* flag indicating at least on entry was serviced */
2007 serviced_entries = 0;
2009 if (card->tsq.next == card->tsq.last)
2010 one_ahead = card->tsq.base;
2012 one_ahead = card->tsq.next + 1;
2014 if (one_ahead == card->tsq.last)
2015 two_ahead = card->tsq.base;
2017 two_ahead = one_ahead + 1;
2019 while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) ||
2020 !ns_tsi_isempty(two_ahead))
2021 /* At most two empty, as stated in the 77201 errata */
2023 serviced_entries = 1;
2025 /* Skip the one or two possible empty entries */
2026 while (ns_tsi_isempty(card->tsq.next)) {
2027 if (card->tsq.next == card->tsq.last)
2028 card->tsq.next = card->tsq.base;
2033 if (!ns_tsi_tmrof(card->tsq.next))
2035 scdi = ns_tsi_getscdindex(card->tsq.next);
2036 if (scdi == NS_TSI_SCDISVBR)
2040 if (card->scd2vc[scdi] == NULL)
2042 printk("nicstar%d: could not find VC from SCD index.\n",
2044 ns_tsi_init(card->tsq.next);
2047 scq = card->scd2vc[scdi]->scq;
2049 drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next));
2051 wake_up_interruptible(&(scq->scqfull_waitq));
2054 ns_tsi_init(card->tsq.next);
2055 previous = card->tsq.next;
2056 if (card->tsq.next == card->tsq.last)
2057 card->tsq.next = card->tsq.base;
2061 if (card->tsq.next == card->tsq.last)
2062 one_ahead = card->tsq.base;
2064 one_ahead = card->tsq.next + 1;
2066 if (one_ahead == card->tsq.last)
2067 two_ahead = card->tsq.base;
2069 two_ahead = one_ahead + 1;
2072 if (serviced_entries) {
2073 writel((((u32) previous) - ((u32) card->tsq.base)),
2074 card->membase + TSQH);
2080 static void drain_scq(ns_dev *card, scq_info *scq, int pos)
2082 struct atm_vcc *vcc;
2083 struct sk_buff *skb;
2085 unsigned long flags;
2087 XPRINTK("nicstar%d: drain_scq() called, scq at 0x%x, pos %d.\n",
2088 card->index, (u32) scq, pos);
2089 if (pos >= scq->num_entries)
2091 printk("nicstar%d: Bad index on drain_scq().\n", card->index);
2095 ns_grab_scq_lock(card, scq, flags);
2096 i = (int) (scq->tail - scq->base);
2097 if (++i == scq->num_entries)
2102 XPRINTK("nicstar%d: freeing skb at 0x%x (index %d).\n",
2103 card->index, (u32) skb, i);
2106 vcc = ATM_SKB(skb)->vcc;
2107 if (vcc && vcc->pop != NULL) {
2110 dev_kfree_skb_irq(skb);
2114 if (++i == scq->num_entries)
2117 scq->tail = scq->base + pos;
2118 spin_unlock_irqrestore(&scq->lock, flags);
2123 static void process_rsq(ns_dev *card)
2127 if (!ns_rsqe_valid(card->rsq.next))
2129 while (ns_rsqe_valid(card->rsq.next))
2131 dequeue_rx(card, card->rsq.next);
2132 ns_rsqe_init(card->rsq.next);
2133 previous = card->rsq.next;
2134 if (card->rsq.next == card->rsq.last)
2135 card->rsq.next = card->rsq.base;
2139 writel((((u32) previous) - ((u32) card->rsq.base)),
2140 card->membase + RSQH);
2145 static void dequeue_rx(ns_dev *card, ns_rsqe *rsqe)
2149 struct sk_buff *iovb;
2151 struct atm_vcc *vcc;
2152 struct sk_buff *skb;
2153 unsigned short aal5_len;
2157 stat = readl(card->membase + STAT);
2158 card->sbfqc = ns_stat_sfbqc_get(stat);
2159 card->lbfqc = ns_stat_lfbqc_get(stat);
2161 skb = (struct sk_buff *) le32_to_cpu(rsqe->buffer_handle);
2162 vpi = ns_rsqe_vpi(rsqe);
2163 vci = ns_rsqe_vci(rsqe);
2164 if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits)
2166 printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
2167 card->index, vpi, vci);
2168 recycle_rx_buf(card, skb);
2172 vc = &(card->vcmap[vpi << card->vcibits | vci]);
2175 RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
2176 card->index, vpi, vci);
2177 recycle_rx_buf(card, skb);
2183 if (vcc->qos.aal == ATM_AAL0)
2186 unsigned char *cell;
2190 for (i = ns_rsqe_cellcount(rsqe); i; i--)
2192 if ((sb = dev_alloc_skb(NS_SMSKBSIZE)) == NULL)
2194 printk("nicstar%d: Can't allocate buffers for aal0.\n",
2196 atomic_add(i,&vcc->stats->rx_drop);
2199 if (!atm_charge(vcc, sb->truesize))
2201 RXPRINTK("nicstar%d: atm_charge() dropped aal0 packets.\n",
2203 atomic_add(i-1,&vcc->stats->rx_drop); /* already increased by 1 */
2204 dev_kfree_skb_any(sb);
2207 /* Rebuild the header */
2208 *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
2209 (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
2210 if (i == 1 && ns_rsqe_eopdu(rsqe))
2211 *((u32 *) sb->data) |= 0x00000002;
2212 skb_put(sb, NS_AAL0_HEADER);
2213 memcpy(sb->tail, cell, ATM_CELL_PAYLOAD);
2214 skb_put(sb, ATM_CELL_PAYLOAD);
2215 ATM_SKB(sb)->vcc = vcc;
2216 __net_timestamp(sb);
2218 atomic_inc(&vcc->stats->rx);
2219 cell += ATM_CELL_PAYLOAD;
2222 recycle_rx_buf(card, skb);
2226 /* To reach this point, the AAL layer can only be AAL5 */
2228 if ((iovb = vc->rx_iov) == NULL)
2230 iovb = skb_dequeue(&(card->iovpool.queue));
2231 if (iovb == NULL) /* No buffers in the queue */
2233 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
2236 printk("nicstar%d: Out of iovec buffers.\n", card->index);
2237 atomic_inc(&vcc->stats->rx_drop);
2238 recycle_rx_buf(card, skb);
2241 NS_SKB_CB(iovb)->buf_type = BUF_NONE;
2244 if (--card->iovpool.count < card->iovnr.min)
2246 struct sk_buff *new_iovb;
2247 if ((new_iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL)
2249 NS_SKB_CB(iovb)->buf_type = BUF_NONE;
2250 skb_queue_tail(&card->iovpool.queue, new_iovb);
2251 card->iovpool.count++;
2255 NS_SKB(iovb)->iovcnt = 0;
2257 iovb->tail = iovb->data = iovb->head;
2258 NS_SKB(iovb)->vcc = vcc;
2259 /* IMPORTANT: a pointer to the sk_buff containing the small or large
2260 buffer is stored as iovec base, NOT a pointer to the
2261 small or large buffer itself. */
2263 else if (NS_SKB(iovb)->iovcnt >= NS_MAX_IOVECS)
2265 printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
2266 atomic_inc(&vcc->stats->rx_err);
2267 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data, NS_MAX_IOVECS);
2268 NS_SKB(iovb)->iovcnt = 0;
2270 iovb->tail = iovb->data = iovb->head;
2271 NS_SKB(iovb)->vcc = vcc;
2273 iov = &((struct iovec *) iovb->data)[NS_SKB(iovb)->iovcnt++];
2274 iov->iov_base = (void *) skb;
2275 iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
2276 iovb->len += iov->iov_len;
2278 if (NS_SKB(iovb)->iovcnt == 1)
2280 if (NS_SKB_CB(skb)->buf_type != BUF_SM)
2282 printk("nicstar%d: Expected a small buffer, and this is not one.\n",
2284 which_list(card, skb);
2285 atomic_inc(&vcc->stats->rx_err);
2286 recycle_rx_buf(card, skb);
2288 recycle_iov_buf(card, iovb);
2292 else /* NS_SKB(iovb)->iovcnt >= 2 */
2294 if (NS_SKB_CB(skb)->buf_type != BUF_LG)
2296 printk("nicstar%d: Expected a large buffer, and this is not one.\n",
2298 which_list(card, skb);
2299 atomic_inc(&vcc->stats->rx_err);
2300 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
2301 NS_SKB(iovb)->iovcnt);
2303 recycle_iov_buf(card, iovb);
2308 if (ns_rsqe_eopdu(rsqe))
2310 /* This works correctly regardless of the endianness of the host */
2311 unsigned char *L1L2 = (unsigned char *)((u32)skb->data +
2313 aal5_len = L1L2[0] << 8 | L1L2[1];
2314 len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
2315 if (ns_rsqe_crcerr(rsqe) ||
2316 len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2318 printk("nicstar%d: AAL5 CRC error", card->index);
2319 if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2320 printk(" - PDU size mismatch.\n");
2323 atomic_inc(&vcc->stats->rx_err);
2324 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
2325 NS_SKB(iovb)->iovcnt);
2327 recycle_iov_buf(card, iovb);
2331 /* By this point we (hopefully) have a complete SDU without errors. */
2333 if (NS_SKB(iovb)->iovcnt == 1) /* Just a small buffer */
2335 /* skb points to a small buffer */
2336 if (!atm_charge(vcc, skb->truesize))
2338 push_rxbufs(card, skb);
2339 atomic_inc(&vcc->stats->rx_drop);
2344 dequeue_sm_buf(card, skb);
2345 #ifdef NS_USE_DESTRUCTORS
2346 skb->destructor = ns_sb_destructor;
2347 #endif /* NS_USE_DESTRUCTORS */
2348 ATM_SKB(skb)->vcc = vcc;
2349 __net_timestamp(skb);
2350 vcc->push(vcc, skb);
2351 atomic_inc(&vcc->stats->rx);
2354 else if (NS_SKB(iovb)->iovcnt == 2) /* One small plus one large buffer */
2358 sb = (struct sk_buff *) (iov - 1)->iov_base;
2359 /* skb points to a large buffer */
2361 if (len <= NS_SMBUFSIZE)
2363 if (!atm_charge(vcc, sb->truesize))
2365 push_rxbufs(card, sb);
2366 atomic_inc(&vcc->stats->rx_drop);
2371 dequeue_sm_buf(card, sb);
2372 #ifdef NS_USE_DESTRUCTORS
2373 sb->destructor = ns_sb_destructor;
2374 #endif /* NS_USE_DESTRUCTORS */
2375 ATM_SKB(sb)->vcc = vcc;
2376 __net_timestamp(sb);
2378 atomic_inc(&vcc->stats->rx);
2381 push_rxbufs(card, skb);
2384 else /* len > NS_SMBUFSIZE, the usual case */
2386 if (!atm_charge(vcc, skb->truesize))
2388 push_rxbufs(card, skb);
2389 atomic_inc(&vcc->stats->rx_drop);
2393 dequeue_lg_buf(card, skb);
2394 #ifdef NS_USE_DESTRUCTORS
2395 skb->destructor = ns_lb_destructor;
2396 #endif /* NS_USE_DESTRUCTORS */
2397 skb_push(skb, NS_SMBUFSIZE);
2398 memcpy(skb->data, sb->data, NS_SMBUFSIZE);
2399 skb_put(skb, len - NS_SMBUFSIZE);
2400 ATM_SKB(skb)->vcc = vcc;
2401 __net_timestamp(skb);
2402 vcc->push(vcc, skb);
2403 atomic_inc(&vcc->stats->rx);
2406 push_rxbufs(card, sb);
2411 else /* Must push a huge buffer */
2413 struct sk_buff *hb, *sb, *lb;
2414 int remaining, tocopy;
2417 hb = skb_dequeue(&(card->hbpool.queue));
2418 if (hb == NULL) /* No buffers in the queue */
2421 hb = dev_alloc_skb(NS_HBUFSIZE);
2424 printk("nicstar%d: Out of huge buffers.\n", card->index);
2425 atomic_inc(&vcc->stats->rx_drop);
2426 recycle_iovec_rx_bufs(card, (struct iovec *) iovb->data,
2427 NS_SKB(iovb)->iovcnt);
2429 recycle_iov_buf(card, iovb);
2432 else if (card->hbpool.count < card->hbnr.min)
2434 struct sk_buff *new_hb;
2435 if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
2437 skb_queue_tail(&card->hbpool.queue, new_hb);
2438 card->hbpool.count++;
2441 NS_SKB_CB(hb)->buf_type = BUF_NONE;
2444 if (--card->hbpool.count < card->hbnr.min)
2446 struct sk_buff *new_hb;
2447 if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
2449 NS_SKB_CB(new_hb)->buf_type = BUF_NONE;
2450 skb_queue_tail(&card->hbpool.queue, new_hb);
2451 card->hbpool.count++;
2453 if (card->hbpool.count < card->hbnr.min)
2455 if ((new_hb = dev_alloc_skb(NS_HBUFSIZE)) != NULL)
2457 NS_SKB_CB(new_hb)->buf_type = BUF_NONE;
2458 skb_queue_tail(&card->hbpool.queue, new_hb);
2459 card->hbpool.count++;
2464 iov = (struct iovec *) iovb->data;
2466 if (!atm_charge(vcc, hb->truesize))
2468 recycle_iovec_rx_bufs(card, iov, NS_SKB(iovb)->iovcnt);
2469 if (card->hbpool.count < card->hbnr.max)
2471 skb_queue_tail(&card->hbpool.queue, hb);
2472 card->hbpool.count++;
2475 dev_kfree_skb_any(hb);
2476 atomic_inc(&vcc->stats->rx_drop);
2480 /* Copy the small buffer to the huge buffer */
2481 sb = (struct sk_buff *) iov->iov_base;
2482 memcpy(hb->data, sb->data, iov->iov_len);
2483 skb_put(hb, iov->iov_len);
2484 remaining = len - iov->iov_len;
2486 /* Free the small buffer */
2487 push_rxbufs(card, sb);
2489 /* Copy all large buffers to the huge buffer and free them */
2490 for (j = 1; j < NS_SKB(iovb)->iovcnt; j++)
2492 lb = (struct sk_buff *) iov->iov_base;
2493 tocopy = min_t(int, remaining, iov->iov_len);
2494 memcpy(hb->tail, lb->data, tocopy);
2495 skb_put(hb, tocopy);
2497 remaining -= tocopy;
2498 push_rxbufs(card, lb);
2501 if (remaining != 0 || hb->len != len)
2502 printk("nicstar%d: Huge buffer len mismatch.\n", card->index);
2503 #endif /* EXTRA_DEBUG */
2504 ATM_SKB(hb)->vcc = vcc;
2505 #ifdef NS_USE_DESTRUCTORS
2506 hb->destructor = ns_hb_destructor;
2507 #endif /* NS_USE_DESTRUCTORS */
2508 __net_timestamp(hb);
2510 atomic_inc(&vcc->stats->rx);
2515 recycle_iov_buf(card, iovb);
2522 #ifdef NS_USE_DESTRUCTORS
2524 static void ns_sb_destructor(struct sk_buff *sb)
2529 card = (ns_dev *) ATM_SKB(sb)->vcc->dev->dev_data;
2530 stat = readl(card->membase + STAT);
2531 card->sbfqc = ns_stat_sfbqc_get(stat);
2532 card->lbfqc = ns_stat_lfbqc_get(stat);
2536 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2539 NS_SKB_CB(sb)->buf_type = BUF_SM;
2540 skb_queue_tail(&card->sbpool.queue, sb);
2541 skb_reserve(sb, NS_AAL0_HEADER);
2542 push_rxbufs(card, sb);
2543 } while (card->sbfqc < card->sbnr.min);
2548 static void ns_lb_destructor(struct sk_buff *lb)
2553 card = (ns_dev *) ATM_SKB(lb)->vcc->dev->dev_data;
2554 stat = readl(card->membase + STAT);
2555 card->sbfqc = ns_stat_sfbqc_get(stat);
2556 card->lbfqc = ns_stat_lfbqc_get(stat);
2560 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2563 NS_SKB_CB(lb)->buf_type = BUF_LG;
2564 skb_queue_tail(&card->lbpool.queue, lb);
2565 skb_reserve(lb, NS_SMBUFSIZE);
2566 push_rxbufs(card, lb);
2567 } while (card->lbfqc < card->lbnr.min);
2572 static void ns_hb_destructor(struct sk_buff *hb)
2576 card = (ns_dev *) ATM_SKB(hb)->vcc->dev->dev_data;
2578 while (card->hbpool.count < card->hbnr.init)
2580 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2583 NS_SKB_CB(hb)->buf_type = BUF_NONE;
2584 skb_queue_tail(&card->hbpool.queue, hb);
2585 card->hbpool.count++;
2589 #endif /* NS_USE_DESTRUCTORS */
2592 static void recycle_rx_buf(ns_dev *card, struct sk_buff *skb)
2594 struct ns_skb_cb *cb = NS_SKB_CB(skb);
2596 if (unlikely(cb->buf_type == BUF_NONE)) {
2597 printk("nicstar%d: What kind of rx buffer is this?\n", card->index);
2598 dev_kfree_skb_any(skb);
2600 push_rxbufs(card, skb);
2604 static void recycle_iovec_rx_bufs(ns_dev *card, struct iovec *iov, int count)
2607 recycle_rx_buf(card, (struct sk_buff *) (iov++)->iov_base);
2611 static void recycle_iov_buf(ns_dev *card, struct sk_buff *iovb)
2613 if (card->iovpool.count < card->iovnr.max)
2615 skb_queue_tail(&card->iovpool.queue, iovb);
2616 card->iovpool.count++;
2619 dev_kfree_skb_any(iovb);
2624 static void dequeue_sm_buf(ns_dev *card, struct sk_buff *sb)
2626 skb_unlink(sb, &card->sbpool.queue);
2627 #ifdef NS_USE_DESTRUCTORS
2628 if (card->sbfqc < card->sbnr.min)
2630 if (card->sbfqc < card->sbnr.init)
2632 struct sk_buff *new_sb;
2633 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
2635 NS_SKB_CB(new_sb)->buf_type = BUF_SM;
2636 skb_queue_tail(&card->sbpool.queue, new_sb);
2637 skb_reserve(new_sb, NS_AAL0_HEADER);
2638 push_rxbufs(card, new_sb);
2641 if (card->sbfqc < card->sbnr.init)
2642 #endif /* NS_USE_DESTRUCTORS */
2644 struct sk_buff *new_sb;
2645 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL)
2647 NS_SKB_CB(new_sb)->buf_type = BUF_SM;
2648 skb_queue_tail(&card->sbpool.queue, new_sb);
2649 skb_reserve(new_sb, NS_AAL0_HEADER);
2650 push_rxbufs(card, new_sb);
2657 static void dequeue_lg_buf(ns_dev *card, struct sk_buff *lb)
2659 skb_unlink(lb, &card->lbpool.queue);
2660 #ifdef NS_USE_DESTRUCTORS
2661 if (card->lbfqc < card->lbnr.min)
2663 if (card->lbfqc < card->lbnr.init)
2665 struct sk_buff *new_lb;
2666 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
2668 NS_SKB_CB(new_lb)->buf_type = BUF_LG;
2669 skb_queue_tail(&card->lbpool.queue, new_lb);
2670 skb_reserve(new_lb, NS_SMBUFSIZE);
2671 push_rxbufs(card, new_lb);
2674 if (card->lbfqc < card->lbnr.init)
2675 #endif /* NS_USE_DESTRUCTORS */
2677 struct sk_buff *new_lb;
2678 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL)
2680 NS_SKB_CB(new_lb)->buf_type = BUF_LG;
2681 skb_queue_tail(&card->lbpool.queue, new_lb);
2682 skb_reserve(new_lb, NS_SMBUFSIZE);
2683 push_rxbufs(card, new_lb);
2690 static int ns_proc_read(struct atm_dev *dev, loff_t *pos, char *page)
2697 card = (ns_dev *) dev->dev_data;
2698 stat = readl(card->membase + STAT);
2700 return sprintf(page, "Pool count min init max \n");
2702 return sprintf(page, "Small %5d %5d %5d %5d \n",
2703 ns_stat_sfbqc_get(stat), card->sbnr.min, card->sbnr.init,
2706 return sprintf(page, "Large %5d %5d %5d %5d \n",
2707 ns_stat_lfbqc_get(stat), card->lbnr.min, card->lbnr.init,
2710 return sprintf(page, "Huge %5d %5d %5d %5d \n", card->hbpool.count,
2711 card->hbnr.min, card->hbnr.init, card->hbnr.max);
2713 return sprintf(page, "Iovec %5d %5d %5d %5d \n", card->iovpool.count,
2714 card->iovnr.min, card->iovnr.init, card->iovnr.max);
2718 retval = sprintf(page, "Interrupt counter: %u \n", card->intcnt);
2723 /* Dump 25.6 Mbps PHY registers */
2724 /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
2725 here just in case it's needed for debugging. */
2726 if (card->max_pcr == ATM_25_PCR && !left--)
2731 for (i = 0; i < 4; i++)
2733 while (CMD_BUSY(card));
2734 writel(NS_CMD_READ_UTILITY | 0x00000200 | i, card->membase + CMD);
2735 while (CMD_BUSY(card));
2736 phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
2739 return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
2740 phy_regs[0], phy_regs[1], phy_regs[2], phy_regs[3]);
2742 #endif /* 0 - Dump 25.6 Mbps PHY registers */
2745 if (left-- < NS_TST_NUM_ENTRIES)
2747 if (card->tste2vc[left + 1] == NULL)
2748 return sprintf(page, "%5d - VBR/UBR \n", left + 1);
2750 return sprintf(page, "%5d - %d %d \n", left + 1,
2751 card->tste2vc[left + 1]->tx_vcc->vpi,
2752 card->tste2vc[left + 1]->tx_vcc->vci);
2760 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user *arg)
2765 unsigned long flags;
2767 card = dev->dev_data;
2771 if (get_user(pl.buftype, &((pool_levels __user *) arg)->buftype))
2775 case NS_BUFTYPE_SMALL:
2776 pl.count = ns_stat_sfbqc_get(readl(card->membase + STAT));
2777 pl.level.min = card->sbnr.min;
2778 pl.level.init = card->sbnr.init;
2779 pl.level.max = card->sbnr.max;
2782 case NS_BUFTYPE_LARGE:
2783 pl.count = ns_stat_lfbqc_get(readl(card->membase + STAT));
2784 pl.level.min = card->lbnr.min;
2785 pl.level.init = card->lbnr.init;
2786 pl.level.max = card->lbnr.max;
2789 case NS_BUFTYPE_HUGE:
2790 pl.count = card->hbpool.count;
2791 pl.level.min = card->hbnr.min;
2792 pl.level.init = card->hbnr.init;
2793 pl.level.max = card->hbnr.max;
2796 case NS_BUFTYPE_IOVEC:
2797 pl.count = card->iovpool.count;
2798 pl.level.min = card->iovnr.min;
2799 pl.level.init = card->iovnr.init;
2800 pl.level.max = card->iovnr.max;
2804 return -ENOIOCTLCMD;
2807 if (!copy_to_user((pool_levels __user *) arg, &pl, sizeof(pl)))
2808 return (sizeof(pl));
2813 if (!capable(CAP_NET_ADMIN))
2815 if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl)))
2817 if (pl.level.min >= pl.level.init || pl.level.init >= pl.level.max)
2819 if (pl.level.min == 0)
2823 case NS_BUFTYPE_SMALL:
2824 if (pl.level.max > TOP_SB)
2826 card->sbnr.min = pl.level.min;
2827 card->sbnr.init = pl.level.init;
2828 card->sbnr.max = pl.level.max;
2831 case NS_BUFTYPE_LARGE:
2832 if (pl.level.max > TOP_LB)
2834 card->lbnr.min = pl.level.min;
2835 card->lbnr.init = pl.level.init;
2836 card->lbnr.max = pl.level.max;
2839 case NS_BUFTYPE_HUGE:
2840 if (pl.level.max > TOP_HB)
2842 card->hbnr.min = pl.level.min;
2843 card->hbnr.init = pl.level.init;
2844 card->hbnr.max = pl.level.max;
2847 case NS_BUFTYPE_IOVEC:
2848 if (pl.level.max > TOP_IOVB)
2850 card->iovnr.min = pl.level.min;
2851 card->iovnr.init = pl.level.init;
2852 card->iovnr.max = pl.level.max;
2862 if (!capable(CAP_NET_ADMIN))
2864 btype = (int) arg; /* an int is the same size as a pointer */
2867 case NS_BUFTYPE_SMALL:
2868 while (card->sbfqc < card->sbnr.init)
2872 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2875 NS_SKB_CB(sb)->buf_type = BUF_SM;
2876 skb_queue_tail(&card->sbpool.queue, sb);
2877 skb_reserve(sb, NS_AAL0_HEADER);
2878 push_rxbufs(card, sb);
2882 case NS_BUFTYPE_LARGE:
2883 while (card->lbfqc < card->lbnr.init)
2887 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2890 NS_SKB_CB(lb)->buf_type = BUF_LG;
2891 skb_queue_tail(&card->lbpool.queue, lb);
2892 skb_reserve(lb, NS_SMBUFSIZE);
2893 push_rxbufs(card, lb);
2897 case NS_BUFTYPE_HUGE:
2898 while (card->hbpool.count > card->hbnr.init)
2902 ns_grab_int_lock(card, flags);
2903 hb = skb_dequeue(&card->hbpool.queue);
2904 card->hbpool.count--;
2905 spin_unlock_irqrestore(&card->int_lock, flags);
2907 printk("nicstar%d: huge buffer count inconsistent.\n",
2910 dev_kfree_skb_any(hb);
2913 while (card->hbpool.count < card->hbnr.init)
2917 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2920 NS_SKB_CB(hb)->buf_type = BUF_NONE;
2921 ns_grab_int_lock(card, flags);
2922 skb_queue_tail(&card->hbpool.queue, hb);
2923 card->hbpool.count++;
2924 spin_unlock_irqrestore(&card->int_lock, flags);
2928 case NS_BUFTYPE_IOVEC:
2929 while (card->iovpool.count > card->iovnr.init)
2931 struct sk_buff *iovb;
2933 ns_grab_int_lock(card, flags);
2934 iovb = skb_dequeue(&card->iovpool.queue);
2935 card->iovpool.count--;
2936 spin_unlock_irqrestore(&card->int_lock, flags);
2938 printk("nicstar%d: iovec buffer count inconsistent.\n",
2941 dev_kfree_skb_any(iovb);
2944 while (card->iovpool.count < card->iovnr.init)
2946 struct sk_buff *iovb;
2948 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
2951 NS_SKB_CB(iovb)->buf_type = BUF_NONE;
2952 ns_grab_int_lock(card, flags);
2953 skb_queue_tail(&card->iovpool.queue, iovb);
2954 card->iovpool.count++;
2955 spin_unlock_irqrestore(&card->int_lock, flags);
2966 if (dev->phy && dev->phy->ioctl) {
2967 return dev->phy->ioctl(dev, cmd, arg);
2970 printk("nicstar%d: %s == NULL \n", card->index,
2971 dev->phy ? "dev->phy->ioctl" : "dev->phy");
2972 return -ENOIOCTLCMD;
2978 static void which_list(ns_dev *card, struct sk_buff *skb)
2980 printk("skb buf_type: 0x%08x\n", NS_SKB_CB(skb)->buf_type);
2984 static void ns_poll(unsigned long arg)
2988 unsigned long flags;
2991 PRINTK("nicstar: Entering ns_poll().\n");
2992 for (i = 0; i < num_cards; i++)
2995 if (spin_is_locked(&card->int_lock)) {
2996 /* Probably it isn't worth spinning */
2999 ns_grab_int_lock(card, flags);
3002 stat_r = readl(card->membase + STAT);
3003 if (stat_r & NS_STAT_TSIF)
3004 stat_w |= NS_STAT_TSIF;
3005 if (stat_r & NS_STAT_EOPDU)
3006 stat_w |= NS_STAT_EOPDU;
3011 writel(stat_w, card->membase + STAT);
3012 spin_unlock_irqrestore(&card->int_lock, flags);
3014 mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD);
3015 PRINTK("nicstar: Leaving ns_poll().\n");
3020 static int ns_parse_mac(char *mac, unsigned char *esi)
3025 if (mac == NULL || esi == NULL)
3028 for (i = 0; i < 6; i++)
3030 if ((byte1 = ns_h2i(mac[j++])) < 0)
3032 if ((byte0 = ns_h2i(mac[j++])) < 0)
3034 esi[i] = (unsigned char) (byte1 * 16 + byte0);
3037 if (mac[j++] != ':')
3046 static short ns_h2i(char c)
3048 if (c >= '0' && c <= '9')
3049 return (short) (c - '0');
3050 if (c >= 'A' && c <= 'F')
3051 return (short) (c - 'A' + 10);
3052 if (c >= 'a' && c <= 'f')
3053 return (short) (c - 'a' + 10);
3059 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
3063 unsigned long flags;
3065 card = dev->dev_data;
3066 ns_grab_res_lock(card, flags);
3067 while(CMD_BUSY(card));
3068 writel((unsigned long) value, card->membase + DR0);
3069 writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
3070 card->membase + CMD);
3071 spin_unlock_irqrestore(&card->res_lock, flags);
3076 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
3079 unsigned long flags;
3082 card = dev->dev_data;
3083 ns_grab_res_lock(card, flags);
3084 while(CMD_BUSY(card));
3085 writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
3086 card->membase + CMD);
3087 while(CMD_BUSY(card));
3088 data = readl(card->membase + DR0) & 0x000000FF;
3089 spin_unlock_irqrestore(&card->res_lock, flags);
3090 return (unsigned char) data;
3095 module_init(nicstar_init);
3096 module_exit(nicstar_cleanup);