2 * pluto2.c - Satelco Easywatch Mobile Terrestrial Receiver [DVB-T]
4 * Copyright (C) 2005 Andreas Oberritter <obi@linuxtv.org>
6 * based on pluto2.c 1.10 - http://instinct-wp8.no-ip.org/pluto/
7 * by Dany Salman <salmandany@yahoo.fr>
8 * Copyright (c) 2004 TDF
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 #include <linux/i2c.h>
27 #include <linux/i2c-algo-bit.h>
28 #include <linux/init.h>
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/pci.h>
32 #include <linux/dma-mapping.h>
36 #include "dvb_demux.h"
37 #include "dvb_frontend.h"
42 #define DRIVER_NAME "pluto2"
44 #define REG_PIDn(n) ((n) << 2) /* PID n pattern registers */
45 #define REG_PCAR 0x0020 /* PC address register */
46 #define REG_TSCR 0x0024 /* TS ctrl & status */
47 #define REG_MISC 0x0028 /* miscellaneous */
48 #define REG_MMAC 0x002c /* MSB MAC address */
49 #define REG_IMAC 0x0030 /* ISB MAC address */
50 #define REG_LMAC 0x0034 /* LSB MAC address */
51 #define REG_SPID 0x0038 /* SPI data */
52 #define REG_SLCS 0x003c /* serial links ctrl/status */
54 #define PID0_NOFIL (0x0001 << 16)
55 #define PIDn_ENP (0x0001 << 15)
56 #define PID0_END (0x0001 << 14)
57 #define PID0_AFIL (0x0001 << 13)
58 #define PIDn_PID (0x1fff << 0)
60 #define TSCR_NBPACKETS (0x00ff << 24)
61 #define TSCR_DEM (0x0001 << 17)
62 #define TSCR_DE (0x0001 << 16)
63 #define TSCR_RSTN (0x0001 << 15)
64 #define TSCR_MSKO (0x0001 << 14)
65 #define TSCR_MSKA (0x0001 << 13)
66 #define TSCR_MSKL (0x0001 << 12)
67 #define TSCR_OVR (0x0001 << 11)
68 #define TSCR_AFUL (0x0001 << 10)
69 #define TSCR_LOCK (0x0001 << 9)
70 #define TSCR_IACK (0x0001 << 8)
71 #define TSCR_ADEF (0x007f << 0)
73 #define MISC_DVR (0x0fff << 4)
74 #define MISC_ALED (0x0001 << 3)
75 #define MISC_FRST (0x0001 << 2)
76 #define MISC_LED1 (0x0001 << 1)
77 #define MISC_LED0 (0x0001 << 0)
79 #define SPID_SPIDR (0x00ff << 0)
81 #define SLCS_SCL (0x0001 << 7)
82 #define SLCS_SDA (0x0001 << 6)
83 #define SLCS_CSN (0x0001 << 2)
84 #define SLCS_OVR (0x0001 << 1)
85 #define SLCS_SWC (0x0001 << 0)
87 #define TS_DMA_PACKETS (8)
88 #define TS_DMA_BYTES (188 * TS_DMA_PACKETS)
90 #define I2C_ADDR_TDA10046 0x10
91 #define I2C_ADDR_TUA6034 0xc2
100 struct dmx_frontend hw_frontend;
101 struct dmx_frontend mem_frontend;
102 struct dmxdev dmxdev;
103 struct dvb_adapter dvb_adapter;
104 struct dvb_demux demux;
105 struct dvb_frontend *fe;
106 struct dvb_net dvbnet;
107 unsigned int full_ts_users;
111 struct i2c_algo_bit_data i2c_bit;
112 struct i2c_adapter i2c_adap;
116 unsigned int overflow;
120 u8 dma_buf[TS_DMA_BYTES];
124 static inline struct pluto *feed_to_pluto(struct dvb_demux_feed *feed)
126 return container_of(feed->demux, struct pluto, demux);
129 static inline struct pluto *frontend_to_pluto(struct dvb_frontend *fe)
131 return container_of(fe->dvb, struct pluto, dvb_adapter);
134 static inline u32 pluto_readreg(struct pluto *pluto, u32 reg)
136 return readl(&pluto->io_mem[reg]);
139 static inline void pluto_writereg(struct pluto *pluto, u32 reg, u32 val)
141 writel(val, &pluto->io_mem[reg]);
144 static inline void pluto_rw(struct pluto *pluto, u32 reg, u32 mask, u32 bits)
146 u32 val = readl(&pluto->io_mem[reg]);
149 writel(val, &pluto->io_mem[reg]);
152 static void pluto_setsda(void *data, int state)
154 struct pluto *pluto = data;
157 pluto_rw(pluto, REG_SLCS, SLCS_SDA, SLCS_SDA);
159 pluto_rw(pluto, REG_SLCS, SLCS_SDA, 0);
162 static void pluto_setscl(void *data, int state)
164 struct pluto *pluto = data;
167 pluto_rw(pluto, REG_SLCS, SLCS_SCL, SLCS_SCL);
169 pluto_rw(pluto, REG_SLCS, SLCS_SCL, 0);
171 /* try to detect i2c_inb() to workaround hardware bug:
172 * reset SDA to high after SCL has been set to low */
173 if ((state) && (pluto->i2cbug == 0)) {
176 if ((!state) && (pluto->i2cbug == 1))
177 pluto_setsda(pluto, 1);
182 static int pluto_getsda(void *data)
184 struct pluto *pluto = data;
186 return pluto_readreg(pluto, REG_SLCS) & SLCS_SDA;
189 static int pluto_getscl(void *data)
191 struct pluto *pluto = data;
193 return pluto_readreg(pluto, REG_SLCS) & SLCS_SCL;
196 static void pluto_reset_frontend(struct pluto *pluto, int reenable)
198 u32 val = pluto_readreg(pluto, REG_MISC);
200 if (val & MISC_FRST) {
202 pluto_writereg(pluto, REG_MISC, val);
206 pluto_writereg(pluto, REG_MISC, val);
210 static void pluto_reset_ts(struct pluto *pluto, int reenable)
212 u32 val = pluto_readreg(pluto, REG_TSCR);
214 if (val & TSCR_RSTN) {
216 pluto_writereg(pluto, REG_TSCR, val);
220 pluto_writereg(pluto, REG_TSCR, val);
224 static void pluto_set_dma_addr(struct pluto *pluto)
226 pluto_writereg(pluto, REG_PCAR, cpu_to_le32(pluto->dma_addr));
229 static int __devinit pluto_dma_map(struct pluto *pluto)
231 pluto->dma_addr = pci_map_single(pluto->pdev, pluto->dma_buf,
232 TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
234 return pci_dma_mapping_error(pluto->dma_addr);
237 static void pluto_dma_unmap(struct pluto *pluto)
239 pci_unmap_single(pluto->pdev, pluto->dma_addr,
240 TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
243 static int pluto_start_feed(struct dvb_demux_feed *f)
245 struct pluto *pluto = feed_to_pluto(f);
247 /* enable PID filtering */
248 if (pluto->users++ == 0)
249 pluto_rw(pluto, REG_PIDn(0), PID0_AFIL | PID0_NOFIL, 0);
251 if ((f->pid < 0x2000) && (f->index < NHWFILTERS))
252 pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, PIDn_ENP | f->pid);
253 else if (pluto->full_ts_users++ == 0)
254 pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, PID0_NOFIL);
259 static int pluto_stop_feed(struct dvb_demux_feed *f)
261 struct pluto *pluto = feed_to_pluto(f);
263 /* disable PID filtering */
264 if (--pluto->users == 0)
265 pluto_rw(pluto, REG_PIDn(0), PID0_AFIL, PID0_AFIL);
267 if ((f->pid < 0x2000) && (f->index < NHWFILTERS))
268 pluto_rw(pluto, REG_PIDn(f->index), PIDn_ENP | PIDn_PID, 0x1fff);
269 else if (--pluto->full_ts_users == 0)
270 pluto_rw(pluto, REG_PIDn(0), PID0_NOFIL, 0);
275 static void pluto_dma_end(struct pluto *pluto, unsigned int nbpackets)
277 /* synchronize the DMA transfer with the CPU
278 * first so that we see updated contents. */
279 pci_dma_sync_single_for_cpu(pluto->pdev, pluto->dma_addr,
280 TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
282 /* Workaround for broken hardware:
283 * [1] On startup NBPACKETS seems to contain an uninitialized value,
284 * but no packets have been transfered.
285 * [2] Sometimes (actually very often) NBPACKETS stays at zero
286 * although one packet has been transfered.
288 if ((nbpackets == 0) || (nbpackets > TS_DMA_PACKETS)) {
289 unsigned int i = 0, valid;
290 while (pluto->dma_buf[i] == 0x47)
293 if (nbpackets != valid) {
294 dev_err(&pluto->pdev->dev, "nbpackets=%u valid=%u\n",
300 dvb_dmx_swfilter_packets(&pluto->demux, pluto->dma_buf, nbpackets);
302 /* clear the dma buffer. this is needed to be able to identify
303 * new valid ts packets above */
304 memset(pluto->dma_buf, 0, nbpackets * 188);
306 /* reset the dma address */
307 pluto_set_dma_addr(pluto);
309 /* sync the buffer and give it back to the card */
310 pci_dma_sync_single_for_device(pluto->pdev, pluto->dma_addr,
311 TS_DMA_BYTES, PCI_DMA_FROMDEVICE);
314 static irqreturn_t pluto_irq(int irq, void *dev_id, struct pt_regs *regs)
316 struct pluto *pluto = dev_id;
319 /* check whether an interrupt occured on this device */
320 tscr = pluto_readreg(pluto, REG_TSCR);
321 if (!(tscr & (TSCR_DE | TSCR_OVR)))
324 if (tscr == 0xffffffff) {
325 // FIXME: maybe recover somehow
326 dev_err(&pluto->pdev->dev, "card hung up :(\n");
330 /* dma end interrupt */
331 if (tscr & TSCR_DE) {
332 pluto_dma_end(pluto, (tscr & TSCR_NBPACKETS) >> 24);
333 /* overflow interrupt */
336 if (pluto->overflow) {
337 dev_err(&pluto->pdev->dev, "overflow irq (%d)\n",
339 pluto_reset_ts(pluto, 1);
342 } else if (tscr & TSCR_OVR) {
346 /* ACK the interrupt */
347 pluto_writereg(pluto, REG_TSCR, tscr | TSCR_IACK);
352 static void __devinit pluto_enable_irqs(struct pluto *pluto)
354 u32 val = pluto_readreg(pluto, REG_TSCR);
356 /* set the number of packets */
358 val |= TS_DMA_PACKETS / 2;
359 /* disable AFUL and LOCK interrupts */
360 val |= (TSCR_MSKA | TSCR_MSKL);
361 /* enable DMA and OVERFLOW interrupts */
362 val &= ~(TSCR_DEM | TSCR_MSKO);
363 /* clear pending interrupts */
366 pluto_writereg(pluto, REG_TSCR, val);
369 static void pluto_disable_irqs(struct pluto *pluto)
371 u32 val = pluto_readreg(pluto, REG_TSCR);
373 /* disable all interrupts */
374 val |= (TSCR_DEM | TSCR_MSKO | TSCR_MSKA | TSCR_MSKL);
375 /* clear pending interrupts */
378 pluto_writereg(pluto, REG_TSCR, val);
381 static int __devinit pluto_hw_init(struct pluto *pluto)
383 pluto_reset_frontend(pluto, 1);
385 /* set automatic LED control by FPGA */
386 pluto_rw(pluto, REG_MISC, MISC_ALED, MISC_ALED);
388 /* set data endianess */
389 #ifdef __LITTLE_ENDIAN
390 pluto_rw(pluto, REG_PIDn(0), PID0_END, PID0_END);
392 pluto_rw(pluto, REG_PIDn(0), PID0_END, 0);
394 /* map DMA and set address */
395 pluto_dma_map(pluto);
396 pluto_set_dma_addr(pluto);
398 /* enable interrupts */
399 pluto_enable_irqs(pluto);
402 pluto_reset_ts(pluto, 1);
407 static void pluto_hw_exit(struct pluto *pluto)
409 /* disable interrupts */
410 pluto_disable_irqs(pluto);
412 pluto_reset_ts(pluto, 0);
414 /* LED: disable automatic control, enable yellow, disable green */
415 pluto_rw(pluto, REG_MISC, MISC_ALED | MISC_LED1 | MISC_LED0, MISC_LED1);
418 pluto_dma_unmap(pluto);
420 pluto_reset_frontend(pluto, 0);
423 static inline u32 divide(u32 numerator, u32 denominator)
425 if (denominator == 0)
428 return (numerator + denominator / 2) / denominator;
431 /* LG Innotek TDTE-E001P (Infineon TUA6034) */
432 static int lg_tdtpe001p_pll_set(struct dvb_frontend *fe,
433 struct dvb_frontend_parameters *p)
435 struct pluto *pluto = frontend_to_pluto(fe);
442 // Fref * 3 = 500.000 Hz
445 //div = divide(p->frequency + 36166667, 166667);
446 div = divide(p->frequency * 3, 500000) + 217;
447 buf[0] = (div >> 8) & 0x7f;
448 buf[1] = (div >> 0) & 0xff;
450 if (p->frequency < 611000000)
452 else if (p->frequency < 811000000)
460 if (p->frequency < 350000000)
465 if (p->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
468 if (sizeof(buf) == 6) {
473 buf[5] = (0 << 7) | (2 << 4);
476 msg.addr = I2C_ADDR_TUA6034 >> 1;
479 msg.len = sizeof(buf);
481 ret = i2c_transfer(&pluto->i2c_adap, &msg, 1);
490 static int pluto2_request_firmware(struct dvb_frontend *fe,
491 const struct firmware **fw, char *name)
493 struct pluto *pluto = frontend_to_pluto(fe);
495 return request_firmware(fw, name, &pluto->pdev->dev);
498 static struct tda1004x_config pluto2_fe_config __devinitdata = {
499 .demod_address = I2C_ADDR_TDA10046 >> 1,
502 .xtal_freq = TDA10046_XTAL_16M,
503 .agc_config = TDA10046_AGC_DEFAULT,
504 .if_freq = TDA10046_FREQ_3617,
505 .pll_set = lg_tdtpe001p_pll_set,
507 .request_firmware = pluto2_request_firmware,
510 static int __devinit frontend_init(struct pluto *pluto)
514 pluto->fe = tda10046_attach(&pluto2_fe_config, &pluto->i2c_adap);
516 dev_err(&pluto->pdev->dev, "could not attach frontend\n");
520 ret = dvb_register_frontend(&pluto->dvb_adapter, pluto->fe);
522 if (pluto->fe->ops->release)
523 pluto->fe->ops->release(pluto->fe);
530 static void __devinit pluto_read_rev(struct pluto *pluto)
532 u32 val = pluto_readreg(pluto, REG_MISC) & MISC_DVR;
533 dev_info(&pluto->pdev->dev, "board revision %d.%d\n",
534 (val >> 12) & 0x0f, (val >> 4) & 0xff);
537 static void __devinit pluto_read_mac(struct pluto *pluto, u8 *mac)
539 u32 val = pluto_readreg(pluto, REG_MMAC);
540 mac[0] = (val >> 8) & 0xff;
541 mac[1] = (val >> 0) & 0xff;
543 val = pluto_readreg(pluto, REG_IMAC);
544 mac[2] = (val >> 8) & 0xff;
545 mac[3] = (val >> 0) & 0xff;
547 val = pluto_readreg(pluto, REG_LMAC);
548 mac[4] = (val >> 8) & 0xff;
549 mac[5] = (val >> 0) & 0xff;
551 dev_info(&pluto->pdev->dev, "MAC %02x:%02x:%02x:%02x:%02x:%02x\n",
552 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
555 static int __devinit pluto_read_serial(struct pluto *pluto)
557 struct pci_dev *pdev = pluto->pdev;
561 cis = pci_iomap(pdev, 1, 0);
565 dev_info(&pdev->dev, "S/N ");
567 for (i = 0xe0; i < 0x100; i += 4) {
568 u32 val = readl(&cis[i]);
569 for (j = 0; j < 32; j += 8) {
570 if ((val & 0xff) == 0xff)
572 printk("%c", val & 0xff);
578 pci_iounmap(pdev, cis);
583 static int __devinit pluto2_probe(struct pci_dev *pdev,
584 const struct pci_device_id *ent)
587 struct dvb_adapter *dvb_adapter;
588 struct dvb_demux *dvbdemux;
589 struct dmx_demux *dmx;
592 pluto = kmalloc(sizeof(struct pluto), GFP_KERNEL);
596 memset(pluto, 0, sizeof(struct pluto));
599 ret = pci_enable_device(pdev);
603 /* enable interrupts */
604 pci_write_config_dword(pdev, 0x6c, 0x8000);
606 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
608 goto err_pci_disable_device;
610 pci_set_master(pdev);
612 ret = pci_request_regions(pdev, DRIVER_NAME);
614 goto err_pci_disable_device;
616 pluto->io_mem = pci_iomap(pdev, 0, 0x40);
617 if (!pluto->io_mem) {
619 goto err_pci_release_regions;
622 pci_set_drvdata(pdev, pluto);
624 ret = request_irq(pdev->irq, pluto_irq, SA_SHIRQ, DRIVER_NAME, pluto);
626 goto err_pci_iounmap;
628 ret = pluto_hw_init(pluto);
633 i2c_set_adapdata(&pluto->i2c_adap, pluto);
634 strcpy(pluto->i2c_adap.name, DRIVER_NAME);
635 pluto->i2c_adap.owner = THIS_MODULE;
636 pluto->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
637 pluto->i2c_adap.dev.parent = &pdev->dev;
638 pluto->i2c_adap.algo_data = &pluto->i2c_bit;
639 pluto->i2c_bit.data = pluto;
640 pluto->i2c_bit.setsda = pluto_setsda;
641 pluto->i2c_bit.setscl = pluto_setscl;
642 pluto->i2c_bit.getsda = pluto_getsda;
643 pluto->i2c_bit.getscl = pluto_getscl;
644 pluto->i2c_bit.udelay = 10;
645 pluto->i2c_bit.timeout = 10;
647 /* Raise SCL and SDA */
648 pluto_setsda(pluto, 1);
649 pluto_setscl(pluto, 1);
651 ret = i2c_bit_add_bus(&pluto->i2c_adap);
653 goto err_pluto_hw_exit;
656 ret = dvb_register_adapter(&pluto->dvb_adapter, DRIVER_NAME, THIS_MODULE);
658 goto err_i2c_bit_del_bus;
660 dvb_adapter = &pluto->dvb_adapter;
662 pluto_read_rev(pluto);
663 pluto_read_serial(pluto);
664 pluto_read_mac(pluto, dvb_adapter->proposed_mac);
666 dvbdemux = &pluto->demux;
667 dvbdemux->filternum = 256;
668 dvbdemux->feednum = 256;
669 dvbdemux->start_feed = pluto_start_feed;
670 dvbdemux->stop_feed = pluto_stop_feed;
671 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
672 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
673 ret = dvb_dmx_init(dvbdemux);
675 goto err_dvb_unregister_adapter;
677 dmx = &dvbdemux->dmx;
679 pluto->hw_frontend.source = DMX_FRONTEND_0;
680 pluto->mem_frontend.source = DMX_MEMORY_FE;
681 pluto->dmxdev.filternum = NHWFILTERS;
682 pluto->dmxdev.demux = dmx;
684 ret = dvb_dmxdev_init(&pluto->dmxdev, dvb_adapter);
686 goto err_dvb_dmx_release;
688 ret = dmx->add_frontend(dmx, &pluto->hw_frontend);
690 goto err_dvb_dmxdev_release;
692 ret = dmx->add_frontend(dmx, &pluto->mem_frontend);
694 goto err_remove_hw_frontend;
696 ret = dmx->connect_frontend(dmx, &pluto->hw_frontend);
698 goto err_remove_mem_frontend;
700 ret = frontend_init(pluto);
702 goto err_disconnect_frontend;
704 dvb_net_init(dvb_adapter, &pluto->dvbnet, dmx);
708 err_disconnect_frontend:
709 dmx->disconnect_frontend(dmx);
710 err_remove_mem_frontend:
711 dmx->remove_frontend(dmx, &pluto->mem_frontend);
712 err_remove_hw_frontend:
713 dmx->remove_frontend(dmx, &pluto->hw_frontend);
714 err_dvb_dmxdev_release:
715 dvb_dmxdev_release(&pluto->dmxdev);
717 dvb_dmx_release(dvbdemux);
718 err_dvb_unregister_adapter:
719 dvb_unregister_adapter(dvb_adapter);
721 i2c_bit_del_bus(&pluto->i2c_adap);
723 pluto_hw_exit(pluto);
725 free_irq(pdev->irq, pluto);
727 pci_iounmap(pdev, pluto->io_mem);
728 err_pci_release_regions:
729 pci_release_regions(pdev);
730 err_pci_disable_device:
731 pci_disable_device(pdev);
733 pci_set_drvdata(pdev, NULL);
738 static void __devexit pluto2_remove(struct pci_dev *pdev)
740 struct pluto *pluto = pci_get_drvdata(pdev);
741 struct dvb_adapter *dvb_adapter = &pluto->dvb_adapter;
742 struct dvb_demux *dvbdemux = &pluto->demux;
743 struct dmx_demux *dmx = &dvbdemux->dmx;
746 dvb_net_release(&pluto->dvbnet);
748 dvb_unregister_frontend(pluto->fe);
750 dmx->disconnect_frontend(dmx);
751 dmx->remove_frontend(dmx, &pluto->mem_frontend);
752 dmx->remove_frontend(dmx, &pluto->hw_frontend);
753 dvb_dmxdev_release(&pluto->dmxdev);
754 dvb_dmx_release(dvbdemux);
755 dvb_unregister_adapter(dvb_adapter);
756 i2c_bit_del_bus(&pluto->i2c_adap);
757 pluto_hw_exit(pluto);
758 free_irq(pdev->irq, pluto);
759 pci_iounmap(pdev, pluto->io_mem);
760 pci_release_regions(pdev);
761 pci_disable_device(pdev);
762 pci_set_drvdata(pdev, NULL);
766 #ifndef PCI_VENDOR_ID_SCM
767 #define PCI_VENDOR_ID_SCM 0x0432
769 #ifndef PCI_DEVICE_ID_PLUTO2
770 #define PCI_DEVICE_ID_PLUTO2 0x0001
773 static struct pci_device_id pluto2_id_table[] __devinitdata = {
775 .vendor = PCI_VENDOR_ID_SCM,
776 .device = PCI_DEVICE_ID_PLUTO2,
777 .subvendor = PCI_ANY_ID,
778 .subdevice = PCI_ANY_ID,
784 MODULE_DEVICE_TABLE(pci, pluto2_id_table);
786 static struct pci_driver pluto2_driver = {
788 .id_table = pluto2_id_table,
789 .probe = pluto2_probe,
790 .remove = __devexit_p(pluto2_remove),
793 static int __init pluto2_init(void)
795 return pci_register_driver(&pluto2_driver);
798 static void __exit pluto2_exit(void)
800 pci_unregister_driver(&pluto2_driver);
803 module_init(pluto2_init);
804 module_exit(pluto2_exit);
806 MODULE_AUTHOR("Andreas Oberritter <obi@linuxtv.org>");
807 MODULE_DESCRIPTION("Pluto2 driver");
808 MODULE_LICENSE("GPL");