2 * linux/arch/x86-64/kernel/time.c
4 * "High Precision Event Timer" based timekeeping.
6 * Copyright (c) 1991,1992,1995 Linus Torvalds
7 * Copyright (c) 1994 Alan Modra
8 * Copyright (c) 1995 Markus Kuhn
9 * Copyright (c) 1996 Ingo Molnar
10 * Copyright (c) 1998 Andrea Arcangeli
11 * Copyright (c) 2002 Vojtech Pavlik
12 * Copyright (c) 2003 Andi Kleen
13 * RTC support code taken from arch/i386/kernel/timers/time_hpet.c
16 #include <linux/kernel.h>
17 #include <linux/sched.h>
18 #include <linux/interrupt.h>
19 #include <linux/init.h>
20 #include <linux/mc146818rtc.h>
21 #include <linux/time.h>
22 #include <linux/ioport.h>
23 #include <linux/module.h>
24 #include <linux/device.h>
25 #include <linux/sysdev.h>
26 #include <linux/bcd.h>
27 #include <linux/kallsyms.h>
28 #include <linux/acpi.h>
30 #include <acpi/achware.h> /* for PM timer frequency */
32 #include <asm/8253pit.h>
33 #include <asm/pgtable.h>
34 #include <asm/vsyscall.h>
35 #include <asm/timex.h>
36 #include <asm/proto.h>
38 #include <asm/sections.h>
39 #include <linux/cpufreq.h>
40 #include <linux/hpet.h>
41 #ifdef CONFIG_X86_LOCAL_APIC
45 #ifdef CONFIG_CPU_FREQ
46 static void cpufreq_delayed_get(void);
48 extern void i8254_timer_resume(void);
49 extern int using_apic_timer;
51 static char *time_init_gtod(void);
53 DEFINE_SPINLOCK(rtc_lock);
54 DEFINE_SPINLOCK(i8253_lock);
56 int nohpet __initdata = 0;
57 static int notsc __initdata = 0;
59 #undef HPET_HACK_ENABLE_DANGEROUS
61 unsigned int cpu_khz; /* TSC clocks / usec, not used here */
62 static unsigned long hpet_period; /* fsecs / HPET clock */
63 unsigned long hpet_tick; /* HPET clocks / interrupt */
64 int hpet_use_timer; /* Use counter of hpet for time keeping, otherwise PIT */
65 unsigned long vxtime_hz = PIT_TICK_RATE;
66 int report_lost_ticks; /* command line option */
67 unsigned long long monotonic_base;
69 struct vxtime_data __vxtime __section_vxtime; /* for vsyscalls */
71 volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
72 unsigned long __wall_jiffies __section_wall_jiffies = INITIAL_JIFFIES;
73 struct timespec __xtime __section_xtime;
74 struct timezone __sys_tz __section_sys_tz;
77 * do_gettimeoffset() returns microseconds since last timer interrupt was
78 * triggered by hardware. A memory read of HPET is slower than a register read
79 * of TSC, but much more reliable. It's also synchronized to the timer
80 * interrupt. Note that do_gettimeoffset() may return more than hpet_tick, if a
81 * timer interrupt has happened already, but vxtime.trigger wasn't updated yet.
82 * This is not a problem, because jiffies hasn't updated either. They are bound
83 * together by xtime_lock.
86 static inline unsigned int do_gettimeoffset_tsc(void)
90 t = get_cycles_sync();
91 if (t < vxtime.last_tsc)
92 t = vxtime.last_tsc; /* hack */
93 x = ((t - vxtime.last_tsc) * vxtime.tsc_quot) >> 32;
97 static inline unsigned int do_gettimeoffset_hpet(void)
99 /* cap counter read to one tick to avoid inconsistencies */
100 unsigned long counter = hpet_readl(HPET_COUNTER) - vxtime.last;
101 return (min(counter,hpet_tick) * vxtime.quot) >> 32;
104 unsigned int (*do_gettimeoffset)(void) = do_gettimeoffset_tsc;
107 * This version of gettimeofday() has microsecond resolution and better than
108 * microsecond precision, as we're using at least a 10 MHz (usually 14.31818
112 void do_gettimeofday(struct timeval *tv)
114 unsigned long seq, t;
115 unsigned int sec, usec;
118 seq = read_seqbegin(&xtime_lock);
121 usec = xtime.tv_nsec / 1000;
123 /* i386 does some correction here to keep the clock
124 monotonous even when ntpd is fixing drift.
125 But they didn't work for me, there is a non monotonic
126 clock anyways with ntp.
127 I dropped all corrections now until a real solution can
128 be found. Note when you fix it here you need to do the same
129 in arch/x86_64/kernel/vsyscall.c and export all needed
130 variables in vmlinux.lds. -AK */
132 t = (jiffies - wall_jiffies) * (1000000L / HZ) +
136 } while (read_seqretry(&xtime_lock, seq));
138 tv->tv_sec = sec + usec / 1000000;
139 tv->tv_usec = usec % 1000000;
142 EXPORT_SYMBOL(do_gettimeofday);
145 * settimeofday() first undoes the correction that gettimeofday would do
146 * on the time, and then saves it. This is ugly, but has been like this for
150 int do_settimeofday(struct timespec *tv)
152 time_t wtm_sec, sec = tv->tv_sec;
153 long wtm_nsec, nsec = tv->tv_nsec;
155 if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
158 write_seqlock_irq(&xtime_lock);
160 nsec -= do_gettimeoffset() * 1000 +
161 (jiffies - wall_jiffies) * (NSEC_PER_SEC/HZ);
163 wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
164 wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
166 set_normalized_timespec(&xtime, sec, nsec);
167 set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
171 write_sequnlock_irq(&xtime_lock);
176 EXPORT_SYMBOL(do_settimeofday);
178 unsigned long profile_pc(struct pt_regs *regs)
180 unsigned long pc = instruction_pointer(regs);
182 /* Assume the lock function has either no stack frame or only a single
183 word. This checks if the address on the stack looks like a kernel
185 There is a small window for false hits, but in that case the tick
186 is just accounted to the spinlock function.
187 Better would be to write these functions in assembler again
188 and check exactly. */
189 if (in_lock_functions(pc)) {
190 char *v = *(char **)regs->rsp;
191 if ((v >= _stext && v <= _etext) ||
192 (v >= _sinittext && v <= _einittext) ||
193 (v >= (char *)MODULES_VADDR && v <= (char *)MODULES_END))
194 return (unsigned long)v;
195 return ((unsigned long *)regs->rsp)[1];
199 EXPORT_SYMBOL(profile_pc);
202 * In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
203 * ms after the second nowtime has started, because when nowtime is written
204 * into the registers of the CMOS clock, it will jump to the next second
205 * precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data
209 static void set_rtc_mmss(unsigned long nowtime)
211 int real_seconds, real_minutes, cmos_minutes;
212 unsigned char control, freq_select;
215 * IRQs are disabled when we're called from the timer interrupt,
216 * no need for spin_lock_irqsave()
219 spin_lock(&rtc_lock);
222 * Tell the clock it's being set and stop it.
225 control = CMOS_READ(RTC_CONTROL);
226 CMOS_WRITE(control | RTC_SET, RTC_CONTROL);
228 freq_select = CMOS_READ(RTC_FREQ_SELECT);
229 CMOS_WRITE(freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT);
231 cmos_minutes = CMOS_READ(RTC_MINUTES);
232 BCD_TO_BIN(cmos_minutes);
235 * since we're only adjusting minutes and seconds, don't interfere with hour
236 * overflow. This avoids messing with unknown time zones but requires your RTC
237 * not to be off by more than 15 minutes. Since we're calling it only when
238 * our clock is externally synchronized using NTP, this shouldn't be a problem.
241 real_seconds = nowtime % 60;
242 real_minutes = nowtime / 60;
243 if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
244 real_minutes += 30; /* correct for half hour time zone */
247 if (abs(real_minutes - cmos_minutes) >= 30) {
248 printk(KERN_WARNING "time.c: can't update CMOS clock "
249 "from %d to %d\n", cmos_minutes, real_minutes);
251 BIN_TO_BCD(real_seconds);
252 BIN_TO_BCD(real_minutes);
253 CMOS_WRITE(real_seconds, RTC_SECONDS);
254 CMOS_WRITE(real_minutes, RTC_MINUTES);
258 * The following flags have to be released exactly in this order, otherwise the
259 * DS12887 (popular MC146818A clone with integrated battery and quartz) will
260 * not reset the oscillator and will not update precisely 500 ms later. You
261 * won't find this mentioned in the Dallas Semiconductor data sheets, but who
262 * believes data sheets anyway ... -- Markus Kuhn
265 CMOS_WRITE(control, RTC_CONTROL);
266 CMOS_WRITE(freq_select, RTC_FREQ_SELECT);
268 spin_unlock(&rtc_lock);
272 /* monotonic_clock(): returns # of nanoseconds passed since time_init()
273 * Note: This function is required to return accurate
274 * time even in the absence of multiple timer ticks.
276 unsigned long long monotonic_clock(void)
279 u32 last_offset, this_offset, offset;
280 unsigned long long base;
282 if (vxtime.mode == VXTIME_HPET) {
284 seq = read_seqbegin(&xtime_lock);
286 last_offset = vxtime.last;
287 base = monotonic_base;
288 this_offset = hpet_readl(HPET_COUNTER);
289 } while (read_seqretry(&xtime_lock, seq));
290 offset = (this_offset - last_offset);
291 offset *= (NSEC_PER_SEC/HZ) / hpet_tick;
294 seq = read_seqbegin(&xtime_lock);
296 last_offset = vxtime.last_tsc;
297 base = monotonic_base;
298 } while (read_seqretry(&xtime_lock, seq));
299 this_offset = get_cycles_sync();
300 offset = (this_offset - last_offset)*1000 / cpu_khz;
302 return base + offset;
304 EXPORT_SYMBOL(monotonic_clock);
306 static noinline void handle_lost_ticks(int lost, struct pt_regs *regs)
308 static long lost_count;
310 if (report_lost_ticks) {
311 printk(KERN_WARNING "time.c: Lost %d timer tick(s)! ", lost);
312 print_symbol("rip %s)\n", regs->rip);
315 if (lost_count == 1000 && !warned) {
316 printk(KERN_WARNING "warning: many lost ticks.\n"
317 KERN_WARNING "Your time source seems to be instable or "
318 "some driver is hogging interupts\n");
319 print_symbol("rip %s\n", regs->rip);
320 if (vxtime.mode == VXTIME_TSC && vxtime.hpet_address) {
321 printk(KERN_WARNING "Falling back to HPET\n");
323 vxtime.last = hpet_readl(HPET_T0_CMP) -
326 vxtime.last = hpet_readl(HPET_COUNTER);
327 vxtime.mode = VXTIME_HPET;
328 do_gettimeoffset = do_gettimeoffset_hpet;
330 /* else should fall back to PIT, but code missing. */
335 #ifdef CONFIG_CPU_FREQ
336 /* In some cases the CPU can change frequency without us noticing
337 Give cpufreq a change to catch up. */
338 if ((lost_count+1) % 25 == 0)
339 cpufreq_delayed_get();
343 void main_timer_handler(struct pt_regs *regs)
345 static unsigned long rtc_update = 0;
347 int delay = 0, offset = 0, lost = 0;
350 * Here we are in the timer irq handler. We have irqs locally disabled (so we
351 * don't need spin_lock_irqsave()) but we don't know if the timer_bh is running
352 * on the other CPU, so we need a lock. We also need to lock the vsyscall
353 * variables, because both do_timer() and us change them -arca+vojtech
356 write_seqlock(&xtime_lock);
358 if (vxtime.hpet_address)
359 offset = hpet_readl(HPET_COUNTER);
361 if (hpet_use_timer) {
362 /* if we're using the hpet timer functionality,
363 * we can more accurately know the counter value
364 * when the timer interrupt occured.
366 offset = hpet_readl(HPET_T0_CMP) - hpet_tick;
367 delay = hpet_readl(HPET_COUNTER) - offset;
368 } else if (!pmtmr_ioport) {
369 spin_lock(&i8253_lock);
372 delay |= inb(0x40) << 8;
373 spin_unlock(&i8253_lock);
374 delay = LATCH - 1 - delay;
377 tsc = get_cycles_sync();
379 if (vxtime.mode == VXTIME_HPET) {
380 if (offset - vxtime.last > hpet_tick) {
381 lost = (offset - vxtime.last) / hpet_tick - 1;
385 (offset - vxtime.last)*(NSEC_PER_SEC/HZ) / hpet_tick;
387 vxtime.last = offset;
388 #ifdef CONFIG_X86_PM_TIMER
389 } else if (vxtime.mode == VXTIME_PMTMR) {
390 lost = pmtimer_mark_offset();
393 offset = (((tsc - vxtime.last_tsc) *
394 vxtime.tsc_quot) >> 32) - (USEC_PER_SEC / HZ);
399 if (offset > (USEC_PER_SEC / HZ)) {
400 lost = offset / (USEC_PER_SEC / HZ);
401 offset %= (USEC_PER_SEC / HZ);
404 monotonic_base += (tsc - vxtime.last_tsc)*1000000/cpu_khz ;
406 vxtime.last_tsc = tsc - vxtime.quot * delay / vxtime.tsc_quot;
408 if ((((tsc - vxtime.last_tsc) *
409 vxtime.tsc_quot) >> 32) < offset)
410 vxtime.last_tsc = tsc -
411 (((long) offset << 32) / vxtime.tsc_quot) - 1;
415 handle_lost_ticks(lost, regs);
420 * Do the timer stuff.
425 update_process_times(user_mode(regs));
429 * In the SMP case we use the local APIC timer interrupt to do the profiling,
430 * except when we simulate SMP mode on a uniprocessor system, in that case we
431 * have to call the local interrupt handler.
434 #ifndef CONFIG_X86_LOCAL_APIC
435 profile_tick(CPU_PROFILING, regs);
437 if (!using_apic_timer)
438 smp_local_timer_interrupt(regs);
442 * If we have an externally synchronized Linux clock, then update CMOS clock
443 * accordingly every ~11 minutes. set_rtc_mmss() will be called in the jiffy
444 * closest to exactly 500 ms before the next second. If the update fails, we
445 * don't care, as it'll be updated on the next turn, and the problem (time way
446 * off) isn't likely to go away much sooner anyway.
449 if (ntp_synced() && xtime.tv_sec > rtc_update &&
450 abs(xtime.tv_nsec - 500000000) <= tick_nsec / 2) {
451 set_rtc_mmss(xtime.tv_sec);
452 rtc_update = xtime.tv_sec + 660;
455 write_sequnlock(&xtime_lock);
458 static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
460 if (apic_runs_main_timer > 1)
462 main_timer_handler(regs);
463 #ifdef CONFIG_X86_LOCAL_APIC
464 if (using_apic_timer)
465 smp_send_timer_broadcast_ipi();
470 static unsigned int cyc2ns_scale __read_mostly;
471 #define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
473 static inline void set_cyc2ns_scale(unsigned long cpu_khz)
475 cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR)/cpu_khz;
478 static inline unsigned long long cycles_2_ns(unsigned long long cyc)
480 return (cyc * cyc2ns_scale) >> CYC2NS_SCALE_FACTOR;
483 unsigned long long sched_clock(void)
488 /* Don't do a HPET read here. Using TSC always is much faster
489 and HPET may not be mapped yet when the scheduler first runs.
490 Disadvantage is a small drift between CPUs in some configurations,
491 but that should be tolerable. */
492 if (__vxtime.mode == VXTIME_HPET)
493 return (hpet_readl(HPET_COUNTER) * vxtime.quot) >> 32;
496 /* Could do CPU core sync here. Opteron can execute rdtsc speculatively,
497 which means it is not completely exact and may not be monotonous between
498 CPUs. But the errors should be too small to matter for scheduling
502 return cycles_2_ns(a);
505 static unsigned long get_cmos_time(void)
507 unsigned int year, mon, day, hour, min, sec;
509 unsigned extyear = 0;
511 spin_lock_irqsave(&rtc_lock, flags);
514 sec = CMOS_READ(RTC_SECONDS);
515 min = CMOS_READ(RTC_MINUTES);
516 hour = CMOS_READ(RTC_HOURS);
517 day = CMOS_READ(RTC_DAY_OF_MONTH);
518 mon = CMOS_READ(RTC_MONTH);
519 year = CMOS_READ(RTC_YEAR);
521 if (acpi_fadt.revision >= FADT2_REVISION_ID &&
523 extyear = CMOS_READ(acpi_fadt.century);
525 } while (sec != CMOS_READ(RTC_SECONDS));
527 spin_unlock_irqrestore(&rtc_lock, flags);
530 * We know that x86-64 always uses BCD format, no need to check the
544 printk(KERN_INFO "Extended CMOS year: %d\n", extyear);
547 * x86-64 systems only exists since 2002.
548 * This will work up to Dec 31, 2100
553 return mktime(year, mon, day, hour, min, sec);
556 #ifdef CONFIG_CPU_FREQ
558 /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency
561 RED-PEN: On SMP we assume all CPUs run with the same frequency. It's
562 not that important because current Opteron setups do not support
563 scaling on SMP anyroads.
565 Should fix up last_tsc too. Currently gettimeofday in the
566 first tick after the change will be slightly wrong. */
568 #include <linux/workqueue.h>
570 static unsigned int cpufreq_delayed_issched = 0;
571 static unsigned int cpufreq_init = 0;
572 static struct work_struct cpufreq_delayed_get_work;
574 static void handle_cpufreq_delayed_get(void *v)
577 for_each_online_cpu(cpu) {
580 cpufreq_delayed_issched = 0;
583 /* if we notice lost ticks, schedule a call to cpufreq_get() as it tries
584 * to verify the CPU frequency the timing core thinks the CPU is running
585 * at is still correct.
587 static void cpufreq_delayed_get(void)
590 if (cpufreq_init && !cpufreq_delayed_issched) {
591 cpufreq_delayed_issched = 1;
595 "Losing some ticks... checking if CPU frequency changed.\n");
597 schedule_work(&cpufreq_delayed_get_work);
601 static unsigned int ref_freq = 0;
602 static unsigned long loops_per_jiffy_ref = 0;
604 static unsigned long cpu_khz_ref = 0;
606 static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
609 struct cpufreq_freqs *freq = data;
610 unsigned long *lpj, dummy;
612 if (cpu_has(&cpu_data[freq->cpu], X86_FEATURE_CONSTANT_TSC))
616 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
618 lpj = &cpu_data[freq->cpu].loops_per_jiffy;
620 lpj = &boot_cpu_data.loops_per_jiffy;
624 ref_freq = freq->old;
625 loops_per_jiffy_ref = *lpj;
626 cpu_khz_ref = cpu_khz;
628 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
629 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
630 (val == CPUFREQ_RESUMECHANGE)) {
632 cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new);
634 cpu_khz = cpufreq_scale(cpu_khz_ref, ref_freq, freq->new);
635 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
636 vxtime.tsc_quot = (1000L << 32) / cpu_khz;
639 set_cyc2ns_scale(cpu_khz_ref);
644 static struct notifier_block time_cpufreq_notifier_block = {
645 .notifier_call = time_cpufreq_notifier
648 static int __init cpufreq_tsc(void)
650 INIT_WORK(&cpufreq_delayed_get_work, handle_cpufreq_delayed_get, NULL);
651 if (!cpufreq_register_notifier(&time_cpufreq_notifier_block,
652 CPUFREQ_TRANSITION_NOTIFIER))
657 core_initcall(cpufreq_tsc);
662 * calibrate_tsc() calibrates the processor TSC in a very simple way, comparing
663 * it to the HPET timer of known frequency.
666 #define TICK_COUNT 100000000
668 static unsigned int __init hpet_calibrate_tsc(void)
670 int tsc_start, hpet_start;
671 int tsc_now, hpet_now;
674 local_irq_save(flags);
677 hpet_start = hpet_readl(HPET_COUNTER);
682 hpet_now = hpet_readl(HPET_COUNTER);
683 tsc_now = get_cycles_sync();
684 local_irq_restore(flags);
685 } while ((tsc_now - tsc_start) < TICK_COUNT &&
686 (hpet_now - hpet_start) < TICK_COUNT);
688 return (tsc_now - tsc_start) * 1000000000L
689 / ((hpet_now - hpet_start) * hpet_period / 1000);
694 * pit_calibrate_tsc() uses the speaker output (channel 2) of
695 * the PIT. This is better than using the timer interrupt output,
696 * because we can read the value of the speaker with just one inb(),
697 * where we need three i/o operations for the interrupt channel.
698 * We count how many ticks the TSC does in 50 ms.
701 static unsigned int __init pit_calibrate_tsc(void)
703 unsigned long start, end;
706 spin_lock_irqsave(&i8253_lock, flags);
708 outb((inb(0x61) & ~0x02) | 0x01, 0x61);
711 outb((PIT_TICK_RATE / (1000 / 50)) & 0xff, 0x42);
712 outb((PIT_TICK_RATE / (1000 / 50)) >> 8, 0x42);
713 start = get_cycles_sync();
714 while ((inb(0x61) & 0x20) == 0);
715 end = get_cycles_sync();
717 spin_unlock_irqrestore(&i8253_lock, flags);
719 return (end - start) / 50;
723 static __init int late_hpet_init(void)
728 if (!vxtime.hpet_address)
731 memset(&hd, 0, sizeof (hd));
733 ntimer = hpet_readl(HPET_ID);
734 ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
738 * Register with driver.
739 * Timer0 and Timer1 is used by platform.
741 hd.hd_phys_address = vxtime.hpet_address;
742 hd.hd_address = (void __iomem *)fix_to_virt(FIX_HPET_BASE);
743 hd.hd_nirqs = ntimer;
744 hd.hd_flags = HPET_DATA_PLATFORM;
745 hpet_reserve_timer(&hd, 0);
746 #ifdef CONFIG_HPET_EMULATE_RTC
747 hpet_reserve_timer(&hd, 1);
749 hd.hd_irq[0] = HPET_LEGACY_8254;
750 hd.hd_irq[1] = HPET_LEGACY_RTC;
753 struct hpet_timer *timer;
756 hpet = (struct hpet *) fix_to_virt(FIX_HPET_BASE);
757 timer = &hpet->hpet_timers[2];
758 for (i = 2; i < ntimer; timer++, i++)
759 hd.hd_irq[i] = (timer->hpet_config &
760 Tn_INT_ROUTE_CNF_MASK) >>
761 Tn_INT_ROUTE_CNF_SHIFT;
768 fs_initcall(late_hpet_init);
771 static int hpet_timer_stop_set_go(unsigned long tick)
776 * Stop the timers and reset the main counter.
779 cfg = hpet_readl(HPET_CFG);
780 cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY);
781 hpet_writel(cfg, HPET_CFG);
782 hpet_writel(0, HPET_COUNTER);
783 hpet_writel(0, HPET_COUNTER + 4);
786 * Set up timer 0, as periodic with first interrupt to happen at hpet_tick,
787 * and period also hpet_tick.
789 if (hpet_use_timer) {
790 hpet_writel(HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL |
791 HPET_TN_32BIT, HPET_T0_CFG);
792 hpet_writel(hpet_tick, HPET_T0_CMP);
793 hpet_writel(hpet_tick, HPET_T0_CMP); /* AK: why twice? */
794 cfg |= HPET_CFG_LEGACY;
800 cfg |= HPET_CFG_ENABLE;
801 hpet_writel(cfg, HPET_CFG);
806 static int hpet_init(void)
810 if (!vxtime.hpet_address)
812 set_fixmap_nocache(FIX_HPET_BASE, vxtime.hpet_address);
813 __set_fixmap(VSYSCALL_HPET, vxtime.hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE);
816 * Read the period, compute tick and quotient.
819 id = hpet_readl(HPET_ID);
821 if (!(id & HPET_ID_VENDOR) || !(id & HPET_ID_NUMBER))
824 hpet_period = hpet_readl(HPET_PERIOD);
825 if (hpet_period < 100000 || hpet_period > 100000000)
828 hpet_tick = (1000000000L * (USEC_PER_SEC / HZ) + hpet_period / 2) /
831 hpet_use_timer = (id & HPET_ID_LEGSUP);
833 return hpet_timer_stop_set_go(hpet_tick);
836 static int hpet_reenable(void)
838 return hpet_timer_stop_set_go(hpet_tick);
841 #define PIT_MODE 0x43
844 static void __init __pit_init(int val, u8 mode)
848 spin_lock_irqsave(&i8253_lock, flags);
849 outb_p(mode, PIT_MODE);
850 outb_p(val & 0xff, PIT_CH0); /* LSB */
851 outb_p(val >> 8, PIT_CH0); /* MSB */
852 spin_unlock_irqrestore(&i8253_lock, flags);
855 void __init pit_init(void)
857 __pit_init(LATCH, 0x34); /* binary, mode 2, LSB/MSB, ch 0 */
860 void __init pit_stop_interrupt(void)
862 __pit_init(0, 0x30); /* mode 0 */
865 void __init stop_timer_interrupt(void)
868 if (vxtime.hpet_address) {
870 hpet_timer_stop_set_go(0);
873 pit_stop_interrupt();
875 printk(KERN_INFO "timer: %s interrupt stopped.\n", name);
878 int __init time_setup(char *str)
880 report_lost_ticks = 1;
884 static struct irqaction irq0 = {
885 timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL
888 void __init time_init(void)
893 #ifdef HPET_HACK_ENABLE_DANGEROUS
894 if (!vxtime.hpet_address) {
895 printk(KERN_WARNING "time.c: WARNING: Enabling HPET base "
897 outl(0x800038a0, 0xcf8);
898 outl(0xff000001, 0xcfc);
899 outl(0x800038a0, 0xcf8);
900 vxtime.hpet_address = inl(0xcfc) & 0xfffffffe;
901 printk(KERN_WARNING "time.c: WARNING: Enabled HPET "
902 "at %#lx.\n", vxtime.hpet_address);
906 vxtime.hpet_address = 0;
908 xtime.tv_sec = get_cmos_time();
911 set_normalized_timespec(&wall_to_monotonic,
912 -xtime.tv_sec, -xtime.tv_nsec);
915 vxtime_hz = (1000000000000000L + hpet_period / 2) / hpet_period;
917 vxtime.hpet_address = 0;
919 if (hpet_use_timer) {
920 /* set tick_nsec to use the proper rate for HPET */
921 tick_nsec = TICK_NSEC_HPET;
922 cpu_khz = hpet_calibrate_tsc();
924 #ifdef CONFIG_X86_PM_TIMER
925 } else if (pmtmr_ioport && !vxtime.hpet_address) {
926 vxtime_hz = PM_TIMER_FREQUENCY;
929 cpu_khz = pit_calibrate_tsc();
933 cpu_khz = pit_calibrate_tsc();
937 vxtime.mode = VXTIME_TSC;
938 gtod = time_init_gtod();
940 printk(KERN_INFO "time.c: Using %ld.%06ld MHz WALL %s GTOD %s timer.\n",
941 vxtime_hz / 1000000, vxtime_hz % 1000000, timename, gtod);
942 printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
943 cpu_khz / 1000, cpu_khz % 1000);
944 vxtime.quot = (1000000L << 32) / vxtime_hz;
945 vxtime.tsc_quot = (1000L << 32) / cpu_khz;
946 vxtime.last_tsc = get_cycles_sync();
949 set_cyc2ns_scale(cpu_khz);
953 * Make an educated guess if the TSC is trustworthy and synchronized
956 __cpuinit int unsynchronized_tsc(void)
959 if (oem_force_hpet_timer())
961 /* Intel systems are normally all synchronized. Exceptions
962 are handled in the OEM check above. */
963 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
966 /* Assume multi socket systems are not synchronized */
967 return num_present_cpus() > 1;
971 * Decide what mode gettimeofday should use.
973 __init static char *time_init_gtod(void)
977 if (unsynchronized_tsc())
979 if (vxtime.hpet_address && notsc) {
980 timetype = hpet_use_timer ? "HPET" : "PIT/HPET";
982 vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
984 vxtime.last = hpet_readl(HPET_COUNTER);
985 vxtime.mode = VXTIME_HPET;
986 do_gettimeoffset = do_gettimeoffset_hpet;
987 #ifdef CONFIG_X86_PM_TIMER
988 /* Using PM for gettimeofday is quite slow, but we have no other
989 choice because the TSC is too unreliable on some systems. */
990 } else if (pmtmr_ioport && !vxtime.hpet_address && notsc) {
992 do_gettimeoffset = do_gettimeoffset_pm;
993 vxtime.mode = VXTIME_PMTMR;
995 printk(KERN_INFO "Disabling vsyscall due to use of PM timer\n");
998 timetype = hpet_use_timer ? "HPET/TSC" : "PIT/TSC";
999 vxtime.mode = VXTIME_TSC;
1004 __setup("report_lost_ticks", time_setup);
1006 static long clock_cmos_diff;
1007 static unsigned long sleep_start;
1010 * sysfs support for the timer.
1013 static int timer_suspend(struct sys_device *dev, pm_message_t state)
1016 * Estimate time zone so that set_time can update the clock
1018 long cmos_time = get_cmos_time();
1020 clock_cmos_diff = -cmos_time;
1021 clock_cmos_diff += get_seconds();
1022 sleep_start = cmos_time;
1026 static int timer_resume(struct sys_device *dev)
1028 unsigned long flags;
1030 unsigned long ctime = get_cmos_time();
1031 unsigned long sleep_length = (ctime - sleep_start) * HZ;
1033 if (vxtime.hpet_address)
1036 i8254_timer_resume();
1038 sec = ctime + clock_cmos_diff;
1039 write_seqlock_irqsave(&xtime_lock,flags);
1042 if (vxtime.mode == VXTIME_HPET) {
1044 vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
1046 vxtime.last = hpet_readl(HPET_COUNTER);
1047 #ifdef CONFIG_X86_PM_TIMER
1048 } else if (vxtime.mode == VXTIME_PMTMR) {
1052 vxtime.last_tsc = get_cycles_sync();
1053 write_sequnlock_irqrestore(&xtime_lock,flags);
1054 jiffies += sleep_length;
1055 wall_jiffies += sleep_length;
1056 monotonic_base += sleep_length * (NSEC_PER_SEC/HZ);
1057 touch_softlockup_watchdog();
1061 static struct sysdev_class timer_sysclass = {
1062 .resume = timer_resume,
1063 .suspend = timer_suspend,
1064 set_kset_name("timer"),
1067 /* XXX this driverfs stuff should probably go elsewhere later -john */
1068 static struct sys_device device_timer = {
1070 .cls = &timer_sysclass,
1073 static int time_init_device(void)
1075 int error = sysdev_class_register(&timer_sysclass);
1077 error = sysdev_register(&device_timer);
1081 device_initcall(time_init_device);
1083 #ifdef CONFIG_HPET_EMULATE_RTC
1084 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
1085 * is enabled, we support RTC interrupt functionality in software.
1086 * RTC has 3 kinds of interrupts:
1087 * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
1089 * 2) Alarm Interrupt - generate an interrupt at a specific time of day
1090 * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
1091 * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
1092 * (1) and (2) above are implemented using polling at a frequency of
1093 * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
1094 * overhead. (DEFAULT_RTC_INT_FREQ)
1095 * For (3), we use interrupts at 64Hz or user specified periodic
1096 * frequency, whichever is higher.
1098 #include <linux/rtc.h>
1100 #define DEFAULT_RTC_INT_FREQ 64
1101 #define RTC_NUM_INTS 1
1103 static unsigned long UIE_on;
1104 static unsigned long prev_update_sec;
1106 static unsigned long AIE_on;
1107 static struct rtc_time alarm_time;
1109 static unsigned long PIE_on;
1110 static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
1111 static unsigned long PIE_count;
1113 static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
1114 static unsigned int hpet_t1_cmp; /* cached comparator register */
1116 int is_hpet_enabled(void)
1118 return vxtime.hpet_address != 0;
1122 * Timer 1 for RTC, we do not use periodic interrupt feature,
1123 * even if HPET supports periodic interrupts on Timer 1.
1124 * The reason being, to set up a periodic interrupt in HPET, we need to
1125 * stop the main counter. And if we do that everytime someone diables/enables
1126 * RTC, we will have adverse effect on main kernel timer running on Timer 0.
1127 * So, for the time being, simulate the periodic interrupt in software.
1129 * hpet_rtc_timer_init() is called for the first time and during subsequent
1130 * interuppts reinit happens through hpet_rtc_timer_reinit().
1132 int hpet_rtc_timer_init(void)
1134 unsigned int cfg, cnt;
1135 unsigned long flags;
1137 if (!is_hpet_enabled())
1140 * Set the counter 1 and enable the interrupts.
1142 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
1143 hpet_rtc_int_freq = PIE_freq;
1145 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
1147 local_irq_save(flags);
1148 cnt = hpet_readl(HPET_COUNTER);
1149 cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
1150 hpet_writel(cnt, HPET_T1_CMP);
1152 local_irq_restore(flags);
1154 cfg = hpet_readl(HPET_T1_CFG);
1155 cfg &= ~HPET_TN_PERIODIC;
1156 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
1157 hpet_writel(cfg, HPET_T1_CFG);
1162 static void hpet_rtc_timer_reinit(void)
1164 unsigned int cfg, cnt;
1166 if (unlikely(!(PIE_on | AIE_on | UIE_on))) {
1167 cfg = hpet_readl(HPET_T1_CFG);
1168 cfg &= ~HPET_TN_ENABLE;
1169 hpet_writel(cfg, HPET_T1_CFG);
1173 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
1174 hpet_rtc_int_freq = PIE_freq;
1176 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
1178 /* It is more accurate to use the comparator value than current count.*/
1180 cnt += hpet_tick*HZ/hpet_rtc_int_freq;
1181 hpet_writel(cnt, HPET_T1_CMP);
1186 * The functions below are called from rtc driver.
1187 * Return 0 if HPET is not being used.
1188 * Otherwise do the necessary changes and return 1.
1190 int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
1192 if (!is_hpet_enabled())
1195 if (bit_mask & RTC_UIE)
1197 if (bit_mask & RTC_PIE)
1199 if (bit_mask & RTC_AIE)
1205 int hpet_set_rtc_irq_bit(unsigned long bit_mask)
1207 int timer_init_reqd = 0;
1209 if (!is_hpet_enabled())
1212 if (!(PIE_on | AIE_on | UIE_on))
1213 timer_init_reqd = 1;
1215 if (bit_mask & RTC_UIE) {
1218 if (bit_mask & RTC_PIE) {
1222 if (bit_mask & RTC_AIE) {
1226 if (timer_init_reqd)
1227 hpet_rtc_timer_init();
1232 int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
1234 if (!is_hpet_enabled())
1237 alarm_time.tm_hour = hrs;
1238 alarm_time.tm_min = min;
1239 alarm_time.tm_sec = sec;
1244 int hpet_set_periodic_freq(unsigned long freq)
1246 if (!is_hpet_enabled())
1255 int hpet_rtc_dropped_irq(void)
1257 if (!is_hpet_enabled())
1263 irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1265 struct rtc_time curr_time;
1266 unsigned long rtc_int_flag = 0;
1267 int call_rtc_interrupt = 0;
1269 hpet_rtc_timer_reinit();
1271 if (UIE_on | AIE_on) {
1272 rtc_get_rtc_time(&curr_time);
1275 if (curr_time.tm_sec != prev_update_sec) {
1276 /* Set update int info, call real rtc int routine */
1277 call_rtc_interrupt = 1;
1278 rtc_int_flag = RTC_UF;
1279 prev_update_sec = curr_time.tm_sec;
1284 if (PIE_count >= hpet_rtc_int_freq/PIE_freq) {
1285 /* Set periodic int info, call real rtc int routine */
1286 call_rtc_interrupt = 1;
1287 rtc_int_flag |= RTC_PF;
1292 if ((curr_time.tm_sec == alarm_time.tm_sec) &&
1293 (curr_time.tm_min == alarm_time.tm_min) &&
1294 (curr_time.tm_hour == alarm_time.tm_hour)) {
1295 /* Set alarm int info, call real rtc int routine */
1296 call_rtc_interrupt = 1;
1297 rtc_int_flag |= RTC_AF;
1300 if (call_rtc_interrupt) {
1301 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
1302 rtc_interrupt(rtc_int_flag, dev_id, regs);
1308 static int __init nohpet_setup(char *s)
1314 __setup("nohpet", nohpet_setup);
1316 int __init notsc_setup(char *s)
1322 __setup("notsc", notsc_setup);