2 * linux/arch/arm/mach-realview/realview_eb.c
4 * Copyright (C) 2004 ARM Limited
5 * Copyright (C) 2000 Deep Blue Solutions Ltd
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 #include <linux/init.h>
23 #include <linux/platform_device.h>
24 #include <linux/sysdev.h>
25 #include <linux/amba/bus.h>
27 #include <asm/hardware.h>
31 #include <asm/mach-types.h>
32 #include <asm/hardware/gic.h>
33 #include <asm/hardware/icst307.h>
34 #include <asm/hardware/cache-l2x0.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/mmc.h>
39 #include <asm/mach/time.h>
41 #include <asm/arch/board-eb.h>
42 #include <asm/arch/irqs.h>
47 static struct map_desc realview_eb_io_desc[] __initdata = {
49 .virtual = IO_ADDRESS(REALVIEW_SYS_BASE),
50 .pfn = __phys_to_pfn(REALVIEW_SYS_BASE),
54 .virtual = IO_ADDRESS(REALVIEW_GIC_CPU_BASE),
55 .pfn = __phys_to_pfn(REALVIEW_GIC_CPU_BASE),
59 .virtual = IO_ADDRESS(REALVIEW_GIC_DIST_BASE),
60 .pfn = __phys_to_pfn(REALVIEW_GIC_DIST_BASE),
64 .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE),
65 .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE),
69 .virtual = IO_ADDRESS(REALVIEW_TIMER0_1_BASE),
70 .pfn = __phys_to_pfn(REALVIEW_TIMER0_1_BASE),
74 .virtual = IO_ADDRESS(REALVIEW_TIMER2_3_BASE),
75 .pfn = __phys_to_pfn(REALVIEW_TIMER2_3_BASE),
79 #ifdef CONFIG_DEBUG_LL
81 .virtual = IO_ADDRESS(REALVIEW_UART0_BASE),
82 .pfn = __phys_to_pfn(REALVIEW_UART0_BASE),
89 static struct map_desc realview_eb11mp_io_desc[] __initdata = {
91 .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_CPU_BASE),
92 .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_CPU_BASE),
96 .virtual = IO_ADDRESS(REALVIEW_EB11MP_GIC_DIST_BASE),
97 .pfn = __phys_to_pfn(REALVIEW_EB11MP_GIC_DIST_BASE),
101 .virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE),
102 .pfn = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE),
108 static void __init realview_eb_map_io(void)
110 iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
111 if (core_tile_eb11mp())
112 iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
116 * RealView EB AMBA devices
120 * These devices are connected via the core APB bridge
122 #define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ }
123 #define GPIO2_DMA { 0, 0 }
124 #define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ }
125 #define GPIO3_DMA { 0, 0 }
127 #define AACI_IRQ { IRQ_EB_AACI, NO_IRQ }
128 #define AACI_DMA { 0x80, 0x81 }
129 #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B }
130 #define MMCI0_DMA { 0x84, 0 }
131 #define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ }
132 #define KMI0_DMA { 0, 0 }
133 #define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ }
134 #define KMI1_DMA { 0, 0 }
137 * These devices are connected directly to the multi-layer AHB switch
139 #define SMC_IRQ { NO_IRQ, NO_IRQ }
140 #define SMC_DMA { 0, 0 }
141 #define MPMC_IRQ { NO_IRQ, NO_IRQ }
142 #define MPMC_DMA { 0, 0 }
143 #define CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ }
144 #define CLCD_DMA { 0, 0 }
145 #define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ }
146 #define DMAC_DMA { 0, 0 }
149 * These devices are connected via the core APB bridge
151 #define SCTL_IRQ { NO_IRQ, NO_IRQ }
152 #define SCTL_DMA { 0, 0 }
153 #define WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ }
154 #define WATCHDOG_DMA { 0, 0 }
155 #define GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ }
156 #define GPIO0_DMA { 0, 0 }
157 #define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ }
158 #define GPIO1_DMA { 0, 0 }
159 #define RTC_IRQ { IRQ_EB_RTC, NO_IRQ }
160 #define RTC_DMA { 0, 0 }
163 * These devices are connected via the DMA APB bridge
165 #define SCI_IRQ { IRQ_EB_SCI, NO_IRQ }
166 #define SCI_DMA { 7, 6 }
167 #define UART0_IRQ { IRQ_EB_UART0, NO_IRQ }
168 #define UART0_DMA { 15, 14 }
169 #define UART1_IRQ { IRQ_EB_UART1, NO_IRQ }
170 #define UART1_DMA { 13, 12 }
171 #define UART2_IRQ { IRQ_EB_UART2, NO_IRQ }
172 #define UART2_DMA { 11, 10 }
173 #define UART3_IRQ { IRQ_EB_UART3, NO_IRQ }
174 #define UART3_DMA { 0x86, 0x87 }
175 #define SSP_IRQ { IRQ_EB_SSP, NO_IRQ }
176 #define SSP_DMA { 9, 8 }
178 /* FPGA Primecells */
179 AMBA_DEVICE(aaci, "fpga:04", AACI, NULL);
180 AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &realview_mmc0_plat_data);
181 AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL);
182 AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL);
183 AMBA_DEVICE(uart3, "fpga:09", UART3, NULL);
185 /* DevChip Primecells */
186 AMBA_DEVICE(smc, "dev:00", SMC, NULL);
187 AMBA_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data);
188 AMBA_DEVICE(dmac, "dev:30", DMAC, NULL);
189 AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL);
190 AMBA_DEVICE(wdog, "dev:e1", WATCHDOG, NULL);
191 AMBA_DEVICE(gpio0, "dev:e4", GPIO0, NULL);
192 AMBA_DEVICE(gpio1, "dev:e5", GPIO1, NULL);
193 AMBA_DEVICE(gpio2, "dev:e6", GPIO2, NULL);
194 AMBA_DEVICE(rtc, "dev:e8", RTC, NULL);
195 AMBA_DEVICE(sci0, "dev:f0", SCI, NULL);
196 AMBA_DEVICE(uart0, "dev:f1", UART0, NULL);
197 AMBA_DEVICE(uart1, "dev:f2", UART1, NULL);
198 AMBA_DEVICE(uart2, "dev:f3", UART2, NULL);
199 AMBA_DEVICE(ssp0, "dev:f4", SSP, NULL);
201 static struct amba_device *amba_devs[] __initdata = {
224 * RealView EB platform devices
227 static struct resource realview_eb_smc91x_resources[] = {
229 .start = REALVIEW_ETH_BASE,
230 .end = REALVIEW_ETH_BASE + SZ_64K - 1,
231 .flags = IORESOURCE_MEM,
236 .flags = IORESOURCE_IRQ,
240 static struct platform_device realview_eb_smc91x_device = {
243 .num_resources = ARRAY_SIZE(realview_eb_smc91x_resources),
244 .resource = realview_eb_smc91x_resources,
247 static void __init gic_init_irq(void)
249 if (core_tile_eb11mp()) {
250 unsigned int pldctrl;
253 writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK));
254 pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
255 pldctrl |= 0x00800000;
256 writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1);
257 writel(0x00000000, __io_address(REALVIEW_SYS_LOCK));
259 /* core tile GIC, primary */
260 gic_cpu_base_addr = __io_address(REALVIEW_EB11MP_GIC_CPU_BASE);
261 gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29);
262 gic_cpu_init(0, gic_cpu_base_addr);
264 #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
265 /* board GIC, secondary */
266 gic_dist_init(1, __io_address(REALVIEW_GIC_DIST_BASE), 64);
267 gic_cpu_init(1, __io_address(REALVIEW_GIC_CPU_BASE));
268 gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
271 /* board GIC, primary */
272 gic_cpu_base_addr = __io_address(REALVIEW_GIC_CPU_BASE);
273 gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29);
274 gic_cpu_init(0, gic_cpu_base_addr);
279 * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile
281 static void realview_eb11mp_fixup(void)
284 dmac_device.irq[0] = IRQ_EB11MP_DMA;
285 uart0_device.irq[0] = IRQ_EB11MP_UART0;
286 uart1_device.irq[0] = IRQ_EB11MP_UART1;
287 uart2_device.irq[0] = IRQ_EB11MP_UART2;
288 uart3_device.irq[0] = IRQ_EB11MP_UART3;
289 clcd_device.irq[0] = IRQ_EB11MP_CLCD;
290 wdog_device.irq[0] = IRQ_EB11MP_WDOG;
291 gpio0_device.irq[0] = IRQ_EB11MP_GPIO0;
292 gpio1_device.irq[0] = IRQ_EB11MP_GPIO1;
293 gpio2_device.irq[0] = IRQ_EB11MP_GPIO2;
294 rtc_device.irq[0] = IRQ_EB11MP_RTC;
295 sci0_device.irq[0] = IRQ_EB11MP_SCI;
296 ssp0_device.irq[0] = IRQ_EB11MP_SSP;
297 aaci_device.irq[0] = IRQ_EB11MP_AACI;
298 mmc0_device.irq[0] = IRQ_EB11MP_MMCI0A;
299 mmc0_device.irq[1] = IRQ_EB11MP_MMCI0B;
300 kmi0_device.irq[0] = IRQ_EB11MP_KMI0;
301 kmi1_device.irq[0] = IRQ_EB11MP_KMI1;
303 /* platform devices */
304 realview_eb_smc91x_resources[1].start = IRQ_EB11MP_ETH;
305 realview_eb_smc91x_resources[1].end = IRQ_EB11MP_ETH;
308 static void __init realview_eb_timer_init(void)
310 unsigned int timer_irq;
312 if (core_tile_eb11mp()) {
313 #ifdef CONFIG_LOCAL_TIMERS
314 twd_base_addr = __io_address(REALVIEW_EB11MP_TWD_BASE);
315 twd_size = REALVIEW_EB11MP_TWD_SIZE;
317 timer_irq = IRQ_EB11MP_TIMER0_1;
319 timer_irq = IRQ_EB_TIMER0_1;
321 realview_timer_init(timer_irq);
324 static struct sys_timer realview_eb_timer = {
325 .init = realview_eb_timer_init,
328 static void __init realview_eb_init(void)
332 if (core_tile_eb11mp()) {
333 realview_eb11mp_fixup();
335 /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled
336 * Bits: .... ...0 0111 1001 0000 .... .... .... */
337 l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff);
340 clk_register(&realview_clcd_clk);
342 platform_device_register(&realview_flash_device);
343 platform_device_register(&realview_eb_smc91x_device);
344 platform_device_register(&realview_i2c_device);
346 for (i = 0; i < ARRAY_SIZE(amba_devs); i++) {
347 struct amba_device *d = amba_devs[i];
348 amba_device_register(d, &iomem_resource);
352 leds_event = realview_leds_event;
356 MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
357 /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
358 .phys_io = REALVIEW_UART0_BASE,
359 .io_pg_offst = (IO_ADDRESS(REALVIEW_UART0_BASE) >> 18) & 0xfffc,
360 .boot_params = 0x00000100,
361 .map_io = realview_eb_map_io,
362 .init_irq = gic_init_irq,
363 .timer = &realview_eb_timer,
364 .init_machine = realview_eb_init,