Merge branch 'for-2.6.25' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/pasemi
[linux-2.6] / arch / powerpc / boot / dts / katmai.dts
1 /*
2  * Device Tree Source for AMCC Katmai eval board
3  *
4  * Copyright (c) 2006, 2007 IBM Corp.
5  * Benjamin Herrenschmidt <benh@kernel.crashing.org>
6  *
7  * Copyright (c) 2006, 2007 IBM Corp.
8  * Josh Boyer <jwboyer@linux.vnet.ibm.com>
9  *
10  * This file is licensed under the terms of the GNU General Public
11  * License version 2.  This program is licensed "as is" without
12  * any warranty of any kind, whether express or implied.
13  */
14
15 / {
16         #address-cells = <2>;
17         #size-cells = <1>;
18         model = "amcc,katmai";
19         compatible = "amcc,katmai";
20         dcr-parent = <&/cpus/cpu@0>;
21
22         aliases {
23                 ethernet0 = &EMAC0;
24                 serial0 = &UART0;
25                 serial1 = &UART1;
26                 serial2 = &UART2;
27         };
28
29         cpus {
30                 #address-cells = <1>;
31                 #size-cells = <0>;
32
33                 cpu@0 {
34                         device_type = "cpu";
35                         model = "PowerPC,440SPe";
36                         reg = <0>;
37                         clock-frequency = <0>; /* Filled in by zImage */
38                         timebase-frequency = <0>; /* Filled in by zImage */
39                         i-cache-line-size = <20>;
40                         d-cache-line-size = <20>;
41                         i-cache-size = <20000>;
42                         d-cache-size = <20000>;
43                         dcr-controller;
44                         dcr-access-method = "native";
45                 };
46         };
47
48         memory {
49                 device_type = "memory";
50                 reg = <0 0 0>; /* Filled in by zImage */
51         };
52
53         UIC0: interrupt-controller0 {
54                 compatible = "ibm,uic-440spe","ibm,uic";
55                 interrupt-controller;
56                 cell-index = <0>;
57                 dcr-reg = <0c0 009>;
58                 #address-cells = <0>;
59                 #size-cells = <0>;
60                 #interrupt-cells = <2>;
61         };
62
63         UIC1: interrupt-controller1 {
64                 compatible = "ibm,uic-440spe","ibm,uic";
65                 interrupt-controller;
66                 cell-index = <1>;
67                 dcr-reg = <0d0 009>;
68                 #address-cells = <0>;
69                 #size-cells = <0>;
70                 #interrupt-cells = <2>;
71                 interrupts = <1e 4 1f 4>; /* cascade */
72                 interrupt-parent = <&UIC0>;
73         };
74
75         UIC2: interrupt-controller2 {
76                 compatible = "ibm,uic-440spe","ibm,uic";
77                 interrupt-controller;
78                 cell-index = <2>;
79                 dcr-reg = <0e0 009>;
80                 #address-cells = <0>;
81                 #size-cells = <0>;
82                 #interrupt-cells = <2>;
83                 interrupts = <a 4 b 4>; /* cascade */
84                 interrupt-parent = <&UIC0>;
85         };
86
87         UIC3: interrupt-controller3 {
88                 compatible = "ibm,uic-440spe","ibm,uic";
89                 interrupt-controller;
90                 cell-index = <3>;
91                 dcr-reg = <0f0 009>;
92                 #address-cells = <0>;
93                 #size-cells = <0>;
94                 #interrupt-cells = <2>;
95                 interrupts = <10 4 11 4>; /* cascade */
96                 interrupt-parent = <&UIC0>;
97         };
98
99         SDR0: sdr {
100                 compatible = "ibm,sdr-440spe";
101                 dcr-reg = <00e 002>;
102         };
103
104         CPR0: cpr {
105                 compatible = "ibm,cpr-440spe";
106                 dcr-reg = <00c 002>;
107         };
108
109         plb {
110                 compatible = "ibm,plb-440spe", "ibm,plb-440gp", "ibm,plb4";
111                 #address-cells = <2>;
112                 #size-cells = <1>;
113                 ranges;
114                 clock-frequency = <0>; /* Filled in by zImage */
115
116                 SDRAM0: sdram {
117                         compatible = "ibm,sdram-440spe", "ibm,sdram-405gp";
118                         dcr-reg = <010 2>;
119                 };
120
121                 MAL0: mcmal {
122                         compatible = "ibm,mcmal-440spe", "ibm,mcmal2";
123                         dcr-reg = <180 62>;
124                         num-tx-chans = <2>;
125                         num-rx-chans = <1>;
126                         interrupt-parent = <&MAL0>;
127                         interrupts = <0 1 2 3 4>;
128                         #interrupt-cells = <1>;
129                         #address-cells = <0>;
130                         #size-cells = <0>;
131                         interrupt-map = </*TXEOB*/ 0 &UIC1 6 4
132                                          /*RXEOB*/ 1 &UIC1 7 4
133                                          /*SERR*/  2 &UIC1 1 4
134                                          /*TXDE*/  3 &UIC1 2 4
135                                          /*RXDE*/  4 &UIC1 3 4>;
136                 };
137
138                 POB0: opb {
139                         compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb";
140                         #address-cells = <1>;
141                         #size-cells = <1>;
142                         ranges = <00000000 4 e0000000 20000000>;
143                         clock-frequency = <0>; /* Filled in by zImage */
144
145                         EBC0: ebc {
146                                 compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc";
147                                 dcr-reg = <012 2>;
148                                 #address-cells = <2>;
149                                 #size-cells = <1>;
150                                 clock-frequency = <0>; /* Filled in by zImage */
151                                 interrupts = <5 1>;
152                                 interrupt-parent = <&UIC1>;
153                         };
154
155                         UART0: serial@10000200 {
156                                 device_type = "serial";
157                                 compatible = "ns16550";
158                                 reg = <10000200 8>;
159                                 virtual-reg = <a0000200>;
160                                 clock-frequency = <0>; /* Filled in by zImage */
161                                 current-speed = <1c200>;
162                                 interrupt-parent = <&UIC0>;
163                                 interrupts = <0 4>;
164                         };
165
166                         UART1: serial@10000300 {
167                                 device_type = "serial";
168                                 compatible = "ns16550";
169                                 reg = <10000300 8>;
170                                 virtual-reg = <a0000300>;
171                                 clock-frequency = <0>;
172                                 current-speed = <0>;
173                                 interrupt-parent = <&UIC0>;
174                                 interrupts = <1 4>;
175                         };
176
177
178                         UART2: serial@10000600 {
179                                 device_type = "serial";
180                                 compatible = "ns16550";
181                                 reg = <10000600 8>;
182                                 virtual-reg = <a0000600>;
183                                 clock-frequency = <0>;
184                                 current-speed = <0>;
185                                 interrupt-parent = <&UIC1>;
186                                 interrupts = <5 4>;
187                         };
188
189                         IIC0: i2c@10000400 {
190                                 device_type = "i2c";
191                                 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
192                                 reg = <10000400 14>;
193                                 interrupt-parent = <&UIC0>;
194                                 interrupts = <2 4>;
195                         };
196
197                         IIC1: i2c@10000500 {
198                                 device_type = "i2c";
199                                 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
200                                 reg = <10000500 14>;
201                                 interrupt-parent = <&UIC0>;
202                                 interrupts = <3 4>;
203                         };
204
205                         EMAC0: ethernet@10000800 {
206                                 linux,network-index = <0>;
207                                 device_type = "network";
208                                 compatible = "ibm,emac-440spe", "ibm,emac4";
209                                 interrupt-parent = <&UIC1>;
210                                 interrupts = <1c 4 1d 4>;
211                                 reg = <10000800 70>;
212                                 local-mac-address = [000000000000];
213                                 mal-device = <&MAL0>;
214                                 mal-tx-channel = <0>;
215                                 mal-rx-channel = <0>;
216                                 cell-index = <0>;
217                                 max-frame-size = <5dc>;
218                                 rx-fifo-size = <1000>;
219                                 tx-fifo-size = <800>;
220                                 phy-mode = "gmii";
221                                 phy-map = <00000000>;
222                                 has-inverted-stacr-oc;
223                                 has-new-stacr-staopc;
224                         };
225                 };
226
227                 PCIX0: pci@c0ec00000 {
228                         device_type = "pci";
229                         #interrupt-cells = <1>;
230                         #size-cells = <2>;
231                         #address-cells = <3>;
232                         compatible = "ibm,plb-pcix-440spe", "ibm,plb-pcix";
233                         primary;
234                         large-inbound-windows;
235                         enable-msi-hole;
236                         reg = <c 0ec00000   8   /* Config space access */
237                                0 0 0            /* no IACK cycles */
238                                c 0ed00000   4   /* Special cycles */
239                                c 0ec80000 100   /* Internal registers */
240                                c 0ec80100  fc>; /* Internal messaging registers */
241
242                         /* Outbound ranges, one memory and one IO,
243                          * later cannot be changed
244                          */
245                         ranges = <02000000 0 80000000 0000000d 80000000 0 80000000
246                                   01000000 0 00000000 0000000c 08000000 0 00010000>;
247
248                         /* Inbound 2GB range starting at 0 */
249                         dma-ranges = <42000000 0 0 0 0 0 80000000>;
250
251                         /* This drives busses 0 to 0xf */
252                         bus-range = <0 f>;
253
254                         /*
255                          * On Katmai, the following PCI-X interrupts signals
256                          * have to be enabled via jumpers (only INTA is
257                          * enabled per default):
258                          *
259                          * INTB: J3: 1-2
260                          * INTC: J2: 1-2
261                          * INTD: J1: 1-2
262                          */
263                         interrupt-map-mask = <f800 0 0 7>;
264                         interrupt-map = <
265                                 /* IDSEL 1 */
266                                 0800 0 0 1 &UIC1 14 8
267                                 0800 0 0 2 &UIC1 13 8
268                                 0800 0 0 3 &UIC1 12 8
269                                 0800 0 0 4 &UIC1 11 8
270                         >;
271                 };
272
273                 PCIE0: pciex@d00000000 {
274                         device_type = "pci";
275                         #interrupt-cells = <1>;
276                         #size-cells = <2>;
277                         #address-cells = <3>;
278                         compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
279                         primary;
280                         port = <0>; /* port number */
281                         reg = <d 00000000 20000000      /* Config space access */
282                                c 10000000 00001000>;    /* Registers */
283                         dcr-reg = <100 020>;
284                         sdr-base = <300>;
285
286                         /* Outbound ranges, one memory and one IO,
287                          * later cannot be changed
288                          */
289                         ranges = <02000000 0 80000000 0000000e 00000000 0 80000000
290                                   01000000 0 00000000 0000000f 80000000 0 00010000>;
291
292                         /* Inbound 2GB range starting at 0 */
293                         dma-ranges = <42000000 0 0 0 0 0 80000000>;
294
295                         /* This drives busses 10 to 0x1f */
296                         bus-range = <10 1f>;
297
298                         /* Legacy interrupts (note the weird polarity, the bridge seems
299                          * to invert PCIe legacy interrupts).
300                          * We are de-swizzling here because the numbers are actually for
301                          * port of the root complex virtual P2P bridge. But I want
302                          * to avoid putting a node for it in the tree, so the numbers
303                          * below are basically de-swizzled numbers.
304                          * The real slot is on idsel 0, so the swizzling is 1:1
305                          */
306                         interrupt-map-mask = <0000 0 0 7>;
307                         interrupt-map = <
308                                 0000 0 0 1 &UIC3 0 4 /* swizzled int A */
309                                 0000 0 0 2 &UIC3 1 4 /* swizzled int B */
310                                 0000 0 0 3 &UIC3 2 4 /* swizzled int C */
311                                 0000 0 0 4 &UIC3 3 4 /* swizzled int D */>;
312                 };
313
314                 PCIE1: pciex@d20000000 {
315                         device_type = "pci";
316                         #interrupt-cells = <1>;
317                         #size-cells = <2>;
318                         #address-cells = <3>;
319                         compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
320                         primary;
321                         port = <1>; /* port number */
322                         reg = <d 20000000 20000000      /* Config space access */
323                                c 10001000 00001000>;    /* Registers */
324                         dcr-reg = <120 020>;
325                         sdr-base = <340>;
326
327                         /* Outbound ranges, one memory and one IO,
328                          * later cannot be changed
329                          */
330                         ranges = <02000000 0 80000000 0000000e 80000000 0 80000000
331                                   01000000 0 00000000 0000000f 80010000 0 00010000>;
332
333                         /* Inbound 2GB range starting at 0 */
334                         dma-ranges = <42000000 0 0 0 0 0 80000000>;
335
336                         /* This drives busses 10 to 0x1f */
337                         bus-range = <20 2f>;
338
339                         /* Legacy interrupts (note the weird polarity, the bridge seems
340                          * to invert PCIe legacy interrupts).
341                          * We are de-swizzling here because the numbers are actually for
342                          * port of the root complex virtual P2P bridge. But I want
343                          * to avoid putting a node for it in the tree, so the numbers
344                          * below are basically de-swizzled numbers.
345                          * The real slot is on idsel 0, so the swizzling is 1:1
346                          */
347                         interrupt-map-mask = <0000 0 0 7>;
348                         interrupt-map = <
349                                 0000 0 0 1 &UIC3 4 4 /* swizzled int A */
350                                 0000 0 0 2 &UIC3 5 4 /* swizzled int B */
351                                 0000 0 0 3 &UIC3 6 4 /* swizzled int C */
352                                 0000 0 0 4 &UIC3 7 4 /* swizzled int D */>;
353                 };
354
355                 PCIE2: pciex@d40000000 {
356                         device_type = "pci";
357                         #interrupt-cells = <1>;
358                         #size-cells = <2>;
359                         #address-cells = <3>;
360                         compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
361                         primary;
362                         port = <2>; /* port number */
363                         reg = <d 40000000 20000000      /* Config space access */
364                                c 10002000 00001000>;    /* Registers */
365                         dcr-reg = <140 020>;
366                         sdr-base = <370>;
367
368                         /* Outbound ranges, one memory and one IO,
369                          * later cannot be changed
370                          */
371                         ranges = <02000000 0 80000000 0000000f 00000000 0 80000000
372                                   01000000 0 00000000 0000000f 80020000 0 00010000>;
373
374                         /* Inbound 2GB range starting at 0 */
375                         dma-ranges = <42000000 0 0 0 0 0 80000000>;
376
377                         /* This drives busses 10 to 0x1f */
378                         bus-range = <30 3f>;
379
380                         /* Legacy interrupts (note the weird polarity, the bridge seems
381                          * to invert PCIe legacy interrupts).
382                          * We are de-swizzling here because the numbers are actually for
383                          * port of the root complex virtual P2P bridge. But I want
384                          * to avoid putting a node for it in the tree, so the numbers
385                          * below are basically de-swizzled numbers.
386                          * The real slot is on idsel 0, so the swizzling is 1:1
387                          */
388                         interrupt-map-mask = <0000 0 0 7>;
389                         interrupt-map = <
390                                 0000 0 0 1 &UIC3 8 4 /* swizzled int A */
391                                 0000 0 0 2 &UIC3 9 4 /* swizzled int B */
392                                 0000 0 0 3 &UIC3 a 4 /* swizzled int C */
393                                 0000 0 0 4 &UIC3 b 4 /* swizzled int D */>;
394                 };
395         };
396
397         chosen {
398                 linux,stdout-path = "/plb/opb/serial@10000200";
399         };
400 };