1 /* IO interface mux allocator for ETRAX100LX.
2 * Copyright 2004, Axis Communications AB
3 * $Id: io_interface_mux.c,v 1.2 2004/12/21 12:08:38 starvik Exp $
7 /* C.f. ETRAX100LX Designer's Reference 20.9 */
9 #include <linux/kernel.h>
10 #include <linux/slab.h>
11 #include <linux/errno.h>
12 #include <linux/module.h>
13 #include <linux/init.h>
15 #include <asm/arch/svinto.h>
17 #include <asm/arch/io_interface_mux.h>
22 /* Macro to access ETRAX 100 registers */
23 #define SETS(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
24 IO_STATE_(reg##_, field##_, _##val)
37 void (*notify)(const unsigned int gpio_in_available,
38 const unsigned int gpio_out_available,
39 const unsigned char pa_available,
40 const unsigned char pb_available);
47 enum io_if_group group;
49 enum cris_io_interface owner;
55 enum cris_io_interface ioif;
59 unsigned int gpio_g_in;
60 unsigned int gpio_g_out;
64 static struct if_group if_groups[6] = {
91 /* The order in the array must match the order of enum
92 * cris_io_interface in io_interface_mux.h */
93 static struct interface interfaces[] = {
94 /* Begin Non-multiplexed interfaces */
109 /* End Non-multiplexed interfaces */
113 .gpio_g_in = 0x00000000,
114 .gpio_g_out = 0x00000000,
120 .gpio_g_in = 0x000000c0,
121 .gpio_g_out = 0x000000c0,
127 .gpio_g_in = 0xc0000000,
128 .gpio_g_out = 0xc0000000,
132 .ioif = if_sync_serial_1,
133 .groups = group_e | group_f, /* if_sync_serial_1 and if_sync_serial_3
134 can be used simultaneously */
135 .gpio_g_in = 0x00000000,
136 .gpio_g_out = 0x00000000,
140 .ioif = if_sync_serial_3,
141 .groups = group_c | group_f,
142 .gpio_g_in = 0xc0000000,
143 .gpio_g_out = 0xc0000000,
147 .ioif = if_shared_ram,
149 .gpio_g_in = 0x0000ff3e,
150 .gpio_g_out = 0x0000ff38,
154 .ioif = if_shared_ram_w,
155 .groups = group_a | group_d,
156 .gpio_g_in = 0x00ffff3e,
157 .gpio_g_out = 0x00ffff38,
163 .gpio_g_in = 0x0000ff3e,
164 .gpio_g_out = 0x0000ff3e,
170 .gpio_g_in = 0x3eff0000,
171 .gpio_g_out = 0x3eff0000,
176 .groups = group_a | group_d,
177 .gpio_g_in = 0x00ffff3e,
178 .gpio_g_out = 0x00ffff3e,
183 .groups = group_a | group_b | group_f, /* if_scsi8_0 and if_scsi8_1
184 can be used simultaneously */
185 .gpio_g_in = 0x0000ffff,
186 .gpio_g_out = 0x0000ffff,
191 .groups = group_c | group_d | group_f, /* if_scsi8_0 and if_scsi8_1
192 can be used simultaneously */
193 .gpio_g_in = 0xffff0000,
194 .gpio_g_out = 0xffff0000,
199 .groups = group_a | group_b | group_d | group_f,
200 .gpio_g_in = 0x01ffffff,
201 .gpio_g_out = 0x07ffffff,
206 .groups = group_a | group_b | group_c | group_d,
207 .gpio_g_in = 0xf9ffffff,
208 .gpio_g_out = 0xffffffff,
213 .groups = group_f, /* if_csp and if_i2c can be used simultaneously */
214 .gpio_g_in = 0x00000000,
215 .gpio_g_out = 0x00000000,
220 .groups = group_f, /* if_csp and if_i2c can be used simultaneously */
221 .gpio_g_in = 0x00000000,
222 .gpio_g_out = 0x00000000,
227 .groups = group_e | group_f,
228 .gpio_g_in = 0x00000000,
229 .gpio_g_out = 0x00000000,
235 .gpio_g_in = 0x0e000000,
236 .gpio_g_out = 0x3c000000,
241 .ioif = if_gpio_grp_a,
243 .gpio_g_in = 0x0000ff3f,
244 .gpio_g_out = 0x0000ff3f,
248 .ioif = if_gpio_grp_b,
250 .gpio_g_in = 0x000000c0,
251 .gpio_g_out = 0x000000c0,
255 .ioif = if_gpio_grp_c,
257 .gpio_g_in = 0xc0000000,
258 .gpio_g_out = 0xc0000000,
262 .ioif = if_gpio_grp_d,
264 .gpio_g_in = 0x3fff0000,
265 .gpio_g_out = 0x3fff0000,
269 .ioif = if_gpio_grp_e,
271 .gpio_g_in = 0x00000000,
272 .gpio_g_out = 0x00000000,
276 .ioif = if_gpio_grp_f,
278 .gpio_g_in = 0x00000000,
279 .gpio_g_out = 0x00000000,
285 static struct watcher *watchers = NULL;
287 static unsigned int gpio_in_pins = 0xffffffff;
288 static unsigned int gpio_out_pins = 0xffffffff;
289 static unsigned char gpio_pb_pins = 0xff;
290 static unsigned char gpio_pa_pins = 0xff;
292 static enum cris_io_interface gpio_pa_owners[8];
293 static enum cris_io_interface gpio_pb_owners[8];
294 static enum cris_io_interface gpio_pg_owners[32];
296 static int cris_io_interface_init(void);
298 static unsigned char clear_group_from_set(const unsigned char groups, struct if_group *group)
300 return (groups & ~group->group);
304 static struct if_group *get_group(const unsigned char groups)
307 for (i = 0; i < ARRAY_SIZE(if_groups); i++) {
308 if (groups & if_groups[i].group) {
309 return &if_groups[i];
316 static void notify_watchers(void)
318 struct watcher *w = watchers;
320 DBG(printk("io_interface_mux: notifying watchers\n"));
323 w->notify((const unsigned int)gpio_in_pins,
324 (const unsigned int)gpio_out_pins,
325 (const unsigned char)gpio_pa_pins,
326 (const unsigned char)gpio_pb_pins);
332 int cris_request_io_interface(enum cris_io_interface ioif, const char *device_id)
334 int set_gen_config = 0;
335 int set_gen_config_ii = 0;
336 unsigned long int gens;
337 unsigned long int gens_ii;
338 struct if_group *grp;
339 unsigned char group_set;
342 (void)cris_io_interface_init();
344 DBG(printk("cris_request_io_interface(%d, \"%s\")\n", ioif, device_id));
346 if ((ioif >= if_max_interfaces) || (ioif < 0)) {
347 printk(KERN_CRIT "cris_request_io_interface: Bad interface %u submitted for %s\n",
353 local_irq_save(flags);
355 if (interfaces[ioif].used) {
356 local_irq_restore(flags);
357 printk(KERN_CRIT "cris_io_interface: Cannot allocate interface for %s, in use by %s\n",
359 interfaces[ioif].owner);
363 /* Check that all required groups are free before allocating, */
364 group_set = interfaces[ioif].groups;
365 while (NULL != (grp = get_group(group_set))) {
367 if (grp->group == group_f) {
368 if ((if_sync_serial_1 == ioif) ||
369 (if_sync_serial_3 == ioif)) {
370 if ((grp->owner != if_sync_serial_1) &&
371 (grp->owner != if_sync_serial_3)) {
372 local_irq_restore(flags);
375 } else if ((if_scsi8_0 == ioif) ||
376 (if_scsi8_1 == ioif)) {
377 if ((grp->owner != if_scsi8_0) &&
378 (grp->owner != if_scsi8_1)) {
379 local_irq_restore(flags);
384 local_irq_restore(flags);
388 group_set = clear_group_from_set(group_set, grp);
391 /* Are the required GPIO pins available too? */
392 if (((interfaces[ioif].gpio_g_in & gpio_in_pins) != interfaces[ioif].gpio_g_in) ||
393 ((interfaces[ioif].gpio_g_out & gpio_out_pins) != interfaces[ioif].gpio_g_out) ||
394 ((interfaces[ioif].gpio_b & gpio_pb_pins) != interfaces[ioif].gpio_b)) {
395 local_irq_restore(flags);
396 printk(KERN_CRIT "cris_request_io_interface: Could not get required pins for interface %u\n",
401 /* All needed I/O pins and pin groups are free, allocate. */
402 group_set = interfaces[ioif].groups;
403 while (NULL != (grp = get_group(group_set))) {
406 group_set = clear_group_from_set(group_set, grp);
409 gens = genconfig_shadow;
410 gens_ii = gen_config_ii_shadow;
415 /* Begin Non-multiplexed interfaces */
421 /* End Non-multiplexed interfaces */
423 set_gen_config_ii = 1;
424 SETS(gens_ii, R_GEN_CONFIG_II, sermode1, async);
427 SETS(gens, R_GEN_CONFIG, ser2, select);
430 SETS(gens, R_GEN_CONFIG, ser3, select);
431 set_gen_config_ii = 1;
432 SETS(gens_ii, R_GEN_CONFIG_II, sermode3, async);
434 case if_sync_serial_1:
435 set_gen_config_ii = 1;
436 SETS(gens_ii, R_GEN_CONFIG_II, sermode1, sync);
438 case if_sync_serial_3:
439 SETS(gens, R_GEN_CONFIG, ser3, select);
440 set_gen_config_ii = 1;
441 SETS(gens_ii, R_GEN_CONFIG_II, sermode3, sync);
444 SETS(gens, R_GEN_CONFIG, mio, select);
446 case if_shared_ram_w:
447 SETS(gens, R_GEN_CONFIG, mio_w, select);
450 SETS(gens, R_GEN_CONFIG, par0, select);
453 SETS(gens, R_GEN_CONFIG, par1, select);
456 SETS(gens, R_GEN_CONFIG, par0, select);
457 SETS(gens, R_GEN_CONFIG, par_w, select);
460 SETS(gens, R_GEN_CONFIG, scsi0, select);
463 SETS(gens, R_GEN_CONFIG, scsi1, select);
466 SETS(gens, R_GEN_CONFIG, scsi0, select);
467 SETS(gens, R_GEN_CONFIG, scsi0w, select);
470 SETS(gens, R_GEN_CONFIG, ata, select);
478 SETS(gens, R_GEN_CONFIG, usb1, select);
481 SETS(gens, R_GEN_CONFIG, usb2, select);
484 /* GPIO groups are only accounted, don't do configuration changes. */
498 panic("cris_request_io_interface: Bad interface %u submitted for %s\n",
503 interfaces[ioif].used = 1;
504 interfaces[ioif].owner = (char*)device_id;
506 if (set_gen_config) {
508 genconfig_shadow = gens;
509 *R_GEN_CONFIG = genconfig_shadow;
510 /* Wait 12 cycles before doing any DMA command */
511 for(i = 6; i > 0; i--)
514 if (set_gen_config_ii) {
515 gen_config_ii_shadow = gens_ii;
516 *R_GEN_CONFIG_II = gen_config_ii_shadow;
519 DBG(printk("GPIO pins: available before: g_in=0x%08x g_out=0x%08x pb=0x%02x\n",
520 gpio_in_pins, gpio_out_pins, gpio_pb_pins));
521 DBG(printk("grabbing pins: g_in=0x%08x g_out=0x%08x pb=0x%02x\n",
522 interfaces[ioif].gpio_g_in,
523 interfaces[ioif].gpio_g_out,
524 interfaces[ioif].gpio_b));
526 gpio_in_pins &= ~interfaces[ioif].gpio_g_in;
527 gpio_out_pins &= ~interfaces[ioif].gpio_g_out;
528 gpio_pb_pins &= ~interfaces[ioif].gpio_b;
530 DBG(printk("GPIO pins: available after: g_in=0x%08x g_out=0x%08x pb=0x%02x\n",
531 gpio_in_pins, gpio_out_pins, gpio_pb_pins));
533 local_irq_restore(flags);
541 void cris_free_io_interface(enum cris_io_interface ioif)
543 struct if_group *grp;
544 unsigned char group_set;
547 (void)cris_io_interface_init();
549 if ((ioif >= if_max_interfaces) || (ioif < 0)) {
550 printk(KERN_CRIT "cris_free_io_interface: Bad interface %u\n",
554 local_irq_save(flags);
555 if (!interfaces[ioif].used) {
556 printk(KERN_CRIT "cris_free_io_interface: Freeing free interface %u\n",
558 local_irq_restore(flags);
561 group_set = interfaces[ioif].groups;
562 while (NULL != (grp = get_group(group_set))) {
563 if (grp->group == group_f) {
566 case if_sync_serial_1:
567 if ((grp->owner == if_sync_serial_1) &&
568 interfaces[if_sync_serial_3].used) {
569 grp->owner = if_sync_serial_3;
573 case if_sync_serial_3:
574 if ((grp->owner == if_sync_serial_3) &&
575 interfaces[if_sync_serial_1].used) {
576 grp->owner = if_sync_serial_1;
581 if ((grp->owner == if_scsi8_0) &&
582 interfaces[if_scsi8_1].used) {
583 grp->owner = if_scsi8_1;
588 if ((grp->owner == if_scsi8_1) &&
589 interfaces[if_scsi8_0].used) {
590 grp->owner = if_scsi8_0;
600 group_set = clear_group_from_set(group_set, grp);
602 interfaces[ioif].used = 0;
603 interfaces[ioif].owner = NULL;
605 DBG(printk("GPIO pins: available before: g_in=0x%08x g_out=0x%08x pb=0x%02x\n",
606 gpio_in_pins, gpio_out_pins, gpio_pb_pins));
607 DBG(printk("freeing pins: g_in=0x%08x g_out=0x%08x pb=0x%02x\n",
608 interfaces[ioif].gpio_g_in,
609 interfaces[ioif].gpio_g_out,
610 interfaces[ioif].gpio_b));
612 gpio_in_pins |= interfaces[ioif].gpio_g_in;
613 gpio_out_pins |= interfaces[ioif].gpio_g_out;
614 gpio_pb_pins |= interfaces[ioif].gpio_b;
616 DBG(printk("GPIO pins: available after: g_in=0x%08x g_out=0x%08x pb=0x%02x\n",
617 gpio_in_pins, gpio_out_pins, gpio_pb_pins));
619 local_irq_restore(flags);
624 /* Create a bitmask from bit 0 (inclusive) to bit stop_bit
625 (non-inclusive). stop_bit == 0 returns 0x0 */
626 static inline unsigned int create_mask(const unsigned stop_bit)
629 if (stop_bit >= 32) {
632 return (1<<stop_bit)-1;
636 /* port can be 'a', 'b' or 'g' */
637 int cris_io_interface_allocate_pins(const enum cris_io_interface ioif,
639 const unsigned start_bit,
640 const unsigned stop_bit)
643 unsigned int mask = 0;
644 unsigned int tmp_mask;
645 unsigned long int flags;
646 enum cris_io_interface *owners;
648 (void)cris_io_interface_init();
650 DBG(printk("cris_io_interface_allocate_pins: if=%d port=%c start=%u stop=%u\n",
651 ioif, port, start_bit, stop_bit));
653 if (!((start_bit <= stop_bit) &&
654 ((((port == 'a') || (port == 'b')) && (stop_bit < 8)) ||
655 ((port == 'g') && (stop_bit < 32))))) {
659 mask = create_mask(stop_bit + 1);
660 tmp_mask = create_mask(start_bit);
663 DBG(printk("cris_io_interface_allocate_pins: port=%c start=%u stop=%u mask=0x%08x\n",
664 port, start_bit, stop_bit, mask));
666 local_irq_save(flags);
670 if ((gpio_pa_pins & mask) != mask) {
671 local_irq_restore(flags);
674 owners = gpio_pa_owners;
675 gpio_pa_pins &= ~mask;
678 if ((gpio_pb_pins & mask) != mask) {
679 local_irq_restore(flags);
682 owners = gpio_pb_owners;
683 gpio_pb_pins &= ~mask;
686 if (((gpio_in_pins & mask) != mask) ||
687 ((gpio_out_pins & mask) != mask)) {
688 local_irq_restore(flags);
691 owners = gpio_pg_owners;
692 gpio_in_pins &= ~mask;
693 gpio_out_pins &= ~mask;
696 local_irq_restore(flags);
700 for (i = start_bit; i <= stop_bit; i++) {
703 local_irq_restore(flags);
710 /* port can be 'a', 'b' or 'g' */
711 int cris_io_interface_free_pins(const enum cris_io_interface ioif,
713 const unsigned start_bit,
714 const unsigned stop_bit)
717 unsigned int mask = 0;
718 unsigned int tmp_mask;
719 unsigned long int flags;
720 enum cris_io_interface *owners;
722 (void)cris_io_interface_init();
724 if (!((start_bit <= stop_bit) &&
725 ((((port == 'a') || (port == 'b')) && (stop_bit < 8)) ||
726 ((port == 'g') && (stop_bit < 32))))) {
730 mask = create_mask(stop_bit + 1);
731 tmp_mask = create_mask(start_bit);
734 DBG(printk("cris_io_interface_free_pins: port=%c start=%u stop=%u mask=0x%08x\n",
735 port, start_bit, stop_bit, mask));
737 local_irq_save(flags);
741 if ((~gpio_pa_pins & mask) != mask) {
742 local_irq_restore(flags);
743 printk(KERN_CRIT "cris_io_interface_free_pins: Freeing free pins");
745 owners = gpio_pa_owners;
748 if ((~gpio_pb_pins & mask) != mask) {
749 local_irq_restore(flags);
750 printk(KERN_CRIT "cris_io_interface_free_pins: Freeing free pins");
752 owners = gpio_pb_owners;
755 if (((~gpio_in_pins & mask) != mask) ||
756 ((~gpio_out_pins & mask) != mask)) {
757 local_irq_restore(flags);
758 printk(KERN_CRIT "cris_io_interface_free_pins: Freeing free pins");
760 owners = gpio_pg_owners;
763 owners = NULL; /* Cannot happen. Shut up, gcc! */
766 for (i = start_bit; i <= stop_bit; i++) {
767 if (owners[i] != ioif) {
768 printk(KERN_CRIT "cris_io_interface_free_pins: Freeing unowned pins");
772 /* All was ok, change data. */
775 gpio_pa_pins |= mask;
778 gpio_pb_pins |= mask;
781 gpio_in_pins |= mask;
782 gpio_out_pins |= mask;
786 for (i = start_bit; i <= stop_bit; i++) {
787 owners[i] = if_unclaimed;
789 local_irq_restore(flags);
796 int cris_io_interface_register_watcher(void (*notify)(const unsigned int gpio_in_available,
797 const unsigned int gpio_out_available,
798 const unsigned char pa_available,
799 const unsigned char pb_available))
803 (void)cris_io_interface_init();
805 if (NULL == notify) {
808 w = kmalloc(sizeof(*w), GFP_KERNEL);
816 w->notify((const unsigned int)gpio_in_pins,
817 (const unsigned int)gpio_out_pins,
818 (const unsigned char)gpio_pa_pins,
819 (const unsigned char)gpio_pb_pins);
824 void cris_io_interface_delete_watcher(void (*notify)(const unsigned int gpio_in_available,
825 const unsigned int gpio_out_available,
826 const unsigned char pa_available,
827 const unsigned char pb_available))
829 struct watcher *w = watchers, *prev = NULL;
831 (void)cris_io_interface_init();
833 while ((NULL != w) && (w->notify != notify)){
839 prev->next = w->next;
846 printk(KERN_WARNING "cris_io_interface_delete_watcher: Deleting unknown watcher 0x%p\n", notify);
850 static int cris_io_interface_init(void)
852 static int first = 1;
860 for (i = 0; i<8; i++) {
861 gpio_pa_owners[i] = if_unclaimed;
862 gpio_pb_owners[i] = if_unclaimed;
863 gpio_pg_owners[i] = if_unclaimed;
866 gpio_pg_owners[i] = if_unclaimed;
872 module_init(cris_io_interface_init);
875 EXPORT_SYMBOL(cris_request_io_interface);
876 EXPORT_SYMBOL(cris_free_io_interface);
877 EXPORT_SYMBOL(cris_io_interface_allocate_pins);
878 EXPORT_SYMBOL(cris_io_interface_free_pins);
879 EXPORT_SYMBOL(cris_io_interface_register_watcher);
880 EXPORT_SYMBOL(cris_io_interface_delete_watcher);