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   1 /*
   2  * Analogue & Micro ASP8347 Device Tree Source
   3  *
   4  * Copyright 2008 Codehermit
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "Analogue & Micro ASP8347E";
  16         compatible = "analogue-and-micro,asp8347e";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 serial0 = &serial0;
  24                 serial1 = &serial1;
  25         };
  26
  27         cpus {
  28                 #address-cells = <1>;
  29                 #size-cells = <0>;
  30
  31                 PowerPC,8347@0 {
  32                         device_type = "cpu";
  33                         reg = <0x0>;
  34                         d-cache-line-size = <32>;
  35                         i-cache-line-size = <32>;
  36                         d-cache-size = <32768>;
  37                         i-cache-size = <32768>;
  38                         timebase-frequency = <0>;       // from bootloader
  39                         bus-frequency = <0>;            // from bootloader
  40                         clock-frequency = <0>;          // from bootloader
  41                 };
  42         };
  43
  44         memory {
  45                 device_type = "memory";
  46                 reg = <0x00000000 0x8000000>;   // 128MB at 0
  47         };
  48
  49         localbus@ff005000 {
  50                 #address-cells = <2>;
  51                 #size-cells = <1>;
  52                 compatible = "fsl,mpc8347e-localbus",
  53                              "fsl,pq2pro-localbus",
  54                              "simple-bus";
  55                 reg = <0xff005000 0x1000>;
  56                 interrupts = <77 0x8>;
  57                 interrupt-parent = <&ipic>;
  58
  59                 ranges = <
  60                         0 0 0xf0000000 0x02000000
  61                 >;
  62
  63                 flash@0,0 {
  64                         compatible = "cfi-flash";
  65                         reg = <0 0 0x02000000>;
  66                         bank-width = <2>;
  67                         device-width = <2>;
  68                 };
  69         };
  70
  71         soc8349@ff000000 {
  72                 #address-cells = <1>;
  73                 #size-cells = <1>;
  74                 device_type = "soc";
  75                 ranges = <0x0 0xff000000 0x00100000>;
  76                 reg = <0xff000000 0x00000200>;
  77                 bus-frequency = <0>;
  78
  79                 wdt@200 {
  80                         device_type = "watchdog";
  81                         compatible = "mpc83xx_wdt";
  82                         reg = <0x200 0x100>;
  83                 };
  84
  85                 i2c@3000 {
  86                         #address-cells = <1>;
  87                         #size-cells = <0>;
  88                         cell-index = <0>;
  89                         compatible = "fsl-i2c";
  90                         reg = <0x3000 0x100>;
  91                         interrupts = <14 0x8>;
  92                         interrupt-parent = <&ipic>;
  93                         dfsrr;
  94
  95                         rtc@68 {
  96                                 compatible = "dallas,ds1374";
  97                                 reg = <0x68>;
  98                         };
  99                 };
 100
 101                 i2c@3100 {
 102                         #address-cells = <1>;
 103                         #size-cells = <0>;
 104                         cell-index = <1>;
 105                         compatible = "fsl-i2c";
 106                         reg = <0x3100 0x100>;
 107                         interrupts = <15 0x8>;
 108                         interrupt-parent = <&ipic>;
 109                         dfsrr;
 110                 };
 111
 112                 spi@7000 {
 113                         cell-index = <0>;
 114                         compatible = "fsl,spi";
 115                         reg = <0x7000 0x1000>;
 116                         interrupts = <16 0x8>;
 117                         interrupt-parent = <&ipic>;
 118                         mode = "cpu";
 119                 };
 120
 121                 dma@82a8 {
 122                         #address-cells = <1>;
 123                         #size-cells = <1>;
 124                         compatible = "fsl,mpc8347-dma", "fsl,elo-dma";
 125                         reg = <0x82a8 4>;
 126                         ranges = <0 0x8100 0x1a8>;
 127                         interrupt-parent = <&ipic>;
 128                         interrupts = <71 8>;
 129                         cell-index = <0>;
 130                         dma-channel@0 {
 131                                 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
 132                                 reg = <0 0x80>;
 133                                 interrupt-parent = <&ipic>;
 134                                 interrupts = <71 8>;
 135                         };
 136                         dma-channel@80 {
 137                                 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
 138                                 reg = <0x80 0x80>;
 139                                 interrupt-parent = <&ipic>;
 140                                 interrupts = <71 8>;
 141                         };
 142                         dma-channel@100 {
 143                                 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
 144                                 reg = <0x100 0x80>;
 145                                 interrupt-parent = <&ipic>;
 146                                 interrupts = <71 8>;
 147                         };
 148                         dma-channel@180 {
 149                                 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
 150                                 reg = <0x180 0x28>;
 151                                 interrupt-parent = <&ipic>;
 152                                 interrupts = <71 8>;
 153                         };
 154                 };
 155
 156                 /* phy type (ULPI or SERIAL) are only types supported for MPH */
 157                 /* port = 0 or 1 */
 158                 usb@22000 {
 159                         compatible = "fsl-usb2-mph";
 160                         reg = <0x22000 0x1000>;
 161                         #address-cells = <1>;
 162                         #size-cells = <0>;
 163                         interrupt-parent = <&ipic>;
 164                         interrupts = <39 0x8>;
 165                         phy_type = "ulpi";
 166                         port1;
 167                 };
 168                 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
 169                 usb@23000 {
 170                         compatible = "fsl-usb2-dr";
 171                         reg = <0x23000 0x1000>;
 172                         #address-cells = <1>;
 173                         #size-cells = <0>;
 174                         interrupt-parent = <&ipic>;
 175                         interrupts = <38 0x8>;
 176                         dr_mode = "otg";
 177                         phy_type = "ulpi";
 178                 };
 179
 180                 mdio@24520 {
 181                         #address-cells = <1>;
 182                         #size-cells = <0>;
 183                         compatible = "fsl,gianfar-mdio";
 184                         reg = <0x24520 0x20>;
 185
 186                         phy0: ethernet-phy@0 {
 187                                 interrupt-parent = <&ipic>;
 188                                 interrupts = <17 0x8>;
 189                                 reg = <0x1>;
 190                                 device_type = "ethernet-phy";
 191                         };
 192                         phy1: ethernet-phy@1 {
 193                                 interrupt-parent = <&ipic>;
 194                                 interrupts = <18 0x8>;
 195                                 reg = <0x2>;
 196                                 device_type = "ethernet-phy";
 197                         };
 198                 };
 199
 200                 enet0: ethernet@24000 {
 201                         cell-index = <0>;
 202                         device_type = "network";
 203                         model = "TSEC";
 204                         compatible = "gianfar";
 205                         reg = <0x24000 0x1000>;
 206                         local-mac-address = [ 00 08 e5 11 32 33 ];
 207                         interrupts = <32 0x8 33 0x8 34 0x8>;
 208                         interrupt-parent = <&ipic>;
 209                         phy-handle = <&phy0>;
 210                         linux,network-index = <0>;
 211                 };
 212
 213                 enet1: ethernet@25000 {
 214                         cell-index = <1>;
 215                         device_type = "network";
 216                         model = "TSEC";
 217                         compatible = "gianfar";
 218                         reg = <0x25000 0x1000>;
 219                         local-mac-address = [ 00 08 e5 11 32 34 ];
 220                         interrupts = <35 0x8 36 0x8 37 0x8>;
 221                         interrupt-parent = <&ipic>;
 222                         phy-handle = <&phy1>;
 223                         linux,network-index = <1>;
 224                 };
 225
 226                 serial0: serial@4500 {
 227                         cell-index = <0>;
 228                         device_type = "serial";
 229                         compatible = "ns16550";
 230                         reg = <0x4500 0x100>;
 231                         clock-frequency = <400000000>;
 232                         interrupts = <9 0x8>;
 233                         interrupt-parent = <&ipic>;
 234                 };
 235
 236                 serial1: serial@4600 {
 237                         cell-index = <1>;
 238                         device_type = "serial";
 239                         compatible = "ns16550";
 240                         reg = <0x4600 0x100>;
 241                         clock-frequency = <400000000>;
 242                         interrupts = <10 0x8>;
 243                         interrupt-parent = <&ipic>;
 244                 };
 245
 246                 /* May need to remove if on a part without crypto engine */
 247                 crypto@30000 {
 248                         device_type = "crypto";
 249                         model = "SEC2";
 250                         compatible = "talitos";
 251                         reg = <0x30000 0x10000>;
 252                         interrupts = <11 0x8>;
 253                         interrupt-parent = <&ipic>;
 254                         num-channels = <4>;
 255                         channel-fifo-len = <24>;
 256                         exec-units-mask = <0x0000007e>;
 257                         /* desc mask is for rev2.0,
 258                          * we need runtime fixup for >2.0 */
 259                         descriptor-types-mask = <0x01010ebf>;
 260                 };
 261
 262                 /* IPIC
 263                  * interrupts cell = <intr #, sense>
 264                  * sense values match linux IORESOURCE_IRQ_* defines:
 265                  * sense == 8: Level, low assertion
 266                  * sense == 2: Edge, high-to-low change
 267                  */
 268                 ipic: pic@700 {
 269                         interrupt-controller;
 270                         #address-cells = <0>;
 271                         #interrupt-cells = <2>;
 272                         reg = <0x700 0x100>;
 273                         device_type = "ipic";
 274                 };
 275         };
 276
 277         chosen {
 278                 bootargs = "console=ttyS0,38400 root=/dev/mtdblock3 rootfstype=jffs2";
 279                 linux,stdout-path = &serial0;
 280         };
 281
 282 };