2 * MPC8377E RDB Device Tree Source
4 * Copyright 2007, 2008 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
15 compatible = "fsl,mpc8377rdb";
34 d-cache-line-size = <32>;
35 i-cache-line-size = <32>;
36 d-cache-size = <32768>;
37 i-cache-size = <32768>;
38 timebase-frequency = <0>;
40 clock-frequency = <0>;
45 device_type = "memory";
46 reg = <0x00000000 0x10000000>; // 256MB at 0
52 compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
53 reg = <0xe0005000 0x1000>;
54 interrupts = <77 0x8>;
55 interrupt-parent = <&ipic>;
57 // CS0 and CS1 are swapped when
58 // booting from nand, but the
59 // addresses are the same.
60 ranges = <0x0 0x0 0xfe000000 0x00800000
61 0x1 0x0 0xe0600000 0x00008000
62 0x2 0x0 0xf0000000 0x00020000
63 0x3 0x0 0xfa000000 0x00008000>;
68 compatible = "cfi-flash";
69 reg = <0x0 0x0 0x800000>;
77 compatible = "fsl,mpc8377-fcm-nand",
79 reg = <0x1 0x0 0x8000>;
87 reg = <0x100000 0x300000>;
90 reg = <0x400000 0x1c00000>;
99 compatible = "simple-bus";
100 ranges = <0x0 0xe0000000 0x00100000>;
101 reg = <0xe0000000 0x00000200>;
105 device_type = "watchdog";
106 compatible = "mpc83xx_wdt";
111 #address-cells = <1>;
114 compatible = "fsl-i2c";
115 reg = <0x3000 0x100>;
116 interrupts = <14 0x8>;
117 interrupt-parent = <&ipic>;
121 compatible = "dallas,ds1339";
127 #address-cells = <1>;
130 compatible = "fsl-i2c";
131 reg = <0x3100 0x100>;
132 interrupts = <15 0x8>;
133 interrupt-parent = <&ipic>;
139 compatible = "fsl,spi";
140 reg = <0x7000 0x1000>;
141 interrupts = <16 0x8>;
142 interrupt-parent = <&ipic>;
147 #address-cells = <1>;
149 compatible = "fsl,mpc8377-dma", "fsl,elo-dma";
151 ranges = <0 0x8100 0x1a8>;
152 interrupt-parent = <&ipic>;
156 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
158 interrupt-parent = <&ipic>;
162 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
164 interrupt-parent = <&ipic>;
168 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
170 interrupt-parent = <&ipic>;
174 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
176 interrupt-parent = <&ipic>;
182 compatible = "fsl-usb2-dr";
183 reg = <0x23000 0x1000>;
184 #address-cells = <1>;
186 interrupt-parent = <&ipic>;
187 interrupts = <38 0x8>;
192 #address-cells = <1>;
194 compatible = "fsl,gianfar-mdio";
195 reg = <0x24520 0x20>;
196 phy2: ethernet-phy@2 {
197 interrupt-parent = <&ipic>;
198 interrupts = <17 0x8>;
200 device_type = "ethernet-phy";
204 enet0: ethernet@24000 {
206 device_type = "network";
208 compatible = "gianfar";
209 reg = <0x24000 0x1000>;
210 local-mac-address = [ 00 00 00 00 00 00 ];
211 interrupts = <32 0x8 33 0x8 34 0x8>;
212 phy-connection-type = "mii";
213 interrupt-parent = <&ipic>;
214 phy-handle = <&phy2>;
217 enet1: ethernet@25000 {
219 device_type = "network";
221 compatible = "gianfar";
222 reg = <0x25000 0x1000>;
223 local-mac-address = [ 00 00 00 00 00 00 ];
224 interrupts = <35 0x8 36 0x8 37 0x8>;
225 phy-connection-type = "mii";
226 interrupt-parent = <&ipic>;
227 fixed-link = <1 1 1000 0 0>;
230 serial0: serial@4500 {
232 device_type = "serial";
233 compatible = "ns16550";
234 reg = <0x4500 0x100>;
235 clock-frequency = <0>;
236 interrupts = <9 0x8>;
237 interrupt-parent = <&ipic>;
240 serial1: serial@4600 {
242 device_type = "serial";
243 compatible = "ns16550";
244 reg = <0x4600 0x100>;
245 clock-frequency = <0>;
246 interrupts = <10 0x8>;
247 interrupt-parent = <&ipic>;
251 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
252 "fsl,sec2.1", "fsl,sec2.0";
253 reg = <0x30000 0x10000>;
254 interrupts = <11 0x8>;
255 interrupt-parent = <&ipic>;
256 fsl,num-channels = <4>;
257 fsl,channel-fifo-len = <24>;
258 fsl,exec-units-mask = <0x9fe>;
259 fsl,descriptor-types-mask = <0x3ab0ebf>;
263 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
264 reg = <0x18000 0x1000>;
265 interrupts = <44 0x8>;
266 interrupt-parent = <&ipic>;
270 compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
271 reg = <0x19000 0x1000>;
272 interrupts = <45 0x8>;
273 interrupt-parent = <&ipic>;
277 * interrupts cell = <intr #, sense>
278 * sense values match linux IORESOURCE_IRQ_* defines:
279 * sense == 8: Level, low assertion
280 * sense == 2: Edge, high-to-low change
282 ipic: interrupt-controller@700 {
283 compatible = "fsl,ipic";
284 interrupt-controller;
285 #address-cells = <0>;
286 #interrupt-cells = <2>;
292 interrupt-map-mask = <0xf800 0 0 7>;
294 /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
296 /* IDSEL AD14 IRQ6 inta */
297 0x7000 0x0 0x0 0x1 &ipic 22 0x8
299 /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
300 0x7800 0x0 0x0 0x1 &ipic 21 0x8
301 0x7800 0x0 0x0 0x2 &ipic 22 0x8
302 0x7800 0x0 0x0 0x4 &ipic 23 0x8
304 /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
305 0xE000 0x0 0x0 0x1 &ipic 23 0x8
306 0xE000 0x0 0x0 0x2 &ipic 21 0x8
307 0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
308 interrupt-parent = <&ipic>;
309 interrupts = <66 0x8>;
311 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
312 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
313 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
314 clock-frequency = <66666666>;
315 #interrupt-cells = <1>;
317 #address-cells = <3>;
318 reg = <0xe0008500 0x100>;
319 compatible = "fsl,mpc8349-pci";