2 * MPC8349E-mITX Device Tree Source
4 * Copyright 2006 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
15 model = "MPC8349EMITX";
16 compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
36 d-cache-line-size = <32>;
37 i-cache-line-size = <32>;
38 d-cache-size = <32768>;
39 i-cache-size = <32768>;
40 timebase-frequency = <0>; // from bootloader
41 bus-frequency = <0>; // from bootloader
42 clock-frequency = <0>; // from bootloader
47 device_type = "memory";
48 reg = <0x00000000 0x10000000>;
55 compatible = "simple-bus";
56 ranges = <0x0 0xe0000000 0x00100000>;
57 reg = <0xe0000000 0x00000200>;
58 bus-frequency = <0>; // from bootloader
61 device_type = "watchdog";
62 compatible = "mpc83xx_wdt";
70 compatible = "fsl-i2c";
72 interrupts = <14 0x8>;
73 interrupt-parent = <&ipic>;
81 compatible = "fsl-i2c";
83 interrupts = <15 0x8>;
84 interrupt-parent = <&ipic>;
90 compatible = "fsl,spi";
91 reg = <0x7000 0x1000>;
92 interrupts = <16 0x8>;
93 interrupt-parent = <&ipic>;
100 compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
102 ranges = <0 0x8100 0x1a8>;
103 interrupt-parent = <&ipic>;
107 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
109 interrupt-parent = <&ipic>;
113 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
115 interrupt-parent = <&ipic>;
119 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
121 interrupt-parent = <&ipic>;
125 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
127 interrupt-parent = <&ipic>;
133 compatible = "fsl-usb2-mph";
134 reg = <0x22000 0x1000>;
135 #address-cells = <1>;
137 interrupt-parent = <&ipic>;
138 interrupts = <39 0x8>;
144 compatible = "fsl-usb2-dr";
145 reg = <0x23000 0x1000>;
146 #address-cells = <1>;
148 interrupt-parent = <&ipic>;
149 interrupts = <38 0x8>;
150 dr_mode = "peripheral";
155 #address-cells = <1>;
157 compatible = "fsl,gianfar-mdio";
158 reg = <0x24520 0x20>;
161 phy1c: ethernet-phy@1c {
162 interrupt-parent = <&ipic>;
163 interrupts = <18 0x8>;
165 device_type = "ethernet-phy";
169 enet0: ethernet@24000 {
171 device_type = "network";
173 compatible = "gianfar";
174 reg = <0x24000 0x1000>;
175 local-mac-address = [ 00 00 00 00 00 00 ];
176 interrupts = <32 0x8 33 0x8 34 0x8>;
177 interrupt-parent = <&ipic>;
178 phy-handle = <&phy1c>;
179 linux,network-index = <0>;
182 enet1: ethernet@25000 {
184 device_type = "network";
186 compatible = "gianfar";
187 reg = <0x25000 0x1000>;
188 local-mac-address = [ 00 00 00 00 00 00 ];
189 interrupts = <35 0x8 36 0x8 37 0x8>;
190 interrupt-parent = <&ipic>;
191 /* Vitesse 7385 isn't on the MDIO bus */
192 fixed-link = <1 1 1000 0 0>;
193 linux,network-index = <1>;
196 serial0: serial@4500 {
198 device_type = "serial";
199 compatible = "ns16550";
200 reg = <0x4500 0x100>;
201 clock-frequency = <0>; // from bootloader
202 interrupts = <9 0x8>;
203 interrupt-parent = <&ipic>;
206 serial1: serial@4600 {
208 device_type = "serial";
209 compatible = "ns16550";
210 reg = <0x4600 0x100>;
211 clock-frequency = <0>; // from bootloader
212 interrupts = <10 0x8>;
213 interrupt-parent = <&ipic>;
217 compatible = "fsl,sec2.0";
218 reg = <0x30000 0x10000>;
219 interrupts = <11 0x8>;
220 interrupt-parent = <&ipic>;
221 fsl,num-channels = <4>;
222 fsl,channel-fifo-len = <24>;
223 fsl,exec-units-mask = <0x7e>;
224 fsl,descriptor-types-mask = <0x01010ebf>;
228 interrupt-controller;
229 #address-cells = <0>;
230 #interrupt-cells = <2>;
232 device_type = "ipic";
238 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
240 /* IDSEL 0x10 - SATA */
241 0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
243 interrupt-parent = <&ipic>;
244 interrupts = <66 0x8>;
245 bus-range = <0x0 0x0>;
246 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
247 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
248 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
249 clock-frequency = <66666666>;
250 #interrupt-cells = <1>;
252 #address-cells = <3>;
253 reg = <0xe0008500 0x100>;
254 compatible = "fsl,mpc8349-pci";
260 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
262 /* IDSEL 0x0E - MiniPCI Slot */
263 0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */
265 /* IDSEL 0x0F - PCI Slot */
266 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
267 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
269 interrupt-parent = <&ipic>;
270 interrupts = <67 0x8>;
271 bus-range = <0x0 0x0>;
272 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
273 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
274 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
275 clock-frequency = <66666666>;
276 #interrupt-cells = <1>;
278 #address-cells = <3>;
279 reg = <0xe0008600 0x100>;
280 compatible = "fsl,mpc8349-pci";
285 #address-cells = <2>;
287 compatible = "fsl,mpc8349e-localbus",
288 "fsl,pq2pro-localbus";
289 reg = <0xe0005000 0xd8>;
290 ranges = <0x3 0x0 0xf0000000 0x210>;
293 compatible = "fsl,mpc8349emitx-pata", "ata-generic";
294 reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
297 interrupts = <23 0x8>;
298 interrupt-parent = <&ipic>;