git.oblomov.eu Git - linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-3945.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/version.h>
  30 #include <linux/init.h>
  31 #include <linux/pci.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/delay.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/wireless.h>
  37 #include <linux/firmware.h>
  38 #include <linux/etherdevice.h>
  39 #include <asm/unaligned.h>
  40 #include <net/mac80211.h>
  41
  42 #include "iwl-3945-core.h"
  43 #include "iwl-3945.h"
  44 #include "iwl-helpers.h"
  45 #include "iwl-3945-rs.h"
  46
  47 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
  48         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,   \
  49                                     IWL_RATE_##r##M_IEEE,   \
  50                                     IWL_RATE_##ip##M_INDEX, \
  51                                     IWL_RATE_##in##M_INDEX, \
  52                                     IWL_RATE_##rp##M_INDEX, \
  53                                     IWL_RATE_##rn##M_INDEX, \
  54                                     IWL_RATE_##pp##M_INDEX, \
  55                                     IWL_RATE_##np##M_INDEX, \
  56                                     IWL_RATE_##r##M_INDEX_TABLE, \
  57                                     IWL_RATE_##ip##M_INDEX_TABLE }
  58
  59 /*
  60  * Parameter order:
  61  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
  62  *
  63  * If there isn't a valid next or previous rate then INV is used which
  64  * maps to IWL_RATE_INVALID
  65  *
  66  */
  67 const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT] = {
  68         IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
  69         IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
  70         IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
  71         IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
  72         IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
  73         IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
  74         IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
  75         IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
  76         IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
  77         IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
  78         IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
  79         IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  80 };
  81
  82 /* 1 = enable the iwl3945_disable_events() function */
  83 #define IWL_EVT_DISABLE (0)
  84 #define IWL_EVT_DISABLE_SIZE (1532/32)
  85
  86 /**
  87  * iwl3945_disable_events - Disable selected events in uCode event log
  88  *
  89  * Disable an event by writing "1"s into "disable"
  90  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
  91  *   Default values of 0 enable uCode events to be logged.
  92  * Use for only special debugging.  This function is just a placeholder as-is,
  93  *   you'll need to provide the special bits! ...
  94  *   ... and set IWL_EVT_DISABLE to 1. */
  95 void iwl3945_disable_events(struct iwl3945_priv *priv)
  96 {
  97         int ret;
  98         int i;
  99         u32 base;               /* SRAM address of event log header */
 100         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
 101         u32 array_size;         /* # of u32 entries in array */
 102         u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
 103                 0x00000000,     /*   31 -    0  Event id numbers */
 104                 0x00000000,     /*   63 -   32 */
 105                 0x00000000,     /*   95 -   64 */
 106                 0x00000000,     /*  127 -   96 */
 107                 0x00000000,     /*  159 -  128 */
 108                 0x00000000,     /*  191 -  160 */
 109                 0x00000000,     /*  223 -  192 */
 110                 0x00000000,     /*  255 -  224 */
 111                 0x00000000,     /*  287 -  256 */
 112                 0x00000000,     /*  319 -  288 */
 113                 0x00000000,     /*  351 -  320 */
 114                 0x00000000,     /*  383 -  352 */
 115                 0x00000000,     /*  415 -  384 */
 116                 0x00000000,     /*  447 -  416 */
 117                 0x00000000,     /*  479 -  448 */
 118                 0x00000000,     /*  511 -  480 */
 119                 0x00000000,     /*  543 -  512 */
 120                 0x00000000,     /*  575 -  544 */
 121                 0x00000000,     /*  607 -  576 */
 122                 0x00000000,     /*  639 -  608 */
 123                 0x00000000,     /*  671 -  640 */
 124                 0x00000000,     /*  703 -  672 */
 125                 0x00000000,     /*  735 -  704 */
 126                 0x00000000,     /*  767 -  736 */
 127                 0x00000000,     /*  799 -  768 */
 128                 0x00000000,     /*  831 -  800 */
 129                 0x00000000,     /*  863 -  832 */
 130                 0x00000000,     /*  895 -  864 */
 131                 0x00000000,     /*  927 -  896 */
 132                 0x00000000,     /*  959 -  928 */
 133                 0x00000000,     /*  991 -  960 */
 134                 0x00000000,     /* 1023 -  992 */
 135                 0x00000000,     /* 1055 - 1024 */
 136                 0x00000000,     /* 1087 - 1056 */
 137                 0x00000000,     /* 1119 - 1088 */
 138                 0x00000000,     /* 1151 - 1120 */
 139                 0x00000000,     /* 1183 - 1152 */
 140                 0x00000000,     /* 1215 - 1184 */
 141                 0x00000000,     /* 1247 - 1216 */
 142                 0x00000000,     /* 1279 - 1248 */
 143                 0x00000000,     /* 1311 - 1280 */
 144                 0x00000000,     /* 1343 - 1312 */
 145                 0x00000000,     /* 1375 - 1344 */
 146                 0x00000000,     /* 1407 - 1376 */
 147                 0x00000000,     /* 1439 - 1408 */
 148                 0x00000000,     /* 1471 - 1440 */
 149                 0x00000000,     /* 1503 - 1472 */
 150         };
 151
 152         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 153         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
 154                 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
 155                 return;
 156         }
 157
 158         ret = iwl3945_grab_nic_access(priv);
 159         if (ret) {
 160                 IWL_WARNING("Can not read from adapter at this time.\n");
 161                 return;
 162         }
 163
 164         disable_ptr = iwl3945_read_targ_mem(priv, base + (4 * sizeof(u32)));
 165         array_size = iwl3945_read_targ_mem(priv, base + (5 * sizeof(u32)));
 166         iwl3945_release_nic_access(priv);
 167
 168         if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
 169                 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
 170                                disable_ptr);
 171                 ret = iwl3945_grab_nic_access(priv);
 172                 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
 173                         iwl3945_write_targ_mem(priv,
 174                                            disable_ptr + (i * sizeof(u32)),
 175                                            evt_disable[i]);
 176
 177                 iwl3945_release_nic_access(priv);
 178         } else {
 179                 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
 180                 IWL_DEBUG_INFO("  by writing \"1\"s into disable bitmap\n");
 181                 IWL_DEBUG_INFO("  in SRAM at 0x%x, size %d u32s\n",
 182                                disable_ptr, array_size);
 183         }
 184
 185 }
 186
 187 static int iwl3945_hwrate_to_plcp_idx(u8 plcp)
 188 {
 189         int idx;
 190
 191         for (idx = 0; idx < IWL_RATE_COUNT; idx++)
 192                 if (iwl3945_rates[idx].plcp == plcp)
 193                         return idx;
 194         return -1;
 195 }
 196
 197 /**
 198  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
 199  * @priv: eeprom and antenna fields are used to determine antenna flags
 200  *
 201  * priv->eeprom  is used to determine if antenna AUX/MAIN are reversed
 202  * priv->antenna specifies the antenna diversity mode:
 203  *
 204  * IWL_ANTENNA_DIVERISTY - NIC selects best antenna by itself
 205  * IWL_ANTENNA_MAIN      - Force MAIN antenna
 206  * IWL_ANTENNA_AUX       - Force AUX antenna
 207  */
 208 __le32 iwl3945_get_antenna_flags(const struct iwl3945_priv *priv)
 209 {
 210         switch (priv->antenna) {
 211         case IWL_ANTENNA_DIVERSITY:
 212                 return 0;
 213
 214         case IWL_ANTENNA_MAIN:
 215                 if (priv->eeprom.antenna_switch_type)
 216                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 217                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 218
 219         case IWL_ANTENNA_AUX:
 220                 if (priv->eeprom.antenna_switch_type)
 221                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 222                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 223         }
 224
 225         /* bad antenna selector value */
 226         IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
 227         return 0;               /* "diversity" is default if error */
 228 }
 229
 230 #ifdef CONFIG_IWL3945_DEBUG
 231 #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
 232
 233 static const char *iwl3945_get_tx_fail_reason(u32 status)
 234 {
 235         switch (status & TX_STATUS_MSK) {
 236         case TX_STATUS_SUCCESS:
 237                 return "SUCCESS";
 238                 TX_STATUS_ENTRY(SHORT_LIMIT);
 239                 TX_STATUS_ENTRY(LONG_LIMIT);
 240                 TX_STATUS_ENTRY(FIFO_UNDERRUN);
 241                 TX_STATUS_ENTRY(MGMNT_ABORT);
 242                 TX_STATUS_ENTRY(NEXT_FRAG);
 243                 TX_STATUS_ENTRY(LIFE_EXPIRE);
 244                 TX_STATUS_ENTRY(DEST_PS);
 245                 TX_STATUS_ENTRY(ABORTED);
 246                 TX_STATUS_ENTRY(BT_RETRY);
 247                 TX_STATUS_ENTRY(STA_INVALID);
 248                 TX_STATUS_ENTRY(FRAG_DROPPED);
 249                 TX_STATUS_ENTRY(TID_DISABLE);
 250                 TX_STATUS_ENTRY(FRAME_FLUSHED);
 251                 TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
 252                 TX_STATUS_ENTRY(TX_LOCKED);
 253                 TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
 254         }
 255
 256         return "UNKNOWN";
 257 }
 258 #else
 259 static inline const char *iwl3945_get_tx_fail_reason(u32 status)
 260 {
 261         return "";
 262 }
 263 #endif
 264
 265
 266 /**
 267  * iwl3945_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
 268  *
 269  * When FW advances 'R' index, all entries between old and new 'R' index
 270  * need to be reclaimed. As result, some free space forms. If there is
 271  * enough free space (> low mark), wake the stack that feeds us.
 272  */
 273 static void iwl3945_tx_queue_reclaim(struct iwl3945_priv *priv,
 274                                      int txq_id, int index)
 275 {
 276         struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
 277         struct iwl3945_queue *q = &txq->q;
 278         struct iwl3945_tx_info *tx_info;
 279
 280         BUG_ON(txq_id == IWL_CMD_QUEUE_NUM);
 281
 282         for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
 283                 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
 284
 285                 tx_info = &txq->txb[txq->q.read_ptr];
 286                 ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb[0]);
 287                 tx_info->skb[0] = NULL;
 288                 iwl3945_hw_txq_free_tfd(priv, txq);
 289         }
 290
 291         if (iwl3945_queue_space(q) > q->low_mark && (txq_id >= 0) &&
 292                         (txq_id != IWL_CMD_QUEUE_NUM) &&
 293                         priv->mac80211_registered)
 294                 ieee80211_wake_queue(priv->hw, txq_id);
 295 }
 296
 297 /**
 298  * iwl3945_rx_reply_tx - Handle Tx response
 299  */
 300 static void iwl3945_rx_reply_tx(struct iwl3945_priv *priv,
 301                             struct iwl3945_rx_mem_buffer *rxb)
 302 {
 303         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 304         u16 sequence = le16_to_cpu(pkt->hdr.sequence);
 305         int txq_id = SEQ_TO_QUEUE(sequence);
 306         int index = SEQ_TO_INDEX(sequence);
 307         struct iwl3945_tx_queue *txq = &priv->txq[txq_id];
 308         struct ieee80211_tx_info *info;
 309         struct iwl3945_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
 310         u32  status = le32_to_cpu(tx_resp->status);
 311         int rate_idx;
 312
 313         if ((index >= txq->q.n_bd) || (iwl3945_x2_queue_used(&txq->q, index) == 0)) {
 314                 IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
 315                           "is out of range [0-%d] %d %d\n", txq_id,
 316                           index, txq->q.n_bd, txq->q.write_ptr,
 317                           txq->q.read_ptr);
 318                 return;
 319         }
 320
 321         info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb[0]);
 322         memset(&info->status, 0, sizeof(info->status));
 323
 324         info->status.retry_count = tx_resp->failure_frame;
 325         /* tx_status->rts_retry_count = tx_resp->failure_rts; */
 326         info->flags |= ((status & TX_STATUS_MSK) == TX_STATUS_SUCCESS) ?
 327                                 IEEE80211_TX_STAT_ACK : 0;
 328
 329         IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
 330                         txq_id, iwl3945_get_tx_fail_reason(status), status,
 331                         tx_resp->rate, tx_resp->failure_frame);
 332
 333         rate_idx = iwl3945_hwrate_to_plcp_idx(tx_resp->rate);
 334         if (info->band == IEEE80211_BAND_5GHZ)
 335                 rate_idx -= IWL_FIRST_OFDM_RATE;
 336         info->tx_rate_idx = rate_idx;
 337         IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
 338         iwl3945_tx_queue_reclaim(priv, txq_id, index);
 339
 340         if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
 341                 IWL_ERROR("TODO:  Implement Tx ABORT REQUIRED!!!\n");
 342 }
 343
 344
 345
 346 /*****************************************************************************
 347  *
 348  * Intel PRO/Wireless 3945ABG/BG Network Connection
 349  *
 350  *  RX handler implementations
 351  *
 352  *****************************************************************************/
 353
 354 void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
 355 {
 356         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 357         IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
 358                      (int)sizeof(struct iwl3945_notif_statistics),
 359                      le32_to_cpu(pkt->len));
 360
 361         memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
 362
 363         iwl3945_led_background(priv);
 364
 365         priv->last_statistics_time = jiffies;
 366 }
 367
 368 /******************************************************************************
 369  *
 370  * Misc. internal state and helper functions
 371  *
 372  ******************************************************************************/
 373 #ifdef CONFIG_IWL3945_DEBUG
 374
 375 /**
 376  * iwl3945_report_frame - dump frame to syslog during debug sessions
 377  *
 378  * You may hack this function to show different aspects of received frames,
 379  * including selective frame dumps.
 380  * group100 parameter selects whether to show 1 out of 100 good frames.
 381  */
 382 static void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
 383                       struct iwl3945_rx_packet *pkt,
 384                       struct ieee80211_hdr *header, int group100)
 385 {
 386         u32 to_us;
 387         u32 print_summary = 0;
 388         u32 print_dump = 0;     /* set to 1 to dump all frames' contents */
 389         u32 hundred = 0;
 390         u32 dataframe = 0;
 391         __le16 fc;
 392         u16 seq_ctl;
 393         u16 channel;
 394         u16 phy_flags;
 395         u16 length;
 396         u16 status;
 397         u16 bcn_tmr;
 398         u32 tsf_low;
 399         u64 tsf;
 400         u8 rssi;
 401         u8 agc;
 402         u16 sig_avg;
 403         u16 noise_diff;
 404         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 405         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 406         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 407         u8 *data = IWL_RX_DATA(pkt);
 408
 409         /* MAC header */
 410         fc = header->frame_control;
 411         seq_ctl = le16_to_cpu(header->seq_ctrl);
 412
 413         /* metadata */
 414         channel = le16_to_cpu(rx_hdr->channel);
 415         phy_flags = le16_to_cpu(rx_hdr->phy_flags);
 416         length = le16_to_cpu(rx_hdr->len);
 417
 418         /* end-of-frame status and timestamp */
 419         status = le32_to_cpu(rx_end->status);
 420         bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
 421         tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
 422         tsf = le64_to_cpu(rx_end->timestamp);
 423
 424         /* signal statistics */
 425         rssi = rx_stats->rssi;
 426         agc = rx_stats->agc;
 427         sig_avg = le16_to_cpu(rx_stats->sig_avg);
 428         noise_diff = le16_to_cpu(rx_stats->noise_diff);
 429
 430         to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
 431
 432         /* if data frame is to us and all is good,
 433          *   (optionally) print summary for only 1 out of every 100 */
 434         if (to_us && (fc & ~cpu_to_le16(IEEE80211_FCTL_PROTECTED)) ==
 435             cpu_to_le16(IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
 436                 dataframe = 1;
 437                 if (!group100)
 438                         print_summary = 1;      /* print each frame */
 439                 else if (priv->framecnt_to_us < 100) {
 440                         priv->framecnt_to_us++;
 441                         print_summary = 0;
 442                 } else {
 443                         priv->framecnt_to_us = 0;
 444                         print_summary = 1;
 445                         hundred = 1;
 446                 }
 447         } else {
 448                 /* print summary for all other frames */
 449                 print_summary = 1;
 450         }
 451
 452         if (print_summary) {
 453                 char *title;
 454                 int rate;
 455
 456                 if (hundred)
 457                         title = "100Frames";
 458                 else if (ieee80211_has_retry(fc))
 459                         title = "Retry";
 460                 else if (ieee80211_is_assoc_resp(fc))
 461                         title = "AscRsp";
 462                 else if (ieee80211_is_reassoc_resp(fc))
 463                         title = "RasRsp";
 464                 else if (ieee80211_is_probe_resp(fc)) {
 465                         title = "PrbRsp";
 466                         print_dump = 1; /* dump frame contents */
 467                 } else if (ieee80211_is_beacon(fc)) {
 468                         title = "Beacon";
 469                         print_dump = 1; /* dump frame contents */
 470                 } else if (ieee80211_is_atim(fc))
 471                         title = "ATIM";
 472                 else if (ieee80211_is_auth(fc))
 473                         title = "Auth";
 474                 else if (ieee80211_is_deauth(fc))
 475                         title = "DeAuth";
 476                 else if (ieee80211_is_disassoc(fc))
 477                         title = "DisAssoc";
 478                 else
 479                         title = "Frame";
 480
 481                 rate = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
 482                 if (rate == -1)
 483                         rate = 0;
 484                 else
 485                         rate = iwl3945_rates[rate].ieee / 2;
 486
 487                 /* print frame summary.
 488                  * MAC addresses show just the last byte (for brevity),
 489                  *    but you can hack it to show more, if you'd like to. */
 490                 if (dataframe)
 491                         IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
 492                                      "len=%u, rssi=%d, chnl=%d, rate=%d, \n",
 493                                      title, le16_to_cpu(fc), header->addr1[5],
 494                                      length, rssi, channel, rate);
 495                 else {
 496                         /* src/dst addresses assume managed mode */
 497                         IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
 498                                      "src=0x%02x, rssi=%u, tim=%lu usec, "
 499                                      "phy=0x%02x, chnl=%d\n",
 500                                      title, le16_to_cpu(fc), header->addr1[5],
 501                                      header->addr3[5], rssi,
 502                                      tsf_low - priv->scan_start_tsf,
 503                                      phy_flags, channel);
 504                 }
 505         }
 506         if (print_dump)
 507                 iwl3945_print_hex_dump(IWL_DL_RX, data, length);
 508 }
 509 #else
 510 static inline void iwl3945_dbg_report_frame(struct iwl3945_priv *priv,
 511                       struct iwl3945_rx_packet *pkt,
 512                       struct ieee80211_hdr *header, int group100)
 513 {
 514 }
 515 #endif
 516
 517 /* This is necessary only for a number of statistics, see the caller. */
 518 static int iwl3945_is_network_packet(struct iwl3945_priv *priv,
 519                 struct ieee80211_hdr *header)
 520 {
 521         /* Filter incoming packets to determine if they are targeted toward
 522          * this network, discarding packets coming from ourselves */
 523         switch (priv->iw_mode) {
 524         case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source    | BSSID */
 525                 /* packets to our IBSS update information */
 526                 return !compare_ether_addr(header->addr3, priv->bssid);
 527         case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
 528                 /* packets to our IBSS update information */
 529                 return !compare_ether_addr(header->addr2, priv->bssid);
 530         default:
 531                 return 1;
 532         }
 533 }
 534
 535 static void iwl3945_add_radiotap(struct iwl3945_priv *priv,
 536                                  struct sk_buff *skb,
 537                                  struct iwl3945_rx_frame_hdr *rx_hdr,
 538                                  struct ieee80211_rx_status *stats)
 539 {
 540         /* First cache any information we need before we overwrite
 541          * the information provided in the skb from the hardware */
 542         s8 signal = stats->signal;
 543         s8 noise = 0;
 544         int rate = stats->rate_idx;
 545         u64 tsf = stats->mactime;
 546         __le16 phy_flags_hw = rx_hdr->phy_flags, antenna;
 547
 548         struct iwl3945_rt_rx_hdr {
 549                 struct ieee80211_radiotap_header rt_hdr;
 550                 __le64 rt_tsf;          /* TSF */
 551                 u8 rt_flags;            /* radiotap packet flags */
 552                 u8 rt_rate;             /* rate in 500kb/s */
 553                 __le16 rt_channelMHz;   /* channel in MHz */
 554                 __le16 rt_chbitmask;    /* channel bitfield */
 555                 s8 rt_dbmsignal;        /* signal in dBm, kluged to signed */
 556                 s8 rt_dbmnoise;
 557                 u8 rt_antenna;          /* antenna number */
 558         } __attribute__ ((packed)) *iwl3945_rt;
 559
 560         if (skb_headroom(skb) < sizeof(*iwl3945_rt)) {
 561                 if (net_ratelimit())
 562                         printk(KERN_ERR "not enough headroom [%d] for "
 563                                "radiotap head [%zd]\n",
 564                                skb_headroom(skb), sizeof(*iwl3945_rt));
 565                 return;
 566         }
 567
 568         /* put radiotap header in front of 802.11 header and data */
 569         iwl3945_rt = (void *)skb_push(skb, sizeof(*iwl3945_rt));
 570
 571         /* initialise radiotap header */
 572         iwl3945_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
 573         iwl3945_rt->rt_hdr.it_pad = 0;
 574
 575         /* total header + data */
 576         put_unaligned_le16(sizeof(*iwl3945_rt), &iwl3945_rt->rt_hdr.it_len);
 577
 578         /* Indicate all the fields we add to the radiotap header */
 579         put_unaligned_le32((1 << IEEE80211_RADIOTAP_TSFT) |
 580                            (1 << IEEE80211_RADIOTAP_FLAGS) |
 581                            (1 << IEEE80211_RADIOTAP_RATE) |
 582                            (1 << IEEE80211_RADIOTAP_CHANNEL) |
 583                            (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
 584                            (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
 585                            (1 << IEEE80211_RADIOTAP_ANTENNA),
 586                         &iwl3945_rt->rt_hdr.it_present);
 587
 588         /* Zero the flags, we'll add to them as we go */
 589         iwl3945_rt->rt_flags = 0;
 590
 591         put_unaligned_le64(tsf, &iwl3945_rt->rt_tsf);
 592
 593         iwl3945_rt->rt_dbmsignal = signal;
 594         iwl3945_rt->rt_dbmnoise = noise;
 595
 596         /* Convert the channel frequency and set the flags */
 597         put_unaligned_le16(stats->freq, &iwl3945_rt->rt_channelMHz);
 598         if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
 599                 put_unaligned_le16(IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ,
 600                               &iwl3945_rt->rt_chbitmask);
 601         else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
 602                 put_unaligned_le16(IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ,
 603                               &iwl3945_rt->rt_chbitmask);
 604         else    /* 802.11g */
 605                 put_unaligned_le16(IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ,
 606                               &iwl3945_rt->rt_chbitmask);
 607
 608         if (rate == -1)
 609                 iwl3945_rt->rt_rate = 0;
 610         else {
 611                 if (stats->band == IEEE80211_BAND_5GHZ)
 612                         rate += IWL_FIRST_OFDM_RATE;
 613
 614                 iwl3945_rt->rt_rate = iwl3945_rates[rate].ieee;
 615         }
 616
 617         /* antenna number */
 618         antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
 619         iwl3945_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
 620
 621         /* set the preamble flag if we have it */
 622         if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
 623                 iwl3945_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
 624
 625         stats->flag |= RX_FLAG_RADIOTAP;
 626 }
 627
 628 static void iwl3945_pass_packet_to_mac80211(struct iwl3945_priv *priv,
 629                                    struct iwl3945_rx_mem_buffer *rxb,
 630                                    struct ieee80211_rx_status *stats)
 631 {
 632         struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
 633 #ifdef CONFIG_IWL3945_LEDS
 634         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 635 #endif
 636         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 637         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 638         short len = le16_to_cpu(rx_hdr->len);
 639
 640         /* We received data from the HW, so stop the watchdog */
 641         if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
 642                 IWL_DEBUG_DROP("Corruption detected!\n");
 643                 return;
 644         }
 645
 646         /* We only process data packets if the interface is open */
 647         if (unlikely(!priv->is_open)) {
 648                 IWL_DEBUG_DROP_LIMIT
 649                     ("Dropping packet while interface is not open.\n");
 650                 return;
 651         }
 652
 653         skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
 654         /* Set the size of the skb to the size of the frame */
 655         skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
 656
 657         if (iwl3945_param_hwcrypto)
 658                 iwl3945_set_decrypted_flag(priv, rxb->skb,
 659                                        le32_to_cpu(rx_end->status), stats);
 660
 661         if (priv->add_radiotap)
 662                 iwl3945_add_radiotap(priv, rxb->skb, rx_hdr, stats);
 663
 664 #ifdef CONFIG_IWL3945_LEDS
 665         if (ieee80211_is_data(hdr->frame_control))
 666                 priv->rxtxpackets += len;
 667 #endif
 668         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
 669         rxb->skb = NULL;
 670 }
 671
 672 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
 673
 674 static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv,
 675                                 struct iwl3945_rx_mem_buffer *rxb)
 676 {
 677         struct ieee80211_hdr *header;
 678         struct ieee80211_rx_status rx_status;
 679         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 680         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 681         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 682         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 683         int snr;
 684         u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
 685         u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
 686         u8 network_packet;
 687
 688         rx_status.antenna = 0;
 689         rx_status.flag = 0;
 690         rx_status.mactime = le64_to_cpu(rx_end->timestamp);
 691         rx_status.freq =
 692                 ieee80211_channel_to_frequency(le16_to_cpu(rx_hdr->channel));
 693         rx_status.band = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 694                                 IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
 695
 696         rx_status.rate_idx = iwl3945_hwrate_to_plcp_idx(rx_hdr->rate);
 697         if (rx_status.band == IEEE80211_BAND_5GHZ)
 698                 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
 699
 700         if ((unlikely(rx_stats->phy_count > 20))) {
 701                 IWL_DEBUG_DROP
 702                     ("dsp size out of range [0,20]: "
 703                      "%d/n", rx_stats->phy_count);
 704                 return;
 705         }
 706
 707         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
 708             || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 709                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
 710                 return;
 711         }
 712
 713
 714
 715         /* Convert 3945's rssi indicator to dBm */
 716         rx_status.signal = rx_stats->rssi - IWL_RSSI_OFFSET;
 717
 718         /* Set default noise value to -127 */
 719         if (priv->last_rx_noise == 0)
 720                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
 721
 722         /* 3945 provides noise info for OFDM frames only.
 723          * sig_avg and noise_diff are measured by the 3945's digital signal
 724          *   processor (DSP), and indicate linear levels of signal level and
 725          *   distortion/noise within the packet preamble after
 726          *   automatic gain control (AGC).  sig_avg should stay fairly
 727          *   constant if the radio's AGC is working well.
 728          * Since these values are linear (not dB or dBm), linear
 729          *   signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
 730          * Convert linear SNR to dB SNR, then subtract that from rssi dBm
 731          *   to obtain noise level in dBm.
 732          * Calculate rx_status.signal (quality indicator in %) based on SNR. */
 733         if (rx_stats_noise_diff) {
 734                 snr = rx_stats_sig_avg / rx_stats_noise_diff;
 735                 rx_status.noise = rx_status.signal -
 736                                         iwl3945_calc_db_from_ratio(snr);
 737                 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal,
 738                                                          rx_status.noise);
 739
 740         /* If noise info not available, calculate signal quality indicator (%)
 741          *   using just the dBm signal level. */
 742         } else {
 743                 rx_status.noise = priv->last_rx_noise;
 744                 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal, 0);
 745         }
 746
 747
 748         IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
 749                         rx_status.signal, rx_status.noise, rx_status.qual,
 750                         rx_stats_sig_avg, rx_stats_noise_diff);
 751
 752         header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 753
 754         network_packet = iwl3945_is_network_packet(priv, header);
 755
 756         IWL_DEBUG_STATS_LIMIT("[%c] %d RSSI:%d Signal:%u, Noise:%u, Rate:%u\n",
 757                               network_packet ? '*' : ' ',
 758                               le16_to_cpu(rx_hdr->channel),
 759                               rx_status.signal, rx_status.signal,
 760                               rx_status.noise, rx_status.rate_idx);
 761
 762 #ifdef CONFIG_IWL3945_DEBUG
 763         if (iwl3945_debug_level & (IWL_DL_RX))
 764                 /* Set "1" to report good data frames in groups of 100 */
 765                 iwl3945_dbg_report_frame(priv, pkt, header, 1);
 766 #endif
 767
 768         if (network_packet) {
 769                 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
 770                 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
 771                 priv->last_rx_rssi = rx_status.signal;
 772                 priv->last_rx_noise = rx_status.noise;
 773         }
 774
 775         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
 776                 iwl3945_pass_packet_to_mac80211(priv, rxb, &rx_status);
 777                 return;
 778         }
 779
 780         switch (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FTYPE) {
 781         case IEEE80211_FTYPE_MGMT:
 782                 switch (le16_to_cpu(header->frame_control) &
 783                         IEEE80211_FCTL_STYPE) {
 784                 case IEEE80211_STYPE_PROBE_RESP:
 785                 case IEEE80211_STYPE_BEACON:{
 786                                 /* If this is a beacon or probe response for
 787                                  * our network then cache the beacon
 788                                  * timestamp */
 789                                 if ((((priv->iw_mode == IEEE80211_IF_TYPE_STA)
 790                                       && !compare_ether_addr(header->addr2,
 791                                                              priv->bssid)) ||
 792                                      ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 793                                       && !compare_ether_addr(header->addr3,
 794                                                              priv->bssid)))) {
 795                                         struct ieee80211_mgmt *mgmt =
 796                                             (struct ieee80211_mgmt *)header;
 797                                         __le32 *pos;
 798                                         pos = (__le32 *)&mgmt->u.beacon.
 799                                             timestamp;
 800                                         priv->timestamp0 = le32_to_cpu(pos[0]);
 801                                         priv->timestamp1 = le32_to_cpu(pos[1]);
 802                                         priv->beacon_int = le16_to_cpu(
 803                                             mgmt->u.beacon.beacon_int);
 804                                         if (priv->call_post_assoc_from_beacon &&
 805                                             (priv->iw_mode ==
 806                                                 IEEE80211_IF_TYPE_STA))
 807                                                 queue_work(priv->workqueue,
 808                                                     &priv->post_associate.work);
 809
 810                                         priv->call_post_assoc_from_beacon = 0;
 811                                 }
 812
 813                                 break;
 814                         }
 815
 816                 case IEEE80211_STYPE_ACTION:
 817                         /* TODO: Parse 802.11h frames for CSA... */
 818                         break;
 819
 820                         /*
 821                          * TODO: Use the new callback function from
 822                          * mac80211 instead of sniffing these packets.
 823                          */
 824                 case IEEE80211_STYPE_ASSOC_RESP:
 825                 case IEEE80211_STYPE_REASSOC_RESP:{
 826                                 struct ieee80211_mgmt *mgnt =
 827                                     (struct ieee80211_mgmt *)header;
 828
 829                                 /* We have just associated, give some
 830                                  * time for the 4-way handshake if
 831                                  * any. Don't start scan too early. */
 832                                 priv->next_scan_jiffies = jiffies +
 833                                         IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
 834
 835                                 priv->assoc_id = (~((1 << 15) | (1 << 14)) &
 836                                                   le16_to_cpu(mgnt->u.
 837                                                               assoc_resp.aid));
 838                                 priv->assoc_capability =
 839                                     le16_to_cpu(mgnt->u.assoc_resp.capab_info);
 840                                 if (priv->beacon_int)
 841                                         queue_work(priv->workqueue,
 842                                             &priv->post_associate.work);
 843                                 else
 844                                         priv->call_post_assoc_from_beacon = 1;
 845                                 break;
 846                         }
 847
 848                 case IEEE80211_STYPE_PROBE_REQ:{
 849                                 DECLARE_MAC_BUF(mac1);
 850                                 DECLARE_MAC_BUF(mac2);
 851                                 DECLARE_MAC_BUF(mac3);
 852                                 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 853                                         IWL_DEBUG_DROP
 854                                             ("Dropping (non network): %s"
 855                                              ", %s, %s\n",
 856                                              print_mac(mac1, header->addr1),
 857                                              print_mac(mac2, header->addr2),
 858                                              print_mac(mac3, header->addr3));
 859                                 return;
 860                         }
 861                 }
 862
 863         case IEEE80211_FTYPE_DATA:
 864                 /* fall through */
 865         default:
 866                 iwl3945_pass_packet_to_mac80211(priv, rxb, &rx_status);
 867                 break;
 868         }
 869 }
 870
 871 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *ptr,
 872                                  dma_addr_t addr, u16 len)
 873 {
 874         int count;
 875         u32 pad;
 876         struct iwl3945_tfd_frame *tfd = (struct iwl3945_tfd_frame *)ptr;
 877
 878         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 879         pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
 880
 881         if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
 882                 IWL_ERROR("Error can not send more than %d chunks\n",
 883                           NUM_TFD_CHUNKS);
 884                 return -EINVAL;
 885         }
 886
 887         tfd->pa[count].addr = cpu_to_le32(addr);
 888         tfd->pa[count].len = cpu_to_le32(len);
 889
 890         count++;
 891
 892         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
 893                                          TFD_CTL_PAD_SET(pad));
 894
 895         return 0;
 896 }
 897
 898 /**
 899  * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
 900  *
 901  * Does NOT advance any indexes
 902  */
 903 int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
 904 {
 905         struct iwl3945_tfd_frame *bd_tmp = (struct iwl3945_tfd_frame *)&txq->bd[0];
 906         struct iwl3945_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
 907         struct pci_dev *dev = priv->pci_dev;
 908         int i;
 909         int counter;
 910
 911         /* classify bd */
 912         if (txq->q.id == IWL_CMD_QUEUE_NUM)
 913                 /* nothing to cleanup after for host commands */
 914                 return 0;
 915
 916         /* sanity check */
 917         counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
 918         if (counter > NUM_TFD_CHUNKS) {
 919                 IWL_ERROR("Too many chunks: %i\n", counter);
 920                 /* @todo issue fatal error, it is quite serious situation */
 921                 return 0;
 922         }
 923
 924         /* unmap chunks if any */
 925
 926         for (i = 1; i < counter; i++) {
 927                 pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
 928                                  le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
 929                 if (txq->txb[txq->q.read_ptr].skb[0]) {
 930                         struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
 931                         if (txq->txb[txq->q.read_ptr].skb[0]) {
 932                                 /* Can be called from interrupt context */
 933                                 dev_kfree_skb_any(skb);
 934                                 txq->txb[txq->q.read_ptr].skb[0] = NULL;
 935                         }
 936                 }
 937         }
 938         return 0;
 939 }
 940
 941 u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *addr)
 942 {
 943         int i;
 944         int ret = IWL_INVALID_STATION;
 945         unsigned long flags;
 946         DECLARE_MAC_BUF(mac);
 947
 948         spin_lock_irqsave(&priv->sta_lock, flags);
 949         for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
 950                 if ((priv->stations[i].used) &&
 951                     (!compare_ether_addr
 952                      (priv->stations[i].sta.sta.addr, addr))) {
 953                         ret = i;
 954                         goto out;
 955                 }
 956
 957         IWL_DEBUG_INFO("can not find STA %s (total %d)\n",
 958                        print_mac(mac, addr), priv->num_stations);
 959  out:
 960         spin_unlock_irqrestore(&priv->sta_lock, flags);
 961         return ret;
 962 }
 963
 964 /**
 965  * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
 966  *
 967 */
 968 void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv,
 969                               struct iwl3945_cmd *cmd,
 970                               struct ieee80211_tx_info *info,
 971                               struct ieee80211_hdr *hdr, int sta_id, int tx_id)
 972 {
 973         unsigned long flags;
 974         u16 hw_value = ieee80211_get_tx_rate(priv->hw, info)->hw_value;
 975         u16 rate_index = min(hw_value & 0xffff, IWL_RATE_COUNT - 1);
 976         u16 rate_mask;
 977         int rate;
 978         u8 rts_retry_limit;
 979         u8 data_retry_limit;
 980         __le32 tx_flags;
 981         __le16 fc = hdr->frame_control;
 982
 983         rate = iwl3945_rates[rate_index].plcp;
 984         tx_flags = cmd->cmd.tx.tx_flags;
 985
 986         /* We need to figure out how to get the sta->supp_rates while
 987          * in this running context */
 988         rate_mask = IWL_RATES_MASK;
 989
 990         spin_lock_irqsave(&priv->sta_lock, flags);
 991
 992         priv->stations[sta_id].current_rate.rate_n_flags = rate;
 993
 994         if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
 995             (sta_id != priv->hw_setting.bcast_sta_id) &&
 996                 (sta_id != IWL_MULTICAST_ID))
 997                 priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
 998
 999         spin_unlock_irqrestore(&priv->sta_lock, flags);
1000
1001         if (tx_id >= IWL_CMD_QUEUE_NUM)
1002                 rts_retry_limit = 3;
1003         else
1004                 rts_retry_limit = 7;
1005
1006         if (ieee80211_is_probe_resp(fc)) {
1007                 data_retry_limit = 3;
1008                 if (data_retry_limit < rts_retry_limit)
1009                         rts_retry_limit = data_retry_limit;
1010         } else
1011                 data_retry_limit = IWL_DEFAULT_TX_RETRY;
1012
1013         if (priv->data_retry_limit != -1)
1014                 data_retry_limit = priv->data_retry_limit;
1015
1016         if (ieee80211_is_mgmt(fc)) {
1017                 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
1018                 case cpu_to_le16(IEEE80211_STYPE_AUTH):
1019                 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
1020                 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
1021                 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
1022                         if (tx_flags & TX_CMD_FLG_RTS_MSK) {
1023                                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
1024                                 tx_flags |= TX_CMD_FLG_CTS_MSK;
1025                         }
1026                         break;
1027                 default:
1028                         break;
1029                 }
1030         }
1031
1032         cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
1033         cmd->cmd.tx.data_retry_limit = data_retry_limit;
1034         cmd->cmd.tx.rate = rate;
1035         cmd->cmd.tx.tx_flags = tx_flags;
1036
1037         /* OFDM */
1038         cmd->cmd.tx.supp_rates[0] =
1039            ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
1040
1041         /* CCK */
1042         cmd->cmd.tx.supp_rates[1] = (rate_mask & 0xF);
1043
1044         IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
1045                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
1046                        cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
1047                        cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
1048 }
1049
1050 u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, u16 tx_rate, u8 flags)
1051 {
1052         unsigned long flags_spin;
1053         struct iwl3945_station_entry *station;
1054
1055         if (sta_id == IWL_INVALID_STATION)
1056                 return IWL_INVALID_STATION;
1057
1058         spin_lock_irqsave(&priv->sta_lock, flags_spin);
1059         station = &priv->stations[sta_id];
1060
1061         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
1062         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
1063         station->current_rate.rate_n_flags = tx_rate;
1064         station->sta.mode = STA_CONTROL_MODIFY_MSK;
1065
1066         spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
1067
1068         iwl3945_send_add_station(priv, &station->sta, flags);
1069         IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
1070                         sta_id, tx_rate);
1071         return sta_id;
1072 }
1073
1074 static int iwl3945_nic_set_pwr_src(struct iwl3945_priv *priv, int pwr_max)
1075 {
1076         int rc;
1077         unsigned long flags;
1078
1079         spin_lock_irqsave(&priv->lock, flags);
1080         rc = iwl3945_grab_nic_access(priv);
1081         if (rc) {
1082                 spin_unlock_irqrestore(&priv->lock, flags);
1083                 return rc;
1084         }
1085
1086         if (!pwr_max) {
1087                 u32 val;
1088
1089                 rc = pci_read_config_dword(priv->pci_dev,
1090                                 PCI_POWER_SOURCE, &val);
1091                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
1092                         iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1093                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
1094                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
1095                         iwl3945_release_nic_access(priv);
1096
1097                         iwl3945_poll_bit(priv, CSR_GPIO_IN,
1098                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
1099                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
1100                 } else
1101                         iwl3945_release_nic_access(priv);
1102         } else {
1103                 iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
1104                                 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
1105                                 ~APMG_PS_CTRL_MSK_PWR_SRC);
1106
1107                 iwl3945_release_nic_access(priv);
1108                 iwl3945_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
1109                              CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
1110         }
1111         spin_unlock_irqrestore(&priv->lock, flags);
1112
1113         return rc;
1114 }
1115
1116 static int iwl3945_rx_init(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
1117 {
1118         int rc;
1119         unsigned long flags;
1120
1121         spin_lock_irqsave(&priv->lock, flags);
1122         rc = iwl3945_grab_nic_access(priv);
1123         if (rc) {
1124                 spin_unlock_irqrestore(&priv->lock, flags);
1125                 return rc;
1126         }
1127
1128         iwl3945_write_direct32(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr);
1129         iwl3945_write_direct32(priv, FH_RCSR_RPTR_ADDR(0),
1130                              priv->hw_setting.shared_phys +
1131                              offsetof(struct iwl3945_shared, rx_read_ptr[0]));
1132         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), 0);
1133         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0),
1134                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
1135                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
1136                 ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
1137                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
1138                 (RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
1139                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
1140                 (1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
1141                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
1142
1143         /* fake read to flush all prev I/O */
1144         iwl3945_read_direct32(priv, FH_RSSR_CTRL);
1145
1146         iwl3945_release_nic_access(priv);
1147         spin_unlock_irqrestore(&priv->lock, flags);
1148
1149         return 0;
1150 }
1151
1152 static int iwl3945_tx_reset(struct iwl3945_priv *priv)
1153 {
1154         int rc;
1155         unsigned long flags;
1156
1157         spin_lock_irqsave(&priv->lock, flags);
1158         rc = iwl3945_grab_nic_access(priv);
1159         if (rc) {
1160                 spin_unlock_irqrestore(&priv->lock, flags);
1161                 return rc;
1162         }
1163
1164         /* bypass mode */
1165         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
1166
1167         /* RA 0 is active */
1168         iwl3945_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
1169
1170         /* all 6 fifo are active */
1171         iwl3945_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
1172
1173         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
1174         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
1175         iwl3945_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
1176         iwl3945_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
1177
1178         iwl3945_write_direct32(priv, FH_TSSR_CBB_BASE,
1179                              priv->hw_setting.shared_phys);
1180
1181         iwl3945_write_direct32(priv, FH_TSSR_MSG_CONFIG,
1182                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
1183                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
1184                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
1185                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
1186                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
1187                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
1188                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
1189
1190         iwl3945_release_nic_access(priv);
1191         spin_unlock_irqrestore(&priv->lock, flags);
1192
1193         return 0;
1194 }
1195
1196 /**
1197  * iwl3945_txq_ctx_reset - Reset TX queue context
1198  *
1199  * Destroys all DMA structures and initialize them again
1200  */
1201 static int iwl3945_txq_ctx_reset(struct iwl3945_priv *priv)
1202 {
1203         int rc;
1204         int txq_id, slots_num;
1205
1206         iwl3945_hw_txq_ctx_free(priv);
1207
1208         /* Tx CMD queue */
1209         rc = iwl3945_tx_reset(priv);
1210         if (rc)
1211                 goto error;
1212
1213         /* Tx queue(s) */
1214         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
1215                 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
1216                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
1217                 rc = iwl3945_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
1218                                 txq_id);
1219                 if (rc) {
1220                         IWL_ERROR("Tx %d queue init failed\n", txq_id);
1221                         goto error;
1222                 }
1223         }
1224
1225         return rc;
1226
1227  error:
1228         iwl3945_hw_txq_ctx_free(priv);
1229         return rc;
1230 }
1231
1232 int iwl3945_hw_nic_init(struct iwl3945_priv *priv)
1233 {
1234         u8 rev_id;
1235         int rc;
1236         unsigned long flags;
1237         struct iwl3945_rx_queue *rxq = &priv->rxq;
1238
1239         iwl3945_power_init_handle(priv);
1240
1241         spin_lock_irqsave(&priv->lock, flags);
1242         iwl3945_set_bit(priv, CSR_ANA_PLL_CFG, CSR39_ANA_PLL_CFG_VAL);
1243         iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1244                     CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1245
1246         iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1247         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1248                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1249                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1250         if (rc < 0) {
1251                 spin_unlock_irqrestore(&priv->lock, flags);
1252                 IWL_DEBUG_INFO("Failed to init the card\n");
1253                 return rc;
1254         }
1255
1256         rc = iwl3945_grab_nic_access(priv);
1257         if (rc) {
1258                 spin_unlock_irqrestore(&priv->lock, flags);
1259                 return rc;
1260         }
1261         iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1262                                  APMG_CLK_VAL_DMA_CLK_RQT |
1263                                  APMG_CLK_VAL_BSM_CLK_RQT);
1264         udelay(20);
1265         iwl3945_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1266                                     APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1267         iwl3945_release_nic_access(priv);
1268         spin_unlock_irqrestore(&priv->lock, flags);
1269
1270         /* Determine HW type */
1271         rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
1272         if (rc)
1273                 return rc;
1274         IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
1275
1276         iwl3945_nic_set_pwr_src(priv, 1);
1277         spin_lock_irqsave(&priv->lock, flags);
1278
1279         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
1280                 IWL_DEBUG_INFO("RTP type \n");
1281         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
1282                 IWL_DEBUG_INFO("3945 RADIO-MB type\n");
1283                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1284                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MB);
1285         } else {
1286                 IWL_DEBUG_INFO("3945 RADIO-MM type\n");
1287                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1288                             CSR39_HW_IF_CONFIG_REG_BIT_3945_MM);
1289         }
1290
1291         if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
1292                 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
1293                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1294                             CSR39_HW_IF_CONFIG_REG_BIT_SKU_MRC);
1295         } else
1296                 IWL_DEBUG_INFO("SKU OP mode is basic\n");
1297
1298         if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
1299                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1300                                priv->eeprom.board_revision);
1301                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1302                             CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1303         } else {
1304                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
1305                                priv->eeprom.board_revision);
1306                 iwl3945_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
1307                               CSR39_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
1308         }
1309
1310         if (priv->eeprom.almgor_m_version <= 1) {
1311                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1312                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
1313                 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
1314                                priv->eeprom.almgor_m_version);
1315         } else {
1316                 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
1317                                priv->eeprom.almgor_m_version);
1318                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1319                             CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
1320         }
1321         spin_unlock_irqrestore(&priv->lock, flags);
1322
1323         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
1324                 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
1325
1326         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
1327                 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
1328
1329         /* Allocate the RX queue, or reset if it is already allocated */
1330         if (!rxq->bd) {
1331                 rc = iwl3945_rx_queue_alloc(priv);
1332                 if (rc) {
1333                         IWL_ERROR("Unable to initialize Rx queue\n");
1334                         return -ENOMEM;
1335                 }
1336         } else
1337                 iwl3945_rx_queue_reset(priv, rxq);
1338
1339         iwl3945_rx_replenish(priv);
1340
1341         iwl3945_rx_init(priv, rxq);
1342
1343         spin_lock_irqsave(&priv->lock, flags);
1344
1345         /* Look at using this instead:
1346         rxq->need_update = 1;
1347         iwl3945_rx_queue_update_write_ptr(priv, rxq);
1348         */
1349
1350         rc = iwl3945_grab_nic_access(priv);
1351         if (rc) {
1352                 spin_unlock_irqrestore(&priv->lock, flags);
1353                 return rc;
1354         }
1355         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), rxq->write & ~7);
1356         iwl3945_release_nic_access(priv);
1357
1358         spin_unlock_irqrestore(&priv->lock, flags);
1359
1360         rc = iwl3945_txq_ctx_reset(priv);
1361         if (rc)
1362                 return rc;
1363
1364         set_bit(STATUS_INIT, &priv->status);
1365
1366         return 0;
1367 }
1368
1369 /**
1370  * iwl3945_hw_txq_ctx_free - Free TXQ Context
1371  *
1372  * Destroy all TX DMA queues and structures
1373  */
1374 void iwl3945_hw_txq_ctx_free(struct iwl3945_priv *priv)
1375 {
1376         int txq_id;
1377
1378         /* Tx queues */
1379         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1380                 iwl3945_tx_queue_free(priv, &priv->txq[txq_id]);
1381 }
1382
1383 void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv *priv)
1384 {
1385         int queue;
1386         unsigned long flags;
1387
1388         spin_lock_irqsave(&priv->lock, flags);
1389         if (iwl3945_grab_nic_access(priv)) {
1390                 spin_unlock_irqrestore(&priv->lock, flags);
1391                 iwl3945_hw_txq_ctx_free(priv);
1392                 return;
1393         }
1394
1395         /* stop SCD */
1396         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0);
1397
1398         /* reset TFD queues */
1399         for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) {
1400                 iwl3945_write_direct32(priv, FH_TCSR_CONFIG(queue), 0x0);
1401                 iwl3945_poll_direct_bit(priv, FH_TSSR_TX_STATUS,
1402                                 ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue),
1403                                 1000);
1404         }
1405
1406         iwl3945_release_nic_access(priv);
1407         spin_unlock_irqrestore(&priv->lock, flags);
1408
1409         iwl3945_hw_txq_ctx_free(priv);
1410 }
1411
1412 int iwl3945_hw_nic_stop_master(struct iwl3945_priv *priv)
1413 {
1414         int rc = 0;
1415         u32 reg_val;
1416         unsigned long flags;
1417
1418         spin_lock_irqsave(&priv->lock, flags);
1419
1420         /* set stop master bit */
1421         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1422
1423         reg_val = iwl3945_read32(priv, CSR_GP_CNTRL);
1424
1425         if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1426             (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1427                 IWL_DEBUG_INFO("Card in power save, master is already "
1428                                "stopped\n");
1429         else {
1430                 rc = iwl3945_poll_bit(priv, CSR_RESET,
1431                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
1432                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1433                 if (rc < 0) {
1434                         spin_unlock_irqrestore(&priv->lock, flags);
1435                         return rc;
1436                 }
1437         }
1438
1439         spin_unlock_irqrestore(&priv->lock, flags);
1440         IWL_DEBUG_INFO("stop master\n");
1441
1442         return rc;
1443 }
1444
1445 int iwl3945_hw_nic_reset(struct iwl3945_priv *priv)
1446 {
1447         int rc;
1448         unsigned long flags;
1449
1450         iwl3945_hw_nic_stop_master(priv);
1451
1452         spin_lock_irqsave(&priv->lock, flags);
1453
1454         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1455
1456         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1457                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1458                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1459
1460         rc = iwl3945_grab_nic_access(priv);
1461         if (!rc) {
1462                 iwl3945_write_prph(priv, APMG_CLK_CTRL_REG,
1463                                          APMG_CLK_VAL_BSM_CLK_RQT);
1464
1465                 udelay(10);
1466
1467                 iwl3945_set_bit(priv, CSR_GP_CNTRL,
1468                             CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1469
1470                 iwl3945_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1471                 iwl3945_write_prph(priv, APMG_RTC_INT_STT_REG,
1472                                         0xFFFFFFFF);
1473
1474                 /* enable DMA */
1475                 iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1476                                          APMG_CLK_VAL_DMA_CLK_RQT |
1477                                          APMG_CLK_VAL_BSM_CLK_RQT);
1478                 udelay(10);
1479
1480                 iwl3945_set_bits_prph(priv, APMG_PS_CTRL_REG,
1481                                 APMG_PS_CTRL_VAL_RESET_REQ);
1482                 udelay(5);
1483                 iwl3945_clear_bits_prph(priv, APMG_PS_CTRL_REG,
1484                                 APMG_PS_CTRL_VAL_RESET_REQ);
1485                 iwl3945_release_nic_access(priv);
1486         }
1487
1488         /* Clear the 'host command active' bit... */
1489         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1490
1491         wake_up_interruptible(&priv->wait_command_queue);
1492         spin_unlock_irqrestore(&priv->lock, flags);
1493
1494         return rc;
1495 }
1496
1497 /**
1498  * iwl3945_hw_reg_adjust_power_by_temp
1499  * return index delta into power gain settings table
1500 */
1501 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1502 {
1503         return (new_reading - old_reading) * (-11) / 100;
1504 }
1505
1506 /**
1507  * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1508  */
1509 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature)
1510 {
1511         return ((temperature < -260) || (temperature > 25)) ? 1 : 0;
1512 }
1513
1514 int iwl3945_hw_get_temperature(struct iwl3945_priv *priv)
1515 {
1516         return iwl3945_read32(priv, CSR_UCODE_DRV_GP2);
1517 }
1518
1519 /**
1520  * iwl3945_hw_reg_txpower_get_temperature
1521  * get the current temperature by reading from NIC
1522 */
1523 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl3945_priv *priv)
1524 {
1525         int temperature;
1526
1527         temperature = iwl3945_hw_get_temperature(priv);
1528
1529         /* driver's okay range is -260 to +25.
1530          *   human readable okay range is 0 to +285 */
1531         IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1532
1533         /* handle insane temp reading */
1534         if (iwl3945_hw_reg_temp_out_of_range(temperature)) {
1535                 IWL_ERROR("Error bad temperature value  %d\n", temperature);
1536
1537                 /* if really really hot(?),
1538                  *   substitute the 3rd band/group's temp measured at factory */
1539                 if (priv->last_temperature > 100)
1540                         temperature = priv->eeprom.groups[2].temperature;
1541                 else /* else use most recent "sane" value from driver */
1542                         temperature = priv->last_temperature;
1543         }
1544
1545         return temperature;     /* raw, not "human readable" */
1546 }
1547
1548 /* Adjust Txpower only if temperature variance is greater than threshold.
1549  *
1550  * Both are lower than older versions' 9 degrees */
1551 #define IWL_TEMPERATURE_LIMIT_TIMER   6
1552
1553 /**
1554  * is_temp_calib_needed - determines if new calibration is needed
1555  *
1556  * records new temperature in tx_mgr->temperature.
1557  * replaces tx_mgr->last_temperature *only* if calib needed
1558  *    (assumes caller will actually do the calibration!). */
1559 static int is_temp_calib_needed(struct iwl3945_priv *priv)
1560 {
1561         int temp_diff;
1562
1563         priv->temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1564         temp_diff = priv->temperature - priv->last_temperature;
1565
1566         /* get absolute value */
1567         if (temp_diff < 0) {
1568                 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1569                 temp_diff = -temp_diff;
1570         } else if (temp_diff == 0)
1571                 IWL_DEBUG_POWER("Same temp,\n");
1572         else
1573                 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1574
1575         /* if we don't need calibration, *don't* update last_temperature */
1576         if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1577                 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1578                 return 0;
1579         }
1580
1581         IWL_DEBUG_POWER("Timed thermal calib needed\n");
1582
1583         /* assume that caller will actually do calib ...
1584          *   update the "last temperature" value */
1585         priv->last_temperature = priv->temperature;
1586         return 1;
1587 }
1588
1589 #define IWL_MAX_GAIN_ENTRIES 78
1590 #define IWL_CCK_FROM_OFDM_POWER_DIFF  -5
1591 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1592
1593 /* radio and DSP power table, each step is 1/2 dB.
1594  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1595 static struct iwl3945_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1596         {
1597          {251, 127},            /* 2.4 GHz, highest power */
1598          {251, 127},
1599          {251, 127},
1600          {251, 127},
1601          {251, 125},
1602          {251, 110},
1603          {251, 105},
1604          {251, 98},
1605          {187, 125},
1606          {187, 115},
1607          {187, 108},
1608          {187, 99},
1609          {243, 119},
1610          {243, 111},
1611          {243, 105},
1612          {243, 97},
1613          {243, 92},
1614          {211, 106},
1615          {211, 100},
1616          {179, 120},
1617          {179, 113},
1618          {179, 107},
1619          {147, 125},
1620          {147, 119},
1621          {147, 112},
1622          {147, 106},
1623          {147, 101},
1624          {147, 97},
1625          {147, 91},
1626          {115, 107},
1627          {235, 121},
1628          {235, 115},
1629          {235, 109},
1630          {203, 127},
1631          {203, 121},
1632          {203, 115},
1633          {203, 108},
1634          {203, 102},
1635          {203, 96},
1636          {203, 92},
1637          {171, 110},
1638          {171, 104},
1639          {171, 98},
1640          {139, 116},
1641          {227, 125},
1642          {227, 119},
1643          {227, 113},
1644          {227, 107},
1645          {227, 101},
1646          {227, 96},
1647          {195, 113},
1648          {195, 106},
1649          {195, 102},
1650          {195, 95},
1651          {163, 113},
1652          {163, 106},
1653          {163, 102},
1654          {163, 95},
1655          {131, 113},
1656          {131, 106},
1657          {131, 102},
1658          {131, 95},
1659          {99, 113},
1660          {99, 106},
1661          {99, 102},
1662          {99, 95},
1663          {67, 113},
1664          {67, 106},
1665          {67, 102},
1666          {67, 95},
1667          {35, 113},
1668          {35, 106},
1669          {35, 102},
1670          {35, 95},
1671          {3, 113},
1672          {3, 106},
1673          {3, 102},
1674          {3, 95} },             /* 2.4 GHz, lowest power */
1675         {
1676          {251, 127},            /* 5.x GHz, highest power */
1677          {251, 120},
1678          {251, 114},
1679          {219, 119},
1680          {219, 101},
1681          {187, 113},
1682          {187, 102},
1683          {155, 114},
1684          {155, 103},
1685          {123, 117},
1686          {123, 107},
1687          {123, 99},
1688          {123, 92},
1689          {91, 108},
1690          {59, 125},
1691          {59, 118},
1692          {59, 109},
1693          {59, 102},
1694          {59, 96},
1695          {59, 90},
1696          {27, 104},
1697          {27, 98},
1698          {27, 92},
1699          {115, 118},
1700          {115, 111},
1701          {115, 104},
1702          {83, 126},
1703          {83, 121},
1704          {83, 113},
1705          {83, 105},
1706          {83, 99},
1707          {51, 118},
1708          {51, 111},
1709          {51, 104},
1710          {51, 98},
1711          {19, 116},
1712          {19, 109},
1713          {19, 102},
1714          {19, 98},
1715          {19, 93},
1716          {171, 113},
1717          {171, 107},
1718          {171, 99},
1719          {139, 120},
1720          {139, 113},
1721          {139, 107},
1722          {139, 99},
1723          {107, 120},
1724          {107, 113},
1725          {107, 107},
1726          {107, 99},
1727          {75, 120},
1728          {75, 113},
1729          {75, 107},
1730          {75, 99},
1731          {43, 120},
1732          {43, 113},
1733          {43, 107},
1734          {43, 99},
1735          {11, 120},
1736          {11, 113},
1737          {11, 107},
1738          {11, 99},
1739          {131, 107},
1740          {131, 99},
1741          {99, 120},
1742          {99, 113},
1743          {99, 107},
1744          {99, 99},
1745          {67, 120},
1746          {67, 113},
1747          {67, 107},
1748          {67, 99},
1749          {35, 120},
1750          {35, 113},
1751          {35, 107},
1752          {35, 99},
1753          {3, 120} }             /* 5.x GHz, lowest power */
1754 };
1755
1756 static inline u8 iwl3945_hw_reg_fix_power_index(int index)
1757 {
1758         if (index < 0)
1759                 return 0;
1760         if (index >= IWL_MAX_GAIN_ENTRIES)
1761                 return IWL_MAX_GAIN_ENTRIES - 1;
1762         return (u8) index;
1763 }
1764
1765 /* Kick off thermal recalibration check every 60 seconds */
1766 #define REG_RECALIB_PERIOD (60)
1767
1768 /**
1769  * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1770  *
1771  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1772  * or 6 Mbit (OFDM) rates.
1773  */
1774 static void iwl3945_hw_reg_set_scan_power(struct iwl3945_priv *priv, u32 scan_tbl_index,
1775                                s32 rate_index, const s8 *clip_pwrs,
1776                                struct iwl3945_channel_info *ch_info,
1777                                int band_index)
1778 {
1779         struct iwl3945_scan_power_info *scan_power_info;
1780         s8 power;
1781         u8 power_index;
1782
1783         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1784
1785         /* use this channel group's 6Mbit clipping/saturation pwr,
1786          *   but cap at regulatory scan power restriction (set during init
1787          *   based on eeprom channel data) for this channel.  */
1788         power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1789
1790         /* further limit to user's max power preference.
1791          * FIXME:  Other spectrum management power limitations do not
1792          *   seem to apply?? */
1793         power = min(power, priv->user_txpower_limit);
1794         scan_power_info->requested_power = power;
1795
1796         /* find difference between new scan *power* and current "normal"
1797          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1798          *   current "normal" temperature-compensated Tx power *index* for
1799          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1800          *   *index*. */
1801         power_index = ch_info->power_info[rate_index].power_table_index
1802             - (power - ch_info->power_info
1803                [IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1804
1805         /* store reference index that we use when adjusting *all* scan
1806          *   powers.  So we can accommodate user (all channel) or spectrum
1807          *   management (single channel) power changes "between" temperature
1808          *   feedback compensation procedures.
1809          * don't force fit this reference index into gain table; it may be a
1810          *   negative number.  This will help avoid errors when we're at
1811          *   the lower bounds (highest gains, for warmest temperatures)
1812          *   of the table. */
1813
1814         /* don't exceed table bounds for "real" setting */
1815         power_index = iwl3945_hw_reg_fix_power_index(power_index);
1816
1817         scan_power_info->power_table_index = power_index;
1818         scan_power_info->tpc.tx_gain =
1819             power_gain_table[band_index][power_index].tx_gain;
1820         scan_power_info->tpc.dsp_atten =
1821             power_gain_table[band_index][power_index].dsp_atten;
1822 }
1823
1824 /**
1825  * iwl3945_hw_reg_send_txpower - fill in Tx Power command with gain settings
1826  *
1827  * Configures power settings for all rates for the current channel,
1828  * using values from channel info struct, and send to NIC
1829  */
1830 int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv)
1831 {
1832         int rate_idx, i;
1833         const struct iwl3945_channel_info *ch_info = NULL;
1834         struct iwl3945_txpowertable_cmd txpower = {
1835                 .channel = priv->active_rxon.channel,
1836         };
1837
1838         txpower.band = (priv->band == IEEE80211_BAND_5GHZ) ? 0 : 1;
1839         ch_info = iwl3945_get_channel_info(priv,
1840                                        priv->band,
1841                                        le16_to_cpu(priv->active_rxon.channel));
1842         if (!ch_info) {
1843                 IWL_ERROR
1844                     ("Failed to get channel info for channel %d [%d]\n",
1845                      le16_to_cpu(priv->active_rxon.channel), priv->band);
1846                 return -EINVAL;
1847         }
1848
1849         if (!is_channel_valid(ch_info)) {
1850                 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1851                                 "non-Tx channel.\n");
1852                 return 0;
1853         }
1854
1855         /* fill cmd with power settings for all rates for current channel */
1856         /* Fill OFDM rate */
1857         for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1858              rate_idx <= IWL_LAST_OFDM_RATE; rate_idx++, i++) {
1859
1860                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1861                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1862
1863                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1864                                 le16_to_cpu(txpower.channel),
1865                                 txpower.band,
1866                                 txpower.power[i].tpc.tx_gain,
1867                                 txpower.power[i].tpc.dsp_atten,
1868                                 txpower.power[i].rate);
1869         }
1870         /* Fill CCK rates */
1871         for (rate_idx = IWL_FIRST_CCK_RATE;
1872              rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1873                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1874                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1875
1876                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1877                                 le16_to_cpu(txpower.channel),
1878                                 txpower.band,
1879                                 txpower.power[i].tpc.tx_gain,
1880                                 txpower.power[i].tpc.dsp_atten,
1881                                 txpower.power[i].rate);
1882         }
1883
1884         return iwl3945_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1885                         sizeof(struct iwl3945_txpowertable_cmd), &txpower);
1886
1887 }
1888
1889 /**
1890  * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1891  * @ch_info: Channel to update.  Uses power_info.requested_power.
1892  *
1893  * Replace requested_power and base_power_index ch_info fields for
1894  * one channel.
1895  *
1896  * Called if user or spectrum management changes power preferences.
1897  * Takes into account h/w and modulation limitations (clip power).
1898  *
1899  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1900  *
1901  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1902  *       properly fill out the scan powers, and actual h/w gain settings,
1903  *       and send changes to NIC
1904  */
1905 static int iwl3945_hw_reg_set_new_power(struct iwl3945_priv *priv,
1906                              struct iwl3945_channel_info *ch_info)
1907 {
1908         struct iwl3945_channel_power_info *power_info;
1909         int power_changed = 0;
1910         int i;
1911         const s8 *clip_pwrs;
1912         int power;
1913
1914         /* Get this chnlgrp's rate-to-max/clip-powers table */
1915         clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1916
1917         /* Get this channel's rate-to-current-power settings table */
1918         power_info = ch_info->power_info;
1919
1920         /* update OFDM Txpower settings */
1921         for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1922              i++, ++power_info) {
1923                 int delta_idx;
1924
1925                 /* limit new power to be no more than h/w capability */
1926                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1927                 if (power == power_info->requested_power)
1928                         continue;
1929
1930                 /* find difference between old and new requested powers,
1931                  *    update base (non-temp-compensated) power index */
1932                 delta_idx = (power - power_info->requested_power) * 2;
1933                 power_info->base_power_index -= delta_idx;
1934
1935                 /* save new requested power value */
1936                 power_info->requested_power = power;
1937
1938                 power_changed = 1;
1939         }
1940
1941         /* update CCK Txpower settings, based on OFDM 12M setting ...
1942          *    ... all CCK power settings for a given channel are the *same*. */
1943         if (power_changed) {
1944                 power =
1945                     ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1946                     requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1947
1948                 /* do all CCK rates' iwl3945_channel_power_info structures */
1949                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1950                         power_info->requested_power = power;
1951                         power_info->base_power_index =
1952                             ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1953                             base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1954                         ++power_info;
1955                 }
1956         }
1957
1958         return 0;
1959 }
1960
1961 /**
1962  * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1963  *
1964  * NOTE: Returned power limit may be less (but not more) than requested,
1965  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1966  *       (no consideration for h/w clipping limitations).
1967  */
1968 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl3945_channel_info *ch_info)
1969 {
1970         s8 max_power;
1971
1972 #if 0
1973         /* if we're using TGd limits, use lower of TGd or EEPROM */
1974         if (ch_info->tgd_data.max_power != 0)
1975                 max_power = min(ch_info->tgd_data.max_power,
1976                                 ch_info->eeprom.max_power_avg);
1977
1978         /* else just use EEPROM limits */
1979         else
1980 #endif
1981                 max_power = ch_info->eeprom.max_power_avg;
1982
1983         return min(max_power, ch_info->max_power_avg);
1984 }
1985
1986 /**
1987  * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1988  *
1989  * Compensate txpower settings of *all* channels for temperature.
1990  * This only accounts for the difference between current temperature
1991  *   and the factory calibration temperatures, and bases the new settings
1992  *   on the channel's base_power_index.
1993  *
1994  * If RxOn is "associated", this sends the new Txpower to NIC!
1995  */
1996 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv *priv)
1997 {
1998         struct iwl3945_channel_info *ch_info = NULL;
1999         int delta_index;
2000         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
2001         u8 a_band;
2002         u8 rate_index;
2003         u8 scan_tbl_index;
2004         u8 i;
2005         int ref_temp;
2006         int temperature = priv->temperature;
2007
2008         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
2009         for (i = 0; i < priv->channel_count; i++) {
2010                 ch_info = &priv->channel_info[i];
2011                 a_band = is_channel_a_band(ch_info);
2012
2013                 /* Get this chnlgrp's factory calibration temperature */
2014                 ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
2015                     temperature;
2016
2017                 /* get power index adjustment based on curr and factory
2018                  * temps */
2019                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2020                                                               ref_temp);
2021
2022                 /* set tx power value for all rates, OFDM and CCK */
2023                 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
2024                      rate_index++) {
2025                         int power_idx =
2026                             ch_info->power_info[rate_index].base_power_index;
2027
2028                         /* temperature compensate */
2029                         power_idx += delta_index;
2030
2031                         /* stay within table range */
2032                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2033                         ch_info->power_info[rate_index].
2034                             power_table_index = (u8) power_idx;
2035                         ch_info->power_info[rate_index].tpc =
2036                             power_gain_table[a_band][power_idx];
2037                 }
2038
2039                 /* Get this chnlgrp's rate-to-max/clip-powers table */
2040                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2041
2042                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2043                 for (scan_tbl_index = 0;
2044                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2045                         s32 actual_index = (scan_tbl_index == 0) ?
2046                             IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2047                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2048                                            actual_index, clip_pwrs,
2049                                            ch_info, a_band);
2050                 }
2051         }
2052
2053         /* send Txpower command for current channel to ucode */
2054         return iwl3945_hw_reg_send_txpower(priv);
2055 }
2056
2057 int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power)
2058 {
2059         struct iwl3945_channel_info *ch_info;
2060         s8 max_power;
2061         u8 a_band;
2062         u8 i;
2063
2064         if (priv->user_txpower_limit == power) {
2065                 IWL_DEBUG_POWER("Requested Tx power same as current "
2066                                 "limit: %ddBm.\n", power);
2067                 return 0;
2068         }
2069
2070         IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
2071         priv->user_txpower_limit = power;
2072
2073         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
2074
2075         for (i = 0; i < priv->channel_count; i++) {
2076                 ch_info = &priv->channel_info[i];
2077                 a_band = is_channel_a_band(ch_info);
2078
2079                 /* find minimum power of all user and regulatory constraints
2080                  *    (does not consider h/w clipping limitations) */
2081                 max_power = iwl3945_hw_reg_get_ch_txpower_limit(ch_info);
2082                 max_power = min(power, max_power);
2083                 if (max_power != ch_info->curr_txpow) {
2084                         ch_info->curr_txpow = max_power;
2085
2086                         /* this considers the h/w clipping limitations */
2087                         iwl3945_hw_reg_set_new_power(priv, ch_info);
2088                 }
2089         }
2090
2091         /* update txpower settings for all channels,
2092          *   send to NIC if associated. */
2093         is_temp_calib_needed(priv);
2094         iwl3945_hw_reg_comp_txpower_temp(priv);
2095
2096         return 0;
2097 }
2098
2099 /* will add 3945 channel switch cmd handling later */
2100 int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel)
2101 {
2102         return 0;
2103 }
2104
2105 /**
2106  * iwl3945_reg_txpower_periodic -  called when time to check our temperature.
2107  *
2108  * -- reset periodic timer
2109  * -- see if temp has changed enough to warrant re-calibration ... if so:
2110  *     -- correct coeffs for temp (can reset temp timer)
2111  *     -- save this temp as "last",
2112  *     -- send new set of gain settings to NIC
2113  * NOTE:  This should continue working, even when we're not associated,
2114  *   so we can keep our internal table of scan powers current. */
2115 void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv)
2116 {
2117         /* This will kick in the "brute force"
2118          * iwl3945_hw_reg_comp_txpower_temp() below */
2119         if (!is_temp_calib_needed(priv))
2120                 goto reschedule;
2121
2122         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
2123          * This is based *only* on current temperature,
2124          * ignoring any previous power measurements */
2125         iwl3945_hw_reg_comp_txpower_temp(priv);
2126
2127  reschedule:
2128         queue_delayed_work(priv->workqueue,
2129                            &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
2130 }
2131
2132 static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
2133 {
2134         struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv,
2135                                              thermal_periodic.work);
2136
2137         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2138                 return;
2139
2140         mutex_lock(&priv->mutex);
2141         iwl3945_reg_txpower_periodic(priv);
2142         mutex_unlock(&priv->mutex);
2143 }
2144
2145 /**
2146  * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
2147  *                                 for the channel.
2148  *
2149  * This function is used when initializing channel-info structs.
2150  *
2151  * NOTE: These channel groups do *NOT* match the bands above!
2152  *       These channel groups are based on factory-tested channels;
2153  *       on A-band, EEPROM's "group frequency" entries represent the top
2154  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
2155  */
2156 static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl3945_priv *priv,
2157                                        const struct iwl3945_channel_info *ch_info)
2158 {
2159         struct iwl3945_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
2160         u8 group;
2161         u16 group_index = 0;    /* based on factory calib frequencies */
2162         u8 grp_channel;
2163
2164         /* Find the group index for the channel ... don't use index 1(?) */
2165         if (is_channel_a_band(ch_info)) {
2166                 for (group = 1; group < 5; group++) {
2167                         grp_channel = ch_grp[group].group_channel;
2168                         if (ch_info->channel <= grp_channel) {
2169                                 group_index = group;
2170                                 break;
2171                         }
2172                 }
2173                 /* group 4 has a few channels *above* its factory cal freq */
2174                 if (group == 5)
2175                         group_index = 4;
2176         } else
2177                 group_index = 0;        /* 2.4 GHz, group 0 */
2178
2179         IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
2180                         group_index);
2181         return group_index;
2182 }
2183
2184 /**
2185  * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
2186  *
2187  * Interpolate to get nominal (i.e. at factory calibration temperature) index
2188  *   into radio/DSP gain settings table for requested power.
2189  */
2190 static int iwl3945_hw_reg_get_matched_power_index(struct iwl3945_priv *priv,
2191                                        s8 requested_power,
2192                                        s32 setting_index, s32 *new_index)
2193 {
2194         const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL;
2195         s32 index0, index1;
2196         s32 power = 2 * requested_power;
2197         s32 i;
2198         const struct iwl3945_eeprom_txpower_sample *samples;
2199         s32 gains0, gains1;
2200         s32 res;
2201         s32 denominator;
2202
2203         chnl_grp = &priv->eeprom.groups[setting_index];
2204         samples = chnl_grp->samples;
2205         for (i = 0; i < 5; i++) {
2206                 if (power == samples[i].power) {
2207                         *new_index = samples[i].gain_index;
2208                         return 0;
2209                 }
2210         }
2211
2212         if (power > samples[1].power) {
2213                 index0 = 0;
2214                 index1 = 1;
2215         } else if (power > samples[2].power) {
2216                 index0 = 1;
2217                 index1 = 2;
2218         } else if (power > samples[3].power) {
2219                 index0 = 2;
2220                 index1 = 3;
2221         } else {
2222                 index0 = 3;
2223                 index1 = 4;
2224         }
2225
2226         denominator = (s32) samples[index1].power - (s32) samples[index0].power;
2227         if (denominator == 0)
2228                 return -EINVAL;
2229         gains0 = (s32) samples[index0].gain_index * (1 << 19);
2230         gains1 = (s32) samples[index1].gain_index * (1 << 19);
2231         res = gains0 + (gains1 - gains0) *
2232             ((s32) power - (s32) samples[index0].power) / denominator +
2233             (1 << 18);
2234         *new_index = res >> 19;
2235         return 0;
2236 }
2237
2238 static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv *priv)
2239 {
2240         u32 i;
2241         s32 rate_index;
2242         const struct iwl3945_eeprom_txpower_group *group;
2243
2244         IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
2245
2246         for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
2247                 s8 *clip_pwrs;  /* table of power levels for each rate */
2248                 s8 satur_pwr;   /* saturation power for each chnl group */
2249                 group = &priv->eeprom.groups[i];
2250
2251                 /* sanity check on factory saturation power value */
2252                 if (group->saturation_power < 40) {
2253                         IWL_WARNING("Error: saturation power is %d, "
2254                                     "less than minimum expected 40\n",
2255                                     group->saturation_power);
2256                         return;
2257                 }
2258
2259                 /*
2260                  * Derive requested power levels for each rate, based on
2261                  *   hardware capabilities (saturation power for band).
2262                  * Basic value is 3dB down from saturation, with further
2263                  *   power reductions for highest 3 data rates.  These
2264                  *   backoffs provide headroom for high rate modulation
2265                  *   power peaks, without too much distortion (clipping).
2266                  */
2267                 /* we'll fill in this array with h/w max power levels */
2268                 clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
2269
2270                 /* divide factory saturation power by 2 to find -3dB level */
2271                 satur_pwr = (s8) (group->saturation_power >> 1);
2272
2273                 /* fill in channel group's nominal powers for each rate */
2274                 for (rate_index = 0;
2275                      rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
2276                         switch (rate_index) {
2277                         case IWL_RATE_36M_INDEX_TABLE:
2278                                 if (i == 0)     /* B/G */
2279                                         *clip_pwrs = satur_pwr;
2280                                 else    /* A */
2281                                         *clip_pwrs = satur_pwr - 5;
2282                                 break;
2283                         case IWL_RATE_48M_INDEX_TABLE:
2284                                 if (i == 0)
2285                                         *clip_pwrs = satur_pwr - 7;
2286                                 else
2287                                         *clip_pwrs = satur_pwr - 10;
2288                                 break;
2289                         case IWL_RATE_54M_INDEX_TABLE:
2290                                 if (i == 0)
2291                                         *clip_pwrs = satur_pwr - 9;
2292                                 else
2293                                         *clip_pwrs = satur_pwr - 12;
2294                                 break;
2295                         default:
2296                                 *clip_pwrs = satur_pwr;
2297                                 break;
2298                         }
2299                 }
2300         }
2301 }
2302
2303 /**
2304  * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
2305  *
2306  * Second pass (during init) to set up priv->channel_info
2307  *
2308  * Set up Tx-power settings in our channel info database for each VALID
2309  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
2310  * and current temperature.
2311  *
2312  * Since this is based on current temperature (at init time), these values may
2313  * not be valid for very long, but it gives us a starting/default point,
2314  * and allows us to active (i.e. using Tx) scan.
2315  *
2316  * This does *not* write values to NIC, just sets up our internal table.
2317  */
2318 int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv)
2319 {
2320         struct iwl3945_channel_info *ch_info = NULL;
2321         struct iwl3945_channel_power_info *pwr_info;
2322         int delta_index;
2323         u8 rate_index;
2324         u8 scan_tbl_index;
2325         const s8 *clip_pwrs;    /* array of power levels for each rate */
2326         u8 gain, dsp_atten;
2327         s8 power;
2328         u8 pwr_index, base_pwr_index, a_band;
2329         u8 i;
2330         int temperature;
2331
2332         /* save temperature reference,
2333          *   so we can determine next time to calibrate */
2334         temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
2335         priv->last_temperature = temperature;
2336
2337         iwl3945_hw_reg_init_channel_groups(priv);
2338
2339         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
2340         for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
2341              i++, ch_info++) {
2342                 a_band = is_channel_a_band(ch_info);
2343                 if (!is_channel_valid(ch_info))
2344                         continue;
2345
2346                 /* find this channel's channel group (*not* "band") index */
2347                 ch_info->group_index =
2348                         iwl3945_hw_reg_get_ch_grp_index(priv, ch_info);
2349
2350                 /* Get this chnlgrp's rate->max/clip-powers table */
2351                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
2352
2353                 /* calculate power index *adjustment* value according to
2354                  *  diff between current temperature and factory temperature */
2355                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
2356                                 priv->eeprom.groups[ch_info->group_index].
2357                                 temperature);
2358
2359                 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
2360                                 ch_info->channel, delta_index, temperature +
2361                                 IWL_TEMP_CONVERT);
2362
2363                 /* set tx power value for all OFDM rates */
2364                 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
2365                      rate_index++) {
2366                         s32 power_idx;
2367                         int rc;
2368
2369                         /* use channel group's clip-power table,
2370                          *   but don't exceed channel's max power */
2371                         s8 pwr = min(ch_info->max_power_avg,
2372                                      clip_pwrs[rate_index]);
2373
2374                         pwr_info = &ch_info->power_info[rate_index];
2375
2376                         /* get base (i.e. at factory-measured temperature)
2377                          *    power table index for this rate's power */
2378                         rc = iwl3945_hw_reg_get_matched_power_index(priv, pwr,
2379                                                          ch_info->group_index,
2380                                                          &power_idx);
2381                         if (rc) {
2382                                 IWL_ERROR("Invalid power index\n");
2383                                 return rc;
2384                         }
2385                         pwr_info->base_power_index = (u8) power_idx;
2386
2387                         /* temperature compensate */
2388                         power_idx += delta_index;
2389
2390                         /* stay within range of gain table */
2391                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2392
2393                         /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2394                         pwr_info->requested_power = pwr;
2395                         pwr_info->power_table_index = (u8) power_idx;
2396                         pwr_info->tpc.tx_gain =
2397                             power_gain_table[a_band][power_idx].tx_gain;
2398                         pwr_info->tpc.dsp_atten =
2399                             power_gain_table[a_band][power_idx].dsp_atten;
2400                 }
2401
2402                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2403                 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2404                 power = pwr_info->requested_power +
2405                         IWL_CCK_FROM_OFDM_POWER_DIFF;
2406                 pwr_index = pwr_info->power_table_index +
2407                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2408                 base_pwr_index = pwr_info->base_power_index +
2409                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2410
2411                 /* stay within table range */
2412                 pwr_index = iwl3945_hw_reg_fix_power_index(pwr_index);
2413                 gain = power_gain_table[a_band][pwr_index].tx_gain;
2414                 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2415
2416                 /* fill each CCK rate's iwl3945_channel_power_info structure
2417                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2418                  * NOTE:  CCK rates start at end of OFDM rates! */
2419                 for (rate_index = 0;
2420                      rate_index < IWL_CCK_RATES; rate_index++) {
2421                         pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2422                         pwr_info->requested_power = power;
2423                         pwr_info->power_table_index = pwr_index;
2424                         pwr_info->base_power_index = base_pwr_index;
2425                         pwr_info->tpc.tx_gain = gain;
2426                         pwr_info->tpc.dsp_atten = dsp_atten;
2427                 }
2428
2429                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2430                 for (scan_tbl_index = 0;
2431                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2432                         s32 actual_index = (scan_tbl_index == 0) ?
2433                                 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2434                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2435                                 actual_index, clip_pwrs, ch_info, a_band);
2436                 }
2437         }
2438
2439         return 0;
2440 }
2441
2442 int iwl3945_hw_rxq_stop(struct iwl3945_priv *priv)
2443 {
2444         int rc;
2445         unsigned long flags;
2446
2447         spin_lock_irqsave(&priv->lock, flags);
2448         rc = iwl3945_grab_nic_access(priv);
2449         if (rc) {
2450                 spin_unlock_irqrestore(&priv->lock, flags);
2451                 return rc;
2452         }
2453
2454         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0), 0);
2455         rc = iwl3945_poll_direct_bit(priv, FH_RSSR_STATUS, (1 << 24), 1000);
2456         if (rc < 0)
2457                 IWL_ERROR("Can't stop Rx DMA.\n");
2458
2459         iwl3945_release_nic_access(priv);
2460         spin_unlock_irqrestore(&priv->lock, flags);
2461
2462         return 0;
2463 }
2464
2465 int iwl3945_hw_tx_queue_init(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
2466 {
2467         int rc;
2468         unsigned long flags;
2469         int txq_id = txq->q.id;
2470
2471         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2472
2473         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2474
2475         spin_lock_irqsave(&priv->lock, flags);
2476         rc = iwl3945_grab_nic_access(priv);
2477         if (rc) {
2478                 spin_unlock_irqrestore(&priv->lock, flags);
2479                 return rc;
2480         }
2481         iwl3945_write_direct32(priv, FH_CBCC_CTRL(txq_id), 0);
2482         iwl3945_write_direct32(priv, FH_CBCC_BASE(txq_id), 0);
2483
2484         iwl3945_write_direct32(priv, FH_TCSR_CONFIG(txq_id),
2485                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2486                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2487                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2488                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2489                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2490         iwl3945_release_nic_access(priv);
2491
2492         /* fake read to flush all prev. writes */
2493         iwl3945_read32(priv, FH_TSSR_CBB_BASE);
2494         spin_unlock_irqrestore(&priv->lock, flags);
2495
2496         return 0;
2497 }
2498
2499 int iwl3945_hw_get_rx_read(struct iwl3945_priv *priv)
2500 {
2501         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2502
2503         return le32_to_cpu(shared_data->rx_read_ptr[0]);
2504 }
2505
2506 /**
2507  * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2508  */
2509 int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv)
2510 {
2511         int rc, i, index, prev_index;
2512         struct iwl3945_rate_scaling_cmd rate_cmd = {
2513                 .reserved = {0, 0, 0},
2514         };
2515         struct iwl3945_rate_scaling_info *table = rate_cmd.table;
2516
2517         for (i = 0; i < ARRAY_SIZE(iwl3945_rates); i++) {
2518                 index = iwl3945_rates[i].table_rs_index;
2519
2520                 table[index].rate_n_flags =
2521                         iwl3945_hw_set_rate_n_flags(iwl3945_rates[i].plcp, 0);
2522                 table[index].try_cnt = priv->retry_rate;
2523                 prev_index = iwl3945_get_prev_ieee_rate(i);
2524                 table[index].next_rate_index = iwl3945_rates[prev_index].table_rs_index;
2525         }
2526
2527         switch (priv->band) {
2528         case IEEE80211_BAND_5GHZ:
2529                 IWL_DEBUG_RATE("Select A mode rate scale\n");
2530                 /* If one of the following CCK rates is used,
2531                  * have it fall back to the 6M OFDM rate */
2532                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++)
2533                         table[i].next_rate_index = iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2534
2535                 /* Don't fall back to CCK rates */
2536                 table[IWL_RATE_12M_INDEX_TABLE].next_rate_index = IWL_RATE_9M_INDEX_TABLE;
2537
2538                 /* Don't drop out of OFDM rates */
2539                 table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2540                     iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2541                 break;
2542
2543         case IEEE80211_BAND_2GHZ:
2544                 IWL_DEBUG_RATE("Select B/G mode rate scale\n");
2545                 /* If an OFDM rate is used, have it fall back to the
2546                  * 1M CCK rates */
2547                 for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE; i++)
2548                         table[i].next_rate_index = iwl3945_rates[IWL_FIRST_CCK_RATE].table_rs_index;
2549
2550                 /* CCK shouldn't fall back to OFDM... */
2551                 table[IWL_RATE_11M_INDEX_TABLE].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2552                 break;
2553
2554         default:
2555                 WARN_ON(1);
2556                 break;
2557         }
2558
2559         /* Update the rate scaling for control frame Tx */
2560         rate_cmd.table_id = 0;
2561         rc = iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2562                               &rate_cmd);
2563         if (rc)
2564                 return rc;
2565
2566         /* Update the rate scaling for data frame Tx */
2567         rate_cmd.table_id = 1;
2568         return iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2569                                 &rate_cmd);
2570 }
2571
2572 /* Called when initializing driver */
2573 int iwl3945_hw_set_hw_setting(struct iwl3945_priv *priv)
2574 {
2575         memset((void *)&priv->hw_setting, 0,
2576                sizeof(struct iwl3945_driver_hw_info));
2577
2578         priv->hw_setting.shared_virt =
2579             pci_alloc_consistent(priv->pci_dev,
2580                                  sizeof(struct iwl3945_shared),
2581                                  &priv->hw_setting.shared_phys);
2582
2583         if (!priv->hw_setting.shared_virt) {
2584                 IWL_ERROR("failed to allocate pci memory\n");
2585                 mutex_unlock(&priv->mutex);
2586                 return -ENOMEM;
2587         }
2588
2589         priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE;
2590         priv->hw_setting.max_pkt_size = 2342;
2591         priv->hw_setting.tx_cmd_len = sizeof(struct iwl3945_tx_cmd);
2592         priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2593         priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2594         priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2595         priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2596
2597         priv->hw_setting.tx_ant_num = 2;
2598         return 0;
2599 }
2600
2601 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv,
2602                           struct iwl3945_frame *frame, u8 rate)
2603 {
2604         struct iwl3945_tx_beacon_cmd *tx_beacon_cmd;
2605         unsigned int frame_size;
2606
2607         tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u;
2608         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2609
2610         tx_beacon_cmd->tx.sta_id = priv->hw_setting.bcast_sta_id;
2611         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2612
2613         frame_size = iwl3945_fill_beacon_frame(priv,
2614                                 tx_beacon_cmd->frame,
2615                                 iwl3945_broadcast_addr,
2616                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2617
2618         BUG_ON(frame_size > MAX_MPDU_SIZE);
2619         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2620
2621         tx_beacon_cmd->tx.rate = rate;
2622         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2623                                       TX_CMD_FLG_TSF_MSK);
2624
2625         /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2626         tx_beacon_cmd->tx.supp_rates[0] =
2627                 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2628
2629         tx_beacon_cmd->tx.supp_rates[1] =
2630                 (IWL_CCK_BASIC_RATES_MASK & 0xF);
2631
2632         return sizeof(struct iwl3945_tx_beacon_cmd) + frame_size;
2633 }
2634
2635 void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv)
2636 {
2637         priv->rx_handlers[REPLY_TX] = iwl3945_rx_reply_tx;
2638         priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2639 }
2640
2641 void iwl3945_hw_setup_deferred_work(struct iwl3945_priv *priv)
2642 {
2643         INIT_DELAYED_WORK(&priv->thermal_periodic,
2644                           iwl3945_bg_reg_txpower_periodic);
2645 }
2646
2647 void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv)
2648 {
2649         cancel_delayed_work(&priv->thermal_periodic);
2650 }
2651
2652 static struct iwl_3945_cfg iwl3945_bg_cfg = {
2653         .name = "3945BG",
2654         .fw_name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode",
2655         .sku = IWL_SKU_G,
2656 };
2657
2658 static struct iwl_3945_cfg iwl3945_abg_cfg = {
2659         .name = "3945ABG",
2660         .fw_name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode",
2661         .sku = IWL_SKU_A|IWL_SKU_G,
2662 };
2663
2664 struct pci_device_id iwl3945_hw_card_ids[] = {
2665         {IWL_PCI_DEVICE(0x4222, 0x1005, iwl3945_bg_cfg)},
2666         {IWL_PCI_DEVICE(0x4222, 0x1034, iwl3945_bg_cfg)},
2667         {IWL_PCI_DEVICE(0x4222, 0x1044, iwl3945_bg_cfg)},
2668         {IWL_PCI_DEVICE(0x4227, 0x1014, iwl3945_bg_cfg)},
2669         {IWL_PCI_DEVICE(0x4222, PCI_ANY_ID, iwl3945_abg_cfg)},
2670         {IWL_PCI_DEVICE(0x4227, PCI_ANY_ID, iwl3945_abg_cfg)},
2671         {0}
2672 };
2673
2674 MODULE_DEVICE_TABLE(pci, iwl3945_hw_card_ids);