3 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #include <linux/bootmem.h>
21 #include <linux/init.h>
22 #include <linux/list.h>
24 #include <linux/notifier.h>
25 #include <linux/pci.h>
26 #include <linux/proc_fs.h>
27 #include <linux/rbtree.h>
28 #include <linux/seq_file.h>
29 #include <linux/spinlock.h>
32 #include <asm/machdep.h>
34 #include <asm/atomic.h>
35 #include <asm/systemcfg.h>
41 * EEH, or "Extended Error Handling" is a PCI bridge technology for
42 * dealing with PCI bus errors that can't be dealt with within the
43 * usual PCI framework, except by check-stopping the CPU. Systems
44 * that are designed for high-availability/reliability cannot afford
45 * to crash due to a "mere" PCI error, thus the need for EEH.
46 * An EEH-capable bridge operates by converting a detected error
47 * into a "slot freeze", taking the PCI adapter off-line, making
48 * the slot behave, from the OS'es point of view, as if the slot
49 * were "empty": all reads return 0xff's and all writes are silently
50 * ignored. EEH slot isolation events can be triggered by parity
51 * errors on the address or data busses (e.g. during posted writes),
52 * which in turn might be caused by dust, vibration, humidity,
53 * radioactivity or plain-old failed hardware.
55 * Note, however, that one of the leading causes of EEH slot
56 * freeze events are buggy device drivers, buggy device microcode,
57 * or buggy device hardware. This is because any attempt by the
58 * device to bus-master data to a memory address that is not
59 * assigned to the device will trigger a slot freeze. (The idea
60 * is to prevent devices-gone-wild from corrupting system memory).
61 * Buggy hardware/drivers will have a miserable time co-existing
64 * Ideally, a PCI device driver, when suspecting that an isolation
65 * event has occured (e.g. by reading 0xff's), will then ask EEH
66 * whether this is the case, and then take appropriate steps to
67 * reset the PCI slot, the PCI device, and then resume operations.
68 * However, until that day, the checking is done here, with the
69 * eeh_check_failure() routine embedded in the MMIO macros. If
70 * the slot is found to be isolated, an "EEH Event" is synthesized
71 * and sent out for processing.
74 /** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */
75 #define BUID_HI(buid) ((buid) >> 32)
76 #define BUID_LO(buid) ((buid) & 0xffffffff)
78 /* EEH event workqueue setup. */
79 static DEFINE_SPINLOCK(eeh_eventlist_lock);
80 LIST_HEAD(eeh_eventlist);
81 static void eeh_event_handler(void *);
82 DECLARE_WORK(eeh_event_wq, eeh_event_handler, NULL);
84 static struct notifier_block *eeh_notifier_chain;
87 * If a device driver keeps reading an MMIO register in an interrupt
88 * handler after a slot isolation event has occurred, we assume it
89 * is broken and panic. This sets the threshold for how many read
90 * attempts we allow before panicking.
92 #define EEH_MAX_FAILS 1000
93 static atomic_t eeh_fail_count;
96 static int ibm_set_eeh_option;
97 static int ibm_set_slot_reset;
98 static int ibm_read_slot_reset_state;
99 static int ibm_read_slot_reset_state2;
100 static int ibm_slot_error_detail;
102 static int eeh_subsystem_enabled;
104 /* Buffer for reporting slot-error-detail rtas calls */
105 static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
106 static DEFINE_SPINLOCK(slot_errbuf_lock);
107 static int eeh_error_buf_size;
109 /* System monitoring statistics */
110 static DEFINE_PER_CPU(unsigned long, total_mmio_ffs);
111 static DEFINE_PER_CPU(unsigned long, false_positives);
112 static DEFINE_PER_CPU(unsigned long, ignored_failures);
113 static DEFINE_PER_CPU(unsigned long, slot_resets);
116 * The pci address cache subsystem. This subsystem places
117 * PCI device address resources into a red-black tree, sorted
118 * according to the address range, so that given only an i/o
119 * address, the corresponding PCI device can be **quickly**
120 * found. It is safe to perform an address lookup in an interrupt
121 * context; this ability is an important feature.
123 * Currently, the only customer of this code is the EEH subsystem;
124 * thus, this code has been somewhat tailored to suit EEH better.
125 * In particular, the cache does *not* hold the addresses of devices
126 * for which EEH is not enabled.
128 * (Implementation Note: The RB tree seems to be better/faster
129 * than any hash algo I could think of for this problem, even
130 * with the penalty of slow pointer chases for d-cache misses).
132 struct pci_io_addr_range
134 struct rb_node rb_node;
135 unsigned long addr_lo;
136 unsigned long addr_hi;
137 struct pci_dev *pcidev;
141 static struct pci_io_addr_cache
143 struct rb_root rb_root;
144 spinlock_t piar_lock;
145 } pci_io_addr_cache_root;
147 static inline struct pci_dev *__pci_get_device_by_addr(unsigned long addr)
149 struct rb_node *n = pci_io_addr_cache_root.rb_root.rb_node;
152 struct pci_io_addr_range *piar;
153 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
155 if (addr < piar->addr_lo) {
158 if (addr > piar->addr_hi) {
161 pci_dev_get(piar->pcidev);
171 * pci_get_device_by_addr - Get device, given only address
172 * @addr: mmio (PIO) phys address or i/o port number
174 * Given an mmio phys address, or a port number, find a pci device
175 * that implements this address. Be sure to pci_dev_put the device
176 * when finished. I/O port numbers are assumed to be offset
177 * from zero (that is, they do *not* have pci_io_addr added in).
178 * It is safe to call this function within an interrupt.
180 static struct pci_dev *pci_get_device_by_addr(unsigned long addr)
185 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
186 dev = __pci_get_device_by_addr(addr);
187 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
193 * Handy-dandy debug print routine, does nothing more
194 * than print out the contents of our addr cache.
196 static void pci_addr_cache_print(struct pci_io_addr_cache *cache)
201 n = rb_first(&cache->rb_root);
203 struct pci_io_addr_range *piar;
204 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
205 printk(KERN_DEBUG "PCI: %s addr range %d [%lx-%lx]: %s\n",
206 (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt,
207 piar->addr_lo, piar->addr_hi, pci_name(piar->pcidev));
214 /* Insert address range into the rb tree. */
215 static struct pci_io_addr_range *
216 pci_addr_cache_insert(struct pci_dev *dev, unsigned long alo,
217 unsigned long ahi, unsigned int flags)
219 struct rb_node **p = &pci_io_addr_cache_root.rb_root.rb_node;
220 struct rb_node *parent = NULL;
221 struct pci_io_addr_range *piar;
223 /* Walk tree, find a place to insert into tree */
226 piar = rb_entry(parent, struct pci_io_addr_range, rb_node);
227 if (alo < piar->addr_lo) {
228 p = &parent->rb_left;
229 } else if (ahi > piar->addr_hi) {
230 p = &parent->rb_right;
232 if (dev != piar->pcidev ||
233 alo != piar->addr_lo || ahi != piar->addr_hi) {
234 printk(KERN_WARNING "PIAR: overlapping address range\n");
239 piar = (struct pci_io_addr_range *)kmalloc(sizeof(struct pci_io_addr_range), GFP_ATOMIC);
248 rb_link_node(&piar->rb_node, parent, p);
249 rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root);
254 static void __pci_addr_cache_insert_device(struct pci_dev *dev)
256 struct device_node *dn;
260 dn = pci_device_to_OF_node(dev);
262 printk(KERN_WARNING "PCI: no pci dn found for dev=%s\n",
267 /* Skip any devices for which EEH is not enabled. */
268 if (!(dn->eeh_mode & EEH_MODE_SUPPORTED) ||
269 dn->eeh_mode & EEH_MODE_NOCHECK) {
271 printk(KERN_INFO "PCI: skip building address cache for=%s\n",
277 /* The cache holds a reference to the device... */
280 /* Walk resources on this device, poke them into the tree */
281 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
282 unsigned long start = pci_resource_start(dev,i);
283 unsigned long end = pci_resource_end(dev,i);
284 unsigned int flags = pci_resource_flags(dev,i);
286 /* We are interested only bus addresses, not dma or other stuff */
287 if (0 == (flags & (IORESOURCE_IO | IORESOURCE_MEM)))
289 if (start == 0 || ~start == 0 || end == 0 || ~end == 0)
291 pci_addr_cache_insert(dev, start, end, flags);
295 /* If there was nothing to add, the cache has no reference... */
301 * pci_addr_cache_insert_device - Add a device to the address cache
302 * @dev: PCI device whose I/O addresses we are interested in.
304 * In order to support the fast lookup of devices based on addresses,
305 * we maintain a cache of devices that can be quickly searched.
306 * This routine adds a device to that cache.
308 void pci_addr_cache_insert_device(struct pci_dev *dev)
312 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
313 __pci_addr_cache_insert_device(dev);
314 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
317 static inline void __pci_addr_cache_remove_device(struct pci_dev *dev)
323 n = rb_first(&pci_io_addr_cache_root.rb_root);
325 struct pci_io_addr_range *piar;
326 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
328 if (piar->pcidev == dev) {
329 rb_erase(n, &pci_io_addr_cache_root.rb_root);
337 /* The cache no longer holds its reference to this device... */
343 * pci_addr_cache_remove_device - remove pci device from addr cache
344 * @dev: device to remove
346 * Remove a device from the addr-cache tree.
347 * This is potentially expensive, since it will walk
348 * the tree multiple times (once per resource).
349 * But so what; device removal doesn't need to be that fast.
351 void pci_addr_cache_remove_device(struct pci_dev *dev)
355 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
356 __pci_addr_cache_remove_device(dev);
357 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
361 * pci_addr_cache_build - Build a cache of I/O addresses
363 * Build a cache of pci i/o addresses. This cache will be used to
364 * find the pci device that corresponds to a given address.
365 * This routine scans all pci busses to build the cache.
366 * Must be run late in boot process, after the pci controllers
367 * have been scaned for devices (after all device resources are known).
369 void __init pci_addr_cache_build(void)
371 struct pci_dev *dev = NULL;
373 spin_lock_init(&pci_io_addr_cache_root.piar_lock);
375 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
376 /* Ignore PCI bridges ( XXX why ??) */
377 if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE) {
380 pci_addr_cache_insert_device(dev);
384 /* Verify tree built up above, echo back the list of addrs. */
385 pci_addr_cache_print(&pci_io_addr_cache_root);
389 /* --------------------------------------------------------------- */
390 /* Above lies the PCI Address Cache. Below lies the EEH event infrastructure */
393 * eeh_register_notifier - Register to find out about EEH events.
394 * @nb: notifier block to callback on events
396 int eeh_register_notifier(struct notifier_block *nb)
398 return notifier_chain_register(&eeh_notifier_chain, nb);
402 * eeh_unregister_notifier - Unregister to an EEH event notifier.
403 * @nb: notifier block to callback on events
405 int eeh_unregister_notifier(struct notifier_block *nb)
407 return notifier_chain_unregister(&eeh_notifier_chain, nb);
411 * read_slot_reset_state - Read the reset state of a device node's slot
412 * @dn: device node to read
413 * @rets: array to return results in
415 static int read_slot_reset_state(struct device_node *dn, int rets[])
419 if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) {
420 token = ibm_read_slot_reset_state2;
423 token = ibm_read_slot_reset_state;
427 return rtas_call(token, 3, outputs, rets, dn->eeh_config_addr,
428 BUID_HI(dn->phb->buid), BUID_LO(dn->phb->buid));
432 * eeh_panic - call panic() for an eeh event that cannot be handled.
433 * The philosophy of this routine is that it is better to panic and
434 * halt the OS than it is to risk possible data corruption by
435 * oblivious device drivers that don't know better.
437 * @dev pci device that had an eeh event
438 * @reset_state current reset state of the device slot
440 static void eeh_panic(struct pci_dev *dev, int reset_state)
443 * XXX We should create a separate sysctl for this.
445 * Since the panic_on_oops sysctl is used to halt the system
446 * in light of potential corruption, we can use it here.
449 panic("EEH: MMIO failure (%d) on device:%s\n", reset_state,
452 __get_cpu_var(ignored_failures)++;
453 printk(KERN_INFO "EEH: Ignored MMIO failure (%d) on device:%s\n",
454 reset_state, pci_name(dev));
459 * eeh_event_handler - dispatch EEH events. The detection of a frozen
460 * slot can occur inside an interrupt, where it can be hard to do
461 * anything about it. The goal of this routine is to pull these
462 * detection events out of the context of the interrupt handler, and
463 * re-dispatch them for processing at a later time in a normal context.
467 static void eeh_event_handler(void *dummy)
470 struct eeh_event *event;
473 spin_lock_irqsave(&eeh_eventlist_lock, flags);
475 if (!list_empty(&eeh_eventlist)) {
476 event = list_entry(eeh_eventlist.next, struct eeh_event, list);
477 list_del(&event->list);
479 spin_unlock_irqrestore(&eeh_eventlist_lock, flags);
483 printk(KERN_INFO "EEH: MMIO failure (%d), notifiying device "
484 "%s\n", event->reset_state,
485 pci_name(event->dev));
487 atomic_set(&eeh_fail_count, 0);
488 notifier_call_chain (&eeh_notifier_chain,
489 EEH_NOTIFY_FREEZE, event);
491 __get_cpu_var(slot_resets)++;
493 pci_dev_put(event->dev);
499 * eeh_token_to_phys - convert EEH address token to phys address
500 * @token i/o token, should be address in the form 0xE....
502 static inline unsigned long eeh_token_to_phys(unsigned long token)
507 ptep = find_linux_pte(init_mm.pgd, token);
510 pa = pte_pfn(*ptep) << PAGE_SHIFT;
512 return pa | (token & (PAGE_SIZE-1));
516 * eeh_dn_check_failure - check if all 1's data is due to EEH slot freeze
518 * @dev pci device, if known
520 * Check for an EEH failure for the given device node. Call this
521 * routine if the result of a read was all 0xff's and you want to
522 * find out if this is due to an EEH slot freeze. This routine
523 * will query firmware for the EEH status.
525 * Returns 0 if there has not been an EEH error; otherwise returns
526 * a non-zero value and queues up a solt isolation event notification.
528 * It is safe to call this routine in an interrupt context.
530 int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
536 struct eeh_event *event;
538 __get_cpu_var(total_mmio_ffs)++;
540 if (!eeh_subsystem_enabled)
546 /* Access to IO BARs might get this far and still not want checking. */
547 if (!(dn->eeh_mode & EEH_MODE_SUPPORTED) ||
548 dn->eeh_mode & EEH_MODE_NOCHECK) {
552 if (!dn->eeh_config_addr) {
557 * If we already have a pending isolation event for this
558 * slot, we know it's bad already, we don't need to check...
560 if (dn->eeh_mode & EEH_MODE_ISOLATED) {
561 atomic_inc(&eeh_fail_count);
562 if (atomic_read(&eeh_fail_count) >= EEH_MAX_FAILS) {
563 /* re-read the slot reset state */
564 if (read_slot_reset_state(dn, rets) != 0)
565 rets[0] = -1; /* reset state unknown */
566 eeh_panic(dev, rets[0]);
572 * Now test for an EEH failure. This is VERY expensive.
573 * Note that the eeh_config_addr may be a parent device
574 * in the case of a device behind a bridge, or it may be
575 * function zero of a multi-function device.
576 * In any case they must share a common PHB.
578 ret = read_slot_reset_state(dn, rets);
579 if (!(ret == 0 && rets[1] == 1 && (rets[0] == 2 || rets[0] == 4))) {
580 __get_cpu_var(false_positives)++;
584 /* prevent repeated reports of this failure */
585 dn->eeh_mode |= EEH_MODE_ISOLATED;
587 reset_state = rets[0];
589 spin_lock_irqsave(&slot_errbuf_lock, flags);
590 memset(slot_errbuf, 0, eeh_error_buf_size);
592 rc = rtas_call(ibm_slot_error_detail,
593 8, 1, NULL, dn->eeh_config_addr,
594 BUID_HI(dn->phb->buid),
595 BUID_LO(dn->phb->buid), NULL, 0,
596 virt_to_phys(slot_errbuf),
598 1 /* Temporary Error */);
601 log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0);
602 spin_unlock_irqrestore(&slot_errbuf_lock, flags);
604 printk(KERN_INFO "EEH: MMIO failure (%d) on device: %s %s\n",
605 rets[0], dn->name, dn->full_name);
606 event = kmalloc(sizeof(*event), GFP_ATOMIC);
608 eeh_panic(dev, reset_state);
614 event->reset_state = reset_state;
616 /* We may or may not be called in an interrupt context */
617 spin_lock_irqsave(&eeh_eventlist_lock, flags);
618 list_add(&event->list, &eeh_eventlist);
619 spin_unlock_irqrestore(&eeh_eventlist_lock, flags);
621 /* Most EEH events are due to device driver bugs. Having
622 * a stack trace will help the device-driver authors figure
623 * out what happened. So print that out. */
625 schedule_work(&eeh_event_wq);
630 EXPORT_SYMBOL(eeh_dn_check_failure);
633 * eeh_check_failure - check if all 1's data is due to EEH slot freeze
634 * @token i/o token, should be address in the form 0xA....
635 * @val value, should be all 1's (XXX why do we need this arg??)
637 * Check for an eeh failure at the given token address.
638 * Check for an EEH failure at the given token address. Call this
639 * routine if the result of a read was all 0xff's and you want to
640 * find out if this is due to an EEH slot freeze event. This routine
641 * will query firmware for the EEH status.
643 * Note this routine is safe to call in an interrupt context.
645 unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
649 struct device_node *dn;
651 /* Finding the phys addr + pci device; this is pretty quick. */
652 addr = eeh_token_to_phys((unsigned long __force) token);
653 dev = pci_get_device_by_addr(addr);
657 dn = pci_device_to_OF_node(dev);
658 eeh_dn_check_failure (dn, dev);
664 EXPORT_SYMBOL(eeh_check_failure);
666 struct eeh_early_enable_info {
667 unsigned int buid_hi;
668 unsigned int buid_lo;
671 /* Enable eeh for the given device node. */
672 static void *early_enable_eeh(struct device_node *dn, void *data)
674 struct eeh_early_enable_info *info = data;
676 char *status = get_property(dn, "status", NULL);
677 u32 *class_code = (u32 *)get_property(dn, "class-code", NULL);
678 u32 *vendor_id = (u32 *)get_property(dn, "vendor-id", NULL);
679 u32 *device_id = (u32 *)get_property(dn, "device-id", NULL);
685 if (status && strcmp(status, "ok") != 0)
686 return NULL; /* ignore devices with bad status */
688 /* Ignore bad nodes. */
689 if (!class_code || !vendor_id || !device_id)
692 /* There is nothing to check on PCI to ISA bridges */
693 if (dn->type && !strcmp(dn->type, "isa")) {
694 dn->eeh_mode |= EEH_MODE_NOCHECK;
699 * Now decide if we are going to "Disable" EEH checking
700 * for this device. We still run with the EEH hardware active,
701 * but we won't be checking for ff's. This means a driver
702 * could return bad data (very bad!), an interrupt handler could
703 * hang waiting on status bits that won't change, etc.
704 * But there are a few cases like display devices that make sense.
706 enable = 1; /* i.e. we will do checking */
707 if ((*class_code >> 16) == PCI_BASE_CLASS_DISPLAY)
711 dn->eeh_mode |= EEH_MODE_NOCHECK;
713 /* Ok... see if this device supports EEH. Some do, some don't,
714 * and the only way to find out is to check each and every one. */
715 regs = (u32 *)get_property(dn, "reg", NULL);
717 /* First register entry is addr (00BBSS00) */
718 /* Try to enable eeh */
719 ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
720 regs[0], info->buid_hi, info->buid_lo,
723 eeh_subsystem_enabled = 1;
724 dn->eeh_mode |= EEH_MODE_SUPPORTED;
725 dn->eeh_config_addr = regs[0];
727 printk(KERN_DEBUG "EEH: %s: eeh enabled\n", dn->full_name);
731 /* This device doesn't support EEH, but it may have an
732 * EEH parent, in which case we mark it as supported. */
733 if (dn->parent && (dn->parent->eeh_mode & EEH_MODE_SUPPORTED)) {
734 /* Parent supports EEH. */
735 dn->eeh_mode |= EEH_MODE_SUPPORTED;
736 dn->eeh_config_addr = dn->parent->eeh_config_addr;
741 printk(KERN_WARNING "EEH: %s: unable to get reg property.\n",
749 * Initialize EEH by trying to enable it for all of the adapters in the system.
750 * As a side effect we can determine here if eeh is supported at all.
751 * Note that we leave EEH on so failed config cycles won't cause a machine
752 * check. If a user turns off EEH for a particular adapter they are really
753 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
754 * grant access to a slot if EEH isn't enabled, and so we always enable
755 * EEH for all slots/all devices.
757 * The eeh-force-off option disables EEH checking globally, for all slots.
758 * Even if force-off is set, the EEH hardware is still enabled, so that
759 * newer systems can boot.
761 void __init eeh_init(void)
763 struct device_node *phb, *np;
764 struct eeh_early_enable_info info;
766 np = of_find_node_by_path("/rtas");
770 ibm_set_eeh_option = rtas_token("ibm,set-eeh-option");
771 ibm_set_slot_reset = rtas_token("ibm,set-slot-reset");
772 ibm_read_slot_reset_state2 = rtas_token("ibm,read-slot-reset-state2");
773 ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state");
774 ibm_slot_error_detail = rtas_token("ibm,slot-error-detail");
776 if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE)
779 eeh_error_buf_size = rtas_token("rtas-error-log-max");
780 if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) {
781 eeh_error_buf_size = 1024;
783 if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) {
784 printk(KERN_WARNING "EEH: rtas-error-log-max is bigger than allocated "
785 "buffer ! (%d vs %d)", eeh_error_buf_size, RTAS_ERROR_LOG_MAX);
786 eeh_error_buf_size = RTAS_ERROR_LOG_MAX;
789 /* Enable EEH for all adapters. Note that eeh requires buid's */
790 for (phb = of_find_node_by_name(NULL, "pci"); phb;
791 phb = of_find_node_by_name(phb, "pci")) {
794 buid = get_phb_buid(phb);
798 info.buid_lo = BUID_LO(buid);
799 info.buid_hi = BUID_HI(buid);
800 traverse_pci_devices(phb, early_enable_eeh, &info);
803 if (eeh_subsystem_enabled)
804 printk(KERN_INFO "EEH: PCI Enhanced I/O Error Handling Enabled\n");
806 printk(KERN_WARNING "EEH: No capable adapters found\n");
810 * eeh_add_device_early - enable EEH for the indicated device_node
811 * @dn: device node for which to set up EEH
813 * This routine must be used to perform EEH initialization for PCI
814 * devices that were added after system boot (e.g. hotplug, dlpar).
815 * This routine must be called before any i/o is performed to the
816 * adapter (inluding any config-space i/o).
817 * Whether this actually enables EEH or not for this device depends
818 * on the CEC architecture, type of the device, on earlier boot
819 * command-line arguments & etc.
821 void eeh_add_device_early(struct device_node *dn)
823 struct pci_controller *phb;
824 struct eeh_early_enable_info info;
829 if (NULL == phb || 0 == phb->buid) {
830 printk(KERN_WARNING "EEH: Expected buid but found none\n");
834 info.buid_hi = BUID_HI(phb->buid);
835 info.buid_lo = BUID_LO(phb->buid);
836 early_enable_eeh(dn, &info);
838 EXPORT_SYMBOL(eeh_add_device_early);
841 * eeh_add_device_late - perform EEH initialization for the indicated pci device
842 * @dev: pci device for which to set up EEH
844 * This routine must be used to complete EEH initialization for PCI
845 * devices that were added after system boot (e.g. hotplug, dlpar).
847 void eeh_add_device_late(struct pci_dev *dev)
849 if (!dev || !eeh_subsystem_enabled)
853 printk(KERN_DEBUG "EEH: adding device %s\n", pci_name(dev));
856 pci_addr_cache_insert_device (dev);
858 EXPORT_SYMBOL(eeh_add_device_late);
861 * eeh_remove_device - undo EEH setup for the indicated pci device
862 * @dev: pci device to be removed
864 * This routine should be when a device is removed from a running
865 * system (e.g. by hotplug or dlpar).
867 void eeh_remove_device(struct pci_dev *dev)
869 if (!dev || !eeh_subsystem_enabled)
872 /* Unregister the device with the EEH/PCI address search system */
874 printk(KERN_DEBUG "EEH: remove device %s\n", pci_name(dev));
876 pci_addr_cache_remove_device(dev);
878 EXPORT_SYMBOL(eeh_remove_device);
880 static int proc_eeh_show(struct seq_file *m, void *v)
883 unsigned long ffs = 0, positives = 0, failures = 0;
884 unsigned long resets = 0;
887 ffs += per_cpu(total_mmio_ffs, cpu);
888 positives += per_cpu(false_positives, cpu);
889 failures += per_cpu(ignored_failures, cpu);
890 resets += per_cpu(slot_resets, cpu);
893 if (0 == eeh_subsystem_enabled) {
894 seq_printf(m, "EEH Subsystem is globally disabled\n");
895 seq_printf(m, "eeh_total_mmio_ffs=%ld\n", ffs);
897 seq_printf(m, "EEH Subsystem is enabled\n");
898 seq_printf(m, "eeh_total_mmio_ffs=%ld\n"
899 "eeh_false_positives=%ld\n"
900 "eeh_ignored_failures=%ld\n"
901 "eeh_slot_resets=%ld\n"
902 "eeh_fail_count=%d\n",
903 ffs, positives, failures, resets,
904 eeh_fail_count.counter);
910 static int proc_eeh_open(struct inode *inode, struct file *file)
912 return single_open(file, proc_eeh_show, NULL);
915 static struct file_operations proc_eeh_operations = {
916 .open = proc_eeh_open,
919 .release = single_release,
922 static int __init eeh_init_proc(void)
924 struct proc_dir_entry *e;
926 if (systemcfg->platform & PLATFORM_PSERIES) {
927 e = create_proc_entry("ppc64/eeh", 0, NULL);
929 e->proc_fops = &proc_eeh_operations;
934 __initcall(eeh_init_proc);