2 * Copyright (C) 1997 Cullen Jennings
3 * Copyright (C) 1998 Elmer.Joandi@ut.ee, +37-255-13500
4 * GNU General Public License applies
7 #include <linux/module.h>
8 #include <linux/kernel.h>
9 #include <linux/types.h>
10 #include <linux/skbuff.h>
11 #include <linux/if_ether.h> /* For the statistics structure. */
12 #include <linux/if_arp.h> /* For ARPHRD_ETHER */
13 #include <linux/ptrace.h>
14 #include <linux/ioport.h>
16 #include <linux/slab.h>
17 #include <linux/string.h>
18 #include <linux/timer.h>
20 #include <linux/init.h>
21 #include <linux/bitops.h>
22 #include <asm/system.h>
24 #include <linux/errno.h>
25 #include <linux/delay.h>
26 #include <linux/netdevice.h>
27 #include <linux/etherdevice.h>
30 //#define ARLAN_DEBUGGING 1
32 #define ARLAN_PROC_INTERFACE
33 #define MAX_ARLANS 4 /* not more than 4 ! */
34 #define ARLAN_PROC_SHM_DUMP /* shows all card registers, makes driver way larger */
36 #define ARLAN_MAX_MULTICAST_ADDRS 16
37 #define ARLAN_RCV_CLEAN 0
38 #define ARLAN_RCV_PROMISC 1
39 #define ARLAN_RCV_CONTROL 2
42 extern int init_arlan_proc(void);
43 extern void cleanup_arlan_proc(void);
45 #define init_arlan_proc() ({ 0; })
46 #define cleanup_arlan_proc() do { } while (0)
49 extern struct net_device *arlan_device[MAX_ARLANS];
50 extern int arlan_debug;
51 extern int arlan_entry_debug;
52 extern int arlan_exit_debug;
53 extern int testMemory;
54 extern int arlan_command(struct net_device * dev, int command);
57 #define radioNodeIdUNKNOWN -1
59 #define debugUNKNOWN 0
60 #define testMemoryUNKNOWN 1
61 #define spreadingCodeUNKNOWN 0
62 #define channelNumberUNKNOWN 0
63 #define channelSetUNKNOWN 0
64 #define systemIdUNKNOWN -1
65 #define registrationModeUNKNOWN -1
68 #define IFDEBUG( L ) if ( (L) & arlan_debug )
69 #define ARLAN_FAKE_HDR_LEN 12
71 #ifdef ARLAN_DEBUGGING
73 #define ARLAN_ENTRY_EXIT_DEBUGGING 1
74 #define ARLAN_DEBUG(a,b) printk(KERN_DEBUG a, b)
76 #define ARLAN_DEBUG(a,b)
79 #define ARLAN_SHMEM_SIZE 0x2000
83 /* Header Signature */
84 volatile char textRegion[48];
85 volatile u_char resetFlag;
86 volatile u_char diagnosticInfo;
87 volatile u_short diagnosticOffset;
88 volatile u_char _1[12];
89 volatile u_char lanCardNodeId[6];
90 volatile u_char broadcastAddress[6];
91 volatile u_char hardwareType;
92 volatile u_char majorHardwareVersion;
93 volatile u_char minorHardwareVersion;
94 volatile u_char radioModule;// shows EEPROM, can be overridden at 0x111
95 volatile u_char defaultChannelSet; // shows EEProm, can be overriiden at 0x10A
96 volatile u_char _2[47];
98 /* Control/Status Block - 0x0080 */
99 volatile u_char interruptInProgress; /* not used by lancpu */
100 volatile u_char cntrlRegImage; /* not used by lancpu */
101 volatile u_char _3[13];
102 volatile u_char dumpByte;
103 volatile u_char commandByte; /* non-zero = active */
104 volatile u_char commandParameter[15];
106 /* Receive Status - 0x00a0 */
107 volatile u_char rxStatus; /* 1- data, 2-control, 0xff - registr change */
108 volatile u_char rxFrmType;
109 volatile u_short rxOffset;
110 volatile u_short rxLength;
111 volatile u_char rxSrc[6];
112 volatile u_char rxBroadcastFlag;
113 volatile u_char rxQuality;
114 volatile u_char scrambled;
115 volatile u_char _4[1];
117 /* Transmit Status - 0x00b0 */
118 volatile u_char txStatus;
119 volatile u_char txAckQuality;
120 volatile u_char numRetries;
121 volatile u_char _5[14];
122 volatile u_char registeredRouter[6];
123 volatile u_char backboneRouter[6];
124 volatile u_char registrationStatus;
125 volatile u_char configuredStatusFlag;
126 volatile u_char _6[1];
127 volatile u_char ultimateDestAddress[6];
128 volatile u_char immedDestAddress[6];
129 volatile u_char immedSrcAddress[6];
130 volatile u_short rxSequenceNumber;
131 volatile u_char assignedLocaltalkAddress;
132 volatile u_char _7[27];
134 /* System Parameter Block */
136 /* - Driver Parameters (Novell Specific) */
138 volatile u_short txTimeout;
139 volatile u_short transportTime;
140 volatile u_char _8[4];
142 /* - Configuration Parameters */
143 volatile u_char irqLevel;
144 volatile u_char spreadingCode;
145 volatile u_char channelSet;
146 volatile u_char channelNumber;
147 volatile u_short radioNodeId;
148 volatile u_char _9[2];
149 volatile u_char scramblingDisable;
150 volatile u_char radioType;
151 volatile u_short routerId;
152 volatile u_char _10[9];
153 volatile u_char txAttenuation;
154 volatile u_char systemId[4];
155 volatile u_short globalChecksum;
156 volatile u_char _11[4];
157 volatile u_short maxDatagramSize;
158 volatile u_short maxFrameSize;
159 volatile u_char maxRetries;
160 volatile u_char receiveMode;
161 volatile u_char priority;
162 volatile u_char rootOrRepeater;
163 volatile u_char specifiedRouter[6];
164 volatile u_short fastPollPeriod;
165 volatile u_char pollDecay;
166 volatile u_char fastPollDelay[2];
167 volatile u_char arlThreshold;
168 volatile u_char arlDecay;
169 volatile u_char _12[1];
170 volatile u_short specRouterTimeout;
171 volatile u_char _13[5];
174 volatile u_char SID[4];
175 volatile u_char encryptionKey[12];
176 volatile u_char _14[2];
177 volatile u_char waitTime[2];
178 volatile u_char lParameter[2];
179 volatile u_char _15[3];
180 volatile u_short headerSize;
181 volatile u_short sectionChecksum;
183 volatile u_char registrationMode;
184 volatile u_char registrationFill;
185 volatile u_short pollPeriod;
186 volatile u_short refreshPeriod;
187 volatile u_char name[16];
188 volatile u_char NID[6];
189 volatile u_char localTalkAddress;
190 volatile u_char codeFormat;
191 volatile u_char numChannels;
192 volatile u_char channel1;
193 volatile u_char channel2;
194 volatile u_char channel3;
195 volatile u_char channel4;
196 volatile u_char SSCode[59];
198 volatile u_char _16[0xC0];
199 volatile u_short auxCmd;
200 volatile u_char dumpPtr[4];
201 volatile u_char dumpVal;
202 volatile u_char _17[0x6A];
203 volatile u_char wireTest;
204 volatile u_char _18[14];
206 /* Statistics Block - 0x0300 */
207 volatile u_char hostcpuLock;
208 volatile u_char lancpuLock;
209 volatile u_char resetTime[18];
211 volatile u_char numDatagramsTransmitted[4];
212 volatile u_char numReTransmissions[4];
213 volatile u_char numFramesDiscarded[4];
214 volatile u_char numDatagramsReceived[4];
215 volatile u_char numDuplicateReceivedFrames[4];
216 volatile u_char numDatagramsDiscarded[4];
218 volatile u_short maxNumReTransmitDatagram;
219 volatile u_short maxNumReTransmitFrames;
220 volatile u_short maxNumConsecutiveDuplicateFrames;
221 /* misaligned here so we have to go to characters */
223 volatile u_char numBytesTransmitted[4];
224 volatile u_char numBytesReceived[4];
225 volatile u_char numCRCErrors[4];
226 volatile u_char numLengthErrors[4];
227 volatile u_char numAbortErrors[4];
228 volatile u_char numTXUnderruns[4];
229 volatile u_char numRXOverruns[4];
230 volatile u_char numHoldOffs[4];
231 volatile u_char numFramesTransmitted[4];
232 volatile u_char numFramesReceived[4];
233 volatile u_char numReceiveFramesLost[4];
234 volatile u_char numRXBufferOverflows[4];
235 volatile u_char numFramesDiscardedAddrMismatch[4];
236 volatile u_char numFramesDiscardedSIDMismatch[4];
237 volatile u_char numPollsTransmistted[4];
238 volatile u_char numPollAcknowledges[4];
239 volatile u_char numStatusTimeouts[4];
240 volatile u_char numNACKReceived[4];
242 volatile u_char _19[0x86];
244 volatile u_char txBuffer[0x800];
245 volatile u_char rxBuffer[0x800];
247 volatile u_char _20[0x800];
248 volatile u_char _21[0x3fb];
249 volatile u_char configStatus;
251 volatile u_char progIOCtrl;
252 volatile u_char shareMBase;
253 volatile u_char controlRegister;
256 struct arlan_conf_stru {
260 int scramblingDisable;
271 int registrationMode;
272 int registrationFill;
273 int localTalkAddress;
294 int waitReTransmitPacketMaxSize;
295 int ReTransmitPacketMaxSize;
296 int fastReTransCount;
297 int driverRetransmissions;
298 int registrationInterrupts;
311 int pre_Command_Wait;
317 extern struct arlan_conf_stru arlan_conf[MAX_ARLANS];
321 volatile short offset;
322 volatile short length;
323 volatile u_char dest[6];
324 volatile unsigned char clear;
325 volatile unsigned char retries;
326 volatile unsigned char routing;
327 volatile unsigned char scrambled;
330 #define TX_RING_SIZE 2
331 /* Information that need to be kept for each board. */
332 struct arlan_private {
333 struct arlan_shmem __iomem * card;
334 struct arlan_shmem * conf;
336 struct arlan_conf_stru * Conf;
339 unsigned long lastReset;
340 struct timer_list timer;
341 struct timer_list tx_delay_timer;
342 struct timer_list tx_retry_timer;
343 struct timer_list rx_check_timer;
345 int registrationLostCount;
349 struct TxParam txRing[TX_RING_SIZE];
350 char reTransmitBuff[0x800];
352 unsigned ReTransmitRequested;
353 unsigned long tx_done_delayed;
354 unsigned long registrationLastSeen;
356 unsigned long tx_last_sent;
357 unsigned long tx_last_cleared;
358 unsigned long retransmissions;
359 unsigned long interrupt_ack_requested;
361 unsigned long waiting_command_mask;
362 unsigned long card_polling_interval;
363 unsigned long last_command_buff_free_time;
367 int rx_command_given;
368 int tx_command_given;
369 unsigned long interrupt_processing_active;
370 unsigned long last_rx_int_ack_time;
371 unsigned long in_bytes;
372 unsigned long out_bytes;
373 unsigned long in_time;
374 unsigned long out_time;
375 unsigned long in_time10;
376 unsigned long out_time10;
377 unsigned long in_bytes10;
378 unsigned long out_bytes10;
379 int init_etherdev_alloc;
384 #define ARLAN_CLEAR 0x00
385 #define ARLAN_RESET 0x01
386 #define ARLAN_CHANNEL_ATTENTION 0x02
387 #define ARLAN_INTERRUPT_ENABLE 0x04
388 #define ARLAN_CLEAR_INTERRUPT 0x08
389 #define ARLAN_POWER 0x40
390 #define ARLAN_ACCESS 0x80
392 #define ARLAN_COM_CONF 0x01
393 #define ARLAN_COM_RX_ENABLE 0x03
394 #define ARLAN_COM_RX_ABORT 0x04
395 #define ARLAN_COM_TX_ENABLE 0x05
396 #define ARLAN_COM_TX_ABORT 0x06
397 #define ARLAN_COM_NOP 0x07
398 #define ARLAN_COM_STANDBY 0x08
399 #define ARLAN_COM_ACTIVATE 0x09
400 #define ARLAN_COM_GOTO_SLOW_POLL 0x0a
401 #define ARLAN_COM_INT 0x80
404 #define TXLAST(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[((struct arlan_private *)netdev_priv(dev))->txLast])
405 #define TXHEAD(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[0])
406 #define TXTAIL(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[1])
408 #define TXBuffStart(dev) offsetof(struct arlan_shmem, txBuffer)
409 #define TXBuffEnd(dev) offsetof(struct arlan_shmem, xxBuffer)
411 #define READSHM(to,from,atype) {\
413 memcpy_fromio(&(tmp),&(from),sizeof(atype));\
417 #define READSHMEM(from,atype)\
419 READSHM(from, arlan->from, atype);
421 #define WRITESHM(to,from,atype) \
422 { atype tmpSHM = from;\
423 memcpy_toio(&(to),&tmpSHM,sizeof(atype));\
426 #define DEBUGSHM(levelSHM,stringSHM,stuff,atype) \
428 memcpy_fromio(&tmpSHM,&(stuff),sizeof(atype));\
429 IFDEBUG(levelSHM) printk(stringSHM,tmpSHM);\
432 #define WRITESHMB(to, val) \
434 #define READSHMB(to) \
436 #define WRITESHMS(to, val) \
438 #define READSHMS(to) \
440 #define WRITESHMI(to, val) \
442 #define READSHMI(to) \
449 #define registrationBad(dev)\
450 ( ( READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationMode) > 0) && \
451 ( READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationStatus) == 0) )
454 #define readControlRegister(dev)\
455 READSHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage)
457 #define writeControlRegister(dev, v){\
458 WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage ,((v) &0xF) );\
459 WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->controlRegister ,(v) );}
462 #define arlan_interrupt_lancpu(dev) {\
465 cr = readControlRegister(dev);\
466 if (cr & ARLAN_CHANNEL_ATTENTION){ \
467 writeControlRegister(dev, (cr & ~ARLAN_CHANNEL_ATTENTION));\
469 writeControlRegister(dev, (cr | ARLAN_CHANNEL_ATTENTION));\
472 #define clearChannelAttention(dev){ \
473 writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_CHANNEL_ATTENTION);}
474 #define setHardwareReset(dev) {\
475 writeControlRegister(dev,readControlRegister(dev) | ARLAN_RESET);}
476 #define clearHardwareReset(dev) {\
477 writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_RESET);}
478 #define setInterruptEnable(dev){\
479 writeControlRegister(dev,readControlRegister(dev) | ARLAN_INTERRUPT_ENABLE) ;}
480 #define clearInterruptEnable(dev){\
481 writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_INTERRUPT_ENABLE) ;}
482 #define setClearInterrupt(dev){\
483 writeControlRegister(dev,readControlRegister(dev) | ARLAN_CLEAR_INTERRUPT) ;}
484 #define clearClearInterrupt(dev){\
485 writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_CLEAR_INTERRUPT);}
486 #define setPowerOff(dev){\
487 writeControlRegister(dev,readControlRegister(dev) | (ARLAN_POWER && ARLAN_ACCESS));\
488 writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_ACCESS);}
489 #define setPowerOn(dev){\
490 writeControlRegister(dev,readControlRegister(dev) & ~(ARLAN_POWER)); }
491 #define arlan_lock_card_access(dev){\
492 writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_ACCESS);}
493 #define arlan_unlock_card_access(dev){\
494 writeControlRegister(dev,readControlRegister(dev) | ARLAN_ACCESS ); }
499 #define ARLAN_COMMAND_RX 0x000001
500 #define ARLAN_COMMAND_NOOP 0x000002
501 #define ARLAN_COMMAND_NOOPINT 0x000004
502 #define ARLAN_COMMAND_TX 0x000008
503 #define ARLAN_COMMAND_CONF 0x000010
504 #define ARLAN_COMMAND_RESET 0x000020
505 #define ARLAN_COMMAND_TX_ABORT 0x000040
506 #define ARLAN_COMMAND_RX_ABORT 0x000080
507 #define ARLAN_COMMAND_POWERDOWN 0x000100
508 #define ARLAN_COMMAND_POWERUP 0x000200
509 #define ARLAN_COMMAND_SLOW_POLL 0x000400
510 #define ARLAN_COMMAND_ACTIVATE 0x000800
511 #define ARLAN_COMMAND_INT_ACK 0x001000
512 #define ARLAN_COMMAND_INT_ENABLE 0x002000
513 #define ARLAN_COMMAND_WAIT_NOW 0x004000
514 #define ARLAN_COMMAND_LONG_WAIT_NOW 0x008000
515 #define ARLAN_COMMAND_STANDBY 0x010000
516 #define ARLAN_COMMAND_INT_RACK 0x020000
517 #define ARLAN_COMMAND_INT_RENABLE 0x040000
518 #define ARLAN_COMMAND_CONF_WAIT 0x080000
519 #define ARLAN_COMMAND_TBUSY_CLEAR 0x100000
520 #define ARLAN_COMMAND_CLEAN_AND_CONF (ARLAN_COMMAND_TX_ABORT\
521 | ARLAN_COMMAND_RX_ABORT\
522 | ARLAN_COMMAND_CONF)
523 #define ARLAN_COMMAND_CLEAN_AND_RESET (ARLAN_COMMAND_TX_ABORT\
524 | ARLAN_COMMAND_RX_ABORT\
525 | ARLAN_COMMAND_RESET)
529 #define ARLAN_DEBUG_CHAIN_LOCKS 0x00001
530 #define ARLAN_DEBUG_RESET 0x00002
531 #define ARLAN_DEBUG_TIMING 0x00004
532 #define ARLAN_DEBUG_CARD_STATE 0x00008
533 #define ARLAN_DEBUG_TX_CHAIN 0x00010
534 #define ARLAN_DEBUG_MULTICAST 0x00020
535 #define ARLAN_DEBUG_HEADER_DUMP 0x00040
536 #define ARLAN_DEBUG_INTERRUPT 0x00080
537 #define ARLAN_DEBUG_STARTUP 0x00100
538 #define ARLAN_DEBUG_SHUTDOWN 0x00200