1 /* arch/sparc/kernel/entry.S: Sparc trap low-level entry points.
3 * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * Copyright (C) 1996-1999 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
7 * Copyright (C) 1997 Anton Blanchard (anton@progsoc.uts.edu.au)
10 #include <linux/errno.h>
15 #include <asm/contregs.h>
16 #include <asm/ptrace.h>
17 #include <asm/asm-offsets.h>
19 #include <asm/vaddrs.h>
20 #include <asm/memreg.h>
22 #include <asm/pgtable.h>
23 #include <asm/pgtsun4c.h>
24 #include <asm/winmacro.h>
25 #include <asm/signal.h>
28 #include <asm/thread_info.h>
29 #include <asm/param.h>
30 #include <asm/unistd.h>
32 #include <asm/asmmacro.h>
36 /* These are just handy. */
37 #define _SV save %sp, -STACKFRAME_SZ, %sp
40 #define FLUSH_ALL_KERNEL_WINDOWS \
41 _SV; _SV; _SV; _SV; _SV; _SV; _SV; \
42 _RS; _RS; _RS; _RS; _RS; _RS; _RS;
48 .globl arch_kgdb_breakpoint
49 .type arch_kgdb_breakpoint,#function
54 .size arch_kgdb_breakpoint,.-arch_kgdb_breakpoint
57 #if defined(CONFIG_BLK_DEV_FD) || defined(CONFIG_BLK_DEV_FD_MODULE)
62 * This code cannot touch registers %l0 %l1 and %l2
63 * because SAVE_ALL depends on their values. It depends
64 * on %l3 also, but we regenerate it before a call.
65 * Other registers are:
66 * %l3 -- base address of fdc registers
68 * %l5 -- scratch for ld/st address
70 * %l7 -- scratch [floppy byte, ld/st address, aux. data]
73 /* Do we have work to do? */
74 sethi %hi(doing_pdma), %l7
75 ld [%l7 + %lo(doing_pdma)], %l7
80 /* Load fdc register base */
81 sethi %hi(fdc_status), %l3
82 ld [%l3 + %lo(fdc_status)], %l3
84 /* Setup register addresses */
85 sethi %hi(pdma_vaddr), %l5 ! transfer buffer
86 ld [%l5 + %lo(pdma_vaddr)], %l4
87 sethi %hi(pdma_size), %l5 ! bytes to go
88 ld [%l5 + %lo(pdma_size)], %l6
92 andcc %l7, 0x80, %g0 ! Does fifo still have data
93 bz floppy_fifo_emptied ! fifo has been emptied...
94 andcc %l7, 0x20, %g0 ! in non-dma mode still?
95 bz floppy_overrun ! nope, overrun
96 andcc %l7, 0x40, %g0 ! 0=write 1=read
100 /* Ok, actually read this byte */
111 /* Ok, actually write this byte */
118 /* fall through... */
120 sethi %hi(pdma_vaddr), %l5
121 st %l4, [%l5 + %lo(pdma_vaddr)]
122 sethi %hi(pdma_size), %l5
123 st %l6, [%l5 + %lo(pdma_size)]
124 /* Flip terminal count pin */
125 set auxio_register, %l7
128 set sparc_cpu_model, %l5
130 subcc %l5, 1, %g0 /* enum { sun4c = 1 }; */
146 /* Kill some time so the bits set */
152 /* Prevent recursion */
153 sethi %hi(doing_pdma), %l7
155 st %g0, [%l7 + %lo(doing_pdma)]
157 /* We emptied the FIFO, but we haven't read everything
158 * as of yet. Store the current transfer address and
159 * bytes left to read so we can continue when the next
163 sethi %hi(pdma_vaddr), %l5
164 st %l4, [%l5 + %lo(pdma_vaddr)]
165 sethi %hi(pdma_size), %l7
166 st %l6, [%l7 + %lo(pdma_size)]
168 /* Restore condition codes */
176 sethi %hi(pdma_vaddr), %l5
177 st %l4, [%l5 + %lo(pdma_vaddr)]
178 sethi %hi(pdma_size), %l5
179 st %l6, [%l5 + %lo(pdma_size)]
180 /* Prevent recursion */
181 sethi %hi(doing_pdma), %l7
182 st %g0, [%l7 + %lo(doing_pdma)]
184 /* fall through... */
189 /* Set all IRQs off. */
196 mov 11, %o0 ! floppy irq level (unused anyway)
197 mov %g0, %o1 ! devid is not used in fast interrupts
198 call sparc_floppy_irq
199 add %sp, STACKFRAME_SZ, %o2 ! struct pt_regs *regs
203 #endif /* (CONFIG_BLK_DEV_FD) */
205 /* Bad trap handler */
206 .globl bad_trap_handler
213 add %sp, STACKFRAME_SZ, %o0 ! pt_regs
215 mov %l7, %o1 ! trap number
219 /* For now all IRQ's not registered get sent here. handler_irq() will
220 * see if a routine is registered to handle this interrupt and if not
221 * it will say so on the console.
225 .globl real_irq_entry, patch_handler_irq
230 .globl patchme_maybe_smp_msg
233 patchme_maybe_smp_msg:
244 mov %l7, %o0 ! irq level
247 add %sp, STACKFRAME_SZ, %o1 ! pt_regs ptr
248 or %l0, PSR_PIL, %g2 ! restore PIL after handler_irq
249 wr %g2, PSR_ET, %psr ! keep ET up
255 /* SMP per-cpu ticker interrupts are handled specially. */
257 bne real_irq_continue+4
263 call smp4m_percpu_timer_interrupt
264 add %sp, STACKFRAME_SZ, %o0
269 /* Here is where we check for possible SMP IPI passed to us
270 * on some level other than 15 which is the NMI and only used
271 * for cross calls. That has a separate entry point below.
274 GET_PROCESSOR4M_ID(o3)
275 set sun4m_interrupts, %l5
277 sethi %hi(0x40000000), %o2
292 call smp_reschedule_irq
298 .globl linux_trap_ipi15_sun4m
299 linux_trap_ipi15_sun4m:
301 sethi %hi(0x80000000), %o2
302 GET_PROCESSOR4M_ID(o0)
303 set sun4m_interrupts, %l5
309 be 1f ! Must be an NMI async memory error
319 call smp4m_cross_call_irq
321 b ret_trap_lockless_ipi
324 /* NMI async memory error handling. */
325 sethi %hi(0x80000000), %l4
326 sethi %hi(0x4000), %o3
347 /* SMP per-cpu ticker interrupts are handled specially. */
351 sethi %hi(CC_ICLR), %o0
352 sethi %hi(1 << 14), %o1
353 or %o0, %lo(CC_ICLR), %o0
354 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 14 in MXCC's ICLR */
359 call smp4d_percpu_timer_interrupt
360 add %sp, STACKFRAME_SZ, %o0
366 .globl linux_trap_ipi15_sun4d
367 linux_trap_ipi15_sun4d:
369 sethi %hi(CC_BASE), %o4
370 sethi %hi(MXCC_ERR_ME|MXCC_ERR_PEW|MXCC_ERR_ASE|MXCC_ERR_PEE), %o2
371 or %o4, (CC_EREG - CC_BASE), %o0
372 ldda [%o0] ASI_M_MXCC, %o0
375 sethi %hi(BB_STAT2), %o2
376 lduba [%o2] ASI_M_CTL, %o2
377 andcc %o2, BB_STAT2_MASK, %g0
379 or %o4, (CC_ICLR - CC_BASE), %o0
380 sethi %hi(1 << 15), %o1
381 stha %o1, [%o0] ASI_M_MXCC /* Clear PIL 15 in MXCC's ICLR */
387 call smp4d_cross_call_irq
389 b ret_trap_lockless_ipi
396 lduha [%l4] ASI_M_MXCC, %l5
397 sethi %hi(1 << 15), %l7
399 stha %l5, [%l4] ASI_M_MXCC
403 #endif /* CONFIG_SMP */
405 /* This routine handles illegal instructions and privileged
406 * instruction attempts from user code.
409 .globl bad_instruction
411 sethi %hi(0xc1f80000), %l4
413 sethi %hi(0x81d80000), %l7
419 wr %l0, PSR_ET, %psr ! re-enable traps
422 add %sp, STACKFRAME_SZ, %o0
425 call do_illegal_instruction
430 1: /* unimplemented flush - just skip */
435 .globl priv_instruction
442 add %sp, STACKFRAME_SZ, %o0
445 call do_priv_instruction
450 /* This routine handles unaligned data accesses. */
454 andcc %l0, PSR_PS, %g0
464 call kernel_unaligned_trap
465 add %sp, STACKFRAME_SZ, %o0
472 wr %l0, PSR_ET, %psr ! re-enable traps
476 call user_unaligned_trap
477 add %sp, STACKFRAME_SZ, %o0
481 /* This routine handles floating point disabled traps. */
483 .globl fpd_trap_handler
487 wr %l0, PSR_ET, %psr ! re-enable traps
490 add %sp, STACKFRAME_SZ, %o0
498 /* This routine handles Floating Point Exceptions. */
500 .globl fpe_trap_handler
502 set fpsave_magic, %l5
505 sethi %hi(fpsave), %l5
506 or %l5, %lo(fpsave), %l5
509 sethi %hi(fpsave_catch2), %l5
510 or %l5, %lo(fpsave_catch2), %l5
516 sethi %hi(fpsave_catch), %l5
517 or %l5, %lo(fpsave_catch), %l5
526 wr %l0, PSR_ET, %psr ! re-enable traps
529 add %sp, STACKFRAME_SZ, %o0
537 /* This routine handles Tag Overflow Exceptions. */
539 .globl do_tag_overflow
543 wr %l0, PSR_ET, %psr ! re-enable traps
546 add %sp, STACKFRAME_SZ, %o0
549 call handle_tag_overflow
554 /* This routine handles Watchpoint Exceptions. */
560 wr %l0, PSR_ET, %psr ! re-enable traps
563 add %sp, STACKFRAME_SZ, %o0
566 call handle_watchpoint
571 /* This routine handles Register Access Exceptions. */
577 wr %l0, PSR_ET, %psr ! re-enable traps
580 add %sp, STACKFRAME_SZ, %o0
583 call handle_reg_access
588 /* This routine handles Co-Processor Disabled Exceptions. */
590 .globl do_cp_disabled
594 wr %l0, PSR_ET, %psr ! re-enable traps
597 add %sp, STACKFRAME_SZ, %o0
600 call handle_cp_disabled
605 /* This routine handles Co-Processor Exceptions. */
607 .globl do_cp_exception
611 wr %l0, PSR_ET, %psr ! re-enable traps
614 add %sp, STACKFRAME_SZ, %o0
617 call handle_cp_exception
622 /* This routine handles Hardware Divide By Zero Exceptions. */
628 wr %l0, PSR_ET, %psr ! re-enable traps
631 add %sp, STACKFRAME_SZ, %o0
634 call handle_hw_divzero
640 .globl do_flush_windows
647 andcc %l0, PSR_PS, %g0
651 call flush_user_windows
654 /* Advance over the trap instruction. */
655 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
657 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
658 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
662 .globl flush_patch_one
664 /* We get these for debugging routines using __builtin_return_address() */
667 FLUSH_ALL_KERNEL_WINDOWS
669 /* Advance over the trap instruction. */
670 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1
672 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
673 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
677 /* The getcc software trap. The user wants the condition codes from
678 * the %psr in register %g1.
682 .globl getcc_trap_handler
684 srl %l0, 20, %g1 ! give user
685 and %g1, 0xf, %g1 ! only ICC bits in %psr
686 jmp %l2 ! advance over trap instruction
687 rett %l2 + 0x4 ! like this...
689 /* The setcc software trap. The user has condition codes in %g1
690 * that it would like placed in the %psr. Be careful not to flip
691 * any unintentional bits!
695 .globl setcc_trap_handler
699 andn %l0, %l5, %l0 ! clear ICC bits in %psr
700 and %l4, %l5, %l4 ! clear non-ICC bits in user value
701 or %l4, %l0, %l4 ! or them in... mix mix mix
703 wr %l4, 0x0, %psr ! set new %psr
704 WRITE_PAUSE ! TI scumbags...
706 jmp %l2 ! advance over trap instruction
707 rett %l2 + 0x4 ! like this...
710 .globl linux_trap_nmi_sun4c
711 linux_trap_nmi_sun4c:
714 /* Ugh, we need to clear the IRQ line. This is now
715 * a very sun4c specific trap handler...
717 sethi %hi(interrupt_enable), %l5
718 ld [%l5 + %lo(interrupt_enable)], %l5
720 andn %l6, INTS_ENAB, %l6
723 /* Now it is safe to re-enable traps without recursion. */
728 /* Now call the c-code with the pt_regs frame ptr and the
729 * memory error registers as arguments. The ordering chosen
730 * here is due to unlatching semantics.
732 sethi %hi(AC_SYNC_ERR), %o0
734 lda [%o0] ASI_CONTROL, %o2 ! sync vaddr
736 lda [%o0] ASI_CONTROL, %o1 ! sync error
738 lda [%o0] ASI_CONTROL, %o4 ! async vaddr
740 lda [%o0] ASI_CONTROL, %o3 ! async error
742 add %sp, STACKFRAME_SZ, %o0
747 .globl invalid_segment_patch1_ff
748 .globl invalid_segment_patch2_ff
749 invalid_segment_patch1_ff: cmp %l4, 0xff
750 invalid_segment_patch2_ff: mov 0xff, %l3
753 .globl invalid_segment_patch1_1ff
754 .globl invalid_segment_patch2_1ff
755 invalid_segment_patch1_1ff: cmp %l4, 0x1ff
756 invalid_segment_patch2_1ff: mov 0x1ff, %l3
759 .globl num_context_patch1_16, num_context_patch2_16
760 num_context_patch1_16: mov 0x10, %l7
761 num_context_patch2_16: mov 0x10, %l7
764 .globl vac_linesize_patch_32
765 vac_linesize_patch_32: subcc %l7, 32, %l7
768 .globl vac_hwflush_patch1_on, vac_hwflush_patch2_on
771 * Ugly, but we cant use hardware flushing on the sun4 and we'd require
772 * two instructions (Anton)
774 vac_hwflush_patch1_on: addcc %l7, -PAGE_SIZE, %l7
776 vac_hwflush_patch2_on: sta %g0, [%l3 + %l7] ASI_HWFLUSHSEG
778 .globl invalid_segment_patch1, invalid_segment_patch2
779 .globl num_context_patch1
780 .globl vac_linesize_patch, vac_hwflush_patch1
781 .globl vac_hwflush_patch2
790 ! %l7 = 1 for textfault
791 ! We want error in %l5, vaddr in %l6
793 sethi %hi(AC_SYNC_ERR), %l4
794 add %l4, 0x4, %l6 ! AC_SYNC_VA in %l6
795 lda [%l6] ASI_CONTROL, %l5 ! Address
796 lda [%l4] ASI_CONTROL, %l6 ! Error, retained for a bit
798 andn %l5, 0xfff, %l5 ! Encode all info into l7
804 or %l4, %l7, %l7 ! l7 = [addr,write,txtfault]
806 andcc %l0, PSR_PS, %g0
807 be sun4c_fault_fromuser
808 andcc %l7, 1, %g0 ! Text fault?
811 sethi %hi(KERNBASE), %l4
817 blu sun4c_fault_fromuser
818 sethi %hi(~((1 << SUN4C_REAL_PGDIR_SHIFT) - 1)), %l4
820 /* If the kernel references a bum kernel pointer, or a pte which
821 * points to a non existant page in ram, we will run this code
822 * _forever_ and lock up the machine!!!!! So we must check for
823 * this condition, the AC_SYNC_ERR bits are what we must examine.
824 * Also a parity error would make this happen as well. So we just
825 * check that we are in fact servicing a tlb miss and not some
826 * other type of fault for the kernel.
829 be sun4c_fault_fromuser
832 /* Test for NULL pte_t * in vmalloc area. */
833 sethi %hi(VMALLOC_START), %l4
835 blu,a invalid_segment_patch1
836 lduXa [%l5] ASI_SEGMAP, %l4
838 sethi %hi(swapper_pg_dir), %l4
839 srl %l5, SUN4C_PGDIR_SHIFT, %l6
840 or %l4, %lo(swapper_pg_dir), %l4
843 andcc %l4, PAGE_MASK, %g0
844 be sun4c_fault_fromuser
845 lduXa [%l5] ASI_SEGMAP, %l4
847 invalid_segment_patch1:
850 sethi %hi(sun4c_kfree_ring), %l4
851 or %l4, %lo(sun4c_kfree_ring), %l4
853 deccc %l3 ! do we have a free entry?
854 bcs,a 2f ! no, unmap one.
855 sethi %hi(sun4c_kernel_ring), %l4
857 st %l3, [%l4 + 0x18] ! sun4c_kfree_ring.num_entries--
859 ld [%l4 + 0x00], %l6 ! entry = sun4c_kfree_ring.ringhd.next
860 st %l5, [%l6 + 0x08] ! entry->vaddr = address
862 ld [%l6 + 0x00], %l3 ! next = entry->next
863 ld [%l6 + 0x04], %l7 ! entry->prev
865 st %l7, [%l3 + 0x04] ! next->prev = entry->prev
866 st %l3, [%l7 + 0x00] ! entry->prev->next = next
868 sethi %hi(sun4c_kernel_ring), %l4
869 or %l4, %lo(sun4c_kernel_ring), %l4
870 ! head = &sun4c_kernel_ring.ringhd
872 ld [%l4 + 0x00], %l7 ! head->next
874 st %l4, [%l6 + 0x04] ! entry->prev = head
875 st %l7, [%l6 + 0x00] ! entry->next = head->next
876 st %l6, [%l7 + 0x04] ! head->next->prev = entry
878 st %l6, [%l4 + 0x00] ! head->next = entry
881 inc %l3 ! sun4c_kernel_ring.num_entries++
887 or %l4, %lo(sun4c_kernel_ring), %l4
888 ! head = &sun4c_kernel_ring.ringhd
890 ld [%l4 + 0x04], %l6 ! entry = head->prev
892 ld [%l6 + 0x08], %l3 ! tmp = entry->vaddr
894 ! Flush segment from the cache.
895 sethi %hi((64 * 1024)), %l7
902 sta %g0, [%l3 + %l7] ASI_FLUSHSEG
904 st %l5, [%l6 + 0x08] ! entry->vaddr = address
906 ld [%l6 + 0x00], %l5 ! next = entry->next
907 ld [%l6 + 0x04], %l7 ! entry->prev
909 st %l7, [%l5 + 0x04] ! next->prev = entry->prev
910 st %l5, [%l7 + 0x00] ! entry->prev->next = next
911 st %l4, [%l6 + 0x04] ! entry->prev = head
913 ld [%l4 + 0x00], %l7 ! head->next
915 st %l7, [%l6 + 0x00] ! entry->next = head->next
916 st %l6, [%l7 + 0x04] ! head->next->prev = entry
917 st %l6, [%l4 + 0x00] ! head->next = entry
919 mov %l3, %l5 ! address = tmp
926 ldub [%l6 + 0x0c], %l3
927 or %l4, %l3, %l4 ! encode new vaddr/pseg into l4
929 sethi %hi(AC_CONTEXT), %l3
930 lduba [%l3] ASI_CONTROL, %l6
932 /* Invalidate old mapping, instantiate new mapping,
933 * for each context. Registers l6/l7 are live across
937 sethi %hi(AC_CONTEXT), %l3
938 stba %l7, [%l3] ASI_CONTROL
939 invalid_segment_patch2:
941 stXa %l3, [%l5] ASI_SEGMAP
944 stXa %l4, [%l3] ASI_SEGMAP
946 sethi %hi(AC_CONTEXT), %l3
947 stba %l6, [%l3] ASI_CONTROL
952 sethi %hi(VMALLOC_START), %l4
956 mov 1 << (SUN4C_REAL_PGDIR_SHIFT - PAGE_SHIFT), %l7
958 sethi %hi(KERNBASE), %l6
961 srl %l4, PAGE_SHIFT, %l4
962 sethi %hi((SUN4C_PAGE_KERNEL & 0xf4000000)), %l3
965 sethi %hi(PAGE_SIZE), %l4
968 sta %l3, [%l5] ASI_PTE
975 sethi %hi(sun4c_kernel_faults), %l4
978 srl %l5, SUN4C_PGDIR_SHIFT, %l3
979 sethi %hi(swapper_pg_dir), %l4
980 or %l4, %lo(swapper_pg_dir), %l4
983 and %l4, PAGE_MASK, %l4
985 srl %l5, (PAGE_SHIFT - 2), %l6
986 and %l6, ((SUN4C_PTRS_PER_PTE - 1) << 2), %l6
989 sethi %hi(PAGE_SIZE), %l4
994 sta %l3, [%l5] ASI_PTE
999 sethi %hi(sun4c_kernel_faults), %l4
1001 ld [%l4 + %lo(sun4c_kernel_faults)], %l3
1003 st %l3, [%l4 + %lo(sun4c_kernel_faults)]
1005 /* Restore condition codes */
1011 sun4c_fault_fromuser:
1015 mov %l7, %o1 ! Decode the info from %l7
1017 and %o1, 1, %o1 ! arg2 = text_faultp
1019 and %o2, 2, %o2 ! arg3 = writep
1020 andn %o3, 0xfff, %o3 ! arg4 = faulting address
1022 wr %l0, PSR_ET, %psr
1026 add %sp, STACKFRAME_SZ, %o0 ! arg1 = pt_regs ptr
1036 lda [%l5] ASI_M_MMUREGS, %l6 ! read sfar first
1037 lda [%l4] ASI_M_MMUREGS, %l5 ! read sfsr last
1039 andn %l6, 0xfff, %l6
1040 srl %l5, 6, %l5 ! and encode all info into l7
1045 or %l6, %l7, %l7 ! l7 = [addr,write,txtfault]
1051 and %o1, 1, %o1 ! arg2 = text_faultp
1053 and %o2, 2, %o2 ! arg3 = writep
1054 andn %o3, 0xfff, %o3 ! arg4 = faulting address
1056 wr %l0, PSR_ET, %psr
1060 add %sp, STACKFRAME_SZ, %o0 ! arg1 = pt_regs ptr
1065 .globl sys_nis_syscall
1068 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
1069 call c_sys_nis_syscall
1076 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
1082 st %g0, [%sp + STACKFRAME_SZ + PT_I2]
1085 add %sp, STACKFRAME_SZ, %o0
1088 ld [%sp + STACKFRAME_SZ + PT_I0], %o0
1094 add %sp, STACKFRAME_SZ, %o0 ! pt_regs *regs arg
1099 .globl sys_sigaltstack
1111 call do_sys_sigstack
1115 .globl sys_sigreturn
1118 add %sp, STACKFRAME_SZ, %o0
1120 ld [%curptr + TI_FLAGS], %l5
1121 andcc %l5, _TIF_SYSCALL_TRACE, %g0
1129 /* We don't want to muck with user registers like a
1130 * normal syscall, just return.
1135 .globl sys_rt_sigreturn
1137 call do_rt_sigreturn
1138 add %sp, STACKFRAME_SZ, %o0
1140 ld [%curptr + TI_FLAGS], %l5
1141 andcc %l5, _TIF_SYSCALL_TRACE, %g0
1145 add %sp, STACKFRAME_SZ, %o0
1150 /* We are returning to a signal handler. */
1153 /* Now that we have a real sys_clone, sys_fork() is
1154 * implemented in terms of it. Our _real_ implementation
1155 * of SunOS vfork() will use sys_vfork().
1157 * XXX These three should be consolidated into mostly shared
1158 * XXX code just like on sparc64... -DaveM
1161 .globl sys_fork, flush_patch_two
1165 FLUSH_ALL_KERNEL_WINDOWS;
1166 ld [%curptr + TI_TASK], %o4
1169 mov SIGCHLD, %o0 ! arg0: clone flags
1172 mov %fp, %o1 ! arg1: usp
1173 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
1174 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr
1179 /* Whee, kernel threads! */
1180 .globl sys_clone, flush_patch_three
1184 FLUSH_ALL_KERNEL_WINDOWS;
1185 ld [%curptr + TI_TASK], %o4
1189 /* arg0,1: flags,usp -- loaded already */
1190 cmp %o1, 0x0 ! Is new_usp NULL?
1194 mov %fp, %o1 ! yes, use callers usp
1195 andn %o1, 7, %o1 ! no, align to 8 bytes
1197 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
1198 add %sp, STACKFRAME_SZ, %o2 ! arg2: pt_regs ptr
1203 /* Whee, real vfork! */
1204 .globl sys_vfork, flush_patch_four
1207 FLUSH_ALL_KERNEL_WINDOWS;
1208 ld [%curptr + TI_TASK], %o4
1213 std %g4, [%o4 + AOFF_task_thread + AOFF_thread_fork_kpsr]
1214 sethi %hi(0x4000 | 0x0100 | SIGCHLD), %o0
1216 or %o0, %lo(0x4000 | 0x0100 | SIGCHLD), %o0
1217 sethi %hi(sparc_do_fork), %l1
1219 jmpl %l1 + %lo(sparc_do_fork), %g0
1220 add %sp, STACKFRAME_SZ, %o2
1223 linux_sparc_ni_syscall:
1224 sethi %hi(sys_ni_syscall), %l7
1225 b syscall_is_too_hard
1226 or %l7, %lo(sys_ni_syscall), %l7
1236 linux_syscall_trace:
1237 add %sp, STACKFRAME_SZ, %o0
1250 .globl ret_from_fork
1255 ld [%sp + STACKFRAME_SZ + PT_I0], %o0
1257 /* Linux native system calls enter here... */
1259 .globl linux_sparc_syscall
1260 linux_sparc_syscall:
1261 sethi %hi(PSR_SYSCALL), %l4
1263 /* Direct access to user regs, must faster. */
1264 cmp %g1, NR_SYSCALLS
1265 bgeu linux_sparc_ni_syscall
1269 bne linux_fast_syscall
1270 /* Just do first insn from SAVE_ALL in the delay slot */
1272 syscall_is_too_hard:
1276 wr %l0, PSR_ET, %psr
1281 ld [%curptr + TI_FLAGS], %l5
1283 andcc %l5, _TIF_SYSCALL_TRACE, %g0
1285 bne linux_syscall_trace
1292 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
1295 ld [%curptr + TI_FLAGS], %l6
1296 cmp %o0, -ERESTART_RESTARTBLOCK
1297 ld [%sp + STACKFRAME_SZ + PT_PSR], %g3
1300 andcc %l6, _TIF_SYSCALL_TRACE, %g0
1302 /* System call success, clear Carry condition code. */
1305 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
1306 bne linux_syscall_trace2
1307 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1308 add %l1, 0x4, %l2 /* npc = npc+4 */
1309 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1311 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1313 /* System call failure, set Carry condition code.
1314 * Also, get abs(errno) to return to the process.
1318 st %o0, [%sp + STACKFRAME_SZ + PT_I0]
1320 st %g3, [%sp + STACKFRAME_SZ + PT_PSR]
1321 bne linux_syscall_trace2
1322 ld [%sp + STACKFRAME_SZ + PT_NPC], %l1 /* pc = npc */
1323 add %l1, 0x4, %l2 /* npc = npc+4 */
1324 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1326 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1328 linux_syscall_trace2:
1329 add %sp, STACKFRAME_SZ, %o0
1332 add %l1, 0x4, %l2 /* npc = npc+4 */
1333 st %l1, [%sp + STACKFRAME_SZ + PT_PC]
1335 st %l2, [%sp + STACKFRAME_SZ + PT_NPC]
1338 /* Saving and restoring the FPU state is best done from lowlevel code.
1340 * void fpsave(unsigned long *fpregs, unsigned long *fsr,
1341 * void *fpqueue, unsigned long *fpqdepth)
1346 st %fsr, [%o1] ! this can trap on us if fpu is in bogon state
1353 /* We have an fpqueue to save. */
1367 std %f0, [%o0 + 0x00]
1368 std %f2, [%o0 + 0x08]
1369 std %f4, [%o0 + 0x10]
1370 std %f6, [%o0 + 0x18]
1371 std %f8, [%o0 + 0x20]
1372 std %f10, [%o0 + 0x28]
1373 std %f12, [%o0 + 0x30]
1374 std %f14, [%o0 + 0x38]
1375 std %f16, [%o0 + 0x40]
1376 std %f18, [%o0 + 0x48]
1377 std %f20, [%o0 + 0x50]
1378 std %f22, [%o0 + 0x58]
1379 std %f24, [%o0 + 0x60]
1380 std %f26, [%o0 + 0x68]
1381 std %f28, [%o0 + 0x70]
1383 std %f30, [%o0 + 0x78]
1385 /* Thanks for Theo Deraadt and the authors of the Sprite/netbsd/openbsd
1386 * code for pointing out this possible deadlock, while we save state
1387 * above we could trap on the fsr store so our low level fpu trap
1388 * code has to know how to deal with this.
1398 /* void fpload(unsigned long *fpregs, unsigned long *fsr); */
1402 ldd [%o0 + 0x00], %f0
1403 ldd [%o0 + 0x08], %f2
1404 ldd [%o0 + 0x10], %f4
1405 ldd [%o0 + 0x18], %f6
1406 ldd [%o0 + 0x20], %f8
1407 ldd [%o0 + 0x28], %f10
1408 ldd [%o0 + 0x30], %f12
1409 ldd [%o0 + 0x38], %f14
1410 ldd [%o0 + 0x40], %f16
1411 ldd [%o0 + 0x48], %f18
1412 ldd [%o0 + 0x50], %f20
1413 ldd [%o0 + 0x58], %f22
1414 ldd [%o0 + 0x60], %f24
1415 ldd [%o0 + 0x68], %f26
1416 ldd [%o0 + 0x70], %f28
1417 ldd [%o0 + 0x78], %f30
1422 /* __ndelay and __udelay take two arguments:
1423 * 0 - nsecs or usecs to delay
1424 * 1 - per_cpu udelay_val (loops per jiffy)
1426 * Note that ndelay gives HZ times higher resolution but has a 10ms
1427 * limit. udelay can handle up to 1s.
1431 save %sp, -STACKFRAME_SZ, %sp
1433 call .umul ! round multiplier up so large ns ok
1434 mov 0x1ae, %o1 ! 2**32 / (1 000 000 000 / HZ)
1436 mov %i1, %o1 ! udelay_val
1438 mov %o1, %o0 ! >>32 later for better resolution
1442 save %sp, -STACKFRAME_SZ, %sp
1444 sethi %hi(0x10c7), %o1 ! round multiplier up so large us ok
1446 or %o1, %lo(0x10c7), %o1 ! 2**32 / 1 000 000
1448 mov %i1, %o1 ! udelay_val
1449 sethi %hi(0x028f4b62), %l0 ! Add in rounding constant * 2**32,
1450 or %g0, %lo(0x028f4b62), %l0
1451 addcc %o0, %l0, %o0 ! 2**32 * 0.009 999
1456 mov HZ, %o0 ! >>32 earlier for wider range
1467 /* Handle a software breakpoint */
1468 /* We have to inform parent that child has stopped */
1470 .globl breakpoint_trap
1474 wr %l0, PSR_ET, %psr
1477 st %i0, [%sp + STACKFRAME_SZ + PT_G0] ! for restarting syscalls
1478 call sparc_breakpoint
1479 add %sp, STACKFRAME_SZ, %o0
1485 .globl kgdb_trap_low
1486 .type kgdb_trap_low,#function
1490 wr %l0, PSR_ET, %psr
1494 add %sp, STACKFRAME_SZ, %o0
1497 .size kgdb_trap_low,.-kgdb_trap_low
1501 .globl flush_patch_exception
1502 flush_patch_exception:
1503 FLUSH_ALL_KERNEL_WINDOWS;
1505 jmpl %o7 + 0xc, %g0 ! see asm-sparc/processor.h
1506 mov 1, %g1 ! signal EFAULT condition
1509 .globl kill_user_windows, kuw_patch1_7win
1511 kuw_patch1_7win: sll %o3, 6, %o3
1513 /* No matter how much overhead this routine has in the worst
1514 * case scenerio, it is several times better than taking the
1515 * traps with the old method of just doing flush_user_windows().
1518 ld [%g6 + TI_UWINMASK], %o0 ! get current umask
1519 orcc %g0, %o0, %g0 ! if no bits set, we are done
1520 be 3f ! nothing to do
1521 rd %psr, %o5 ! must clear interrupts
1522 or %o5, PSR_PIL, %o4 ! or else that could change
1523 wr %o4, 0x0, %psr ! the uwinmask state
1524 WRITE_PAUSE ! burn them cycles
1526 ld [%g6 + TI_UWINMASK], %o0 ! get consistent state
1527 orcc %g0, %o0, %g0 ! did an interrupt come in?
1528 be 4f ! yep, we are done
1529 rd %wim, %o3 ! get current wim
1530 srl %o3, 1, %o4 ! simulate a save
1532 sll %o3, 7, %o3 ! compute next wim
1533 or %o4, %o3, %o3 ! result
1534 andncc %o0, %o3, %o0 ! clean this bit in umask
1535 bne kuw_patch1 ! not done yet
1536 srl %o3, 1, %o4 ! begin another save simulation
1537 wr %o3, 0x0, %wim ! set the new wim
1538 st %g0, [%g6 + TI_UWINMASK] ! clear uwinmask
1540 wr %o5, 0x0, %psr ! re-enable interrupts
1541 WRITE_PAUSE ! burn baby burn
1544 st %g0, [%g6 + TI_W_SAVED] ! no windows saved
1547 .globl restore_current
1549 LOAD_CURRENT(g6, o0)
1554 #include <asm/pcic.h>
1557 .globl linux_trap_ipi15_pcic
1558 linux_trap_ipi15_pcic:
1563 * First deactivate NMI
1564 * or we cannot drop ET, cannot get window spill traps.
1565 * The busy loop is necessary because the PIO error
1566 * sometimes does not go away quickly and we trap again.
1568 sethi %hi(pcic_regs), %o1
1569 ld [%o1 + %lo(pcic_regs)], %o2
1571 ! Get pending status for printouts later.
1572 ld [%o2 + PCI_SYS_INT_PENDING], %o0
1574 mov PCI_SYS_INT_PENDING_CLEAR_ALL, %o1
1575 stb %o1, [%o2 + PCI_SYS_INT_PENDING_CLEAR]
1577 ld [%o2 + PCI_SYS_INT_PENDING], %o1
1578 andcc %o1, ((PCI_SYS_INT_PENDING_PIO|PCI_SYS_INT_PENDING_PCI)>>24), %g0
1582 or %l0, PSR_PIL, %l4
1585 wr %l4, PSR_ET, %psr
1589 add %sp, STACKFRAME_SZ, %o1 ! struct pt_regs *regs
1592 .globl pcic_nmi_trap_patch
1593 pcic_nmi_trap_patch:
1594 sethi %hi(linux_trap_ipi15_pcic), %l3
1595 jmpl %l3 + %lo(linux_trap_ipi15_pcic), %g0
1599 #endif /* CONFIG_PCI */
1603 save %sp, -0x40, %sp
1604 save %sp, -0x40, %sp
1605 save %sp, -0x40, %sp
1606 save %sp, -0x40, %sp
1607 save %sp, -0x40, %sp
1608 save %sp, -0x40, %sp
1609 save %sp, -0x40, %sp
1619 /* End of entry.S */