4 * Copyright (c) 2002 M. R. Brown
5 * Copyright (c) 2004 - 2009 Paul Mundt
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
11 #include <linux/kernel.h>
12 #include <linux/pci.h>
13 #include <linux/init.h>
14 #include <linux/dma-debug.h>
16 #include <linux/mutex.h>
19 * The PCI controller list.
21 static struct pci_channel *hose_head, **hose_tail = &hose_head;
23 static int pci_initialized;
25 static void __devinit pcibios_scanbus(struct pci_channel *hose)
27 static int next_busno;
30 /* Catch botched conversion attempts */
33 bus = pci_scan_bus(next_busno, hose->pci_ops, hose);
35 next_busno = bus->subordinate + 1;
36 /* Don't allow 8-bit bus number overflow inside the hose -
37 reserve some space for bridges. */
41 pci_bus_size_bridges(bus);
42 pci_bus_assign_resources(bus);
43 pci_enable_bridges(bus);
47 static DEFINE_MUTEX(pci_scan_mutex);
49 void __devinit register_pci_controller(struct pci_channel *hose)
51 if (request_resource(&iomem_resource, hose->mem_resource) < 0)
53 if (request_resource(&ioport_resource, hose->io_resource) < 0) {
54 release_resource(hose->mem_resource);
59 hose_tail = &hose->next;
62 * Do not panic here but later - this might hapen before console init.
64 if (!hose->io_map_base) {
66 "registering PCI controller with io_map_base unset\n");
70 * Scan the bus if it is register after the PCI subsystem
73 if (pci_initialized) {
74 mutex_lock(&pci_scan_mutex);
75 pcibios_scanbus(hose);
76 mutex_unlock(&pci_scan_mutex);
83 "Skipping PCI bus scan due to resource conflict\n");
86 static int __init pcibios_init(void)
88 struct pci_channel *hose;
90 /* Scan all of the recorded PCI controllers. */
91 for (hose = hose_head; hose; hose = hose->next)
92 pcibios_scanbus(hose);
94 pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
96 dma_debug_add_bus(&pci_bus_type);
102 subsys_initcall(pcibios_init);
104 static void pcibios_fixup_device_resources(struct pci_dev *dev,
107 /* Update device resources. */
108 struct pci_channel *hose = bus->sysdata;
109 unsigned long offset = 0;
112 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
113 if (!dev->resource[i].start)
115 if (dev->resource[i].flags & IORESOURCE_PCI_FIXED)
117 if (dev->resource[i].flags & IORESOURCE_IO)
118 offset = hose->io_offset;
119 else if (dev->resource[i].flags & IORESOURCE_MEM)
120 offset = hose->mem_offset;
122 dev->resource[i].start += offset;
123 dev->resource[i].end += offset;
128 * Called after each bus is probed, but before its children
131 void __devinit __weak pcibios_fixup_bus(struct pci_bus *bus)
133 struct pci_dev *dev = bus->self;
134 struct list_head *ln;
135 struct pci_channel *chan = bus->sysdata;
138 bus->resource[0] = chan->io_resource;
139 bus->resource[1] = chan->mem_resource;
142 for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
145 if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
146 pcibios_fixup_device_resources(dev, bus);
150 int pcibios_enable_device(struct pci_dev *dev, int mask)
156 pci_read_config_word(dev, PCI_COMMAND, &cmd);
158 for(idx=0; idx<6; idx++) {
159 if (!(mask & (1 << idx)))
161 r = &dev->resource[idx];
162 if (!r->start && r->end) {
163 printk(KERN_ERR "PCI: Device %s not available because "
164 "of resource collisions\n", pci_name(dev));
167 if (r->flags & IORESOURCE_IO)
168 cmd |= PCI_COMMAND_IO;
169 if (r->flags & IORESOURCE_MEM)
170 cmd |= PCI_COMMAND_MEMORY;
172 if (dev->resource[PCI_ROM_RESOURCE].start)
173 cmd |= PCI_COMMAND_MEMORY;
174 if (cmd != old_cmd) {
175 printk(KERN_INFO "PCI: Enabling device %s (%04x -> %04x)\n",
176 pci_name(dev), old_cmd, cmd);
177 pci_write_config_word(dev, PCI_COMMAND, cmd);
183 * If we set up a device for bus mastering, we need to check and set
184 * the latency timer as it may not be properly set.
186 static unsigned int pcibios_max_latency = 255;
188 void pcibios_set_master(struct pci_dev *dev)
191 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
193 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
194 else if (lat > pcibios_max_latency)
195 lat = pcibios_max_latency;
198 printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n",
200 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
203 void __init pcibios_update_irq(struct pci_dev *dev, int irq)
205 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);