git.oblomov.eu Git - linux-2.6/blob - drivers/net/wireless/p54/p54pci.c

   1
   2 /*
   3  * Linux device driver for PCI based Prism54
   4  *
   5  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
   6  * Copyright (c) 2008, Christian Lamparter <chunkeey@web.de>
   7  *
   8  * Based on the islsm (softmac prism54) driver, which is:
   9  * Copyright 2004-2006 Jean-Baptiste Note <jean-baptiste.note@m4x.org>, et al.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/pci.h>
  18 #include <linux/firmware.h>
  19 #include <linux/etherdevice.h>
  20 #include <linux/delay.h>
  21 #include <linux/completion.h>
  22 #include <net/mac80211.h>
  23
  24 #include "p54.h"
  25 #include "p54pci.h"
  26
  27 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  28 MODULE_DESCRIPTION("Prism54 PCI wireless driver");
  29 MODULE_LICENSE("GPL");
  30 MODULE_ALIAS("prism54pci");
  31 MODULE_FIRMWARE("isl3886pci");
  32
  33 static struct pci_device_id p54p_table[] __devinitdata = {
  34         /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
  35         { PCI_DEVICE(0x1260, 0x3890) },
  36         /* 3COM 3CRWE154G72 Wireless LAN adapter */
  37         { PCI_DEVICE(0x10b7, 0x6001) },
  38         /* Intersil PRISM Indigo Wireless LAN adapter */
  39         { PCI_DEVICE(0x1260, 0x3877) },
  40         /* Intersil PRISM Javelin/Xbow Wireless LAN adapter */
  41         { PCI_DEVICE(0x1260, 0x3886) },
  42         { },
  43 };
  44
  45 MODULE_DEVICE_TABLE(pci, p54p_table);
  46
  47 static int p54p_upload_firmware(struct ieee80211_hw *dev)
  48 {
  49         struct p54p_priv *priv = dev->priv;
  50         const struct firmware *fw_entry = NULL;
  51         __le32 reg;
  52         int err;
  53         __le32 *data;
  54         u32 remains, left, device_addr;
  55
  56         P54P_WRITE(int_enable, cpu_to_le32(0));
  57         P54P_READ(int_enable);
  58         udelay(10);
  59
  60         reg = P54P_READ(ctrl_stat);
  61         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
  62         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RAMBOOT);
  63         P54P_WRITE(ctrl_stat, reg);
  64         P54P_READ(ctrl_stat);
  65         udelay(10);
  66
  67         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
  68         P54P_WRITE(ctrl_stat, reg);
  69         wmb();
  70         udelay(10);
  71
  72         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
  73         P54P_WRITE(ctrl_stat, reg);
  74         wmb();
  75
  76         err = request_firmware(&fw_entry, "isl3886pci", &priv->pdev->dev);
  77         if (err) {
  78                 printk(KERN_ERR "%s (p54pci): cannot find firmware "
  79                        "(isl3886pci)\n", pci_name(priv->pdev));
  80                 err = request_firmware(&fw_entry, "isl3886", &priv->pdev->dev);
  81                 if (err)
  82                         return err;
  83         }
  84
  85         err = p54_parse_firmware(dev, fw_entry);
  86         if (err) {
  87                 release_firmware(fw_entry);
  88                 return err;
  89         }
  90
  91         data = (__le32 *) fw_entry->data;
  92         remains = fw_entry->size;
  93         device_addr = ISL38XX_DEV_FIRMWARE_ADDR;
  94         while (remains) {
  95                 u32 i = 0;
  96                 left = min((u32)0x1000, remains);
  97                 P54P_WRITE(direct_mem_base, cpu_to_le32(device_addr));
  98                 P54P_READ(int_enable);
  99
 100                 device_addr += 0x1000;
 101                 while (i < left) {
 102                         P54P_WRITE(direct_mem_win[i], *data++);
 103                         i += sizeof(u32);
 104                 }
 105
 106                 remains -= left;
 107                 P54P_READ(int_enable);
 108         }
 109
 110         release_firmware(fw_entry);
 111
 112         reg = P54P_READ(ctrl_stat);
 113         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_CLKRUN);
 114         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
 115         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RAMBOOT);
 116         P54P_WRITE(ctrl_stat, reg);
 117         P54P_READ(ctrl_stat);
 118         udelay(10);
 119
 120         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
 121         P54P_WRITE(ctrl_stat, reg);
 122         wmb();
 123         udelay(10);
 124
 125         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
 126         P54P_WRITE(ctrl_stat, reg);
 127         wmb();
 128         udelay(10);
 129
 130         /* wait for the firmware to boot properly */
 131         mdelay(100);
 132
 133         return 0;
 134 }
 135
 136 static void p54p_refill_rx_ring(struct ieee80211_hw *dev,
 137         int ring_index, struct p54p_desc *ring, u32 ring_limit,
 138         struct sk_buff **rx_buf)
 139 {
 140         struct p54p_priv *priv = dev->priv;
 141         struct p54p_ring_control *ring_control = priv->ring_control;
 142         u32 limit, idx, i;
 143
 144         idx = le32_to_cpu(ring_control->host_idx[ring_index]);
 145         limit = idx;
 146         limit -= le32_to_cpu(ring_control->device_idx[ring_index]);
 147         limit = ring_limit - limit;
 148
 149         i = idx % ring_limit;
 150         while (limit-- > 1) {
 151                 struct p54p_desc *desc = &ring[i];
 152
 153                 if (!desc->host_addr) {
 154                         struct sk_buff *skb;
 155                         dma_addr_t mapping;
 156                         skb = dev_alloc_skb(priv->common.rx_mtu + 32);
 157                         if (!skb)
 158                                 break;
 159
 160                         mapping = pci_map_single(priv->pdev,
 161                                                  skb_tail_pointer(skb),
 162                                                  priv->common.rx_mtu + 32,
 163                                                  PCI_DMA_FROMDEVICE);
 164                         desc->host_addr = cpu_to_le32(mapping);
 165                         desc->device_addr = 0;  // FIXME: necessary?
 166                         desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
 167                         desc->flags = 0;
 168                         rx_buf[i] = skb;
 169                 }
 170
 171                 i++;
 172                 idx++;
 173                 i %= ring_limit;
 174         }
 175
 176         wmb();
 177         ring_control->host_idx[ring_index] = cpu_to_le32(idx);
 178 }
 179
 180 static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index,
 181         int ring_index, struct p54p_desc *ring, u32 ring_limit,
 182         struct sk_buff **rx_buf)
 183 {
 184         struct p54p_priv *priv = dev->priv;
 185         struct p54p_ring_control *ring_control = priv->ring_control;
 186         struct p54p_desc *desc;
 187         u32 idx, i;
 188
 189         i = (*index) % ring_limit;
 190         (*index) = idx = le32_to_cpu(ring_control->device_idx[ring_index]);
 191         idx %= ring_limit;
 192         while (i != idx) {
 193                 u16 len;
 194                 struct sk_buff *skb;
 195                 desc = &ring[i];
 196                 len = le16_to_cpu(desc->len);
 197                 skb = rx_buf[i];
 198
 199                 if (!skb) {
 200                         i++;
 201                         i %= ring_limit;
 202                         continue;
 203                 }
 204                 skb_put(skb, len);
 205
 206                 if (p54_rx(dev, skb)) {
 207                         pci_unmap_single(priv->pdev,
 208                                          le32_to_cpu(desc->host_addr),
 209                                          priv->common.rx_mtu + 32,
 210                                          PCI_DMA_FROMDEVICE);
 211                         rx_buf[i] = NULL;
 212                         desc->host_addr = 0;
 213                 } else {
 214                         skb_trim(skb, 0);
 215                         desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
 216                 }
 217
 218                 i++;
 219                 i %= ring_limit;
 220         }
 221
 222         p54p_refill_rx_ring(dev, ring_index, ring, ring_limit, rx_buf);
 223 }
 224
 225 /* caller must hold priv->lock */
 226 static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index,
 227         int ring_index, struct p54p_desc *ring, u32 ring_limit,
 228         void **tx_buf)
 229 {
 230         struct p54p_priv *priv = dev->priv;
 231         struct p54p_ring_control *ring_control = priv->ring_control;
 232         struct p54p_desc *desc;
 233         u32 idx, i;
 234
 235         i = (*index) % ring_limit;
 236         (*index) = idx = le32_to_cpu(ring_control->device_idx[1]);
 237         idx %= ring_limit;
 238
 239         while (i != idx) {
 240                 desc = &ring[i];
 241                 p54_free_skb(dev, tx_buf[i]);
 242                 tx_buf[i] = NULL;
 243
 244                 pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
 245                                  le16_to_cpu(desc->len), PCI_DMA_TODEVICE);
 246
 247                 desc->host_addr = 0;
 248                 desc->device_addr = 0;
 249                 desc->len = 0;
 250                 desc->flags = 0;
 251
 252                 i++;
 253                 i %= ring_limit;
 254         }
 255 }
 256
 257 static void p54p_rx_tasklet(unsigned long dev_id)
 258 {
 259         struct ieee80211_hw *dev = (struct ieee80211_hw *)dev_id;
 260         struct p54p_priv *priv = dev->priv;
 261         struct p54p_ring_control *ring_control = priv->ring_control;
 262
 263         p54p_check_rx_ring(dev, &priv->rx_idx_mgmt, 2, ring_control->rx_mgmt,
 264                 ARRAY_SIZE(ring_control->rx_mgmt), priv->rx_buf_mgmt);
 265
 266         p54p_check_rx_ring(dev, &priv->rx_idx_data, 0, ring_control->rx_data,
 267                 ARRAY_SIZE(ring_control->rx_data), priv->rx_buf_data);
 268
 269         wmb();
 270         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 271 }
 272
 273 static irqreturn_t p54p_interrupt(int irq, void *dev_id)
 274 {
 275         struct ieee80211_hw *dev = dev_id;
 276         struct p54p_priv *priv = dev->priv;
 277         struct p54p_ring_control *ring_control = priv->ring_control;
 278         __le32 reg;
 279
 280         spin_lock(&priv->lock);
 281         reg = P54P_READ(int_ident);
 282         if (unlikely(reg == cpu_to_le32(0xFFFFFFFF))) {
 283                 spin_unlock(&priv->lock);
 284                 return IRQ_HANDLED;
 285         }
 286
 287         P54P_WRITE(int_ack, reg);
 288
 289         reg &= P54P_READ(int_enable);
 290
 291         if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE)) {
 292                 p54p_check_tx_ring(dev, &priv->tx_idx_mgmt,
 293                                    3, ring_control->tx_mgmt,
 294                                    ARRAY_SIZE(ring_control->tx_mgmt),
 295                                    priv->tx_buf_mgmt);
 296
 297                 p54p_check_tx_ring(dev, &priv->tx_idx_data,
 298                                    1, ring_control->tx_data,
 299                                    ARRAY_SIZE(ring_control->tx_data),
 300                                    priv->tx_buf_data);
 301
 302                 tasklet_schedule(&priv->rx_tasklet);
 303
 304         } else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT))
 305                 complete(&priv->boot_comp);
 306
 307         spin_unlock(&priv->lock);
 308
 309         return reg ? IRQ_HANDLED : IRQ_NONE;
 310 }
 311
 312 static void p54p_tx(struct ieee80211_hw *dev, struct sk_buff *skb,
 313                     int free_on_tx)
 314 {
 315         struct p54p_priv *priv = dev->priv;
 316         struct p54p_ring_control *ring_control = priv->ring_control;
 317         unsigned long flags;
 318         struct p54p_desc *desc;
 319         dma_addr_t mapping;
 320         u32 device_idx, idx, i;
 321
 322         spin_lock_irqsave(&priv->lock, flags);
 323
 324         device_idx = le32_to_cpu(ring_control->device_idx[1]);
 325         idx = le32_to_cpu(ring_control->host_idx[1]);
 326         i = idx % ARRAY_SIZE(ring_control->tx_data);
 327
 328         mapping = pci_map_single(priv->pdev, skb->data, skb->len,
 329                                  PCI_DMA_TODEVICE);
 330         desc = &ring_control->tx_data[i];
 331         desc->host_addr = cpu_to_le32(mapping);
 332         desc->device_addr = ((struct p54_hdr *)skb->data)->req_id;
 333         desc->len = cpu_to_le16(skb->len);
 334         desc->flags = 0;
 335
 336         wmb();
 337         ring_control->host_idx[1] = cpu_to_le32(idx + 1);
 338
 339         if (free_on_tx)
 340                 priv->tx_buf_data[i] = skb;
 341
 342         spin_unlock_irqrestore(&priv->lock, flags);
 343
 344         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 345         P54P_READ(dev_int);
 346
 347         /* FIXME: unlikely to happen because the device usually runs out of
 348            memory before we fill the ring up, but we can make it impossible */
 349         if (idx - device_idx > ARRAY_SIZE(ring_control->tx_data) - 2) {
 350                 p54_free_skb(dev, skb);
 351                 printk(KERN_INFO "%s: tx overflow.\n", wiphy_name(dev->wiphy));
 352         }
 353 }
 354
 355 static void p54p_stop(struct ieee80211_hw *dev)
 356 {
 357         struct p54p_priv *priv = dev->priv;
 358         struct p54p_ring_control *ring_control = priv->ring_control;
 359         unsigned int i;
 360         struct p54p_desc *desc;
 361
 362         tasklet_kill(&priv->rx_tasklet);
 363
 364         P54P_WRITE(int_enable, cpu_to_le32(0));
 365         P54P_READ(int_enable);
 366         udelay(10);
 367
 368         free_irq(priv->pdev->irq, dev);
 369
 370         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 371
 372         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_data); i++) {
 373                 desc = &ring_control->rx_data[i];
 374                 if (desc->host_addr)
 375                         pci_unmap_single(priv->pdev,
 376                                          le32_to_cpu(desc->host_addr),
 377                                          priv->common.rx_mtu + 32,
 378                                          PCI_DMA_FROMDEVICE);
 379                 kfree_skb(priv->rx_buf_data[i]);
 380                 priv->rx_buf_data[i] = NULL;
 381         }
 382
 383         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_mgmt); i++) {
 384                 desc = &ring_control->rx_mgmt[i];
 385                 if (desc->host_addr)
 386                         pci_unmap_single(priv->pdev,
 387                                          le32_to_cpu(desc->host_addr),
 388                                          priv->common.rx_mtu + 32,
 389                                          PCI_DMA_FROMDEVICE);
 390                 kfree_skb(priv->rx_buf_mgmt[i]);
 391                 priv->rx_buf_mgmt[i] = NULL;
 392         }
 393
 394         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_data); i++) {
 395                 desc = &ring_control->tx_data[i];
 396                 if (desc->host_addr)
 397                         pci_unmap_single(priv->pdev,
 398                                          le32_to_cpu(desc->host_addr),
 399                                          le16_to_cpu(desc->len),
 400                                          PCI_DMA_TODEVICE);
 401
 402                 p54_free_skb(dev, priv->tx_buf_data[i]);
 403                 priv->tx_buf_data[i] = NULL;
 404         }
 405
 406         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_mgmt); i++) {
 407                 desc = &ring_control->tx_mgmt[i];
 408                 if (desc->host_addr)
 409                         pci_unmap_single(priv->pdev,
 410                                          le32_to_cpu(desc->host_addr),
 411                                          le16_to_cpu(desc->len),
 412                                          PCI_DMA_TODEVICE);
 413
 414                 p54_free_skb(dev, priv->tx_buf_mgmt[i]);
 415                 priv->tx_buf_mgmt[i] = NULL;
 416         }
 417
 418         memset(ring_control, 0, sizeof(*ring_control));
 419 }
 420
 421 static int p54p_open(struct ieee80211_hw *dev)
 422 {
 423         struct p54p_priv *priv = dev->priv;
 424         int err;
 425
 426         init_completion(&priv->boot_comp);
 427         err = request_irq(priv->pdev->irq, &p54p_interrupt,
 428                           IRQF_SHARED, "p54pci", dev);
 429         if (err) {
 430                 printk(KERN_ERR "%s: failed to register IRQ handler\n",
 431                        wiphy_name(dev->wiphy));
 432                 return err;
 433         }
 434
 435         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
 436         err = p54p_upload_firmware(dev);
 437         if (err) {
 438                 free_irq(priv->pdev->irq, dev);
 439                 return err;
 440         }
 441         priv->rx_idx_data = priv->tx_idx_data = 0;
 442         priv->rx_idx_mgmt = priv->tx_idx_mgmt = 0;
 443
 444         p54p_refill_rx_ring(dev, 0, priv->ring_control->rx_data,
 445                 ARRAY_SIZE(priv->ring_control->rx_data), priv->rx_buf_data);
 446
 447         p54p_refill_rx_ring(dev, 2, priv->ring_control->rx_mgmt,
 448                 ARRAY_SIZE(priv->ring_control->rx_mgmt), priv->rx_buf_mgmt);
 449
 450         P54P_WRITE(ring_control_base, cpu_to_le32(priv->ring_control_dma));
 451         P54P_READ(ring_control_base);
 452         wmb();
 453         udelay(10);
 454
 455         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
 456         P54P_READ(int_enable);
 457         wmb();
 458         udelay(10);
 459
 460         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 461         P54P_READ(dev_int);
 462
 463         if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
 464                 printk(KERN_ERR "%s: Cannot boot firmware!\n",
 465                        wiphy_name(dev->wiphy));
 466                 p54p_stop(dev);
 467                 return -ETIMEDOUT;
 468         }
 469
 470         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
 471         P54P_READ(int_enable);
 472         wmb();
 473         udelay(10);
 474
 475         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 476         P54P_READ(dev_int);
 477         wmb();
 478         udelay(10);
 479
 480         return 0;
 481 }
 482
 483 static int __devinit p54p_probe(struct pci_dev *pdev,
 484                                 const struct pci_device_id *id)
 485 {
 486         struct p54p_priv *priv;
 487         struct ieee80211_hw *dev;
 488         unsigned long mem_addr, mem_len;
 489         int err;
 490
 491         err = pci_enable_device(pdev);
 492         if (err) {
 493                 printk(KERN_ERR "%s (p54pci): Cannot enable new PCI device\n",
 494                        pci_name(pdev));
 495                 return err;
 496         }
 497
 498         mem_addr = pci_resource_start(pdev, 0);
 499         mem_len = pci_resource_len(pdev, 0);
 500         if (mem_len < sizeof(struct p54p_csr)) {
 501                 printk(KERN_ERR "%s (p54pci): Too short PCI resources\n",
 502                        pci_name(pdev));
 503                 pci_disable_device(pdev);
 504                 return err;
 505         }
 506
 507         err = pci_request_regions(pdev, "p54pci");
 508         if (err) {
 509                 printk(KERN_ERR "%s (p54pci): Cannot obtain PCI resources\n",
 510                        pci_name(pdev));
 511                 return err;
 512         }
 513
 514         if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) ||
 515             pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
 516                 printk(KERN_ERR "%s (p54pci): No suitable DMA available\n",
 517                        pci_name(pdev));
 518                 goto err_free_reg;
 519         }
 520
 521         pci_set_master(pdev);
 522         pci_try_set_mwi(pdev);
 523
 524         pci_write_config_byte(pdev, 0x40, 0);
 525         pci_write_config_byte(pdev, 0x41, 0);
 526
 527         dev = p54_init_common(sizeof(*priv));
 528         if (!dev) {
 529                 printk(KERN_ERR "%s (p54pci): ieee80211 alloc failed\n",
 530                        pci_name(pdev));
 531                 err = -ENOMEM;
 532                 goto err_free_reg;
 533         }
 534
 535         priv = dev->priv;
 536         priv->pdev = pdev;
 537
 538         SET_IEEE80211_DEV(dev, &pdev->dev);
 539         pci_set_drvdata(pdev, dev);
 540
 541         priv->map = ioremap(mem_addr, mem_len);
 542         if (!priv->map) {
 543                 printk(KERN_ERR "%s (p54pci): Cannot map device memory\n",
 544                        pci_name(pdev));
 545                 err = -EINVAL;  // TODO: use a better error code?
 546                 goto err_free_dev;
 547         }
 548
 549         priv->ring_control = pci_alloc_consistent(pdev, sizeof(*priv->ring_control),
 550                                                   &priv->ring_control_dma);
 551         if (!priv->ring_control) {
 552                 printk(KERN_ERR "%s (p54pci): Cannot allocate rings\n",
 553                        pci_name(pdev));
 554                 err = -ENOMEM;
 555                 goto err_iounmap;
 556         }
 557         priv->common.open = p54p_open;
 558         priv->common.stop = p54p_stop;
 559         priv->common.tx = p54p_tx;
 560
 561         spin_lock_init(&priv->lock);
 562         tasklet_init(&priv->rx_tasklet, p54p_rx_tasklet, (unsigned long)dev);
 563
 564         err = p54p_open(dev);
 565         if (err)
 566                 goto err_free_common;
 567         err = p54_read_eeprom(dev);
 568         p54p_stop(dev);
 569         if (err)
 570                 goto err_free_common;
 571
 572         err = ieee80211_register_hw(dev);
 573         if (err) {
 574                 printk(KERN_ERR "%s (p54pci): Cannot register netdevice\n",
 575                        pci_name(pdev));
 576                 goto err_free_common;
 577         }
 578
 579         return 0;
 580
 581  err_free_common:
 582         p54_free_common(dev);
 583         pci_free_consistent(pdev, sizeof(*priv->ring_control),
 584                             priv->ring_control, priv->ring_control_dma);
 585
 586  err_iounmap:
 587         iounmap(priv->map);
 588
 589  err_free_dev:
 590         pci_set_drvdata(pdev, NULL);
 591         ieee80211_free_hw(dev);
 592
 593  err_free_reg:
 594         pci_release_regions(pdev);
 595         pci_disable_device(pdev);
 596         return err;
 597 }
 598
 599 static void __devexit p54p_remove(struct pci_dev *pdev)
 600 {
 601         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 602         struct p54p_priv *priv;
 603
 604         if (!dev)
 605                 return;
 606
 607         ieee80211_unregister_hw(dev);
 608         priv = dev->priv;
 609         pci_free_consistent(pdev, sizeof(*priv->ring_control),
 610                             priv->ring_control, priv->ring_control_dma);
 611         p54_free_common(dev);
 612         iounmap(priv->map);
 613         pci_release_regions(pdev);
 614         pci_disable_device(pdev);
 615         ieee80211_free_hw(dev);
 616 }
 617
 618 #ifdef CONFIG_PM
 619 static int p54p_suspend(struct pci_dev *pdev, pm_message_t state)
 620 {
 621         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 622         struct p54p_priv *priv = dev->priv;
 623
 624         if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
 625                 ieee80211_stop_queues(dev);
 626                 p54p_stop(dev);
 627         }
 628
 629         pci_save_state(pdev);
 630         pci_set_power_state(pdev, pci_choose_state(pdev, state));
 631         return 0;
 632 }
 633
 634 static int p54p_resume(struct pci_dev *pdev)
 635 {
 636         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 637         struct p54p_priv *priv = dev->priv;
 638
 639         pci_set_power_state(pdev, PCI_D0);
 640         pci_restore_state(pdev);
 641
 642         if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
 643                 p54p_open(dev);
 644                 ieee80211_wake_queues(dev);
 645         }
 646
 647         return 0;
 648 }
 649 #endif /* CONFIG_PM */
 650
 651 static struct pci_driver p54p_driver = {
 652         .name           = "p54pci",
 653         .id_table       = p54p_table,
 654         .probe          = p54p_probe,
 655         .remove         = __devexit_p(p54p_remove),
 656 #ifdef CONFIG_PM
 657         .suspend        = p54p_suspend,
 658         .resume         = p54p_resume,
 659 #endif /* CONFIG_PM */
 660 };
 661
 662 static int __init p54p_init(void)
 663 {
 664         return pci_register_driver(&p54p_driver);
 665 }
 666
 667 static void __exit p54p_exit(void)
 668 {
 669         pci_unregister_driver(&p54p_driver);
 670 }
 671
 672 module_init(p54p_init);
 673 module_exit(p54p_exit);