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   1 /*
   2  * MPC8349E-mITX-GP Device Tree Source
   3  *
   4  * Copyright 2007 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License as published by the
   8  * Free Software Foundation; either version 2 of the License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "MPC8349EMITXGP";
  16         compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 serial0 = &serial0;
  23                 serial1 = &serial1;
  24                 pci0 = &pci0;
  25         };
  26
  27         cpus {
  28                 #address-cells = <1>;
  29                 #size-cells = <0>;
  30
  31                 PowerPC,8349@0 {
  32                         device_type = "cpu";
  33                         reg = <0x0>;
  34                         d-cache-line-size = <32>;
  35                         i-cache-line-size = <32>;
  36                         d-cache-size = <32768>;
  37                         i-cache-size = <32768>;
  38                         timebase-frequency = <0>;       // from bootloader
  39                         bus-frequency = <0>;            // from bootloader
  40                         clock-frequency = <0>;          // from bootloader
  41                 };
  42         };
  43
  44         memory {
  45                 device_type = "memory";
  46                 reg = <0x00000000 0x10000000>;
  47         };
  48
  49         soc8349@e0000000 {
  50                 #address-cells = <1>;
  51                 #size-cells = <1>;
  52                 device_type = "soc";
  53                 compatible = "simple-bus";
  54                 ranges = <0x0 0xe0000000 0x00100000>;
  55                 reg = <0xe0000000 0x00000200>;
  56                 bus-frequency = <0>;                    // from bootloader
  57
  58                 wdt@200 {
  59                         device_type = "watchdog";
  60                         compatible = "mpc83xx_wdt";
  61                         reg = <0x200 0x100>;
  62                 };
  63
  64                 i2c@3000 {
  65                         #address-cells = <1>;
  66                         #size-cells = <0>;
  67                         cell-index = <0>;
  68                         compatible = "fsl-i2c";
  69                         reg = <0x3000 0x100>;
  70                         interrupts = <14 0x8>;
  71                         interrupt-parent = <&ipic>;
  72                         dfsrr;
  73                 };
  74
  75                 i2c@3100 {
  76                         #address-cells = <1>;
  77                         #size-cells = <0>;
  78                         cell-index = <1>;
  79                         compatible = "fsl-i2c";
  80                         reg = <0x3100 0x100>;
  81                         interrupts = <15 0x8>;
  82                         interrupt-parent = <&ipic>;
  83                         dfsrr;
  84
  85                         rtc@68 {
  86                                 compatible = "dallas,ds1339";
  87                                 reg = <0x68>;
  88                                 interrupts = <18 0x8>;
  89                                 interrupt-parent = <&ipic>;
  90                         };
  91                 };
  92
  93                 spi@7000 {
  94                         cell-index = <0>;
  95                         compatible = "fsl,spi";
  96                         reg = <0x7000 0x1000>;
  97                         interrupts = <16 0x8>;
  98                         interrupt-parent = <&ipic>;
  99                         mode = "cpu";
 100                 };
 101
 102                 dma@82a8 {
 103                         #address-cells = <1>;
 104                         #size-cells = <1>;
 105                         compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
 106                         reg = <0x82a8 4>;
 107                         ranges = <0 0x8100 0x1a8>;
 108                         interrupt-parent = <&ipic>;
 109                         interrupts = <71 8>;
 110                         cell-index = <0>;
 111                         dma-channel@0 {
 112                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
 113                                 reg = <0 0x80>;
 114                                 cell-index = <0>;
 115                                 interrupt-parent = <&ipic>;
 116                                 interrupts = <71 8>;
 117                         };
 118                         dma-channel@80 {
 119                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
 120                                 reg = <0x80 0x80>;
 121                                 cell-index = <1>;
 122                                 interrupt-parent = <&ipic>;
 123                                 interrupts = <71 8>;
 124                         };
 125                         dma-channel@100 {
 126                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
 127                                 reg = <0x100 0x80>;
 128                                 cell-index = <2>;
 129                                 interrupt-parent = <&ipic>;
 130                                 interrupts = <71 8>;
 131                         };
 132                         dma-channel@180 {
 133                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
 134                                 reg = <0x180 0x28>;
 135                                 cell-index = <3>;
 136                                 interrupt-parent = <&ipic>;
 137                                 interrupts = <71 8>;
 138                         };
 139                 };
 140
 141                 usb@23000 {
 142                         compatible = "fsl-usb2-dr";
 143                         reg = <0x23000 0x1000>;
 144                         #address-cells = <1>;
 145                         #size-cells = <0>;
 146                         interrupt-parent = <&ipic>;
 147                         interrupts = <38 0x8>;
 148                         dr_mode = "otg";
 149                         phy_type = "ulpi";
 150                 };
 151
 152                 mdio@24520 {
 153                         #address-cells = <1>;
 154                         #size-cells = <0>;
 155                         compatible = "fsl,gianfar-mdio";
 156                         reg = <0x24520 0x20>;
 157
 158                         /* Vitesse 8201 */
 159                         phy1c: ethernet-phy@1c {
 160                                 interrupt-parent = <&ipic>;
 161                                 interrupts = <18 0x8>;
 162                                 reg = <0x1c>;
 163                                 device_type = "ethernet-phy";
 164                         };
 165                         tbi0: tbi-phy@11 {
 166                                 reg = <0x11>;
 167                                 device_type = "tbi-phy";
 168                         };
 169                 };
 170
 171                 enet0: ethernet@24000 {
 172                         cell-index = <0>;
 173                         device_type = "network";
 174                         model = "TSEC";
 175                         compatible = "gianfar";
 176                         reg = <0x24000 0x1000>;
 177                         local-mac-address = [ 00 00 00 00 00 00 ];
 178                         interrupts = <32 0x8 33 0x8 34 0x8>;
 179                         interrupt-parent = <&ipic>;
 180                         tbi-handle = <&tbi0>;
 181                         phy-handle = <&phy1c>;
 182                         linux,network-index = <0>;
 183                 };
 184
 185                 serial0: serial@4500 {
 186                         cell-index = <0>;
 187                         device_type = "serial";
 188                         compatible = "ns16550";
 189                         reg = <0x4500 0x100>;
 190                         clock-frequency = <0>;          // from bootloader
 191                         interrupts = <9 0x8>;
 192                         interrupt-parent = <&ipic>;
 193                 };
 194
 195                 serial1: serial@4600 {
 196                         cell-index = <1>;
 197                         device_type = "serial";
 198                         compatible = "ns16550";
 199                         reg = <0x4600 0x100>;
 200                         clock-frequency = <0>;          // from bootloader
 201                         interrupts = <10 0x8>;
 202                         interrupt-parent = <&ipic>;
 203                 };
 204
 205                 crypto@30000 {
 206                         compatible = "fsl,sec2.0";
 207                         reg = <0x30000 0x10000>;
 208                         interrupts = <11 0x8>;
 209                         interrupt-parent = <&ipic>;
 210                         fsl,num-channels = <4>;
 211                         fsl,channel-fifo-len = <24>;
 212                         fsl,exec-units-mask = <0x7e>;
 213                         fsl,descriptor-types-mask = <0x01010ebf>;
 214                 };
 215
 216                 ipic: pic@700 {
 217                         interrupt-controller;
 218                         #address-cells = <0>;
 219                         #interrupt-cells = <2>;
 220                         reg = <0x700 0x100>;
 221                         device_type = "ipic";
 222                 };
 223         };
 224
 225         pci0: pci@e0008600 {
 226                 cell-index = <2>;
 227                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 228                 interrupt-map = <
 229                                 /* IDSEL 0x0F - PCI Slot */
 230                                 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
 231                                 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
 232                                  >;
 233                 interrupt-parent = <&ipic>;
 234                 interrupts = <67 0x8>;
 235                 bus-range = <0x1 0x1>;
 236                 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
 237                           0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
 238                           0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
 239                 clock-frequency = <66666666>;
 240                 #interrupt-cells = <1>;
 241                 #size-cells = <2>;
 242                 #address-cells = <3>;
 243                 reg = <0xe0008600 0x100         /* internal registers */
 244                        0xe0008380 0x8>;         /* config space access registers */
 245                 compatible = "fsl,mpc8349-pci";
 246                 device_type = "pci";
 247         };
 248 };