1 #include <linux/kernel.h>
2 #include <linux/init.h>
3 #include <linux/bitops.h>
4 #include <asm/processor.h>
8 static void __init init_rise(struct cpuinfo_x86 *c)
10 printk("CPU: Rise iDragon");
15 /* Unhide possibly hidden capability flags
16 The mp6 iDragon family don't have MSRs.
17 We switch on extra features with this cpuid weirdness: */
19 "movl $0x6363452a, %%eax\n\t"
20 "movl $0x3231206c, %%ecx\n\t"
21 "movl $0x2a32313a, %%edx\n\t"
23 "movl $0x63634523, %%eax\n\t"
24 "movl $0x32315f6c, %%ecx\n\t"
25 "movl $0x2333313a, %%edx\n\t"
26 "cpuid\n\t" : : : "eax", "ebx", "ecx", "edx"
28 set_bit(X86_FEATURE_CX8, c->x86_capability);
31 static struct cpu_dev rise_cpu_dev __initdata = {
33 .c_ident = { "RiseRiseRise" },
35 { .vendor = X86_VENDOR_RISE, .family = 5, .model_names =
47 int __init rise_init_cpu(void)
49 cpu_devs[X86_VENDOR_RISE] = &rise_cpu_dev;
53 //early_arch_initcall(rise_init_cpu);