2 * linux/arch/h8300/kernel/timer/itu.c
4 * Yoshinori Sato <ysato@users.sourcefoge.jp>
10 #include <linux/errno.h>
11 #include <linux/sched.h>
12 #include <linux/kernel.h>
13 #include <linux/param.h>
14 #include <linux/string.h>
16 #include <linux/interrupt.h>
17 #include <linux/init.h>
18 #include <linux/timex.h>
20 #include <asm/segment.h>
23 #include <asm/regs306x.h>
25 #if CONFIG_H8300_ITU_CH == 0
26 #define ITUBASE 0xffff64
28 #elif CONFIG_H8300_ITU_CH == 1
29 #define ITUBASE 0xffff6e
31 #elif CONFIG_H8300_ITU_CH == 2
32 #define ITUBASE 0xffff78
34 #elif CONFIG_H8300_ITU_CH == 3
35 #define ITUBASE 0xffff82
37 #elif CONFIG_H8300_ITU_CH == 4
38 #define ITUBASE 0xffff92
41 #error Unknown timer channel.
52 static irqreturn_t timer_interrupt(int irq, void *dev_id)
55 ctrl_bclr(IMFA, ITUBASE + TSR);
59 static struct irqaction itu_irq = {
61 .handler = timer_interrupt,
62 .flags = IRQF_DISABLED | IRQF_TIMER,
63 .mask = CPU_MASK_NONE,
66 static const int __initdata divide_rate[] = {1, 2, 4, 8};
68 void __init h8300_timer_setup(void)
73 calc_param(cnt, div, divide_rate, 0x10000);
75 setup_irq(ITUIRQ, &itu_irq);
79 ctrl_outb(CCLR0 | div, ITUBASE + TCR);
80 ctrl_outb(0x01, ITUBASE + TIER);
81 ctrl_outw(cnt, ITUBASE + GRA);
82 ctrl_bset(CONFIG_H8300_ITU_CH, TSTR);