[ARM] 4436/1: PXA: move low IRQ initialization code to pxa_init_irq_low()
[linux-2.6] / arch / sparc / kernel / sun4m_smp.c
1 /* sun4m_smp.c: Sparc SUN4M SMP support.
2  *
3  * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
4  */
5
6 #include <asm/head.h>
7
8 #include <linux/kernel.h>
9 #include <linux/sched.h>
10 #include <linux/threads.h>
11 #include <linux/smp.h>
12 #include <linux/interrupt.h>
13 #include <linux/kernel_stat.h>
14 #include <linux/init.h>
15 #include <linux/spinlock.h>
16 #include <linux/mm.h>
17 #include <linux/swap.h>
18 #include <linux/profile.h>
19 #include <asm/cacheflush.h>
20 #include <asm/tlbflush.h>
21 #include <asm/irq_regs.h>
22
23 #include <asm/ptrace.h>
24 #include <asm/atomic.h>
25
26 #include <asm/delay.h>
27 #include <asm/irq.h>
28 #include <asm/page.h>
29 #include <asm/pgalloc.h>
30 #include <asm/pgtable.h>
31 #include <asm/oplib.h>
32 #include <asm/cpudata.h>
33
34 #define IRQ_RESCHEDULE          13
35 #define IRQ_STOP_CPU            14
36 #define IRQ_CROSS_CALL          15
37
38 extern ctxd_t *srmmu_ctx_table_phys;
39
40 extern void calibrate_delay(void);
41
42 extern volatile unsigned long cpu_callin_map[NR_CPUS];
43 extern unsigned char boot_cpu_id;
44
45 extern cpumask_t smp_commenced_mask;
46
47 extern int __smp4m_processor_id(void);
48
49 /*#define SMP_DEBUG*/
50
51 #ifdef SMP_DEBUG
52 #define SMP_PRINTK(x)   printk x
53 #else
54 #define SMP_PRINTK(x)
55 #endif
56
57 static inline unsigned long swap(volatile unsigned long *ptr, unsigned long val)
58 {
59         __asm__ __volatile__("swap [%1], %0\n\t" :
60                              "=&r" (val), "=&r" (ptr) :
61                              "0" (val), "1" (ptr));
62         return val;
63 }
64
65 static void smp_setup_percpu_timer(void);
66 extern void cpu_probe(void);
67
68 void __cpuinit smp4m_callin(void)
69 {
70         int cpuid = hard_smp_processor_id();
71
72         local_flush_cache_all();
73         local_flush_tlb_all();
74
75         /* Get our local ticker going. */
76         smp_setup_percpu_timer();
77
78         calibrate_delay();
79         smp_store_cpu_info(cpuid);
80
81         local_flush_cache_all();
82         local_flush_tlb_all();
83
84         /*
85          * Unblock the master CPU _only_ when the scheduler state
86          * of all secondary CPUs will be up-to-date, so after
87          * the SMP initialization the master will be just allowed
88          * to call the scheduler code.
89          */
90         /* Allow master to continue. */
91         swap(&cpu_callin_map[cpuid], 1);
92
93         /* XXX: What's up with all the flushes? */
94         local_flush_cache_all();
95         local_flush_tlb_all();
96         
97         cpu_probe();
98
99         /* Fix idle thread fields. */
100         __asm__ __volatile__("ld [%0], %%g6\n\t"
101                              : : "r" (&current_set[cpuid])
102                              : "memory" /* paranoid */);
103
104         /* Attach to the address space of init_task. */
105         atomic_inc(&init_mm.mm_count);
106         current->active_mm = &init_mm;
107
108         while (!cpu_isset(cpuid, smp_commenced_mask))
109                 mb();
110
111         local_irq_enable();
112
113         cpu_set(cpuid, cpu_online_map);
114 }
115
116 /*
117  *      Cycle through the processors asking the PROM to start each one.
118  */
119  
120 extern struct linux_prom_registers smp_penguin_ctable;
121 extern unsigned long trapbase_cpu1[];
122 extern unsigned long trapbase_cpu2[];
123 extern unsigned long trapbase_cpu3[];
124
125 void __init smp4m_boot_cpus(void)
126 {
127         smp_setup_percpu_timer();
128         local_flush_cache_all();
129 }
130
131 int __cpuinit smp4m_boot_one_cpu(int i)
132 {
133         extern unsigned long sun4m_cpu_startup;
134         unsigned long *entry = &sun4m_cpu_startup;
135         struct task_struct *p;
136         int timeout;
137         int cpu_node;
138
139         cpu_find_by_mid(i, &cpu_node);
140
141         /* Cook up an idler for this guy. */
142         p = fork_idle(i);
143         current_set[i] = task_thread_info(p);
144         /* See trampoline.S for details... */
145         entry += ((i-1) * 3);
146
147         /*
148          * Initialize the contexts table
149          * Since the call to prom_startcpu() trashes the structure,
150          * we need to re-initialize it for each cpu
151          */
152         smp_penguin_ctable.which_io = 0;
153         smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
154         smp_penguin_ctable.reg_size = 0;
155
156         /* whirrr, whirrr, whirrrrrrrrr... */
157         printk("Starting CPU %d at %p\n", i, entry);
158         local_flush_cache_all();
159         prom_startcpu(cpu_node,
160                       &smp_penguin_ctable, 0, (char *)entry);
161
162         /* wheee... it's going... */
163         for(timeout = 0; timeout < 10000; timeout++) {
164                 if(cpu_callin_map[i])
165                         break;
166                 udelay(200);
167         }
168
169         if (!(cpu_callin_map[i])) {
170                 printk("Processor %d is stuck.\n", i);
171                 return -ENODEV;
172         }
173
174         local_flush_cache_all();
175         return 0;
176 }
177
178 void __init smp4m_smp_done(void)
179 {
180         int i, first;
181         int *prev;
182
183         /* setup cpu list for irq rotation */
184         first = 0;
185         prev = &first;
186         for (i = 0; i < NR_CPUS; i++) {
187                 if (cpu_online(i)) {
188                         *prev = i;
189                         prev = &cpu_data(i).next;
190                 }
191         }
192         *prev = first;
193         local_flush_cache_all();
194
195         /* Free unneeded trap tables */
196         if (!cpu_isset(1, cpu_present_map)) {
197                 ClearPageReserved(virt_to_page(trapbase_cpu1));
198                 init_page_count(virt_to_page(trapbase_cpu1));
199                 free_page((unsigned long)trapbase_cpu1);
200                 totalram_pages++;
201                 num_physpages++;
202         }
203         if (!cpu_isset(2, cpu_present_map)) {
204                 ClearPageReserved(virt_to_page(trapbase_cpu2));
205                 init_page_count(virt_to_page(trapbase_cpu2));
206                 free_page((unsigned long)trapbase_cpu2);
207                 totalram_pages++;
208                 num_physpages++;
209         }
210         if (!cpu_isset(3, cpu_present_map)) {
211                 ClearPageReserved(virt_to_page(trapbase_cpu3));
212                 init_page_count(virt_to_page(trapbase_cpu3));
213                 free_page((unsigned long)trapbase_cpu3);
214                 totalram_pages++;
215                 num_physpages++;
216         }
217
218         /* Ok, they are spinning and ready to go. */
219 }
220
221 /* At each hardware IRQ, we get this called to forward IRQ reception
222  * to the next processor.  The caller must disable the IRQ level being
223  * serviced globally so that there are no double interrupts received.
224  *
225  * XXX See sparc64 irq.c.
226  */
227 void smp4m_irq_rotate(int cpu)
228 {
229         int next = cpu_data(cpu).next;
230         if (next != cpu)
231                 set_irq_udt(next);
232 }
233
234 /* Cross calls, in order to work efficiently and atomically do all
235  * the message passing work themselves, only stopcpu and reschedule
236  * messages come through here.
237  */
238 void smp4m_message_pass(int target, int msg, unsigned long data, int wait)
239 {
240         static unsigned long smp_cpu_in_msg[NR_CPUS];
241         cpumask_t mask;
242         int me = smp_processor_id();
243         int irq, i;
244
245         if(msg == MSG_RESCHEDULE) {
246                 irq = IRQ_RESCHEDULE;
247
248                 if(smp_cpu_in_msg[me])
249                         return;
250         } else if(msg == MSG_STOP_CPU) {
251                 irq = IRQ_STOP_CPU;
252         } else {
253                 goto barf;
254         }
255
256         smp_cpu_in_msg[me]++;
257         if(target == MSG_ALL_BUT_SELF || target == MSG_ALL) {
258                 mask = cpu_online_map;
259                 if(target == MSG_ALL_BUT_SELF)
260                         cpu_clear(me, mask);
261                 for(i = 0; i < 4; i++) {
262                         if (cpu_isset(i, mask))
263                                 set_cpu_int(i, irq);
264                 }
265         } else {
266                 set_cpu_int(target, irq);
267         }
268         smp_cpu_in_msg[me]--;
269
270         return;
271 barf:
272         printk("Yeeee, trying to send SMP msg(%d) on cpu %d\n", msg, me);
273         panic("Bogon SMP message pass.");
274 }
275
276 static struct smp_funcall {
277         smpfunc_t func;
278         unsigned long arg1;
279         unsigned long arg2;
280         unsigned long arg3;
281         unsigned long arg4;
282         unsigned long arg5;
283         unsigned long processors_in[SUN4M_NCPUS];  /* Set when ipi entered. */
284         unsigned long processors_out[SUN4M_NCPUS]; /* Set when ipi exited. */
285 } ccall_info;
286
287 static DEFINE_SPINLOCK(cross_call_lock);
288
289 /* Cross calls must be serialized, at least currently. */
290 void smp4m_cross_call(smpfunc_t func, unsigned long arg1, unsigned long arg2,
291                     unsigned long arg3, unsigned long arg4, unsigned long arg5)
292 {
293                 register int ncpus = SUN4M_NCPUS;
294                 unsigned long flags;
295
296                 spin_lock_irqsave(&cross_call_lock, flags);
297
298                 /* Init function glue. */
299                 ccall_info.func = func;
300                 ccall_info.arg1 = arg1;
301                 ccall_info.arg2 = arg2;
302                 ccall_info.arg3 = arg3;
303                 ccall_info.arg4 = arg4;
304                 ccall_info.arg5 = arg5;
305
306                 /* Init receive/complete mapping, plus fire the IPI's off. */
307                 {
308                         cpumask_t mask = cpu_online_map;
309                         register int i;
310
311                         cpu_clear(smp_processor_id(), mask);
312                         for(i = 0; i < ncpus; i++) {
313                                 if (cpu_isset(i, mask)) {
314                                         ccall_info.processors_in[i] = 0;
315                                         ccall_info.processors_out[i] = 0;
316                                         set_cpu_int(i, IRQ_CROSS_CALL);
317                                 } else {
318                                         ccall_info.processors_in[i] = 1;
319                                         ccall_info.processors_out[i] = 1;
320                                 }
321                         }
322                 }
323
324                 {
325                         register int i;
326
327                         i = 0;
328                         do {
329                                 while(!ccall_info.processors_in[i])
330                                         barrier();
331                         } while(++i < ncpus);
332
333                         i = 0;
334                         do {
335                                 while(!ccall_info.processors_out[i])
336                                         barrier();
337                         } while(++i < ncpus);
338                 }
339
340                 spin_unlock_irqrestore(&cross_call_lock, flags);
341 }
342
343 /* Running cross calls. */
344 void smp4m_cross_call_irq(void)
345 {
346         int i = smp_processor_id();
347
348         ccall_info.processors_in[i] = 1;
349         ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
350                         ccall_info.arg4, ccall_info.arg5);
351         ccall_info.processors_out[i] = 1;
352 }
353
354 void smp4m_percpu_timer_interrupt(struct pt_regs *regs)
355 {
356         struct pt_regs *old_regs;
357         int cpu = smp_processor_id();
358
359         old_regs = set_irq_regs(regs);
360
361         clear_profile_irq(cpu);
362
363         profile_tick(CPU_PROFILING);
364
365         if(!--prof_counter(cpu)) {
366                 int user = user_mode(regs);
367
368                 irq_enter();
369                 update_process_times(user);
370                 irq_exit();
371
372                 prof_counter(cpu) = prof_multiplier(cpu);
373         }
374         set_irq_regs(old_regs);
375 }
376
377 extern unsigned int lvl14_resolution;
378
379 static void __init smp_setup_percpu_timer(void)
380 {
381         int cpu = smp_processor_id();
382
383         prof_counter(cpu) = prof_multiplier(cpu) = 1;
384         load_profile_irq(cpu, lvl14_resolution);
385
386         if(cpu == boot_cpu_id)
387                 enable_pil_irq(14);
388 }
389
390 void __init smp4m_blackbox_id(unsigned *addr)
391 {
392         int rd = *addr & 0x3e000000;
393         int rs1 = rd >> 11;
394         
395         addr[0] = 0x81580000 | rd;              /* rd %tbr, reg */
396         addr[1] = 0x8130200c | rd | rs1;        /* srl reg, 0xc, reg */
397         addr[2] = 0x80082003 | rd | rs1;        /* and reg, 3, reg */
398 }
399
400 void __init smp4m_blackbox_current(unsigned *addr)
401 {
402         int rd = *addr & 0x3e000000;
403         int rs1 = rd >> 11;
404         
405         addr[0] = 0x81580000 | rd;              /* rd %tbr, reg */
406         addr[2] = 0x8130200a | rd | rs1;        /* srl reg, 0xa, reg */
407         addr[4] = 0x8008200c | rd | rs1;        /* and reg, 0xc, reg */
408 }
409
410 void __init sun4m_init_smp(void)
411 {
412         BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4m_blackbox_id);
413         BTFIXUPSET_BLACKBOX(load_current, smp4m_blackbox_current);
414         BTFIXUPSET_CALL(smp_cross_call, smp4m_cross_call, BTFIXUPCALL_NORM);
415         BTFIXUPSET_CALL(smp_message_pass, smp4m_message_pass, BTFIXUPCALL_NORM);
416         BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4m_processor_id, BTFIXUPCALL_NORM);
417 }