2 * arch/sh/drivers/dma/dma-api.c
4 * SuperH-specific DMA management API
6 * Copyright (C) 2003, 2004, 2005 Paul Mundt
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/interrupt.h>
15 #include <linux/spinlock.h>
16 #include <linux/proc_fs.h>
17 #include <linux/list.h>
18 #include <linux/platform_device.h>
21 DEFINE_SPINLOCK(dma_spin_lock);
22 static LIST_HEAD(registered_dmac_list);
25 * A brief note about the reasons for this API as it stands.
27 * For starters, the old ISA DMA API didn't work for us for a number of
28 * reasons, for one, the vast majority of channels on the SH DMAC are
29 * dual-address mode only, and both the new and the old DMA APIs are after the
30 * concept of managing a DMA buffer, which doesn't overly fit this model very
31 * well. In addition to which, the new API is largely geared at IOMMUs and
32 * GARTs, and doesn't even support the channel notion very well.
34 * The other thing that's a marginal issue, is the sheer number of random DMA
35 * engines that are present (ie, in boards like the Dreamcast), some of which
36 * cascade off of the SH DMAC, and others do not. As such, there was a real
37 * need for a scalable subsystem that could deal with both single and
38 * dual-address mode usage, in addition to interoperating with cascaded DMACs.
40 * There really isn't any reason why this needs to be SH specific, though I'm
41 * not aware of too many other processors (with the exception of some MIPS)
42 * that have the same concept of a dual address mode, or any real desire to
43 * actually make use of the DMAC even if such a subsystem were exposed
46 * The idea for this was derived from the ARM port, which acted as an excellent
47 * reference when trying to address these issues.
49 * It should also be noted that the decision to add Yet Another DMA API(tm) to
50 * the kernel wasn't made easily, and was only decided upon after conferring
51 * with jejb with regards to the state of the old and new APIs as they applied
52 * to these circumstances. Philip Blundell was also a great help in figuring
53 * out some single-address mode DMA semantics that were otherwise rather
57 struct dma_info *get_dma_info(unsigned int chan)
59 struct dma_info *info;
60 unsigned int total = 0;
63 * Look for each DMAC's range to determine who the owner of
66 list_for_each_entry(info, ®istered_dmac_list, list) {
67 total += info->nr_channels;
77 static unsigned int get_nr_channels(void)
79 struct dma_info *info;
82 if (unlikely(list_empty(®istered_dmac_list)))
85 list_for_each_entry(info, ®istered_dmac_list, list)
86 nr += info->nr_channels;
91 struct dma_channel *get_dma_channel(unsigned int chan)
93 struct dma_info *info = get_dma_info(chan);
96 return ERR_PTR(-EINVAL);
98 return info->channels + chan;
101 int get_dma_residue(unsigned int chan)
103 struct dma_info *info = get_dma_info(chan);
104 struct dma_channel *channel = &info->channels[chan];
106 if (info->ops->get_residue)
107 return info->ops->get_residue(channel);
112 int request_dma(unsigned int chan, const char *dev_id)
114 struct dma_info *info = get_dma_info(chan);
115 struct dma_channel *channel = &info->channels[chan];
119 if (!info->ops || chan >= MAX_DMA_CHANNELS) {
124 atomic_set(&channel->busy, 1);
126 strlcpy(channel->dev_id, dev_id, sizeof(channel->dev_id));
130 if (info->ops->request)
131 return info->ops->request(channel);
136 void free_dma(unsigned int chan)
138 struct dma_info *info = get_dma_info(chan);
139 struct dma_channel *channel = &info->channels[chan];
142 info->ops->free(channel);
144 atomic_set(&channel->busy, 0);
147 void dma_wait_for_completion(unsigned int chan)
149 struct dma_info *info = get_dma_info(chan);
150 struct dma_channel *channel = &info->channels[chan];
152 if (channel->flags & DMA_TEI_CAPABLE) {
153 wait_event(channel->wait_queue,
154 (info->ops->get_residue(channel) == 0));
158 while (info->ops->get_residue(channel))
162 void dma_configure_channel(unsigned int chan, unsigned long flags)
164 struct dma_info *info = get_dma_info(chan);
165 struct dma_channel *channel = &info->channels[chan];
167 if (info->ops->configure)
168 info->ops->configure(channel, flags);
171 int dma_xfer(unsigned int chan, unsigned long from,
172 unsigned long to, size_t size, unsigned int mode)
174 struct dma_info *info = get_dma_info(chan);
175 struct dma_channel *channel = &info->channels[chan];
179 channel->count = size;
180 channel->mode = mode;
182 return info->ops->xfer(channel);
185 #ifdef CONFIG_PROC_FS
186 static int dma_read_proc(char *buf, char **start, off_t off,
187 int len, int *eof, void *data)
189 struct dma_info *info;
192 if (list_empty(®istered_dmac_list))
196 * Iterate over each registered DMAC
198 list_for_each_entry(info, ®istered_dmac_list, list) {
202 * Iterate over each channel
204 for (i = 0; i < info->nr_channels; i++) {
205 struct dma_channel *channel = info->channels + i;
207 if (!(channel->flags & DMA_CONFIGURED))
210 p += sprintf(p, "%2d: %14s %s\n", i,
211 info->name, channel->dev_id);
220 int register_dmac(struct dma_info *info)
222 unsigned int total_channels, i;
224 INIT_LIST_HEAD(&info->list);
226 printk(KERN_INFO "DMA: Registering %s handler (%d channel%s).\n",
227 info->name, info->nr_channels,
228 info->nr_channels > 1 ? "s" : "");
230 BUG_ON((info->flags & DMAC_CHANNELS_CONFIGURED) && !info->channels);
232 info->pdev = platform_device_register_simple((char *)info->name, -1,
234 if (IS_ERR(info->pdev))
235 return PTR_ERR(info->pdev);
238 * Don't touch pre-configured channels
240 if (!(info->flags & DMAC_CHANNELS_CONFIGURED)) {
243 size = sizeof(struct dma_channel) * info->nr_channels;
245 info->channels = kmalloc(size, GFP_KERNEL);
249 memset(info->channels, 0, size);
252 total_channels = get_nr_channels();
253 for (i = 0; i < info->nr_channels; i++) {
254 struct dma_channel *chan = info->channels + i;
257 chan->vchan = i + total_channels;
259 memcpy(chan->dev_id, "Unused", 7);
261 if (info->flags & DMAC_CHANNELS_TEI_CAPABLE)
262 chan->flags |= DMA_TEI_CAPABLE;
264 init_MUTEX(&chan->sem);
265 init_waitqueue_head(&chan->wait_queue);
267 dma_create_sysfs_files(chan, info);
270 list_add(&info->list, ®istered_dmac_list);
275 void unregister_dmac(struct dma_info *info)
279 for (i = 0; i < info->nr_channels; i++)
280 dma_remove_sysfs_files(info->channels + i, info);
282 if (!(info->flags & DMAC_CHANNELS_CONFIGURED))
283 kfree(info->channels);
285 list_del(&info->list);
286 platform_device_unregister(info->pdev);
289 static int __init dma_api_init(void)
291 printk("DMA: Registering DMA API.\n");
293 #ifdef CONFIG_PROC_FS
294 create_proc_read_entry("dma", 0, 0, dma_read_proc, 0);
300 subsys_initcall(dma_api_init);
302 MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>");
303 MODULE_DESCRIPTION("DMA API for SuperH");
304 MODULE_LICENSE("GPL");
306 EXPORT_SYMBOL(request_dma);
307 EXPORT_SYMBOL(free_dma);
308 EXPORT_SYMBOL(register_dmac);
309 EXPORT_SYMBOL(get_dma_residue);
310 EXPORT_SYMBOL(get_dma_info);
311 EXPORT_SYMBOL(get_dma_channel);
312 EXPORT_SYMBOL(dma_xfer);
313 EXPORT_SYMBOL(dma_wait_for_completion);
314 EXPORT_SYMBOL(dma_configure_channel);