2 Conexant 22702 DVB OFDM demodulator driver
5 Alps TDMB7 DVB OFDM demodulator driver
7 Copyright (C) 2001-2002 Convergence Integrated Media GmbH
8 Holger Waechtler <holger@convergence.de>
10 Copyright (C) 2004 Steven Toth <stoth@hauppauge.com>
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software
24 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 #include <linux/kernel.h>
29 #include <linux/init.h>
30 #include <linux/module.h>
31 #include <linux/string.h>
32 #include <linux/slab.h>
33 #include <linux/delay.h>
34 #include "dvb_frontend.h"
39 struct cx22702_state {
41 struct i2c_adapter* i2c;
43 struct dvb_frontend_ops ops;
45 /* configuration settings */
46 const struct cx22702_config* config;
48 struct dvb_frontend frontend;
50 /* previous uncorrected block counter */
55 #define dprintk if (debug) printk
57 /* Register values to initialise the demod */
58 static u8 init_tab [] = {
59 0x00, 0x00, /* Stop aquisition */
86 static int cx22702_writereg (struct cx22702_state* state, u8 reg, u8 data)
89 u8 buf [] = { reg, data };
90 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
92 ret = i2c_transfer(state->i2c, &msg, 1);
95 printk("%s: writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
96 __FUNCTION__, reg, data, ret);
98 return (ret != 1) ? -1 : 0;
101 static u8 cx22702_readreg (struct cx22702_state* state, u8 reg)
107 struct i2c_msg msg [] = {
108 { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
109 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
111 ret = i2c_transfer(state->i2c, msg, 2);
114 printk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);
119 static int cx22702_set_inversion (struct cx22702_state *state, int inversion)
129 val = cx22702_readreg (state, 0x0C);
130 return cx22702_writereg (state, 0x0C, val | 0x01);
133 val = cx22702_readreg (state, 0x0C);
134 return cx22702_writereg (state, 0x0C, val & 0xfe);
143 /* Retrieve the demod settings */
144 static int cx22702_get_tps (struct cx22702_state *state, struct dvb_ofdm_parameters *p)
148 /* Make sure the TPS regs are valid */
149 if (!(cx22702_readreg(state, 0x0A) & 0x20))
152 val = cx22702_readreg (state, 0x01);
153 switch( (val&0x18)>>3) {
154 case 0: p->constellation = QPSK; break;
155 case 1: p->constellation = QAM_16; break;
156 case 2: p->constellation = QAM_64; break;
159 case 0: p->hierarchy_information = HIERARCHY_NONE; break;
160 case 1: p->hierarchy_information = HIERARCHY_1; break;
161 case 2: p->hierarchy_information = HIERARCHY_2; break;
162 case 3: p->hierarchy_information = HIERARCHY_4; break;
166 val = cx22702_readreg (state, 0x02);
167 switch( (val&0x38)>>3 ) {
168 case 0: p->code_rate_HP = FEC_1_2; break;
169 case 1: p->code_rate_HP = FEC_2_3; break;
170 case 2: p->code_rate_HP = FEC_3_4; break;
171 case 3: p->code_rate_HP = FEC_5_6; break;
172 case 4: p->code_rate_HP = FEC_7_8; break;
175 case 0: p->code_rate_LP = FEC_1_2; break;
176 case 1: p->code_rate_LP = FEC_2_3; break;
177 case 2: p->code_rate_LP = FEC_3_4; break;
178 case 3: p->code_rate_LP = FEC_5_6; break;
179 case 4: p->code_rate_LP = FEC_7_8; break;
183 val = cx22702_readreg (state, 0x03);
184 switch( (val&0x0c)>>2 ) {
185 case 0: p->guard_interval = GUARD_INTERVAL_1_32; break;
186 case 1: p->guard_interval = GUARD_INTERVAL_1_16; break;
187 case 2: p->guard_interval = GUARD_INTERVAL_1_8; break;
188 case 3: p->guard_interval = GUARD_INTERVAL_1_4; break;
191 case 0: p->transmission_mode = TRANSMISSION_MODE_2K; break;
192 case 1: p->transmission_mode = TRANSMISSION_MODE_8K; break;
198 static int cx22702_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
200 struct cx22702_state* state = fe->demodulator_priv;
201 dprintk ("%s(%d)\n", __FUNCTION__, enable);
203 return cx22702_writereg (state, 0x0D, cx22702_readreg(state, 0x0D) & 0xfe);
205 return cx22702_writereg (state, 0x0D, cx22702_readreg(state, 0x0D) | 1);
208 /* Talk to the demod, set the FEC, GUARD, QAM settings etc */
209 static int cx22702_set_tps (struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
212 struct cx22702_state* state = fe->demodulator_priv;
215 cx22702_i2c_gate_ctrl(fe, 1);
216 if (state->config->pll_set) {
217 state->config->pll_set(fe, p);
218 } else if (state->config->pll_desc) {
220 struct i2c_msg msg = { .addr = state->config->pll_address,
221 .buf = pllbuf, .len = 4 };
222 dvb_pll_configure(state->config->pll_desc, pllbuf,
224 p->u.ofdm.bandwidth);
225 i2c_transfer(state->i2c, &msg, 1);
229 cx22702_i2c_gate_ctrl(fe, 0);
232 cx22702_set_inversion (state, p->inversion);
235 switch(p->u.ofdm.bandwidth) {
236 case BANDWIDTH_6_MHZ:
237 cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xcf) | 0x20 );
239 case BANDWIDTH_7_MHZ:
240 cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xcf) | 0x10 );
242 case BANDWIDTH_8_MHZ:
243 cx22702_writereg(state, 0x0C, cx22702_readreg(state, 0x0C) &0xcf );
246 dprintk ("%s: invalid bandwidth\n",__FUNCTION__);
251 p->u.ofdm.code_rate_LP = FEC_AUTO; //temp hack as manual not working
253 /* use auto configuration? */
254 if((p->u.ofdm.hierarchy_information==HIERARCHY_AUTO) ||
255 (p->u.ofdm.constellation==QAM_AUTO) ||
256 (p->u.ofdm.code_rate_HP==FEC_AUTO) ||
257 (p->u.ofdm.code_rate_LP==FEC_AUTO) ||
258 (p->u.ofdm.guard_interval==GUARD_INTERVAL_AUTO) ||
259 (p->u.ofdm.transmission_mode==TRANSMISSION_MODE_AUTO) ) {
261 /* TPS Source - use hardware driven values */
262 cx22702_writereg(state, 0x06, 0x10);
263 cx22702_writereg(state, 0x07, 0x9);
264 cx22702_writereg(state, 0x08, 0xC1);
265 cx22702_writereg(state, 0x0B, cx22702_readreg(state, 0x0B) & 0xfc );
266 cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40 );
267 cx22702_writereg(state, 0x00, 0x01); /* Begin aquisition */
268 dprintk("%s: Autodetecting\n",__FUNCTION__);
272 /* manually programmed values */
274 switch(p->u.ofdm.constellation) {
275 case QPSK: val = (val&0xe7); break;
276 case QAM_16: val = (val&0xe7)|0x08; break;
277 case QAM_64: val = (val&0xe7)|0x10; break;
279 dprintk ("%s: invalid constellation\n",__FUNCTION__);
282 switch(p->u.ofdm.hierarchy_information) {
283 case HIERARCHY_NONE: val = (val&0xf8); break;
284 case HIERARCHY_1: val = (val&0xf8)|1; break;
285 case HIERARCHY_2: val = (val&0xf8)|2; break;
286 case HIERARCHY_4: val = (val&0xf8)|3; break;
288 dprintk ("%s: invalid hierarchy\n",__FUNCTION__);
291 cx22702_writereg (state, 0x06, val);
294 switch(p->u.ofdm.code_rate_HP) {
296 case FEC_1_2: val = (val&0xc7); break;
297 case FEC_2_3: val = (val&0xc7)|0x08; break;
298 case FEC_3_4: val = (val&0xc7)|0x10; break;
299 case FEC_5_6: val = (val&0xc7)|0x18; break;
300 case FEC_7_8: val = (val&0xc7)|0x20; break;
302 dprintk ("%s: invalid code_rate_HP\n",__FUNCTION__);
305 switch(p->u.ofdm.code_rate_LP) {
307 case FEC_1_2: val = (val&0xf8); break;
308 case FEC_2_3: val = (val&0xf8)|1; break;
309 case FEC_3_4: val = (val&0xf8)|2; break;
310 case FEC_5_6: val = (val&0xf8)|3; break;
311 case FEC_7_8: val = (val&0xf8)|4; break;
313 dprintk ("%s: invalid code_rate_LP\n",__FUNCTION__);
316 cx22702_writereg (state, 0x07, val);
319 switch(p->u.ofdm.guard_interval) {
320 case GUARD_INTERVAL_1_32: val = (val&0xf3); break;
321 case GUARD_INTERVAL_1_16: val = (val&0xf3)|0x04; break;
322 case GUARD_INTERVAL_1_8: val = (val&0xf3)|0x08; break;
323 case GUARD_INTERVAL_1_4: val = (val&0xf3)|0x0c; break;
325 dprintk ("%s: invalid guard_interval\n",__FUNCTION__);
328 switch(p->u.ofdm.transmission_mode) {
329 case TRANSMISSION_MODE_2K: val = (val&0xfc); break;
330 case TRANSMISSION_MODE_8K: val = (val&0xfc)|1; break;
332 dprintk ("%s: invalid transmission_mode\n",__FUNCTION__);
335 cx22702_writereg(state, 0x08, val);
336 cx22702_writereg(state, 0x0B, (cx22702_readreg(state, 0x0B) & 0xfc) | 0x02 );
337 cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40 );
339 /* Begin channel aquisition */
340 cx22702_writereg(state, 0x00, 0x01);
345 /* Reset the demod hardware and reset all of the configuration registers
346 to a default state. */
347 static int cx22702_init (struct dvb_frontend* fe)
350 struct cx22702_state* state = fe->demodulator_priv;
352 cx22702_writereg (state, 0x00, 0x02);
356 for (i=0; i<sizeof(init_tab); i+=2)
357 cx22702_writereg (state, init_tab[i], init_tab[i+1]);
359 cx22702_writereg (state, 0xf8, (state->config->output_mode << 1) & 0x02);
362 if (state->config->pll_init)
363 state->config->pll_init(fe);
365 cx22702_i2c_gate_ctrl(fe, 0);
370 static int cx22702_read_status(struct dvb_frontend* fe, fe_status_t* status)
372 struct cx22702_state* state = fe->demodulator_priv;
378 reg0A = cx22702_readreg (state, 0x0A);
379 reg23 = cx22702_readreg (state, 0x23);
381 dprintk ("%s: status demod=0x%02x agc=0x%02x\n"
382 ,__FUNCTION__,reg0A,reg23);
385 *status |= FE_HAS_LOCK;
386 *status |= FE_HAS_VITERBI;
387 *status |= FE_HAS_SYNC;
391 *status |= FE_HAS_CARRIER;
394 *status |= FE_HAS_SIGNAL;
399 static int cx22702_read_ber(struct dvb_frontend* fe, u32* ber)
401 struct cx22702_state* state = fe->demodulator_priv;
403 if(cx22702_readreg (state, 0xE4) & 0x02) {
404 /* Realtime statistics */
405 *ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 7
406 | (cx22702_readreg (state, 0xDF)&0x7F);
408 /* Averagtine statistics */
409 *ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 7
410 | cx22702_readreg (state, 0xDF);
416 static int cx22702_read_signal_strength(struct dvb_frontend* fe, u16* signal_strength)
418 struct cx22702_state* state = fe->demodulator_priv;
420 *signal_strength = cx22702_readreg (state, 0x23);
425 static int cx22702_read_snr(struct dvb_frontend* fe, u16* snr)
427 struct cx22702_state* state = fe->demodulator_priv;
430 if(cx22702_readreg (state, 0xE4) & 0x02) {
431 /* Realtime statistics */
432 rs_ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 7
433 | (cx22702_readreg (state, 0xDF)& 0x7F);
435 /* Averagine statistics */
436 rs_ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 8
437 | cx22702_readreg (state, 0xDF);
444 static int cx22702_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
446 struct cx22702_state* state = fe->demodulator_priv;
450 /* RS Uncorrectable Packet Count then reset */
451 _ucblocks = cx22702_readreg (state, 0xE3);
452 if (state->prevUCBlocks < _ucblocks)
453 *ucblocks = (_ucblocks - state->prevUCBlocks);
455 *ucblocks = state->prevUCBlocks - _ucblocks;
456 state->prevUCBlocks = _ucblocks;
461 static int cx22702_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
463 struct cx22702_state* state = fe->demodulator_priv;
465 u8 reg0C = cx22702_readreg (state, 0x0C);
467 p->inversion = reg0C & 0x1 ? INVERSION_ON : INVERSION_OFF;
468 return cx22702_get_tps (state, &p->u.ofdm);
471 static int cx22702_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune)
473 tune->min_delay_ms = 1000;
477 static void cx22702_release(struct dvb_frontend* fe)
479 struct cx22702_state* state = fe->demodulator_priv;
483 static struct dvb_frontend_ops cx22702_ops;
485 struct dvb_frontend* cx22702_attach(const struct cx22702_config* config,
486 struct i2c_adapter* i2c)
488 struct cx22702_state* state = NULL;
490 /* allocate memory for the internal state */
491 state = kmalloc(sizeof(struct cx22702_state), GFP_KERNEL);
495 /* setup the state */
496 state->config = config;
498 memcpy(&state->ops, &cx22702_ops, sizeof(struct dvb_frontend_ops));
499 state->prevUCBlocks = 0;
501 /* check if the demod is there */
502 if (cx22702_readreg(state, 0x1f) != 0x3)
505 /* create dvb_frontend */
506 state->frontend.ops = &state->ops;
507 state->frontend.demodulator_priv = state;
508 return &state->frontend;
515 static struct dvb_frontend_ops cx22702_ops = {
518 .name = "Conexant CX22702 DVB-T",
520 .frequency_min = 177000000,
521 .frequency_max = 858000000,
522 .frequency_stepsize = 166666,
523 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
524 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
525 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
526 FE_CAN_HIERARCHY_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
527 FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER
530 .release = cx22702_release,
532 .init = cx22702_init,
534 .set_frontend = cx22702_set_tps,
535 .get_frontend = cx22702_get_frontend,
536 .get_tune_settings = cx22702_get_tune_settings,
538 .read_status = cx22702_read_status,
539 .read_ber = cx22702_read_ber,
540 .read_signal_strength = cx22702_read_signal_strength,
541 .read_snr = cx22702_read_snr,
542 .read_ucblocks = cx22702_read_ucblocks,
543 .i2c_gate_ctrl = cx22702_i2c_gate_ctrl,
546 module_param(debug, int, 0644);
547 MODULE_PARM_DESC(debug, "Enable verbose debug messages");
549 MODULE_DESCRIPTION("Conexant CX22702 DVB-T Demodulator driver");
550 MODULE_AUTHOR("Steven Toth");
551 MODULE_LICENSE("GPL");
553 EXPORT_SYMBOL(cx22702_attach);