Pull bsp-removal into release branch
[linux-2.6] / include / asm-arm / arch-lh7a40x / entry-macro.S
1 /*
2  * include/asm-arm/arch-lh7a40x/entry-macro.S
3  *
4  * Low-level IRQ helper macros for LH7A40x platforms
5  *
6  * This file is licensed under  the terms of the GNU General Public
7  * License version 2. This program is licensed "as is" without any
8  * warranty of any kind, whether express or implied.
9  */
10 #include <asm/hardware.h>
11 #include <asm/arch/irqs.h>
12
13 # if defined (CONFIG_ARCH_LH7A400) && defined (CONFIG_ARCH_LH7A404)
14 #  error "LH7A400 and LH7A404 are mutually exclusive"
15 # endif
16
17 # if defined (CONFIG_ARCH_LH7A400)
18                 .macro  disable_fiq
19                 .endm
20
21                 .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
22                 mov     \irqnr, #0
23                 mov     \base, #io_p2v(0x80000000)      @ APB registers
24                 ldr     \irqstat, [\base, #0x500]       @ PIC INTSR
25
26 1001:           movs    \irqstat, \irqstat, lsr #1      @ Shift into carry
27                 bcs     1008f                           @ Bit set; irq found
28                 add     \irqnr, \irqnr, #1
29                 bne     1001b                           @ Until no bits
30                 b       1009f                           @ Nothing?  Hmm.
31 1008:           movs    \irqstat, #1                    @ Force !Z
32 1009:
33                .endm
34
35 #elif defined(CONFIG_ARCH_LH7A404)
36
37                 .macro  disable_fiq
38                 .endm
39
40                 .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
41                 mov     \irqnr, #0                      @ VIC1 irq base
42                 mov     \base, #io_p2v(0x80000000)      @ APB registers
43                 add     \base, \base, #0x8000
44                 ldr     \tmp, [\base, #0x0030]          @ VIC1_VECTADDR
45                 tst     \tmp, #VA_VECTORED              @ Direct vectored
46                 bne     1002f
47                 tst     \tmp, #VA_VIC1DEFAULT           @ Default vectored VIC1
48                 ldrne   \irqstat, [\base, #0]           @ VIC1_IRQSTATUS
49                 bne     1001f
50                 add     \base, \base, #(0xa000 - 0x8000)
51                 ldr     \tmp, [\base, #0x0030]          @ VIC2_VECTADDR
52                 tst     \tmp, #VA_VECTORED              @ Direct vectored
53                 bne     1002f
54                 ldr     \irqstat, [\base, #0]           @ VIC2_IRQSTATUS
55                 mov     \irqnr, #32                     @ VIC2 irq base
56
57 1001:           movs    \irqstat, \irqstat, lsr #1      @ Shift into carry
58                 bcs     1008f                           @ Bit set; irq found
59                 add     \irqnr, \irqnr, #1
60                 bne     1001b                           @ Until no bits
61                 b       1009f                           @ Nothing?  Hmm.
62 1002:           and     \irqnr, \tmp, #0x3f             @ Mask for valid bits
63 1008:           movs    \irqstat, #1                    @ Force !Z
64                 str     \tmp, [\base, #0x0030]          @ Clear vector
65 1009:
66                .endm
67 #endif
68
69