2 * linux/drivers/serial/pxa.c
4 * Based on drivers/serial/8250.c by Russell King.
6 * Author: Nicolas Pitre
7 * Created: Feb 20, 2003
8 * Copyright: (C) 2003 Monta Vista Software, Inc.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * Note 1: This driver is made separate from the already too overloaded
16 * 8250.c because it needs some kirks of its own and that'll make it
17 * easier to add DMA support.
19 * Note 2: I'm too sick of device allocation policies for serial ports.
20 * If someone else wants to request an "official" allocation of major/minor
21 * for this driver please be my guest. And don't forget that new hardware
22 * to come from Intel might have more than 3 or 4 of those UARTs. Let's
23 * hope for a better port registration and dynamic device allocation scheme
24 * with the serial core maintainer satisfaction to appear soon.
27 #include <linux/config.h>
29 #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
33 #include <linux/module.h>
34 #include <linux/ioport.h>
35 #include <linux/init.h>
36 #include <linux/console.h>
37 #include <linux/sysrq.h>
38 #include <linux/serial_reg.h>
39 #include <linux/circ_buf.h>
40 #include <linux/delay.h>
41 #include <linux/interrupt.h>
42 #include <linux/device.h>
43 #include <linux/tty.h>
44 #include <linux/tty_flip.h>
45 #include <linux/serial_core.h>
48 #include <asm/hardware.h>
50 #include <asm/arch/pxa-regs.h>
53 struct uart_pxa_port {
54 struct uart_port port;
58 unsigned int lsr_break_flag;
63 static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
66 return readl(up->port.membase + offset);
69 static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
72 writel(value, up->port.membase + offset);
75 static void serial_pxa_enable_ms(struct uart_port *port)
77 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
79 up->ier |= UART_IER_MSI;
80 serial_out(up, UART_IER, up->ier);
83 static void serial_pxa_stop_tx(struct uart_port *port)
85 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
87 if (up->ier & UART_IER_THRI) {
88 up->ier &= ~UART_IER_THRI;
89 serial_out(up, UART_IER, up->ier);
93 static void serial_pxa_stop_rx(struct uart_port *port)
95 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
97 up->ier &= ~UART_IER_RLSI;
98 up->port.read_status_mask &= ~UART_LSR_DR;
99 serial_out(up, UART_IER, up->ier);
103 receive_chars(struct uart_pxa_port *up, int *status, struct pt_regs *regs)
105 struct tty_struct *tty = up->port.info->tty;
106 unsigned int ch, flag;
110 if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
111 if (tty->low_latency)
112 tty_flip_buffer_push(tty);
114 * If this failed then we will throw away the
115 * bytes but must do so to clear interrupts
118 ch = serial_in(up, UART_RX);
120 up->port.icount.rx++;
122 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
123 UART_LSR_FE | UART_LSR_OE))) {
125 * For statistics only
127 if (*status & UART_LSR_BI) {
128 *status &= ~(UART_LSR_FE | UART_LSR_PE);
129 up->port.icount.brk++;
131 * We do the SysRQ and SAK checking
132 * here because otherwise the break
133 * may get masked by ignore_status_mask
134 * or read_status_mask.
136 if (uart_handle_break(&up->port))
138 } else if (*status & UART_LSR_PE)
139 up->port.icount.parity++;
140 else if (*status & UART_LSR_FE)
141 up->port.icount.frame++;
142 if (*status & UART_LSR_OE)
143 up->port.icount.overrun++;
146 * Mask off conditions which should be ignored.
148 *status &= up->port.read_status_mask;
150 #ifdef CONFIG_SERIAL_PXA_CONSOLE
151 if (up->port.line == up->port.cons->index) {
152 /* Recover the break flag from console xmit */
153 *status |= up->lsr_break_flag;
154 up->lsr_break_flag = 0;
157 if (*status & UART_LSR_BI) {
159 } else if (*status & UART_LSR_PE)
161 else if (*status & UART_LSR_FE)
165 if (uart_handle_sysrq_char(&up->port, ch, regs))
168 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
171 *status = serial_in(up, UART_LSR);
172 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
173 tty_flip_buffer_push(tty);
176 static void transmit_chars(struct uart_pxa_port *up)
178 struct circ_buf *xmit = &up->port.info->xmit;
181 if (up->port.x_char) {
182 serial_out(up, UART_TX, up->port.x_char);
183 up->port.icount.tx++;
187 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
188 serial_pxa_stop_tx(&up->port);
192 count = up->port.fifosize / 2;
194 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
195 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
196 up->port.icount.tx++;
197 if (uart_circ_empty(xmit))
199 } while (--count > 0);
201 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
202 uart_write_wakeup(&up->port);
205 if (uart_circ_empty(xmit))
206 serial_pxa_stop_tx(&up->port);
209 static void serial_pxa_start_tx(struct uart_port *port)
211 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
213 if (!(up->ier & UART_IER_THRI)) {
214 up->ier |= UART_IER_THRI;
215 serial_out(up, UART_IER, up->ier);
219 static inline void check_modem_status(struct uart_pxa_port *up)
223 status = serial_in(up, UART_MSR);
225 if ((status & UART_MSR_ANY_DELTA) == 0)
228 if (status & UART_MSR_TERI)
229 up->port.icount.rng++;
230 if (status & UART_MSR_DDSR)
231 up->port.icount.dsr++;
232 if (status & UART_MSR_DDCD)
233 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
234 if (status & UART_MSR_DCTS)
235 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
237 wake_up_interruptible(&up->port.info->delta_msr_wait);
241 * This handles the interrupt from one port.
243 static inline irqreturn_t
244 serial_pxa_irq(int irq, void *dev_id, struct pt_regs *regs)
246 struct uart_pxa_port *up = (struct uart_pxa_port *)dev_id;
247 unsigned int iir, lsr;
249 iir = serial_in(up, UART_IIR);
250 if (iir & UART_IIR_NO_INT)
252 lsr = serial_in(up, UART_LSR);
253 if (lsr & UART_LSR_DR)
254 receive_chars(up, &lsr, regs);
255 check_modem_status(up);
256 if (lsr & UART_LSR_THRE)
261 static unsigned int serial_pxa_tx_empty(struct uart_port *port)
263 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
267 spin_lock_irqsave(&up->port.lock, flags);
268 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
269 spin_unlock_irqrestore(&up->port.lock, flags);
274 static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
276 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
277 unsigned char status;
280 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
281 status = serial_in(up, UART_MSR);
284 if (status & UART_MSR_DCD)
286 if (status & UART_MSR_RI)
288 if (status & UART_MSR_DSR)
290 if (status & UART_MSR_CTS)
295 static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
297 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
298 unsigned char mcr = 0;
300 if (mctrl & TIOCM_RTS)
302 if (mctrl & TIOCM_DTR)
304 if (mctrl & TIOCM_OUT1)
305 mcr |= UART_MCR_OUT1;
306 if (mctrl & TIOCM_OUT2)
307 mcr |= UART_MCR_OUT2;
308 if (mctrl & TIOCM_LOOP)
309 mcr |= UART_MCR_LOOP;
313 serial_out(up, UART_MCR, mcr);
316 static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
318 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
321 spin_lock_irqsave(&up->port.lock, flags);
322 if (break_state == -1)
323 up->lcr |= UART_LCR_SBC;
325 up->lcr &= ~UART_LCR_SBC;
326 serial_out(up, UART_LCR, up->lcr);
327 spin_unlock_irqrestore(&up->port.lock, flags);
331 static void serial_pxa_dma_init(struct pxa_uart *up)
334 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up);
338 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up);
341 up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL);
347 pxa_free_dma(up->txdma);
349 pxa_free_dma(up->rxdma);
355 static int serial_pxa_startup(struct uart_port *port)
357 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
366 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
371 * Clear the FIFO buffers and disable them.
372 * (they will be reenabled in set_termios())
374 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
375 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
376 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
377 serial_out(up, UART_FCR, 0);
380 * Clear the interrupt registers.
382 (void) serial_in(up, UART_LSR);
383 (void) serial_in(up, UART_RX);
384 (void) serial_in(up, UART_IIR);
385 (void) serial_in(up, UART_MSR);
388 * Now, initialize the UART
390 serial_out(up, UART_LCR, UART_LCR_WLEN8);
392 spin_lock_irqsave(&up->port.lock, flags);
393 up->port.mctrl |= TIOCM_OUT2;
394 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
395 spin_unlock_irqrestore(&up->port.lock, flags);
398 * Finally, enable interrupts. Note: Modem status interrupts
399 * are set via set_termios(), which will be occuring imminently
400 * anyway, so we don't enable them here.
402 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
403 serial_out(up, UART_IER, up->ier);
406 * And clear the interrupt registers again for luck.
408 (void) serial_in(up, UART_LSR);
409 (void) serial_in(up, UART_RX);
410 (void) serial_in(up, UART_IIR);
411 (void) serial_in(up, UART_MSR);
416 static void serial_pxa_shutdown(struct uart_port *port)
418 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
421 free_irq(up->port.irq, up);
424 * Disable interrupts from this port
427 serial_out(up, UART_IER, 0);
429 spin_lock_irqsave(&up->port.lock, flags);
430 up->port.mctrl &= ~TIOCM_OUT2;
431 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
432 spin_unlock_irqrestore(&up->port.lock, flags);
435 * Disable break condition and FIFOs
437 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
438 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
439 UART_FCR_CLEAR_RCVR |
440 UART_FCR_CLEAR_XMIT);
441 serial_out(up, UART_FCR, 0);
445 serial_pxa_set_termios(struct uart_port *port, struct termios *termios,
448 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
449 unsigned char cval, fcr = 0;
451 unsigned int baud, quot;
453 switch (termios->c_cflag & CSIZE) {
455 cval = UART_LCR_WLEN5;
458 cval = UART_LCR_WLEN6;
461 cval = UART_LCR_WLEN7;
465 cval = UART_LCR_WLEN8;
469 if (termios->c_cflag & CSTOPB)
470 cval |= UART_LCR_STOP;
471 if (termios->c_cflag & PARENB)
472 cval |= UART_LCR_PARITY;
473 if (!(termios->c_cflag & PARODD))
474 cval |= UART_LCR_EPAR;
477 * Ask the core to calculate the divisor for us.
479 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
480 quot = uart_get_divisor(port, baud);
482 if ((up->port.uartclk / quot) < (2400 * 16))
483 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
485 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
488 * Ok, we're now changing the port state. Do it with
489 * interrupts disabled.
491 spin_lock_irqsave(&up->port.lock, flags);
494 * Ensure the port will be enabled.
495 * This is required especially for serial console.
500 * Update the per-port timeout.
502 uart_update_timeout(port, termios->c_cflag, quot);
504 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
505 if (termios->c_iflag & INPCK)
506 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
507 if (termios->c_iflag & (BRKINT | PARMRK))
508 up->port.read_status_mask |= UART_LSR_BI;
511 * Characters to ignore
513 up->port.ignore_status_mask = 0;
514 if (termios->c_iflag & IGNPAR)
515 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
516 if (termios->c_iflag & IGNBRK) {
517 up->port.ignore_status_mask |= UART_LSR_BI;
519 * If we're ignoring parity and break indicators,
520 * ignore overruns too (for real raw support).
522 if (termios->c_iflag & IGNPAR)
523 up->port.ignore_status_mask |= UART_LSR_OE;
527 * ignore all characters if CREAD is not set
529 if ((termios->c_cflag & CREAD) == 0)
530 up->port.ignore_status_mask |= UART_LSR_DR;
533 * CTS flow control flag and modem status interrupts
535 up->ier &= ~UART_IER_MSI;
536 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
537 up->ier |= UART_IER_MSI;
539 serial_out(up, UART_IER, up->ier);
541 serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
542 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
543 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
544 serial_out(up, UART_LCR, cval); /* reset DLAB */
545 up->lcr = cval; /* Save LCR */
546 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
547 serial_out(up, UART_FCR, fcr);
548 spin_unlock_irqrestore(&up->port.lock, flags);
552 serial_pxa_pm(struct uart_port *port, unsigned int state,
553 unsigned int oldstate)
555 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
556 pxa_set_cken(up->cken, !state);
561 static void serial_pxa_release_port(struct uart_port *port)
565 static int serial_pxa_request_port(struct uart_port *port)
570 static void serial_pxa_config_port(struct uart_port *port, int flags)
572 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
573 up->port.type = PORT_PXA;
577 serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
579 /* we don't want the core code to modify any port params */
584 serial_pxa_type(struct uart_port *port)
586 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
590 #ifdef CONFIG_SERIAL_PXA_CONSOLE
592 static struct uart_pxa_port serial_pxa_ports[];
593 static struct uart_driver serial_pxa_reg;
595 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
598 * Wait for transmitter & holding register to empty
600 static inline void wait_for_xmitr(struct uart_pxa_port *up)
602 unsigned int status, tmout = 10000;
604 /* Wait up to 10ms for the character(s) to be sent. */
606 status = serial_in(up, UART_LSR);
608 if (status & UART_LSR_BI)
609 up->lsr_break_flag = UART_LSR_BI;
614 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
616 /* Wait up to 1s for flow control if necessary */
617 if (up->port.flags & UPF_CONS_FLOW) {
620 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
626 * Print a string to the serial port trying not to disturb
627 * any possible real use of the port...
629 * The console_lock must be held when we get here.
632 serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
634 struct uart_pxa_port *up = &serial_pxa_ports[co->index];
639 * First save the UER then disable the interrupts
641 ier = serial_in(up, UART_IER);
642 serial_out(up, UART_IER, UART_IER_UUE);
645 * Now, do each character
647 for (i = 0; i < count; i++, s++) {
651 * Send the character out.
652 * If a LF, also do CR...
654 serial_out(up, UART_TX, *s);
657 serial_out(up, UART_TX, 13);
662 * Finally, wait for transmitter to become empty
663 * and restore the IER
666 serial_out(up, UART_IER, ier);
670 serial_pxa_console_setup(struct console *co, char *options)
672 struct uart_pxa_port *up;
678 if (co->index == -1 || co->index >= serial_pxa_reg.nr)
680 up = &serial_pxa_ports[co->index];
683 uart_parse_options(options, &baud, &parity, &bits, &flow);
685 return uart_set_options(&up->port, co, baud, parity, bits, flow);
688 static struct console serial_pxa_console = {
690 .write = serial_pxa_console_write,
691 .device = uart_console_device,
692 .setup = serial_pxa_console_setup,
693 .flags = CON_PRINTBUFFER,
695 .data = &serial_pxa_reg,
699 serial_pxa_console_init(void)
701 register_console(&serial_pxa_console);
705 console_initcall(serial_pxa_console_init);
707 #define PXA_CONSOLE &serial_pxa_console
709 #define PXA_CONSOLE NULL
712 struct uart_ops serial_pxa_pops = {
713 .tx_empty = serial_pxa_tx_empty,
714 .set_mctrl = serial_pxa_set_mctrl,
715 .get_mctrl = serial_pxa_get_mctrl,
716 .stop_tx = serial_pxa_stop_tx,
717 .start_tx = serial_pxa_start_tx,
718 .stop_rx = serial_pxa_stop_rx,
719 .enable_ms = serial_pxa_enable_ms,
720 .break_ctl = serial_pxa_break_ctl,
721 .startup = serial_pxa_startup,
722 .shutdown = serial_pxa_shutdown,
723 .set_termios = serial_pxa_set_termios,
725 .type = serial_pxa_type,
726 .release_port = serial_pxa_release_port,
727 .request_port = serial_pxa_request_port,
728 .config_port = serial_pxa_config_port,
729 .verify_port = serial_pxa_verify_port,
732 static struct uart_pxa_port serial_pxa_ports[] = {
735 .cken = CKEN6_FFUART,
739 .membase = (void *)&FFUART,
740 .mapbase = __PREG(FFUART),
742 .uartclk = 921600 * 16,
744 .ops = &serial_pxa_pops,
749 .cken = CKEN7_BTUART,
753 .membase = (void *)&BTUART,
754 .mapbase = __PREG(BTUART),
756 .uartclk = 921600 * 16,
758 .ops = &serial_pxa_pops,
763 .cken = CKEN5_STUART,
767 .membase = (void *)&STUART,
768 .mapbase = __PREG(STUART),
770 .uartclk = 921600 * 16,
772 .ops = &serial_pxa_pops,
778 static struct uart_driver serial_pxa_reg = {
779 .owner = THIS_MODULE,
780 .driver_name = "PXA serial",
781 .devfs_name = "tts/",
785 .nr = ARRAY_SIZE(serial_pxa_ports),
789 static int serial_pxa_suspend(struct device *_dev, pm_message_t state, u32 level)
791 struct uart_pxa_port *sport = dev_get_drvdata(_dev);
793 if (sport && level == SUSPEND_DISABLE)
794 uart_suspend_port(&serial_pxa_reg, &sport->port);
799 static int serial_pxa_resume(struct device *_dev, u32 level)
801 struct uart_pxa_port *sport = dev_get_drvdata(_dev);
803 if (sport && level == RESUME_ENABLE)
804 uart_resume_port(&serial_pxa_reg, &sport->port);
809 static int serial_pxa_probe(struct device *_dev)
811 struct platform_device *dev = to_platform_device(_dev);
813 serial_pxa_ports[dev->id].port.dev = _dev;
814 uart_add_one_port(&serial_pxa_reg, &serial_pxa_ports[dev->id].port);
815 dev_set_drvdata(_dev, &serial_pxa_ports[dev->id]);
819 static int serial_pxa_remove(struct device *_dev)
821 struct uart_pxa_port *sport = dev_get_drvdata(_dev);
823 dev_set_drvdata(_dev, NULL);
826 uart_remove_one_port(&serial_pxa_reg, &sport->port);
831 static struct device_driver serial_pxa_driver = {
832 .name = "pxa2xx-uart",
833 .bus = &platform_bus_type,
834 .probe = serial_pxa_probe,
835 .remove = serial_pxa_remove,
837 .suspend = serial_pxa_suspend,
838 .resume = serial_pxa_resume,
841 int __init serial_pxa_init(void)
845 ret = uart_register_driver(&serial_pxa_reg);
849 ret = driver_register(&serial_pxa_driver);
851 uart_unregister_driver(&serial_pxa_reg);
856 void __exit serial_pxa_exit(void)
858 driver_unregister(&serial_pxa_driver);
859 uart_unregister_driver(&serial_pxa_reg);
862 module_init(serial_pxa_init);
863 module_exit(serial_pxa_exit);
865 MODULE_LICENSE("GPL");