2 * sata_promise.c - Promise SATA
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
8 * Copyright 2003-2004 Red Hat, Inc.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2, or (at your option)
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; see the file COPYING. If not, write to
23 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
26 * libata documentation is available via 'make {ps|pdf}docs',
27 * as Documentation/DocBook/libata.*
29 * Hardware information only available under NDA.
33 #include <linux/kernel.h>
34 #include <linux/module.h>
35 #include <linux/pci.h>
36 #include <linux/init.h>
37 #include <linux/blkdev.h>
38 #include <linux/delay.h>
39 #include <linux/interrupt.h>
40 #include <linux/sched.h>
41 #include <linux/device.h>
42 #include <scsi/scsi_host.h>
43 #include <scsi/scsi_cmnd.h>
44 #include <linux/libata.h>
46 #include "sata_promise.h"
48 #define DRV_NAME "sata_promise"
49 #define DRV_VERSION "1.05"
53 PDC_PKT_SUBMIT = 0x40, /* Command packet pointer addr */
54 PDC_INT_SEQMASK = 0x40, /* Mask of asserted SEQ INTs */
55 PDC_FLASH_CTL = 0x44, /* Flash control register */
56 PDC_GLOBAL_CTL = 0x48, /* Global control/status (per port) */
57 PDC_CTLSTAT = 0x60, /* IDE control and status (per port) */
58 PDC_SATA_PLUG_CSR = 0x6C, /* SATA Plug control/status reg */
59 PDC2_SATA_PLUG_CSR = 0x60, /* SATAII Plug control/status reg */
60 PDC_TBG_MODE = 0x41C, /* TBG mode (not SATAII) */
61 PDC_SLEW_CTL = 0x470, /* slew rate control reg (not SATAII) */
63 PDC_ERR_MASK = (1<<19) | (1<<20) | (1<<21) | (1<<22) |
64 (1<<8) | (1<<9) | (1<<10),
66 board_2037x = 0, /* FastTrak S150 TX2plus */
67 board_20319 = 1, /* FastTrak S150 TX4 */
68 board_20619 = 2, /* FastTrak TX4000 */
69 board_20771 = 3, /* FastTrak TX2300 */
70 board_2057x = 4, /* SATAII150 Tx2plus */
71 board_40518 = 5, /* SATAII150 Tx4 */
73 PDC_HAS_PATA = (1 << 1), /* PDC20375/20575 has PATA */
75 PDC_RESET = (1 << 11), /* HDMA reset */
77 PDC_COMMON_FLAGS = ATA_FLAG_NO_LEGACY | ATA_FLAG_SRST |
78 ATA_FLAG_MMIO | ATA_FLAG_NO_ATAPI |
82 PDC_FLAG_GEN_II = (1 << 0),
86 struct pdc_port_priv {
91 struct pdc_host_priv {
96 static u32 pdc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg);
97 static void pdc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
98 static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
99 static irqreturn_t pdc_interrupt (int irq, void *dev_instance);
100 static void pdc_eng_timeout(struct ata_port *ap);
101 static int pdc_port_start(struct ata_port *ap);
102 static void pdc_port_stop(struct ata_port *ap);
103 static void pdc_pata_phy_reset(struct ata_port *ap);
104 static void pdc_sata_phy_reset(struct ata_port *ap);
105 static void pdc_qc_prep(struct ata_queued_cmd *qc);
106 static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
107 static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
108 static void pdc_irq_clear(struct ata_port *ap);
109 static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc);
110 static void pdc_host_stop(struct ata_host *host);
113 static struct scsi_host_template pdc_ata_sht = {
114 .module = THIS_MODULE,
116 .ioctl = ata_scsi_ioctl,
117 .queuecommand = ata_scsi_queuecmd,
118 .can_queue = ATA_DEF_QUEUE,
119 .this_id = ATA_SHT_THIS_ID,
120 .sg_tablesize = LIBATA_MAX_PRD,
121 .cmd_per_lun = ATA_SHT_CMD_PER_LUN,
122 .emulated = ATA_SHT_EMULATED,
123 .use_clustering = ATA_SHT_USE_CLUSTERING,
124 .proc_name = DRV_NAME,
125 .dma_boundary = ATA_DMA_BOUNDARY,
126 .slave_configure = ata_scsi_slave_config,
127 .slave_destroy = ata_scsi_slave_destroy,
128 .bios_param = ata_std_bios_param,
131 static const struct ata_port_operations pdc_sata_ops = {
132 .port_disable = ata_port_disable,
133 .tf_load = pdc_tf_load_mmio,
134 .tf_read = ata_tf_read,
135 .check_status = ata_check_status,
136 .exec_command = pdc_exec_command_mmio,
137 .dev_select = ata_std_dev_select,
139 .phy_reset = pdc_sata_phy_reset,
141 .qc_prep = pdc_qc_prep,
142 .qc_issue = pdc_qc_issue_prot,
143 .eng_timeout = pdc_eng_timeout,
144 .data_xfer = ata_mmio_data_xfer,
145 .irq_handler = pdc_interrupt,
146 .irq_clear = pdc_irq_clear,
148 .scr_read = pdc_sata_scr_read,
149 .scr_write = pdc_sata_scr_write,
150 .port_start = pdc_port_start,
151 .port_stop = pdc_port_stop,
152 .host_stop = pdc_host_stop,
155 static const struct ata_port_operations pdc_pata_ops = {
156 .port_disable = ata_port_disable,
157 .tf_load = pdc_tf_load_mmio,
158 .tf_read = ata_tf_read,
159 .check_status = ata_check_status,
160 .exec_command = pdc_exec_command_mmio,
161 .dev_select = ata_std_dev_select,
163 .phy_reset = pdc_pata_phy_reset,
165 .qc_prep = pdc_qc_prep,
166 .qc_issue = pdc_qc_issue_prot,
167 .data_xfer = ata_mmio_data_xfer,
168 .eng_timeout = pdc_eng_timeout,
169 .irq_handler = pdc_interrupt,
170 .irq_clear = pdc_irq_clear,
172 .port_start = pdc_port_start,
173 .port_stop = pdc_port_stop,
174 .host_stop = pdc_host_stop,
177 static const struct ata_port_info pdc_port_info[] = {
181 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA,
182 .pio_mask = 0x1f, /* pio0-4 */
183 .mwdma_mask = 0x07, /* mwdma0-2 */
184 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
185 .port_ops = &pdc_sata_ops,
191 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA,
192 .pio_mask = 0x1f, /* pio0-4 */
193 .mwdma_mask = 0x07, /* mwdma0-2 */
194 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
195 .port_ops = &pdc_sata_ops,
201 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS,
202 .pio_mask = 0x1f, /* pio0-4 */
203 .mwdma_mask = 0x07, /* mwdma0-2 */
204 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
205 .port_ops = &pdc_pata_ops,
211 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA,
212 .pio_mask = 0x1f, /* pio0-4 */
213 .mwdma_mask = 0x07, /* mwdma0-2 */
214 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
215 .port_ops = &pdc_sata_ops,
221 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA,
222 .pio_mask = 0x1f, /* pio0-4 */
223 .mwdma_mask = 0x07, /* mwdma0-2 */
224 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
225 .port_ops = &pdc_sata_ops,
231 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA,
232 .pio_mask = 0x1f, /* pio0-4 */
233 .mwdma_mask = 0x07, /* mwdma0-2 */
234 .udma_mask = 0x7f, /* udma0-6 ; FIXME */
235 .port_ops = &pdc_sata_ops,
239 static const struct pci_device_id pdc_ata_pci_tbl[] = {
240 { PCI_VDEVICE(PROMISE, 0x3371), board_2037x },
241 { PCI_VDEVICE(PROMISE, 0x3373), board_2037x },
242 { PCI_VDEVICE(PROMISE, 0x3375), board_2037x },
243 { PCI_VDEVICE(PROMISE, 0x3376), board_2037x },
244 { PCI_VDEVICE(PROMISE, 0x3570), board_2057x },
245 { PCI_VDEVICE(PROMISE, 0x3571), board_2057x },
246 { PCI_VDEVICE(PROMISE, 0x3574), board_2057x },
247 { PCI_VDEVICE(PROMISE, 0x3d73), board_2057x },
248 { PCI_VDEVICE(PROMISE, 0x3d75), board_2057x },
250 { PCI_VDEVICE(PROMISE, 0x3318), board_20319 },
251 { PCI_VDEVICE(PROMISE, 0x3319), board_20319 },
252 { PCI_VDEVICE(PROMISE, 0x3515), board_20319 },
253 { PCI_VDEVICE(PROMISE, 0x3519), board_20319 },
254 { PCI_VDEVICE(PROMISE, 0x3d17), board_40518 },
255 { PCI_VDEVICE(PROMISE, 0x3d18), board_40518 },
257 { PCI_VDEVICE(PROMISE, 0x6629), board_20619 },
259 /* TODO: remove all associated board_20771 code, as it completely
260 * duplicates board_2037x code, unless reason for separation can be
264 { PCI_VDEVICE(PROMISE, 0x3570), board_20771 },
266 { PCI_VDEVICE(PROMISE, 0x3577), board_20771 },
268 { } /* terminate list */
272 static struct pci_driver pdc_ata_pci_driver = {
274 .id_table = pdc_ata_pci_tbl,
275 .probe = pdc_ata_init_one,
276 .remove = ata_pci_remove_one,
280 static int pdc_port_start(struct ata_port *ap)
282 struct device *dev = ap->host->dev;
283 struct pdc_port_priv *pp;
286 rc = ata_port_start(ap);
290 pp = kzalloc(sizeof(*pp), GFP_KERNEL);
296 pp->pkt = dma_alloc_coherent(dev, 128, &pp->pkt_dma, GFP_KERNEL);
302 ap->private_data = pp;
314 static void pdc_port_stop(struct ata_port *ap)
316 struct device *dev = ap->host->dev;
317 struct pdc_port_priv *pp = ap->private_data;
319 ap->private_data = NULL;
320 dma_free_coherent(dev, 128, pp->pkt, pp->pkt_dma);
326 static void pdc_host_stop(struct ata_host *host)
328 struct pdc_host_priv *hp = host->private_data;
330 ata_pci_host_stop(host);
336 static void pdc_reset_port(struct ata_port *ap)
338 void __iomem *mmio = (void __iomem *) ap->ioaddr.cmd_addr + PDC_CTLSTAT;
342 for (i = 11; i > 0; i--) {
355 readl(mmio); /* flush */
358 static void pdc_sata_phy_reset(struct ata_port *ap)
364 static void pdc_pata_cbl_detect(struct ata_port *ap)
367 void __iomem *mmio = (void __iomem *) ap->ioaddr.cmd_addr + PDC_CTLSTAT + 0x03;
372 ap->cbl = ATA_CBL_PATA40;
373 ap->udma_mask &= ATA_UDMA_MASK_40C;
375 ap->cbl = ATA_CBL_PATA80;
378 static void pdc_pata_phy_reset(struct ata_port *ap)
380 pdc_pata_cbl_detect(ap);
386 static u32 pdc_sata_scr_read (struct ata_port *ap, unsigned int sc_reg)
388 if (sc_reg > SCR_CONTROL)
390 return readl((void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4));
394 static void pdc_sata_scr_write (struct ata_port *ap, unsigned int sc_reg,
397 if (sc_reg > SCR_CONTROL)
399 writel(val, (void __iomem *) ap->ioaddr.scr_addr + (sc_reg * 4));
402 static void pdc_qc_prep(struct ata_queued_cmd *qc)
404 struct pdc_port_priv *pp = qc->ap->private_data;
409 switch (qc->tf.protocol) {
414 case ATA_PROT_NODATA:
415 i = pdc_pkt_header(&qc->tf, qc->ap->prd_dma,
416 qc->dev->devno, pp->pkt);
418 if (qc->tf.flags & ATA_TFLAG_LBA48)
419 i = pdc_prep_lba48(&qc->tf, pp->pkt, i);
421 i = pdc_prep_lba28(&qc->tf, pp->pkt, i);
423 pdc_pkt_footer(&qc->tf, pp->pkt, i);
431 static void pdc_eng_timeout(struct ata_port *ap)
433 struct ata_host *host = ap->host;
435 struct ata_queued_cmd *qc;
440 spin_lock_irqsave(&host->lock, flags);
442 qc = ata_qc_from_tag(ap, ap->active_tag);
444 switch (qc->tf.protocol) {
446 case ATA_PROT_NODATA:
447 ata_port_printk(ap, KERN_ERR, "command timeout\n");
448 drv_stat = ata_wait_idle(ap);
449 qc->err_mask |= __ac_err_mask(drv_stat);
453 drv_stat = ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 1000);
455 ata_port_printk(ap, KERN_ERR,
456 "unknown timeout, cmd 0x%x stat 0x%x\n",
457 qc->tf.command, drv_stat);
459 qc->err_mask |= ac_err_mask(drv_stat);
463 spin_unlock_irqrestore(&host->lock, flags);
464 ata_eh_qc_complete(qc);
468 static inline unsigned int pdc_host_intr( struct ata_port *ap,
469 struct ata_queued_cmd *qc)
471 unsigned int handled = 0;
473 void __iomem *mmio = (void __iomem *) ap->ioaddr.cmd_addr + PDC_GLOBAL_CTL;
476 if (tmp & PDC_ERR_MASK) {
477 qc->err_mask |= AC_ERR_DEV;
481 switch (qc->tf.protocol) {
483 case ATA_PROT_NODATA:
484 qc->err_mask |= ac_err_mask(ata_wait_idle(ap));
490 ap->stats.idle_irq++;
497 static void pdc_irq_clear(struct ata_port *ap)
499 struct ata_host *host = ap->host;
500 void __iomem *mmio = host->mmio_base;
502 readl(mmio + PDC_INT_SEQMASK);
505 static irqreturn_t pdc_interrupt (int irq, void *dev_instance)
507 struct ata_host *host = dev_instance;
511 unsigned int handled = 0;
512 void __iomem *mmio_base;
516 if (!host || !host->mmio_base) {
517 VPRINTK("QUICK EXIT\n");
521 mmio_base = host->mmio_base;
523 /* reading should also clear interrupts */
524 mask = readl(mmio_base + PDC_INT_SEQMASK);
526 if (mask == 0xffffffff) {
527 VPRINTK("QUICK EXIT 2\n");
531 spin_lock(&host->lock);
533 mask &= 0xffff; /* only 16 tags possible */
535 VPRINTK("QUICK EXIT 3\n");
539 writel(mask, mmio_base + PDC_INT_SEQMASK);
541 for (i = 0; i < host->n_ports; i++) {
542 VPRINTK("port %u\n", i);
544 tmp = mask & (1 << (i + 1));
546 !(ap->flags & ATA_FLAG_DISABLED)) {
547 struct ata_queued_cmd *qc;
549 qc = ata_qc_from_tag(ap, ap->active_tag);
550 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)))
551 handled += pdc_host_intr(ap, qc);
558 spin_unlock(&host->lock);
559 return IRQ_RETVAL(handled);
562 static inline void pdc_packet_start(struct ata_queued_cmd *qc)
564 struct ata_port *ap = qc->ap;
565 struct pdc_port_priv *pp = ap->private_data;
566 unsigned int port_no = ap->port_no;
567 u8 seq = (u8) (port_no + 1);
569 VPRINTK("ENTER, ap %p\n", ap);
571 writel(0x00000001, ap->host->mmio_base + (seq * 4));
572 readl(ap->host->mmio_base + (seq * 4)); /* flush */
575 wmb(); /* flush PRD, pkt writes */
576 writel(pp->pkt_dma, (void __iomem *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT);
577 readl((void __iomem *) ap->ioaddr.cmd_addr + PDC_PKT_SUBMIT); /* flush */
580 static unsigned int pdc_qc_issue_prot(struct ata_queued_cmd *qc)
582 switch (qc->tf.protocol) {
584 case ATA_PROT_NODATA:
585 pdc_packet_start(qc);
588 case ATA_PROT_ATAPI_DMA:
596 return ata_qc_issue_prot(qc);
599 static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
601 WARN_ON (tf->protocol == ATA_PROT_DMA ||
602 tf->protocol == ATA_PROT_NODATA);
607 static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
609 WARN_ON (tf->protocol == ATA_PROT_DMA ||
610 tf->protocol == ATA_PROT_NODATA);
611 ata_exec_command(ap, tf);
615 static void pdc_ata_setup_port(struct ata_ioports *port, unsigned long base)
617 port->cmd_addr = base;
618 port->data_addr = base;
620 port->error_addr = base + 0x4;
621 port->nsect_addr = base + 0x8;
622 port->lbal_addr = base + 0xc;
623 port->lbam_addr = base + 0x10;
624 port->lbah_addr = base + 0x14;
625 port->device_addr = base + 0x18;
627 port->status_addr = base + 0x1c;
628 port->altstatus_addr =
629 port->ctl_addr = base + 0x38;
633 static void pdc_host_init(unsigned int chip_id, struct ata_probe_ent *pe)
635 void __iomem *mmio = pe->mmio_base;
636 struct pdc_host_priv *hp = pe->private_data;
637 int hotplug_offset = hp->hotplug_offset;
641 * Except for the hotplug stuff, this is voodoo from the
642 * Promise driver. Label this entire section
643 * "TODO: figure out why we do this"
646 /* enable BMR_BURST, maybe change FIFO_SHD to 8 dwords */
647 tmp = readl(mmio + PDC_FLASH_CTL);
648 tmp |= 0x02000; /* bit 13 (enable bmr burst) */
649 if (!(hp->flags & PDC_FLAG_GEN_II))
650 tmp |= 0x10000; /* bit 16 (fifo threshold at 8 dw) */
651 writel(tmp, mmio + PDC_FLASH_CTL);
653 /* clear plug/unplug flags for all ports */
654 tmp = readl(mmio + hotplug_offset);
655 writel(tmp | 0xff, mmio + hotplug_offset);
657 /* mask plug/unplug ints */
658 tmp = readl(mmio + hotplug_offset);
659 writel(tmp | 0xff0000, mmio + hotplug_offset);
661 /* don't initialise TBG or SLEW on 2nd generation chips */
662 if (hp->flags & PDC_FLAG_GEN_II)
665 /* reduce TBG clock to 133 Mhz. */
666 tmp = readl(mmio + PDC_TBG_MODE);
667 tmp &= ~0x30000; /* clear bit 17, 16*/
668 tmp |= 0x10000; /* set bit 17:16 = 0:1 */
669 writel(tmp, mmio + PDC_TBG_MODE);
671 readl(mmio + PDC_TBG_MODE); /* flush */
674 /* adjust slew rate control register. */
675 tmp = readl(mmio + PDC_SLEW_CTL);
676 tmp &= 0xFFFFF03F; /* clear bit 11 ~ 6 */
677 tmp |= 0x00000900; /* set bit 11-9 = 100b , bit 8-6 = 100 */
678 writel(tmp, mmio + PDC_SLEW_CTL);
681 static int pdc_ata_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
683 static int printed_version;
684 struct ata_probe_ent *probe_ent = NULL;
685 struct pdc_host_priv *hp;
687 void __iomem *mmio_base;
688 unsigned int board_idx = (unsigned int) ent->driver_data;
689 int pci_dev_busy = 0;
692 if (!printed_version++)
693 dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n");
695 rc = pci_enable_device(pdev);
699 rc = pci_request_regions(pdev, DRV_NAME);
705 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
707 goto err_out_regions;
708 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
710 goto err_out_regions;
712 probe_ent = kzalloc(sizeof(*probe_ent), GFP_KERNEL);
713 if (probe_ent == NULL) {
715 goto err_out_regions;
718 probe_ent->dev = pci_dev_to_dev(pdev);
719 INIT_LIST_HEAD(&probe_ent->node);
721 mmio_base = pci_iomap(pdev, 3, 0);
722 if (mmio_base == NULL) {
724 goto err_out_free_ent;
726 base = (unsigned long) mmio_base;
728 hp = kzalloc(sizeof(*hp), GFP_KERNEL);
731 goto err_out_free_ent;
734 /* Set default hotplug offset */
735 hp->hotplug_offset = PDC_SATA_PLUG_CSR;
736 probe_ent->private_data = hp;
738 probe_ent->sht = pdc_port_info[board_idx].sht;
739 probe_ent->port_flags = pdc_port_info[board_idx].flags;
740 probe_ent->pio_mask = pdc_port_info[board_idx].pio_mask;
741 probe_ent->mwdma_mask = pdc_port_info[board_idx].mwdma_mask;
742 probe_ent->udma_mask = pdc_port_info[board_idx].udma_mask;
743 probe_ent->port_ops = pdc_port_info[board_idx].port_ops;
745 probe_ent->irq = pdev->irq;
746 probe_ent->irq_flags = IRQF_SHARED;
747 probe_ent->mmio_base = mmio_base;
749 pdc_ata_setup_port(&probe_ent->port[0], base + 0x200);
750 pdc_ata_setup_port(&probe_ent->port[1], base + 0x280);
752 probe_ent->port[0].scr_addr = base + 0x400;
753 probe_ent->port[1].scr_addr = base + 0x500;
755 /* notice 4-port boards */
758 hp->flags |= PDC_FLAG_GEN_II;
759 /* Override hotplug offset for SATAII150 */
760 hp->hotplug_offset = PDC2_SATA_PLUG_CSR;
763 probe_ent->n_ports = 4;
765 pdc_ata_setup_port(&probe_ent->port[2], base + 0x300);
766 pdc_ata_setup_port(&probe_ent->port[3], base + 0x380);
768 probe_ent->port[2].scr_addr = base + 0x600;
769 probe_ent->port[3].scr_addr = base + 0x700;
773 hp->flags |= PDC_FLAG_GEN_II;
774 /* Override hotplug offset for SATAII150 */
775 hp->hotplug_offset = PDC2_SATA_PLUG_CSR;
778 probe_ent->n_ports = 2;
781 probe_ent->n_ports = 4;
783 pdc_ata_setup_port(&probe_ent->port[2], base + 0x300);
784 pdc_ata_setup_port(&probe_ent->port[3], base + 0x380);
786 probe_ent->port[2].scr_addr = base + 0x600;
787 probe_ent->port[3].scr_addr = base + 0x700;
794 pci_set_master(pdev);
796 /* initialize adapter */
797 pdc_host_init(board_idx, probe_ent);
799 /* FIXME: Need any other frees than hp? */
800 if (!ata_device_add(probe_ent))
810 pci_release_regions(pdev);
813 pci_disable_device(pdev);
818 static int __init pdc_ata_init(void)
820 return pci_register_driver(&pdc_ata_pci_driver);
824 static void __exit pdc_ata_exit(void)
826 pci_unregister_driver(&pdc_ata_pci_driver);
830 MODULE_AUTHOR("Jeff Garzik");
831 MODULE_DESCRIPTION("Promise ATA TX2/TX4/TX4000 low-level driver");
832 MODULE_LICENSE("GPL");
833 MODULE_DEVICE_TABLE(pci, pdc_ata_pci_tbl);
834 MODULE_VERSION(DRV_VERSION);
836 module_init(pdc_ata_init);
837 module_exit(pdc_ata_exit);