Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
[linux-2.6] / arch / sparc64 / kernel / time.c
1 /* $Id: time.c,v 1.42 2002/01/23 14:33:55 davem Exp $
2  * time.c: UltraSparc timer and TOD clock support.
3  *
4  * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
5  * Copyright (C) 1998 Eddie C. Dost   (ecd@skynet.be)
6  *
7  * Based largely on code which is:
8  *
9  * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
10  */
11
12 #include <linux/errno.h>
13 #include <linux/module.h>
14 #include <linux/sched.h>
15 #include <linux/kernel.h>
16 #include <linux/param.h>
17 #include <linux/string.h>
18 #include <linux/mm.h>
19 #include <linux/interrupt.h>
20 #include <linux/time.h>
21 #include <linux/timex.h>
22 #include <linux/init.h>
23 #include <linux/ioport.h>
24 #include <linux/mc146818rtc.h>
25 #include <linux/delay.h>
26 #include <linux/profile.h>
27 #include <linux/bcd.h>
28 #include <linux/jiffies.h>
29 #include <linux/cpufreq.h>
30 #include <linux/percpu.h>
31 #include <linux/profile.h>
32 #include <linux/miscdevice.h>
33 #include <linux/rtc.h>
34 #include <linux/kernel_stat.h>
35 #include <linux/clockchips.h>
36 #include <linux/clocksource.h>
37
38 #include <asm/oplib.h>
39 #include <asm/mostek.h>
40 #include <asm/timer.h>
41 #include <asm/irq.h>
42 #include <asm/io.h>
43 #include <asm/prom.h>
44 #include <asm/of_device.h>
45 #include <asm/starfire.h>
46 #include <asm/smp.h>
47 #include <asm/sections.h>
48 #include <asm/cpudata.h>
49 #include <asm/uaccess.h>
50 #include <asm/prom.h>
51 #include <asm/irq_regs.h>
52
53 DEFINE_SPINLOCK(mostek_lock);
54 DEFINE_SPINLOCK(rtc_lock);
55 void __iomem *mstk48t02_regs = NULL;
56 #ifdef CONFIG_PCI
57 unsigned long ds1287_regs = 0UL;
58 static void __iomem *bq4802_regs;
59 #endif
60
61 static void __iomem *mstk48t08_regs;
62 static void __iomem *mstk48t59_regs;
63
64 static int set_rtc_mmss(unsigned long);
65
66 #define TICK_PRIV_BIT   (1UL << 63)
67 #define TICKCMP_IRQ_BIT (1UL << 63)
68
69 #ifdef CONFIG_SMP
70 unsigned long profile_pc(struct pt_regs *regs)
71 {
72         unsigned long pc = instruction_pointer(regs);
73
74         if (in_lock_functions(pc))
75                 return regs->u_regs[UREG_RETPC];
76         return pc;
77 }
78 EXPORT_SYMBOL(profile_pc);
79 #endif
80
81 static void tick_disable_protection(void)
82 {
83         /* Set things up so user can access tick register for profiling
84          * purposes.  Also workaround BB_ERRATA_1 by doing a dummy
85          * read back of %tick after writing it.
86          */
87         __asm__ __volatile__(
88         "       ba,pt   %%xcc, 1f\n"
89         "        nop\n"
90         "       .align  64\n"
91         "1:     rd      %%tick, %%g2\n"
92         "       add     %%g2, 6, %%g2\n"
93         "       andn    %%g2, %0, %%g2\n"
94         "       wrpr    %%g2, 0, %%tick\n"
95         "       rdpr    %%tick, %%g0"
96         : /* no outputs */
97         : "r" (TICK_PRIV_BIT)
98         : "g2");
99 }
100
101 static void tick_disable_irq(void)
102 {
103         __asm__ __volatile__(
104         "       ba,pt   %%xcc, 1f\n"
105         "        nop\n"
106         "       .align  64\n"
107         "1:     wr      %0, 0x0, %%tick_cmpr\n"
108         "       rd      %%tick_cmpr, %%g0"
109         : /* no outputs */
110         : "r" (TICKCMP_IRQ_BIT));
111 }
112
113 static void tick_init_tick(void)
114 {
115         tick_disable_protection();
116         tick_disable_irq();
117 }
118
119 static unsigned long tick_get_tick(void)
120 {
121         unsigned long ret;
122
123         __asm__ __volatile__("rd        %%tick, %0\n\t"
124                              "mov       %0, %0"
125                              : "=r" (ret));
126
127         return ret & ~TICK_PRIV_BIT;
128 }
129
130 static int tick_add_compare(unsigned long adj)
131 {
132         unsigned long orig_tick, new_tick, new_compare;
133
134         __asm__ __volatile__("rd        %%tick, %0"
135                              : "=r" (orig_tick));
136
137         orig_tick &= ~TICKCMP_IRQ_BIT;
138
139         /* Workaround for Spitfire Errata (#54 I think??), I discovered
140          * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
141          * number 103640.
142          *
143          * On Blackbird writes to %tick_cmpr can fail, the
144          * workaround seems to be to execute the wr instruction
145          * at the start of an I-cache line, and perform a dummy
146          * read back from %tick_cmpr right after writing to it. -DaveM
147          */
148         __asm__ __volatile__("ba,pt     %%xcc, 1f\n\t"
149                              " add      %1, %2, %0\n\t"
150                              ".align    64\n"
151                              "1:\n\t"
152                              "wr        %0, 0, %%tick_cmpr\n\t"
153                              "rd        %%tick_cmpr, %%g0\n\t"
154                              : "=r" (new_compare)
155                              : "r" (orig_tick), "r" (adj));
156
157         __asm__ __volatile__("rd        %%tick, %0"
158                              : "=r" (new_tick));
159         new_tick &= ~TICKCMP_IRQ_BIT;
160
161         return ((long)(new_tick - (orig_tick+adj))) > 0L;
162 }
163
164 static unsigned long tick_add_tick(unsigned long adj)
165 {
166         unsigned long new_tick;
167
168         /* Also need to handle Blackbird bug here too. */
169         __asm__ __volatile__("rd        %%tick, %0\n\t"
170                              "add       %0, %1, %0\n\t"
171                              "wrpr      %0, 0, %%tick\n\t"
172                              : "=&r" (new_tick)
173                              : "r" (adj));
174
175         return new_tick;
176 }
177
178 static struct sparc64_tick_ops tick_operations __read_mostly = {
179         .name           =       "tick",
180         .init_tick      =       tick_init_tick,
181         .disable_irq    =       tick_disable_irq,
182         .get_tick       =       tick_get_tick,
183         .add_tick       =       tick_add_tick,
184         .add_compare    =       tick_add_compare,
185         .softint_mask   =       1UL << 0,
186 };
187
188 struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
189
190 static void stick_disable_irq(void)
191 {
192         __asm__ __volatile__(
193         "wr     %0, 0x0, %%asr25"
194         : /* no outputs */
195         : "r" (TICKCMP_IRQ_BIT));
196 }
197
198 static void stick_init_tick(void)
199 {
200         /* Writes to the %tick and %stick register are not
201          * allowed on sun4v.  The Hypervisor controls that
202          * bit, per-strand.
203          */
204         if (tlb_type != hypervisor) {
205                 tick_disable_protection();
206                 tick_disable_irq();
207
208                 /* Let the user get at STICK too. */
209                 __asm__ __volatile__(
210                 "       rd      %%asr24, %%g2\n"
211                 "       andn    %%g2, %0, %%g2\n"
212                 "       wr      %%g2, 0, %%asr24"
213                 : /* no outputs */
214                 : "r" (TICK_PRIV_BIT)
215                 : "g1", "g2");
216         }
217
218         stick_disable_irq();
219 }
220
221 static unsigned long stick_get_tick(void)
222 {
223         unsigned long ret;
224
225         __asm__ __volatile__("rd        %%asr24, %0"
226                              : "=r" (ret));
227
228         return ret & ~TICK_PRIV_BIT;
229 }
230
231 static unsigned long stick_add_tick(unsigned long adj)
232 {
233         unsigned long new_tick;
234
235         __asm__ __volatile__("rd        %%asr24, %0\n\t"
236                              "add       %0, %1, %0\n\t"
237                              "wr        %0, 0, %%asr24\n\t"
238                              : "=&r" (new_tick)
239                              : "r" (adj));
240
241         return new_tick;
242 }
243
244 static int stick_add_compare(unsigned long adj)
245 {
246         unsigned long orig_tick, new_tick;
247
248         __asm__ __volatile__("rd        %%asr24, %0"
249                              : "=r" (orig_tick));
250         orig_tick &= ~TICKCMP_IRQ_BIT;
251
252         __asm__ __volatile__("wr        %0, 0, %%asr25"
253                              : /* no outputs */
254                              : "r" (orig_tick + adj));
255
256         __asm__ __volatile__("rd        %%asr24, %0"
257                              : "=r" (new_tick));
258         new_tick &= ~TICKCMP_IRQ_BIT;
259
260         return ((long)(new_tick - (orig_tick+adj))) > 0L;
261 }
262
263 static struct sparc64_tick_ops stick_operations __read_mostly = {
264         .name           =       "stick",
265         .init_tick      =       stick_init_tick,
266         .disable_irq    =       stick_disable_irq,
267         .get_tick       =       stick_get_tick,
268         .add_tick       =       stick_add_tick,
269         .add_compare    =       stick_add_compare,
270         .softint_mask   =       1UL << 16,
271 };
272
273 /* On Hummingbird the STICK/STICK_CMPR register is implemented
274  * in I/O space.  There are two 64-bit registers each, the
275  * first holds the low 32-bits of the value and the second holds
276  * the high 32-bits.
277  *
278  * Since STICK is constantly updating, we have to access it carefully.
279  *
280  * The sequence we use to read is:
281  * 1) read high
282  * 2) read low
283  * 3) read high again, if it rolled re-read both low and high again.
284  *
285  * Writing STICK safely is also tricky:
286  * 1) write low to zero
287  * 2) write high
288  * 3) write low
289  */
290 #define HBIRD_STICKCMP_ADDR     0x1fe0000f060UL
291 #define HBIRD_STICK_ADDR        0x1fe0000f070UL
292
293 static unsigned long __hbird_read_stick(void)
294 {
295         unsigned long ret, tmp1, tmp2, tmp3;
296         unsigned long addr = HBIRD_STICK_ADDR+8;
297
298         __asm__ __volatile__("ldxa      [%1] %5, %2\n"
299                              "1:\n\t"
300                              "sub       %1, 0x8, %1\n\t"
301                              "ldxa      [%1] %5, %3\n\t"
302                              "add       %1, 0x8, %1\n\t"
303                              "ldxa      [%1] %5, %4\n\t"
304                              "cmp       %4, %2\n\t"
305                              "bne,a,pn  %%xcc, 1b\n\t"
306                              " mov      %4, %2\n\t"
307                              "sllx      %4, 32, %4\n\t"
308                              "or        %3, %4, %0\n\t"
309                              : "=&r" (ret), "=&r" (addr),
310                                "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
311                              : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
312
313         return ret;
314 }
315
316 static void __hbird_write_stick(unsigned long val)
317 {
318         unsigned long low = (val & 0xffffffffUL);
319         unsigned long high = (val >> 32UL);
320         unsigned long addr = HBIRD_STICK_ADDR;
321
322         __asm__ __volatile__("stxa      %%g0, [%0] %4\n\t"
323                              "add       %0, 0x8, %0\n\t"
324                              "stxa      %3, [%0] %4\n\t"
325                              "sub       %0, 0x8, %0\n\t"
326                              "stxa      %2, [%0] %4"
327                              : "=&r" (addr)
328                              : "0" (addr), "r" (low), "r" (high),
329                                "i" (ASI_PHYS_BYPASS_EC_E));
330 }
331
332 static void __hbird_write_compare(unsigned long val)
333 {
334         unsigned long low = (val & 0xffffffffUL);
335         unsigned long high = (val >> 32UL);
336         unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
337
338         __asm__ __volatile__("stxa      %3, [%0] %4\n\t"
339                              "sub       %0, 0x8, %0\n\t"
340                              "stxa      %2, [%0] %4"
341                              : "=&r" (addr)
342                              : "0" (addr), "r" (low), "r" (high),
343                                "i" (ASI_PHYS_BYPASS_EC_E));
344 }
345
346 static void hbtick_disable_irq(void)
347 {
348         __hbird_write_compare(TICKCMP_IRQ_BIT);
349 }
350
351 static void hbtick_init_tick(void)
352 {
353         tick_disable_protection();
354
355         /* XXX This seems to be necessary to 'jumpstart' Hummingbird
356          * XXX into actually sending STICK interrupts.  I think because
357          * XXX of how we store %tick_cmpr in head.S this somehow resets the
358          * XXX {TICK + STICK} interrupt mux.  -DaveM
359          */
360         __hbird_write_stick(__hbird_read_stick());
361
362         hbtick_disable_irq();
363 }
364
365 static unsigned long hbtick_get_tick(void)
366 {
367         return __hbird_read_stick() & ~TICK_PRIV_BIT;
368 }
369
370 static unsigned long hbtick_add_tick(unsigned long adj)
371 {
372         unsigned long val;
373
374         val = __hbird_read_stick() + adj;
375         __hbird_write_stick(val);
376
377         return val;
378 }
379
380 static int hbtick_add_compare(unsigned long adj)
381 {
382         unsigned long val = __hbird_read_stick();
383         unsigned long val2;
384
385         val &= ~TICKCMP_IRQ_BIT;
386         val += adj;
387         __hbird_write_compare(val);
388
389         val2 = __hbird_read_stick() & ~TICKCMP_IRQ_BIT;
390
391         return ((long)(val2 - val)) > 0L;
392 }
393
394 static struct sparc64_tick_ops hbtick_operations __read_mostly = {
395         .name           =       "hbtick",
396         .init_tick      =       hbtick_init_tick,
397         .disable_irq    =       hbtick_disable_irq,
398         .get_tick       =       hbtick_get_tick,
399         .add_tick       =       hbtick_add_tick,
400         .add_compare    =       hbtick_add_compare,
401         .softint_mask   =       1UL << 0,
402 };
403
404 static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
405
406 int update_persistent_clock(struct timespec now)
407 {
408         return set_rtc_mmss(now.tv_sec);
409 }
410
411 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
412 static void __init kick_start_clock(void)
413 {
414         void __iomem *regs = mstk48t02_regs;
415         u8 sec, tmp;
416         int i, count;
417
418         prom_printf("CLOCK: Clock was stopped. Kick start ");
419
420         spin_lock_irq(&mostek_lock);
421
422         /* Turn on the kick start bit to start the oscillator. */
423         tmp = mostek_read(regs + MOSTEK_CREG);
424         tmp |= MSTK_CREG_WRITE;
425         mostek_write(regs + MOSTEK_CREG, tmp);
426         tmp = mostek_read(regs + MOSTEK_SEC);
427         tmp &= ~MSTK_STOP;
428         mostek_write(regs + MOSTEK_SEC, tmp);
429         tmp = mostek_read(regs + MOSTEK_HOUR);
430         tmp |= MSTK_KICK_START;
431         mostek_write(regs + MOSTEK_HOUR, tmp);
432         tmp = mostek_read(regs + MOSTEK_CREG);
433         tmp &= ~MSTK_CREG_WRITE;
434         mostek_write(regs + MOSTEK_CREG, tmp);
435
436         spin_unlock_irq(&mostek_lock);
437
438         /* Delay to allow the clock oscillator to start. */
439         sec = MSTK_REG_SEC(regs);
440         for (i = 0; i < 3; i++) {
441                 while (sec == MSTK_REG_SEC(regs))
442                         for (count = 0; count < 100000; count++)
443                                 /* nothing */ ;
444                 prom_printf(".");
445                 sec = MSTK_REG_SEC(regs);
446         }
447         prom_printf("\n");
448
449         spin_lock_irq(&mostek_lock);
450
451         /* Turn off kick start and set a "valid" time and date. */
452         tmp = mostek_read(regs + MOSTEK_CREG);
453         tmp |= MSTK_CREG_WRITE;
454         mostek_write(regs + MOSTEK_CREG, tmp);
455         tmp = mostek_read(regs + MOSTEK_HOUR);
456         tmp &= ~MSTK_KICK_START;
457         mostek_write(regs + MOSTEK_HOUR, tmp);
458         MSTK_SET_REG_SEC(regs,0);
459         MSTK_SET_REG_MIN(regs,0);
460         MSTK_SET_REG_HOUR(regs,0);
461         MSTK_SET_REG_DOW(regs,5);
462         MSTK_SET_REG_DOM(regs,1);
463         MSTK_SET_REG_MONTH(regs,8);
464         MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
465         tmp = mostek_read(regs + MOSTEK_CREG);
466         tmp &= ~MSTK_CREG_WRITE;
467         mostek_write(regs + MOSTEK_CREG, tmp);
468
469         spin_unlock_irq(&mostek_lock);
470
471         /* Ensure the kick start bit is off. If it isn't, turn it off. */
472         while (mostek_read(regs + MOSTEK_HOUR) & MSTK_KICK_START) {
473                 prom_printf("CLOCK: Kick start still on!\n");
474
475                 spin_lock_irq(&mostek_lock);
476
477                 tmp = mostek_read(regs + MOSTEK_CREG);
478                 tmp |= MSTK_CREG_WRITE;
479                 mostek_write(regs + MOSTEK_CREG, tmp);
480
481                 tmp = mostek_read(regs + MOSTEK_HOUR);
482                 tmp &= ~MSTK_KICK_START;
483                 mostek_write(regs + MOSTEK_HOUR, tmp);
484
485                 tmp = mostek_read(regs + MOSTEK_CREG);
486                 tmp &= ~MSTK_CREG_WRITE;
487                 mostek_write(regs + MOSTEK_CREG, tmp);
488
489                 spin_unlock_irq(&mostek_lock);
490         }
491
492         prom_printf("CLOCK: Kick start procedure successful.\n");
493 }
494
495 /* Return nonzero if the clock chip battery is low. */
496 static int __init has_low_battery(void)
497 {
498         void __iomem *regs = mstk48t02_regs;
499         u8 data1, data2;
500
501         spin_lock_irq(&mostek_lock);
502
503         data1 = mostek_read(regs + MOSTEK_EEPROM);      /* Read some data. */
504         mostek_write(regs + MOSTEK_EEPROM, ~data1);     /* Write back the complement. */
505         data2 = mostek_read(regs + MOSTEK_EEPROM);      /* Read back the complement. */
506         mostek_write(regs + MOSTEK_EEPROM, data1);      /* Restore original value. */
507
508         spin_unlock_irq(&mostek_lock);
509
510         return (data1 == data2);        /* Was the write blocked? */
511 }
512
513 /* Probe for the real time clock chip. */
514 static void __init set_system_time(void)
515 {
516         unsigned int year, mon, day, hour, min, sec;
517         void __iomem *mregs = mstk48t02_regs;
518 #ifdef CONFIG_PCI
519         unsigned long dregs = ds1287_regs;
520         void __iomem *bregs = bq4802_regs;
521 #else
522         unsigned long dregs = 0UL;
523         void __iomem *bregs = 0UL;
524 #endif
525         u8 tmp;
526
527         if (!mregs && !dregs && !bregs) {
528                 prom_printf("Something wrong, clock regs not mapped yet.\n");
529                 prom_halt();
530         }               
531
532         if (mregs) {
533                 spin_lock_irq(&mostek_lock);
534
535                 /* Traditional Mostek chip. */
536                 tmp = mostek_read(mregs + MOSTEK_CREG);
537                 tmp |= MSTK_CREG_READ;
538                 mostek_write(mregs + MOSTEK_CREG, tmp);
539
540                 sec = MSTK_REG_SEC(mregs);
541                 min = MSTK_REG_MIN(mregs);
542                 hour = MSTK_REG_HOUR(mregs);
543                 day = MSTK_REG_DOM(mregs);
544                 mon = MSTK_REG_MONTH(mregs);
545                 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
546         } else if (bregs) {
547                 unsigned char val = readb(bregs + 0x0e);
548                 unsigned int century;
549
550                 /* BQ4802 RTC chip. */
551
552                 writeb(val | 0x08, bregs + 0x0e);
553
554                 sec  = readb(bregs + 0x00);
555                 min  = readb(bregs + 0x02);
556                 hour = readb(bregs + 0x04);
557                 day  = readb(bregs + 0x06);
558                 mon  = readb(bregs + 0x09);
559                 year = readb(bregs + 0x0a);
560                 century = readb(bregs + 0x0f);
561
562                 writeb(val, bregs + 0x0e);
563
564                 BCD_TO_BIN(sec);
565                 BCD_TO_BIN(min);
566                 BCD_TO_BIN(hour);
567                 BCD_TO_BIN(day);
568                 BCD_TO_BIN(mon);
569                 BCD_TO_BIN(year);
570                 BCD_TO_BIN(century);
571
572                 year += (century * 100);
573         } else {
574                 /* Dallas 12887 RTC chip. */
575
576                 do {
577                         sec  = CMOS_READ(RTC_SECONDS);
578                         min  = CMOS_READ(RTC_MINUTES);
579                         hour = CMOS_READ(RTC_HOURS);
580                         day  = CMOS_READ(RTC_DAY_OF_MONTH);
581                         mon  = CMOS_READ(RTC_MONTH);
582                         year = CMOS_READ(RTC_YEAR);
583                 } while (sec != CMOS_READ(RTC_SECONDS));
584
585                 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
586                         BCD_TO_BIN(sec);
587                         BCD_TO_BIN(min);
588                         BCD_TO_BIN(hour);
589                         BCD_TO_BIN(day);
590                         BCD_TO_BIN(mon);
591                         BCD_TO_BIN(year);
592                 }
593                 if ((year += 1900) < 1970)
594                         year += 100;
595         }
596
597         xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
598         xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
599         set_normalized_timespec(&wall_to_monotonic,
600                                 -xtime.tv_sec, -xtime.tv_nsec);
601
602         if (mregs) {
603                 tmp = mostek_read(mregs + MOSTEK_CREG);
604                 tmp &= ~MSTK_CREG_READ;
605                 mostek_write(mregs + MOSTEK_CREG, tmp);
606
607                 spin_unlock_irq(&mostek_lock);
608         }
609 }
610
611 /* davem suggests we keep this within the 4M locked kernel image */
612 static u32 starfire_get_time(void)
613 {
614         static char obp_gettod[32];
615         static u32 unix_tod;
616
617         sprintf(obp_gettod, "h# %08x unix-gettod",
618                 (unsigned int) (long) &unix_tod);
619         prom_feval(obp_gettod);
620
621         return unix_tod;
622 }
623
624 static int starfire_set_time(u32 val)
625 {
626         /* Do nothing, time is set using the service processor
627          * console on this platform.
628          */
629         return 0;
630 }
631
632 static u32 hypervisor_get_time(void)
633 {
634         unsigned long ret, time;
635         int retries = 10000;
636
637 retry:
638         ret = sun4v_tod_get(&time);
639         if (ret == HV_EOK)
640                 return time;
641         if (ret == HV_EWOULDBLOCK) {
642                 if (--retries > 0) {
643                         udelay(100);
644                         goto retry;
645                 }
646                 printk(KERN_WARNING "SUN4V: tod_get() timed out.\n");
647                 return 0;
648         }
649         printk(KERN_WARNING "SUN4V: tod_get() not supported.\n");
650         return 0;
651 }
652
653 static int hypervisor_set_time(u32 secs)
654 {
655         unsigned long ret;
656         int retries = 10000;
657
658 retry:
659         ret = sun4v_tod_set(secs);
660         if (ret == HV_EOK)
661                 return 0;
662         if (ret == HV_EWOULDBLOCK) {
663                 if (--retries > 0) {
664                         udelay(100);
665                         goto retry;
666                 }
667                 printk(KERN_WARNING "SUN4V: tod_set() timed out.\n");
668                 return -EAGAIN;
669         }
670         printk(KERN_WARNING "SUN4V: tod_set() not supported.\n");
671         return -EOPNOTSUPP;
672 }
673
674 static int __init clock_model_matches(const char *model)
675 {
676         if (strcmp(model, "mk48t02") &&
677             strcmp(model, "mk48t08") &&
678             strcmp(model, "mk48t59") &&
679             strcmp(model, "m5819") &&
680             strcmp(model, "m5819p") &&
681             strcmp(model, "m5823") &&
682             strcmp(model, "ds1287") &&
683             strcmp(model, "bq4802"))
684                 return 0;
685
686         return 1;
687 }
688
689 static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
690 {
691         struct device_node *dp = op->node;
692         const char *model = of_get_property(dp, "model", NULL);
693         const char *compat = of_get_property(dp, "compatible", NULL);
694         unsigned long size, flags;
695         void __iomem *regs;
696
697         if (!model)
698                 model = compat;
699
700         if (!model || !clock_model_matches(model))
701                 return -ENODEV;
702
703         /* On an Enterprise system there can be multiple mostek clocks.
704          * We should only match the one that is on the central FHC bus.
705          */
706         if (!strcmp(dp->parent->name, "fhc") &&
707             strcmp(dp->parent->parent->name, "central") != 0)
708                 return -ENODEV;
709
710         size = (op->resource[0].end - op->resource[0].start) + 1;
711         regs = of_ioremap(&op->resource[0], 0, size, "clock");
712         if (!regs)
713                 return -ENOMEM;
714
715 #ifdef CONFIG_PCI
716         if (!strcmp(model, "ds1287") ||
717             !strcmp(model, "m5819") ||
718             !strcmp(model, "m5819p") ||
719             !strcmp(model, "m5823")) {
720                 ds1287_regs = (unsigned long) regs;
721         } else if (!strcmp(model, "bq4802")) {
722                 bq4802_regs = regs;
723         } else
724 #endif
725         if (model[5] == '0' && model[6] == '2') {
726                 mstk48t02_regs = regs;
727         } else if(model[5] == '0' && model[6] == '8') {
728                 mstk48t08_regs = regs;
729                 mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
730         } else {
731                 mstk48t59_regs = regs;
732                 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
733         }
734
735         printk(KERN_INFO "%s: Clock regs at %p\n", dp->full_name, regs);
736
737         local_irq_save(flags);
738
739         if (mstk48t02_regs != NULL) {
740                 /* Report a low battery voltage condition. */
741                 if (has_low_battery())
742                         prom_printf("NVRAM: Low battery voltage!\n");
743
744                 /* Kick start the clock if it is completely stopped. */
745                 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
746                         kick_start_clock();
747         }
748
749         set_system_time();
750         
751         local_irq_restore(flags);
752
753         return 0;
754 }
755
756 static struct of_device_id clock_match[] = {
757         {
758                 .name = "eeprom",
759         },
760         {
761                 .name = "rtc",
762         },
763         {},
764 };
765
766 static struct of_platform_driver clock_driver = {
767         .match_table    = clock_match,
768         .probe          = clock_probe,
769         .driver         = {
770                 .name   = "clock",
771         },
772 };
773
774 static int __init clock_init(void)
775 {
776         if (this_is_starfire) {
777                 xtime.tv_sec = starfire_get_time();
778                 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
779                 set_normalized_timespec(&wall_to_monotonic,
780                                         -xtime.tv_sec, -xtime.tv_nsec);
781                 return 0;
782         }
783         if (tlb_type == hypervisor) {
784                 xtime.tv_sec = hypervisor_get_time();
785                 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
786                 set_normalized_timespec(&wall_to_monotonic,
787                                         -xtime.tv_sec, -xtime.tv_nsec);
788                 return 0;
789         }
790
791         return of_register_driver(&clock_driver, &of_platform_bus_type);
792 }
793
794 /* Must be after subsys_initcall() so that busses are probed.  Must
795  * be before device_initcall() because things like the RTC driver
796  * need to see the clock registers.
797  */
798 fs_initcall(clock_init);
799
800 /* This is gets the master TICK_INT timer going. */
801 static unsigned long sparc64_init_timers(void)
802 {
803         struct device_node *dp;
804         unsigned long clock;
805
806         dp = of_find_node_by_path("/");
807         if (tlb_type == spitfire) {
808                 unsigned long ver, manuf, impl;
809
810                 __asm__ __volatile__ ("rdpr %%ver, %0"
811                                       : "=&r" (ver));
812                 manuf = ((ver >> 48) & 0xffff);
813                 impl = ((ver >> 32) & 0xffff);
814                 if (manuf == 0x17 && impl == 0x13) {
815                         /* Hummingbird, aka Ultra-IIe */
816                         tick_ops = &hbtick_operations;
817                         clock = of_getintprop_default(dp, "stick-frequency", 0);
818                 } else {
819                         tick_ops = &tick_operations;
820                         clock = local_cpu_data().clock_tick;
821                 }
822         } else {
823                 tick_ops = &stick_operations;
824                 clock = of_getintprop_default(dp, "stick-frequency", 0);
825         }
826
827         return clock;
828 }
829
830 struct freq_table {
831         unsigned long clock_tick_ref;
832         unsigned int ref_freq;
833 };
834 static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
835
836 unsigned long sparc64_get_clock_tick(unsigned int cpu)
837 {
838         struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
839
840         if (ft->clock_tick_ref)
841                 return ft->clock_tick_ref;
842         return cpu_data(cpu).clock_tick;
843 }
844
845 #ifdef CONFIG_CPU_FREQ
846
847 static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
848                                     void *data)
849 {
850         struct cpufreq_freqs *freq = data;
851         unsigned int cpu = freq->cpu;
852         struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
853
854         if (!ft->ref_freq) {
855                 ft->ref_freq = freq->old;
856                 ft->clock_tick_ref = cpu_data(cpu).clock_tick;
857         }
858         if ((val == CPUFREQ_PRECHANGE  && freq->old < freq->new) ||
859             (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
860             (val == CPUFREQ_RESUMECHANGE)) {
861                 cpu_data(cpu).clock_tick =
862                         cpufreq_scale(ft->clock_tick_ref,
863                                       ft->ref_freq,
864                                       freq->new);
865         }
866
867         return 0;
868 }
869
870 static struct notifier_block sparc64_cpufreq_notifier_block = {
871         .notifier_call  = sparc64_cpufreq_notifier
872 };
873
874 #endif /* CONFIG_CPU_FREQ */
875
876 static int sparc64_next_event(unsigned long delta,
877                               struct clock_event_device *evt)
878 {
879         return tick_ops->add_compare(delta) ? -ETIME : 0;
880 }
881
882 static void sparc64_timer_setup(enum clock_event_mode mode,
883                                 struct clock_event_device *evt)
884 {
885         switch (mode) {
886         case CLOCK_EVT_MODE_ONESHOT:
887         case CLOCK_EVT_MODE_RESUME:
888                 break;
889
890         case CLOCK_EVT_MODE_SHUTDOWN:
891                 tick_ops->disable_irq();
892                 break;
893
894         case CLOCK_EVT_MODE_PERIODIC:
895         case CLOCK_EVT_MODE_UNUSED:
896                 WARN_ON(1);
897                 break;
898         };
899 }
900
901 static struct clock_event_device sparc64_clockevent = {
902         .features       = CLOCK_EVT_FEAT_ONESHOT,
903         .set_mode       = sparc64_timer_setup,
904         .set_next_event = sparc64_next_event,
905         .rating         = 100,
906         .shift          = 30,
907         .irq            = -1,
908 };
909 static DEFINE_PER_CPU(struct clock_event_device, sparc64_events);
910
911 void timer_interrupt(int irq, struct pt_regs *regs)
912 {
913         struct pt_regs *old_regs = set_irq_regs(regs);
914         unsigned long tick_mask = tick_ops->softint_mask;
915         int cpu = smp_processor_id();
916         struct clock_event_device *evt = &per_cpu(sparc64_events, cpu);
917
918         clear_softint(tick_mask);
919
920         irq_enter();
921
922         kstat_this_cpu.irqs[0]++;
923
924         if (unlikely(!evt->event_handler)) {
925                 printk(KERN_WARNING
926                        "Spurious SPARC64 timer interrupt on cpu %d\n", cpu);
927         } else
928                 evt->event_handler(evt);
929
930         irq_exit();
931
932         set_irq_regs(old_regs);
933 }
934
935 void __devinit setup_sparc64_timer(void)
936 {
937         struct clock_event_device *sevt;
938         unsigned long pstate;
939
940         /* Guarantee that the following sequences execute
941          * uninterrupted.
942          */
943         __asm__ __volatile__("rdpr      %%pstate, %0\n\t"
944                              "wrpr      %0, %1, %%pstate"
945                              : "=r" (pstate)
946                              : "i" (PSTATE_IE));
947
948         tick_ops->init_tick();
949
950         /* Restore PSTATE_IE. */
951         __asm__ __volatile__("wrpr      %0, 0x0, %%pstate"
952                              : /* no outputs */
953                              : "r" (pstate));
954
955         sevt = &__get_cpu_var(sparc64_events);
956
957         memcpy(sevt, &sparc64_clockevent, sizeof(*sevt));
958         sevt->cpumask = cpumask_of_cpu(smp_processor_id());
959
960         clockevents_register_device(sevt);
961 }
962
963 #define SPARC64_NSEC_PER_CYC_SHIFT      10UL
964
965 static struct clocksource clocksource_tick = {
966         .rating         = 100,
967         .mask           = CLOCKSOURCE_MASK(64),
968         .shift          = 16,
969         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
970 };
971
972 static void __init setup_clockevent_multiplier(unsigned long hz)
973 {
974         unsigned long mult, shift = 32;
975
976         while (1) {
977                 mult = div_sc(hz, NSEC_PER_SEC, shift);
978                 if (mult && (mult >> 32UL) == 0UL)
979                         break;
980
981                 shift--;
982         }
983
984         sparc64_clockevent.shift = shift;
985         sparc64_clockevent.mult = mult;
986 }
987
988 static unsigned long tb_ticks_per_usec __read_mostly;
989
990 void __delay(unsigned long loops)
991 {
992         unsigned long bclock, now;
993
994         bclock = tick_ops->get_tick();
995         do {
996                 now = tick_ops->get_tick();
997         } while ((now-bclock) < loops);
998 }
999 EXPORT_SYMBOL(__delay);
1000
1001 void udelay(unsigned long usecs)
1002 {
1003         __delay(tb_ticks_per_usec * usecs);
1004 }
1005 EXPORT_SYMBOL(udelay);
1006
1007 void __init time_init(void)
1008 {
1009         unsigned long clock = sparc64_init_timers();
1010
1011         tb_ticks_per_usec = clock / USEC_PER_SEC;
1012
1013         timer_ticks_per_nsec_quotient =
1014                 clocksource_hz2mult(clock, SPARC64_NSEC_PER_CYC_SHIFT);
1015
1016         clocksource_tick.name = tick_ops->name;
1017         clocksource_tick.mult =
1018                 clocksource_hz2mult(clock,
1019                                     clocksource_tick.shift);
1020         clocksource_tick.read = tick_ops->get_tick;
1021
1022         printk("clocksource: mult[%x] shift[%d]\n",
1023                clocksource_tick.mult, clocksource_tick.shift);
1024
1025         clocksource_register(&clocksource_tick);
1026
1027         sparc64_clockevent.name = tick_ops->name;
1028
1029         setup_clockevent_multiplier(clock);
1030
1031         sparc64_clockevent.max_delta_ns =
1032                 clockevent_delta2ns(0x7fffffffffffffff, &sparc64_clockevent);
1033         sparc64_clockevent.min_delta_ns =
1034                 clockevent_delta2ns(0xF, &sparc64_clockevent);
1035
1036         printk("clockevent: mult[%lx] shift[%d]\n",
1037                sparc64_clockevent.mult, sparc64_clockevent.shift);
1038
1039         setup_sparc64_timer();
1040
1041 #ifdef CONFIG_CPU_FREQ
1042         cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
1043                                   CPUFREQ_TRANSITION_NOTIFIER);
1044 #endif
1045 }
1046
1047 unsigned long long sched_clock(void)
1048 {
1049         unsigned long ticks = tick_ops->get_tick();
1050
1051         return (ticks * timer_ticks_per_nsec_quotient)
1052                 >> SPARC64_NSEC_PER_CYC_SHIFT;
1053 }
1054
1055 static int set_rtc_mmss(unsigned long nowtime)
1056 {
1057         int real_seconds, real_minutes, chip_minutes;
1058         void __iomem *mregs = mstk48t02_regs;
1059 #ifdef CONFIG_PCI
1060         unsigned long dregs = ds1287_regs;
1061         void __iomem *bregs = bq4802_regs;
1062 #else
1063         unsigned long dregs = 0UL;
1064         void __iomem *bregs = 0UL;
1065 #endif
1066         unsigned long flags;
1067         u8 tmp;
1068
1069         /* 
1070          * Not having a register set can lead to trouble.
1071          * Also starfire doesn't have a tod clock.
1072          */
1073         if (!mregs && !dregs && !bregs)
1074                 return -1;
1075
1076         if (mregs) {
1077                 spin_lock_irqsave(&mostek_lock, flags);
1078
1079                 /* Read the current RTC minutes. */
1080                 tmp = mostek_read(mregs + MOSTEK_CREG);
1081                 tmp |= MSTK_CREG_READ;
1082                 mostek_write(mregs + MOSTEK_CREG, tmp);
1083
1084                 chip_minutes = MSTK_REG_MIN(mregs);
1085
1086                 tmp = mostek_read(mregs + MOSTEK_CREG);
1087                 tmp &= ~MSTK_CREG_READ;
1088                 mostek_write(mregs + MOSTEK_CREG, tmp);
1089
1090                 /*
1091                  * since we're only adjusting minutes and seconds,
1092                  * don't interfere with hour overflow. This avoids
1093                  * messing with unknown time zones but requires your
1094                  * RTC not to be off by more than 15 minutes
1095                  */
1096                 real_seconds = nowtime % 60;
1097                 real_minutes = nowtime / 60;
1098                 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1099                         real_minutes += 30;     /* correct for half hour time zone */
1100                 real_minutes %= 60;
1101
1102                 if (abs(real_minutes - chip_minutes) < 30) {
1103                         tmp = mostek_read(mregs + MOSTEK_CREG);
1104                         tmp |= MSTK_CREG_WRITE;
1105                         mostek_write(mregs + MOSTEK_CREG, tmp);
1106
1107                         MSTK_SET_REG_SEC(mregs,real_seconds);
1108                         MSTK_SET_REG_MIN(mregs,real_minutes);
1109
1110                         tmp = mostek_read(mregs + MOSTEK_CREG);
1111                         tmp &= ~MSTK_CREG_WRITE;
1112                         mostek_write(mregs + MOSTEK_CREG, tmp);
1113
1114                         spin_unlock_irqrestore(&mostek_lock, flags);
1115
1116                         return 0;
1117                 } else {
1118                         spin_unlock_irqrestore(&mostek_lock, flags);
1119
1120                         return -1;
1121                 }
1122         } else if (bregs) {
1123                 int retval = 0;
1124                 unsigned char val = readb(bregs + 0x0e);
1125
1126                 /* BQ4802 RTC chip. */
1127
1128                 writeb(val | 0x08, bregs + 0x0e);
1129
1130                 chip_minutes = readb(bregs + 0x02);
1131                 BCD_TO_BIN(chip_minutes);
1132                 real_seconds = nowtime % 60;
1133                 real_minutes = nowtime / 60;
1134                 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1135                         real_minutes += 30;
1136                 real_minutes %= 60;
1137
1138                 if (abs(real_minutes - chip_minutes) < 30) {
1139                         BIN_TO_BCD(real_seconds);
1140                         BIN_TO_BCD(real_minutes);
1141                         writeb(real_seconds, bregs + 0x00);
1142                         writeb(real_minutes, bregs + 0x02);
1143                 } else {
1144                         printk(KERN_WARNING
1145                                "set_rtc_mmss: can't update from %d to %d\n",
1146                                chip_minutes, real_minutes);
1147                         retval = -1;
1148                 }
1149
1150                 writeb(val, bregs + 0x0e);
1151
1152                 return retval;
1153         } else {
1154                 int retval = 0;
1155                 unsigned char save_control, save_freq_select;
1156
1157                 /* Stolen from arch/i386/kernel/time.c, see there for
1158                  * credits and descriptive comments.
1159                  */
1160                 spin_lock_irqsave(&rtc_lock, flags);
1161                 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
1162                 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
1163
1164                 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
1165                 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
1166
1167                 chip_minutes = CMOS_READ(RTC_MINUTES);
1168                 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
1169                         BCD_TO_BIN(chip_minutes);
1170                 real_seconds = nowtime % 60;
1171                 real_minutes = nowtime / 60;
1172                 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1173                         real_minutes += 30;
1174                 real_minutes %= 60;
1175
1176                 if (abs(real_minutes - chip_minutes) < 30) {
1177                         if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1178                                 BIN_TO_BCD(real_seconds);
1179                                 BIN_TO_BCD(real_minutes);
1180                         }
1181                         CMOS_WRITE(real_seconds,RTC_SECONDS);
1182                         CMOS_WRITE(real_minutes,RTC_MINUTES);
1183                 } else {
1184                         printk(KERN_WARNING
1185                                "set_rtc_mmss: can't update from %d to %d\n",
1186                                chip_minutes, real_minutes);
1187                         retval = -1;
1188                 }
1189
1190                 CMOS_WRITE(save_control, RTC_CONTROL);
1191                 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
1192                 spin_unlock_irqrestore(&rtc_lock, flags);
1193
1194                 return retval;
1195         }
1196 }
1197
1198 #define RTC_IS_OPEN             0x01    /* means /dev/rtc is in use     */
1199 static unsigned char mini_rtc_status;   /* bitmapped status byte.       */
1200
1201 #define FEBRUARY        2
1202 #define STARTOFTIME     1970
1203 #define SECDAY          86400L
1204 #define SECYR           (SECDAY * 365)
1205 #define leapyear(year)          ((year) % 4 == 0 && \
1206                                  ((year) % 100 != 0 || (year) % 400 == 0))
1207 #define days_in_year(a)         (leapyear(a) ? 366 : 365)
1208 #define days_in_month(a)        (month_days[(a) - 1])
1209
1210 static int month_days[12] = {
1211         31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
1212 };
1213
1214 /*
1215  * This only works for the Gregorian calendar - i.e. after 1752 (in the UK)
1216  */
1217 static void GregorianDay(struct rtc_time * tm)
1218 {
1219         int leapsToDate;
1220         int lastYear;
1221         int day;
1222         int MonthOffset[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 };
1223
1224         lastYear = tm->tm_year - 1;
1225
1226         /*
1227          * Number of leap corrections to apply up to end of last year
1228          */
1229         leapsToDate = lastYear / 4 - lastYear / 100 + lastYear / 400;
1230
1231         /*
1232          * This year is a leap year if it is divisible by 4 except when it is
1233          * divisible by 100 unless it is divisible by 400
1234          *
1235          * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was
1236          */
1237         day = tm->tm_mon > 2 && leapyear(tm->tm_year);
1238
1239         day += lastYear*365 + leapsToDate + MonthOffset[tm->tm_mon-1] +
1240                    tm->tm_mday;
1241
1242         tm->tm_wday = day % 7;
1243 }
1244
1245 static void to_tm(int tim, struct rtc_time *tm)
1246 {
1247         register int    i;
1248         register long   hms, day;
1249
1250         day = tim / SECDAY;
1251         hms = tim % SECDAY;
1252
1253         /* Hours, minutes, seconds are easy */
1254         tm->tm_hour = hms / 3600;
1255         tm->tm_min = (hms % 3600) / 60;
1256         tm->tm_sec = (hms % 3600) % 60;
1257
1258         /* Number of years in days */
1259         for (i = STARTOFTIME; day >= days_in_year(i); i++)
1260                 day -= days_in_year(i);
1261         tm->tm_year = i;
1262
1263         /* Number of months in days left */
1264         if (leapyear(tm->tm_year))
1265                 days_in_month(FEBRUARY) = 29;
1266         for (i = 1; day >= days_in_month(i); i++)
1267                 day -= days_in_month(i);
1268         days_in_month(FEBRUARY) = 28;
1269         tm->tm_mon = i;
1270
1271         /* Days are what is left over (+1) from all that. */
1272         tm->tm_mday = day + 1;
1273
1274         /*
1275          * Determine the day of week
1276          */
1277         GregorianDay(tm);
1278 }
1279
1280 /* Both Starfire and SUN4V give us seconds since Jan 1st, 1970,
1281  * aka Unix time.  So we have to convert to/from rtc_time.
1282  */
1283 static void starfire_get_rtc_time(struct rtc_time *time)
1284 {
1285         u32 seconds = starfire_get_time();
1286
1287         to_tm(seconds, time);
1288         time->tm_year -= 1900;
1289         time->tm_mon -= 1;
1290 }
1291
1292 static int starfire_set_rtc_time(struct rtc_time *time)
1293 {
1294         u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
1295                              time->tm_mday, time->tm_hour,
1296                              time->tm_min, time->tm_sec);
1297
1298         return starfire_set_time(seconds);
1299 }
1300
1301 static void hypervisor_get_rtc_time(struct rtc_time *time)
1302 {
1303         u32 seconds = hypervisor_get_time();
1304
1305         to_tm(seconds, time);
1306         time->tm_year -= 1900;
1307         time->tm_mon -= 1;
1308 }
1309
1310 static int hypervisor_set_rtc_time(struct rtc_time *time)
1311 {
1312         u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
1313                              time->tm_mday, time->tm_hour,
1314                              time->tm_min, time->tm_sec);
1315
1316         return hypervisor_set_time(seconds);
1317 }
1318
1319 #ifdef CONFIG_PCI
1320 static void bq4802_get_rtc_time(struct rtc_time *time)
1321 {
1322         unsigned char val = readb(bq4802_regs + 0x0e);
1323         unsigned int century;
1324
1325         writeb(val | 0x08, bq4802_regs + 0x0e);
1326
1327         time->tm_sec = readb(bq4802_regs + 0x00);
1328         time->tm_min = readb(bq4802_regs + 0x02);
1329         time->tm_hour = readb(bq4802_regs + 0x04);
1330         time->tm_mday = readb(bq4802_regs + 0x06);
1331         time->tm_mon = readb(bq4802_regs + 0x09);
1332         time->tm_year = readb(bq4802_regs + 0x0a);
1333         time->tm_wday = readb(bq4802_regs + 0x08);
1334         century = readb(bq4802_regs + 0x0f);
1335
1336         writeb(val, bq4802_regs + 0x0e);
1337
1338         BCD_TO_BIN(time->tm_sec);
1339         BCD_TO_BIN(time->tm_min);
1340         BCD_TO_BIN(time->tm_hour);
1341         BCD_TO_BIN(time->tm_mday);
1342         BCD_TO_BIN(time->tm_mon);
1343         BCD_TO_BIN(time->tm_year);
1344         BCD_TO_BIN(time->tm_wday);
1345         BCD_TO_BIN(century);
1346
1347         time->tm_year += (century * 100);
1348         time->tm_year -= 1900;
1349
1350         time->tm_mon--;
1351 }
1352
1353 static int bq4802_set_rtc_time(struct rtc_time *time)
1354 {
1355         unsigned char val = readb(bq4802_regs + 0x0e);
1356         unsigned char sec, min, hrs, day, mon, yrs, century;
1357         unsigned int year;
1358
1359         year = time->tm_year + 1900;
1360         century = year / 100;
1361         yrs = year % 100;
1362
1363         mon = time->tm_mon + 1;   /* tm_mon starts at zero */
1364         day = time->tm_mday;
1365         hrs = time->tm_hour;
1366         min = time->tm_min;
1367         sec = time->tm_sec;
1368
1369         BIN_TO_BCD(sec);
1370         BIN_TO_BCD(min);
1371         BIN_TO_BCD(hrs);
1372         BIN_TO_BCD(day);
1373         BIN_TO_BCD(mon);
1374         BIN_TO_BCD(yrs);
1375         BIN_TO_BCD(century);
1376
1377         writeb(val | 0x08, bq4802_regs + 0x0e);
1378
1379         writeb(sec, bq4802_regs + 0x00);
1380         writeb(min, bq4802_regs + 0x02);
1381         writeb(hrs, bq4802_regs + 0x04);
1382         writeb(day, bq4802_regs + 0x06);
1383         writeb(mon, bq4802_regs + 0x09);
1384         writeb(yrs, bq4802_regs + 0x0a);
1385         writeb(century, bq4802_regs + 0x0f);
1386
1387         writeb(val, bq4802_regs + 0x0e);
1388
1389         return 0;
1390 }
1391
1392 static void cmos_get_rtc_time(struct rtc_time *rtc_tm)
1393 {
1394         unsigned char ctrl;
1395
1396         rtc_tm->tm_sec = CMOS_READ(RTC_SECONDS);
1397         rtc_tm->tm_min = CMOS_READ(RTC_MINUTES);
1398         rtc_tm->tm_hour = CMOS_READ(RTC_HOURS);
1399         rtc_tm->tm_mday = CMOS_READ(RTC_DAY_OF_MONTH);
1400         rtc_tm->tm_mon = CMOS_READ(RTC_MONTH);
1401         rtc_tm->tm_year = CMOS_READ(RTC_YEAR);
1402         rtc_tm->tm_wday = CMOS_READ(RTC_DAY_OF_WEEK);
1403
1404         ctrl = CMOS_READ(RTC_CONTROL);
1405         if (!(ctrl & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1406                 BCD_TO_BIN(rtc_tm->tm_sec);
1407                 BCD_TO_BIN(rtc_tm->tm_min);
1408                 BCD_TO_BIN(rtc_tm->tm_hour);
1409                 BCD_TO_BIN(rtc_tm->tm_mday);
1410                 BCD_TO_BIN(rtc_tm->tm_mon);
1411                 BCD_TO_BIN(rtc_tm->tm_year);
1412                 BCD_TO_BIN(rtc_tm->tm_wday);
1413         }
1414
1415         if (rtc_tm->tm_year <= 69)
1416                 rtc_tm->tm_year += 100;
1417
1418         rtc_tm->tm_mon--;
1419 }
1420
1421 static int cmos_set_rtc_time(struct rtc_time *rtc_tm)
1422 {
1423         unsigned char mon, day, hrs, min, sec;
1424         unsigned char save_control, save_freq_select;
1425         unsigned int yrs;
1426
1427         yrs = rtc_tm->tm_year;
1428         mon = rtc_tm->tm_mon + 1;
1429         day = rtc_tm->tm_mday;
1430         hrs = rtc_tm->tm_hour;
1431         min = rtc_tm->tm_min;
1432         sec = rtc_tm->tm_sec;
1433
1434         if (yrs >= 100)
1435                 yrs -= 100;
1436
1437         if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1438                 BIN_TO_BCD(sec);
1439                 BIN_TO_BCD(min);
1440                 BIN_TO_BCD(hrs);
1441                 BIN_TO_BCD(day);
1442                 BIN_TO_BCD(mon);
1443                 BIN_TO_BCD(yrs);
1444         }
1445
1446         save_control = CMOS_READ(RTC_CONTROL);
1447         CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
1448         save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
1449         CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
1450
1451         CMOS_WRITE(yrs, RTC_YEAR);
1452         CMOS_WRITE(mon, RTC_MONTH);
1453         CMOS_WRITE(day, RTC_DAY_OF_MONTH);
1454         CMOS_WRITE(hrs, RTC_HOURS);
1455         CMOS_WRITE(min, RTC_MINUTES);
1456         CMOS_WRITE(sec, RTC_SECONDS);
1457
1458         CMOS_WRITE(save_control, RTC_CONTROL);
1459         CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
1460
1461         return 0;
1462 }
1463 #endif /* CONFIG_PCI */
1464
1465 static void mostek_get_rtc_time(struct rtc_time *rtc_tm)
1466 {
1467         void __iomem *regs = mstk48t02_regs;
1468         u8 tmp;
1469
1470         spin_lock_irq(&mostek_lock);
1471
1472         tmp = mostek_read(regs + MOSTEK_CREG);
1473         tmp |= MSTK_CREG_READ;
1474         mostek_write(regs + MOSTEK_CREG, tmp);
1475
1476         rtc_tm->tm_sec = MSTK_REG_SEC(regs);
1477         rtc_tm->tm_min = MSTK_REG_MIN(regs);
1478         rtc_tm->tm_hour = MSTK_REG_HOUR(regs);
1479         rtc_tm->tm_mday = MSTK_REG_DOM(regs);
1480         rtc_tm->tm_mon = MSTK_REG_MONTH(regs);
1481         rtc_tm->tm_year = MSTK_CVT_YEAR( MSTK_REG_YEAR(regs) );
1482         rtc_tm->tm_wday = MSTK_REG_DOW(regs);
1483
1484         tmp = mostek_read(regs + MOSTEK_CREG);
1485         tmp &= ~MSTK_CREG_READ;
1486         mostek_write(regs + MOSTEK_CREG, tmp);
1487
1488         spin_unlock_irq(&mostek_lock);
1489
1490         rtc_tm->tm_mon--;
1491         rtc_tm->tm_wday--;
1492         rtc_tm->tm_year -= 1900;
1493 }
1494
1495 static int mostek_set_rtc_time(struct rtc_time *rtc_tm)
1496 {
1497         unsigned char mon, day, hrs, min, sec, wday;
1498         void __iomem *regs = mstk48t02_regs;
1499         unsigned int yrs;
1500         u8 tmp;
1501
1502         yrs = rtc_tm->tm_year + 1900;
1503         mon = rtc_tm->tm_mon + 1;
1504         day = rtc_tm->tm_mday;
1505         wday = rtc_tm->tm_wday + 1;
1506         hrs = rtc_tm->tm_hour;
1507         min = rtc_tm->tm_min;
1508         sec = rtc_tm->tm_sec;
1509
1510         spin_lock_irq(&mostek_lock);
1511
1512         tmp = mostek_read(regs + MOSTEK_CREG);
1513         tmp |= MSTK_CREG_WRITE;
1514         mostek_write(regs + MOSTEK_CREG, tmp);
1515
1516         MSTK_SET_REG_SEC(regs, sec);
1517         MSTK_SET_REG_MIN(regs, min);
1518         MSTK_SET_REG_HOUR(regs, hrs);
1519         MSTK_SET_REG_DOW(regs, wday);
1520         MSTK_SET_REG_DOM(regs, day);
1521         MSTK_SET_REG_MONTH(regs, mon);
1522         MSTK_SET_REG_YEAR(regs, yrs - MSTK_YEAR_ZERO);
1523
1524         tmp = mostek_read(regs + MOSTEK_CREG);
1525         tmp &= ~MSTK_CREG_WRITE;
1526         mostek_write(regs + MOSTEK_CREG, tmp);
1527
1528         spin_unlock_irq(&mostek_lock);
1529
1530         return 0;
1531 }
1532
1533 struct mini_rtc_ops {
1534         void (*get_rtc_time)(struct rtc_time *);
1535         int (*set_rtc_time)(struct rtc_time *);
1536 };
1537
1538 static struct mini_rtc_ops starfire_rtc_ops = {
1539         .get_rtc_time = starfire_get_rtc_time,
1540         .set_rtc_time = starfire_set_rtc_time,
1541 };
1542
1543 static struct mini_rtc_ops hypervisor_rtc_ops = {
1544         .get_rtc_time = hypervisor_get_rtc_time,
1545         .set_rtc_time = hypervisor_set_rtc_time,
1546 };
1547
1548 #ifdef CONFIG_PCI
1549 static struct mini_rtc_ops bq4802_rtc_ops = {
1550         .get_rtc_time = bq4802_get_rtc_time,
1551         .set_rtc_time = bq4802_set_rtc_time,
1552 };
1553
1554 static struct mini_rtc_ops cmos_rtc_ops = {
1555         .get_rtc_time = cmos_get_rtc_time,
1556         .set_rtc_time = cmos_set_rtc_time,
1557 };
1558 #endif /* CONFIG_PCI */
1559
1560 static struct mini_rtc_ops mostek_rtc_ops = {
1561         .get_rtc_time = mostek_get_rtc_time,
1562         .set_rtc_time = mostek_set_rtc_time,
1563 };
1564
1565 static struct mini_rtc_ops *mini_rtc_ops;
1566
1567 static inline void mini_get_rtc_time(struct rtc_time *time)
1568 {
1569         unsigned long flags;
1570
1571         spin_lock_irqsave(&rtc_lock, flags);
1572         mini_rtc_ops->get_rtc_time(time);
1573         spin_unlock_irqrestore(&rtc_lock, flags);
1574 }
1575
1576 static inline int mini_set_rtc_time(struct rtc_time *time)
1577 {
1578         unsigned long flags;
1579         int err;
1580
1581         spin_lock_irqsave(&rtc_lock, flags);
1582         err = mini_rtc_ops->set_rtc_time(time);
1583         spin_unlock_irqrestore(&rtc_lock, flags);
1584
1585         return err;
1586 }
1587
1588 static int mini_rtc_ioctl(struct inode *inode, struct file *file,
1589                           unsigned int cmd, unsigned long arg)
1590 {
1591         struct rtc_time wtime;
1592         void __user *argp = (void __user *)arg;
1593
1594         switch (cmd) {
1595
1596         case RTC_PLL_GET:
1597                 return -EINVAL;
1598
1599         case RTC_PLL_SET:
1600                 return -EINVAL;
1601
1602         case RTC_UIE_OFF:       /* disable ints from RTC updates.       */
1603                 return 0;
1604
1605         case RTC_UIE_ON:        /* enable ints for RTC updates. */
1606                 return -EINVAL;
1607
1608         case RTC_RD_TIME:       /* Read the time/date from RTC  */
1609                 /* this doesn't get week-day, who cares */
1610                 memset(&wtime, 0, sizeof(wtime));
1611                 mini_get_rtc_time(&wtime);
1612
1613                 return copy_to_user(argp, &wtime, sizeof(wtime)) ? -EFAULT : 0;
1614
1615         case RTC_SET_TIME:      /* Set the RTC */
1616             {
1617                 int year, days;
1618
1619                 if (!capable(CAP_SYS_TIME))
1620                         return -EACCES;
1621
1622                 if (copy_from_user(&wtime, argp, sizeof(wtime)))
1623                         return -EFAULT;
1624
1625                 year = wtime.tm_year + 1900;
1626                 days = month_days[wtime.tm_mon] +
1627                        ((wtime.tm_mon == 1) && leapyear(year));
1628
1629                 if ((wtime.tm_mon < 0 || wtime.tm_mon > 11) ||
1630                     (wtime.tm_mday < 1))
1631                         return -EINVAL;
1632
1633                 if (wtime.tm_mday < 0 || wtime.tm_mday > days)
1634                         return -EINVAL;
1635
1636                 if (wtime.tm_hour < 0 || wtime.tm_hour >= 24 ||
1637                     wtime.tm_min < 0 || wtime.tm_min >= 60 ||
1638                     wtime.tm_sec < 0 || wtime.tm_sec >= 60)
1639                         return -EINVAL;
1640
1641                 return mini_set_rtc_time(&wtime);
1642             }
1643         }
1644
1645         return -EINVAL;
1646 }
1647
1648 static int mini_rtc_open(struct inode *inode, struct file *file)
1649 {
1650         if (mini_rtc_status & RTC_IS_OPEN)
1651                 return -EBUSY;
1652
1653         mini_rtc_status |= RTC_IS_OPEN;
1654
1655         return 0;
1656 }
1657
1658 static int mini_rtc_release(struct inode *inode, struct file *file)
1659 {
1660         mini_rtc_status &= ~RTC_IS_OPEN;
1661         return 0;
1662 }
1663
1664
1665 static const struct file_operations mini_rtc_fops = {
1666         .owner          = THIS_MODULE,
1667         .ioctl          = mini_rtc_ioctl,
1668         .open           = mini_rtc_open,
1669         .release        = mini_rtc_release,
1670 };
1671
1672 static struct miscdevice rtc_mini_dev =
1673 {
1674         .minor          = RTC_MINOR,
1675         .name           = "rtc",
1676         .fops           = &mini_rtc_fops,
1677 };
1678
1679 static int __init rtc_mini_init(void)
1680 {
1681         int retval;
1682
1683         if (tlb_type == hypervisor)
1684                 mini_rtc_ops = &hypervisor_rtc_ops;
1685         else if (this_is_starfire)
1686                 mini_rtc_ops = &starfire_rtc_ops;
1687 #ifdef CONFIG_PCI
1688         else if (bq4802_regs)
1689                 mini_rtc_ops = &bq4802_rtc_ops;
1690         else if (ds1287_regs)
1691                 mini_rtc_ops = &cmos_rtc_ops;
1692 #endif /* CONFIG_PCI */
1693         else if (mstk48t02_regs)
1694                 mini_rtc_ops = &mostek_rtc_ops;
1695         else
1696                 return -ENODEV;
1697
1698         printk(KERN_INFO "Mini RTC Driver\n");
1699
1700         retval = misc_register(&rtc_mini_dev);
1701         if (retval < 0)
1702                 return retval;
1703
1704         return 0;
1705 }
1706
1707 static void __exit rtc_mini_exit(void)
1708 {
1709         misc_deregister(&rtc_mini_dev);
1710 }
1711
1712
1713 module_init(rtc_mini_init);
1714 module_exit(rtc_mini_exit);