2 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
3 * Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
9 * TODO: Need a big cleanup here. Basically, we need to have different
10 * cpufreq_driver structures for the different type of HW instead of the
11 * current mess. We also need to better deal with the detection of the
16 #include <linux/module.h>
17 #include <linux/types.h>
18 #include <linux/errno.h>
19 #include <linux/kernel.h>
20 #include <linux/delay.h>
21 #include <linux/sched.h>
22 #include <linux/adb.h>
23 #include <linux/pmu.h>
24 #include <linux/slab.h>
25 #include <linux/cpufreq.h>
26 #include <linux/init.h>
27 #include <linux/sysdev.h>
28 #include <linux/i2c.h>
29 #include <linux/hardirq.h>
31 #include <asm/machdep.h>
33 #include <asm/pmac_feature.h>
34 #include <asm/mmu_context.h>
35 #include <asm/sections.h>
36 #include <asm/cputable.h>
38 #include <asm/system.h>
40 #include <asm/keylargo.h>
42 /* WARNING !!! This will cause calibrate_delay() to be called,
43 * but this is an __init function ! So you MUST go edit
44 * init/main.c to make it non-init before enabling DEBUG_FREQ
49 * There is a problem with the core cpufreq code on SMP kernels,
50 * it won't recalculate the Bogomips properly
53 #warning "WARNING, CPUFREQ not recommended on SMP kernels"
56 extern void low_choose_7447a_dfs(int dfs);
57 extern void low_choose_750fx_pll(int pll);
58 extern void low_sleep_handler(void);
61 * Currently, PowerMac cpufreq supports only high & low frequencies
62 * that are set by the firmware
64 static unsigned int low_freq;
65 static unsigned int hi_freq;
66 static unsigned int cur_freq;
67 static unsigned int sleep_freq;
70 * Different models uses different mechanisms to switch the frequency
72 static int (*set_speed_proc)(int low_speed);
73 static unsigned int (*get_speed_proc)(void);
76 * Some definitions used by the various speedprocs
78 static u32 voltage_gpio;
79 static u32 frequency_gpio;
80 static u32 slew_done_gpio;
81 static int no_schedule;
82 static int has_cpu_l2lve;
83 static int is_pmu_based;
85 /* There are only two frequency states for each processor. Values
86 * are in kHz for the time being.
88 #define CPUFREQ_HIGH 0
91 static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
94 {0, CPUFREQ_TABLE_END},
97 static struct freq_attr* pmac_cpu_freqs_attr[] = {
98 &cpufreq_freq_attr_scaling_available_freqs,
102 static inline void local_delay(unsigned long ms)
111 static inline void debug_calc_bogomips(void)
113 /* This will cause a recalc of bogomips and display the
114 * result. We backup/restore the value to avoid affecting the
115 * core cpufreq framework's own calculation.
117 extern void calibrate_delay(void);
119 unsigned long save_lpj = loops_per_jiffy;
121 loops_per_jiffy = save_lpj;
123 #endif /* DEBUG_FREQ */
125 /* Switch CPU speed under 750FX CPU control
127 static int cpu_750fx_cpu_speed(int low_speed)
131 if (low_speed == 0) {
132 /* ramping up, set voltage first */
133 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
134 /* Make sure we sleep for at least 1ms */
137 /* tweak L2 for high voltage */
139 hid2 = mfspr(SPRN_HID2);
141 mtspr(SPRN_HID2, hid2);
145 low_choose_750fx_pll(low_speed);
147 if (low_speed == 1) {
148 /* tweak L2 for low voltage */
150 hid2 = mfspr(SPRN_HID2);
152 mtspr(SPRN_HID2, hid2);
155 /* ramping down, set voltage last */
156 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
163 static unsigned int cpu_750fx_get_cpu_speed(void)
165 if (mfspr(SPRN_HID1) & HID1_PS)
171 /* Switch CPU speed using DFS */
172 static int dfs_set_cpu_speed(int low_speed)
174 if (low_speed == 0) {
175 /* ramping up, set voltage first */
176 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
177 /* Make sure we sleep for at least 1ms */
183 low_choose_7447a_dfs(low_speed);
187 if (low_speed == 1) {
188 /* ramping down, set voltage last */
189 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
196 static unsigned int dfs_get_cpu_speed(void)
198 if (mfspr(SPRN_HID1) & HID1_DFS)
205 /* Switch CPU speed using slewing GPIOs
207 static int gpios_set_cpu_speed(int low_speed)
209 int gpio, timeout = 0;
211 /* If ramping up, set voltage first */
212 if (low_speed == 0) {
213 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
214 /* Delay is way too big but it's ok, we schedule */
219 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
220 if (low_speed == ((gpio & 0x01) == 0))
223 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
224 low_speed ? 0x04 : 0x05);
230 gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
231 } while((gpio & 0x02) == 0);
233 /* If ramping down, set voltage last */
234 if (low_speed == 1) {
235 pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
236 /* Delay is way too big but it's ok, we schedule */
241 debug_calc_bogomips();
247 /* Switch CPU speed under PMU control
249 static int pmu_set_cpu_speed(int low_speed)
251 struct adb_request req;
252 unsigned long save_l2cr;
253 unsigned long save_l3cr;
254 unsigned int pic_prio;
260 printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
264 /* Disable all interrupt sources on openpic */
265 pic_prio = mpic_cpu_get_priority();
266 mpic_cpu_set_priority(0xf);
268 /* Make sure the decrementer won't interrupt us */
269 asm volatile("mtdec %0" : : "r" (0x7fffffff));
270 /* Make sure any pending DEC interrupt occurring while we did
271 * the above didn't re-enable the DEC */
273 asm volatile("mtdec %0" : : "r" (0x7fffffff));
275 /* We can now disable MSR_EE */
276 local_irq_save(flags);
278 /* Giveup the FPU & vec */
281 #ifdef CONFIG_ALTIVEC
282 if (cpu_has_feature(CPU_FTR_ALTIVEC))
283 enable_kernel_altivec();
284 #endif /* CONFIG_ALTIVEC */
286 /* Save & disable L2 and L3 caches */
287 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
288 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
290 /* Send the new speed command. My assumption is that this command
291 * will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
293 pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
294 while (!req.complete)
297 /* Prepare the northbridge for the speed transition */
298 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
300 /* Call low level code to backup CPU state and recover from
305 /* Restore the northbridge */
306 pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
308 /* Restore L2 cache */
309 if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
310 _set_L2CR(save_l2cr);
311 /* Restore L3 cache */
312 if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
313 _set_L3CR(save_l3cr);
315 /* Restore userland MMU context */
316 set_context(current->active_mm->context.id, current->active_mm->pgd);
319 printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
322 /* Restore low level PMU operations */
325 /* Restore decrementer */
326 wakeup_decrementer();
328 /* Restore interrupts */
329 mpic_cpu_set_priority(pic_prio);
331 /* Let interrupts flow again ... */
332 local_irq_restore(flags);
335 debug_calc_bogomips();
345 static int do_set_cpu_speed(int speed_mode, int notify)
347 struct cpufreq_freqs freqs;
349 static unsigned long prev_l3cr;
351 freqs.old = cur_freq;
352 freqs.new = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
353 freqs.cpu = smp_processor_id();
355 if (freqs.old == freqs.new)
359 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
360 if (speed_mode == CPUFREQ_LOW &&
361 cpu_has_feature(CPU_FTR_L3CR)) {
363 if (l3cr & L3CR_L3E) {
368 set_speed_proc(speed_mode == CPUFREQ_LOW);
369 if (speed_mode == CPUFREQ_HIGH &&
370 cpu_has_feature(CPU_FTR_L3CR)) {
372 if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
373 _set_L3CR(prev_l3cr);
376 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
377 cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
382 static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
387 static int pmac_cpufreq_verify(struct cpufreq_policy *policy)
389 return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
392 static int pmac_cpufreq_target( struct cpufreq_policy *policy,
393 unsigned int target_freq,
394 unsigned int relation)
396 unsigned int newstate = 0;
399 if (cpufreq_frequency_table_target(policy, pmac_cpu_freqs,
400 target_freq, relation, &newstate))
403 rc = do_set_cpu_speed(newstate, 1);
405 ppc_proc_freq = cur_freq * 1000ul;
409 static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
411 if (policy->cpu != 0)
414 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
415 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
416 policy->cur = cur_freq;
418 cpufreq_frequency_table_get_attr(pmac_cpu_freqs, policy->cpu);
419 return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
422 static u32 read_gpio(struct device_node *np)
424 const u32 *reg = get_property(np, "reg", NULL);
429 /* That works for all keylargos but shall be fixed properly
430 * some day... The problem is that it seems we can't rely
431 * on the "reg" property of the GPIO nodes, they are either
432 * relative to the base of KeyLargo or to the base of the
433 * GPIO space, and the device-tree doesn't help.
436 if (offset < KEYLARGO_GPIO_LEVELS0)
437 offset += KEYLARGO_GPIO_LEVELS0;
441 static int pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
443 /* Ok, this could be made a bit smarter, but let's be robust for now. We
444 * always force a speed change to high speed before sleep, to make sure
445 * we have appropriate voltage and/or bus speed for the wakeup process,
446 * and to make sure our loops_per_jiffies are "good enough", that is will
447 * not cause too short delays if we sleep in low speed and wake in high
451 sleep_freq = cur_freq;
452 if (cur_freq == low_freq && !is_pmu_based)
453 do_set_cpu_speed(CPUFREQ_HIGH, 0);
457 static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
459 /* If we resume, first check if we have a get() function */
461 cur_freq = get_speed_proc();
465 /* We don't, hrm... we don't really know our speed here, best
466 * is that we force a switch to whatever it was, which is
467 * probably high speed due to our suspend() routine
469 do_set_cpu_speed(sleep_freq == low_freq ?
470 CPUFREQ_LOW : CPUFREQ_HIGH, 0);
472 ppc_proc_freq = cur_freq * 1000ul;
478 static struct cpufreq_driver pmac_cpufreq_driver = {
479 .verify = pmac_cpufreq_verify,
480 .target = pmac_cpufreq_target,
481 .get = pmac_cpufreq_get_speed,
482 .init = pmac_cpufreq_cpu_init,
483 .suspend = pmac_cpufreq_suspend,
484 .resume = pmac_cpufreq_resume,
485 .flags = CPUFREQ_PM_NO_WARN,
486 .attr = pmac_cpu_freqs_attr,
488 .owner = THIS_MODULE,
492 static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
494 struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
496 struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
498 struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
503 * Check to see if it's GPIO driven or PMU only
505 * The way we extract the GPIO address is slightly hackish, but it
506 * works well enough for now. We need to abstract the whole GPIO
507 * stuff sooner or later anyway
511 voltage_gpio = read_gpio(volt_gpio_np);
513 frequency_gpio = read_gpio(freq_gpio_np);
514 if (slew_done_gpio_np)
515 slew_done_gpio = read_gpio(slew_done_gpio_np);
517 /* If we use the frequency GPIOs, calculate the min/max speeds based
518 * on the bus frequencies
520 if (frequency_gpio && slew_done_gpio) {
522 const u32 *freqs, *ratio;
524 freqs = get_property(cpunode, "bus-frequencies", &lenp);
526 if (freqs == NULL || lenp != 2) {
527 printk(KERN_ERR "cpufreq: bus-frequencies incorrect or missing\n");
530 ratio = get_property(cpunode, "processor-to-bus-ratio*2", NULL);
532 printk(KERN_ERR "cpufreq: processor-to-bus-ratio*2 missing\n");
536 /* Get the min/max bus frequencies */
537 low_freq = min(freqs[0], freqs[1]);
538 hi_freq = max(freqs[0], freqs[1]);
540 /* Grrrr.. It _seems_ that the device-tree is lying on the low bus
541 * frequency, it claims it to be around 84Mhz on some models while
542 * it appears to be approx. 101Mhz on all. Let's hack around here...
543 * fortunately, we don't need to be too precise
545 if (low_freq < 98000000)
546 low_freq = 101000000;
548 /* Convert those to CPU core clocks */
549 low_freq = (low_freq * (*ratio)) / 2000;
550 hi_freq = (hi_freq * (*ratio)) / 2000;
552 /* Now we get the frequencies, we read the GPIO to see what is out current
555 rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
556 cur_freq = (rc & 0x01) ? hi_freq : low_freq;
558 set_speed_proc = gpios_set_cpu_speed;
562 /* If we use the PMU, look for the min & max frequencies in the
565 value = get_property(cpunode, "min-clock-frequency", NULL);
568 low_freq = (*value) / 1000;
569 /* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
571 if (low_freq < 100000)
574 value = get_property(cpunode, "max-clock-frequency", NULL);
577 hi_freq = (*value) / 1000;
578 set_speed_proc = pmu_set_cpu_speed;
584 static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
586 struct device_node *volt_gpio_np;
588 if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
591 volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
593 voltage_gpio = read_gpio(volt_gpio_np);
595 printk(KERN_ERR "cpufreq: missing cpu-vcore-select gpio\n");
599 /* OF only reports the high frequency */
601 low_freq = cur_freq/2;
603 /* Read actual frequency from CPU */
604 cur_freq = dfs_get_cpu_speed();
605 set_speed_proc = dfs_set_cpu_speed;
606 get_speed_proc = dfs_get_cpu_speed;
611 static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
613 struct device_node *volt_gpio_np;
617 if (get_property(cpunode, "dynamic-power-step", NULL) == NULL)
621 value = get_property(cpunode, "reduced-clock-frequency", NULL);
624 low_freq = (*value) / 1000;
626 volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
628 voltage_gpio = read_gpio(volt_gpio_np);
630 pvr = mfspr(SPRN_PVR);
631 has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
633 set_speed_proc = cpu_750fx_cpu_speed;
634 get_speed_proc = cpu_750fx_get_cpu_speed;
635 cur_freq = cpu_750fx_get_cpu_speed();
640 /* Currently, we support the following machines:
642 * - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
643 * - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
644 * - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
645 * - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
646 * - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
647 * - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
648 * - Recent MacRISC3 laptops
649 * - All new machines with 7447A CPUs
651 static int __init pmac_cpufreq_setup(void)
653 struct device_node *cpunode;
656 if (strstr(cmd_line, "nocpufreq"))
659 /* Assume only one CPU */
660 cpunode = find_type_devices("cpu");
664 /* Get current cpu clock freq */
665 value = get_property(cpunode, "clock-frequency", NULL);
668 cur_freq = (*value) / 1000;
670 /* Check for 7447A based MacRISC3 */
671 if (machine_is_compatible("MacRISC3") &&
672 get_property(cpunode, "dynamic-power-step", NULL) &&
673 PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
674 pmac_cpufreq_init_7447A(cpunode);
675 /* Check for other MacRISC3 machines */
676 } else if (machine_is_compatible("PowerBook3,4") ||
677 machine_is_compatible("PowerBook3,5") ||
678 machine_is_compatible("MacRISC3")) {
679 pmac_cpufreq_init_MacRISC3(cpunode);
680 /* Else check for iBook2 500/600 */
681 } else if (machine_is_compatible("PowerBook4,1")) {
684 set_speed_proc = pmu_set_cpu_speed;
687 /* Else check for TiPb 550 */
688 else if (machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
691 set_speed_proc = pmu_set_cpu_speed;
694 /* Else check for TiPb 400 & 500 */
695 else if (machine_is_compatible("PowerBook3,2")) {
696 /* We only know about the 400 MHz and the 500Mhz model
697 * they both have 300 MHz as low frequency
699 if (cur_freq < 350000 || cur_freq > 550000)
703 set_speed_proc = pmu_set_cpu_speed;
706 /* Else check for 750FX */
707 else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
708 pmac_cpufreq_init_750FX(cpunode);
710 if (set_speed_proc == NULL)
713 pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
714 pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
715 ppc_proc_freq = cur_freq * 1000ul;
717 printk(KERN_INFO "Registering PowerMac CPU frequency driver\n");
718 printk(KERN_INFO "Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
719 low_freq/1000, hi_freq/1000, cur_freq/1000);
721 return cpufreq_register_driver(&pmac_cpufreq_driver);
724 module_init(pmac_cpufreq_setup);