Merge branch 'master' into 85xx
[linux-2.6] / drivers / video / neofb.c
1 /*
2  * linux/drivers/video/neofb.c -- NeoMagic Framebuffer Driver
3  *
4  * Copyright (c) 2001-2002  Denis Oliver Kropp <dok@directfb.org>
5  *
6  *
7  * Card specific code is based on XFree86's neomagic driver.
8  * Framebuffer framework code is based on code of cyber2000fb.
9  *
10  * This file is subject to the terms and conditions of the GNU General
11  * Public License.  See the file COPYING in the main directory of this
12  * archive for more details.
13  *
14  *
15  * 0.4.1
16  *  - Cosmetic changes (dok)
17  *
18  * 0.4
19  *  - Toshiba Libretto support, allow modes larger than LCD size if
20  *    LCD is disabled, keep BIOS settings if internal/external display
21  *    haven't been enabled explicitly
22  *                          (Thomas J. Moore <dark@mama.indstate.edu>)
23  *
24  * 0.3.3
25  *  - Porting over to new fbdev api. (jsimmons)
26  *  
27  * 0.3.2
28  *  - got rid of all floating point (dok) 
29  *
30  * 0.3.1
31  *  - added module license (dok)
32  *
33  * 0.3
34  *  - hardware accelerated clear and move for 2200 and above (dok)
35  *  - maximum allowed dotclock is handled now (dok)
36  *
37  * 0.2.1
38  *  - correct panning after X usage (dok)
39  *  - added module and kernel parameters (dok)
40  *  - no stretching if external display is enabled (dok)
41  *
42  * 0.2
43  *  - initial version (dok)
44  *
45  *
46  * TODO
47  * - ioctl for internal/external switching
48  * - blanking
49  * - 32bit depth support, maybe impossible
50  * - disable pan-on-sync, need specs
51  *
52  * BUGS
53  * - white margin on bootup like with tdfxfb (colormap problem?)
54  *
55  */
56
57 #include <linux/module.h>
58 #include <linux/kernel.h>
59 #include <linux/errno.h>
60 #include <linux/string.h>
61 #include <linux/mm.h>
62 #include <linux/slab.h>
63 #include <linux/delay.h>
64 #include <linux/fb.h>
65 #include <linux/pci.h>
66 #include <linux/init.h>
67 #ifdef CONFIG_TOSHIBA
68 #include <linux/toshiba.h>
69 #endif
70
71 #include <asm/io.h>
72 #include <asm/irq.h>
73 #include <asm/pgtable.h>
74 #include <asm/system.h>
75 #include <asm/uaccess.h>
76
77 #ifdef CONFIG_MTRR
78 #include <asm/mtrr.h>
79 #endif
80
81 #include <video/vga.h>
82 #include <video/neomagic.h>
83
84 #define NEOFB_VERSION "0.4.2"
85
86 /* --------------------------------------------------------------------- */
87
88 static int internal;
89 static int external;
90 static int libretto;
91 static int nostretch;
92 static int nopciburst;
93 static char *mode_option __devinitdata = NULL;
94
95 #ifdef MODULE
96
97 MODULE_AUTHOR("(c) 2001-2002  Denis Oliver Kropp <dok@convergence.de>");
98 MODULE_LICENSE("GPL");
99 MODULE_DESCRIPTION("FBDev driver for NeoMagic PCI Chips");
100 module_param(internal, bool, 0);
101 MODULE_PARM_DESC(internal, "Enable output on internal LCD Display.");
102 module_param(external, bool, 0);
103 MODULE_PARM_DESC(external, "Enable output on external CRT.");
104 module_param(libretto, bool, 0);
105 MODULE_PARM_DESC(libretto, "Force Libretto 100/110 800x480 LCD.");
106 module_param(nostretch, bool, 0);
107 MODULE_PARM_DESC(nostretch,
108                  "Disable stretching of modes smaller than LCD.");
109 module_param(nopciburst, bool, 0);
110 MODULE_PARM_DESC(nopciburst, "Disable PCI burst mode.");
111 module_param(mode_option, charp, 0);
112 MODULE_PARM_DESC(mode_option, "Preferred video mode ('640x480-8@60', etc)");
113
114 #endif
115
116
117 /* --------------------------------------------------------------------- */
118
119 static biosMode bios8[] = {
120         {320, 240, 0x40},
121         {300, 400, 0x42},
122         {640, 400, 0x20},
123         {640, 480, 0x21},
124         {800, 600, 0x23},
125         {1024, 768, 0x25},
126 };
127
128 static biosMode bios16[] = {
129         {320, 200, 0x2e},
130         {320, 240, 0x41},
131         {300, 400, 0x43},
132         {640, 480, 0x31},
133         {800, 600, 0x34},
134         {1024, 768, 0x37},
135 };
136
137 static biosMode bios24[] = {
138         {640, 480, 0x32},
139         {800, 600, 0x35},
140         {1024, 768, 0x38}
141 };
142
143 #ifdef NO_32BIT_SUPPORT_YET
144 /* FIXME: guessed values, wrong */
145 static biosMode bios32[] = {
146         {640, 480, 0x33},
147         {800, 600, 0x36},
148         {1024, 768, 0x39}
149 };
150 #endif
151
152 static inline void write_le32(int regindex, u32 val, const struct neofb_par *par)
153 {
154         writel(val, par->neo2200 + par->cursorOff + regindex);
155 }
156
157 static int neoFindMode(int xres, int yres, int depth)
158 {
159         int xres_s;
160         int i, size;
161         biosMode *mode;
162
163         switch (depth) {
164         case 8:
165                 size = ARRAY_SIZE(bios8);
166                 mode = bios8;
167                 break;
168         case 16:
169                 size = ARRAY_SIZE(bios16);
170                 mode = bios16;
171                 break;
172         case 24:
173                 size = ARRAY_SIZE(bios24);
174                 mode = bios24;
175                 break;
176 #ifdef NO_32BIT_SUPPORT_YET
177         case 32:
178                 size = ARRAY_SIZE(bios32);
179                 mode = bios32;
180                 break;
181 #endif
182         default:
183                 return 0;
184         }
185
186         for (i = 0; i < size; i++) {
187                 if (xres <= mode[i].x_res) {
188                         xres_s = mode[i].x_res;
189                         for (; i < size; i++) {
190                                 if (mode[i].x_res != xres_s)
191                                         return mode[i - 1].mode;
192                                 if (yres <= mode[i].y_res)
193                                         return mode[i].mode;
194                         }
195                 }
196         }
197         return mode[size - 1].mode;
198 }
199
200 /*
201  * neoCalcVCLK --
202  *
203  * Determine the closest clock frequency to the one requested.
204  */
205 #define REF_FREQ 0xe517         /* 14.31818 in 20.12 fixed point */
206 #define MAX_N 127
207 #define MAX_D 31
208 #define MAX_F 1
209
210 static void neoCalcVCLK(const struct fb_info *info,
211                         struct neofb_par *par, long freq)
212 {
213         int n, d, f;
214         int n_best = 0, d_best = 0, f_best = 0;
215         long f_best_diff = (0x7ffff << 12);     /* 20.12 */
216         long f_target = (freq << 12) / 1000;    /* 20.12 */
217
218         for (f = 0; f <= MAX_F; f++)
219                 for (n = 0; n <= MAX_N; n++)
220                         for (d = 0; d <= MAX_D; d++) {
221                                 long f_out;     /* 20.12 */
222                                 long f_diff;    /* 20.12 */
223
224                                 f_out =
225                                     ((((n + 1) << 12) / ((d +
226                                                           1) *
227                                                          (1 << f))) >> 12)
228                                     * REF_FREQ;
229                                 f_diff = abs(f_out - f_target);
230                                 if (f_diff < f_best_diff) {
231                                         f_best_diff = f_diff;
232                                         n_best = n;
233                                         d_best = d;
234                                         f_best = f;
235                                 }
236                         }
237
238         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
239             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
240             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
241             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
242                 /* NOT_DONE:  We are trying the full range of the 2200 clock.
243                    We should be able to try n up to 2047 */
244                 par->VCLK3NumeratorLow = n_best;
245                 par->VCLK3NumeratorHigh = (f_best << 7);
246         } else
247                 par->VCLK3NumeratorLow = n_best | (f_best << 7);
248
249         par->VCLK3Denominator = d_best;
250
251 #ifdef NEOFB_DEBUG
252         printk("neoVCLK: f:%d NumLow=%d NumHi=%d Den=%d Df=%d\n",
253                f_target >> 12,
254                par->VCLK3NumeratorLow,
255                par->VCLK3NumeratorHigh,
256                par->VCLK3Denominator, f_best_diff >> 12);
257 #endif
258 }
259
260 /*
261  * vgaHWInit --
262  *      Handle the initialization, etc. of a screen.
263  *      Return FALSE on failure.
264  */
265
266 static int vgaHWInit(const struct fb_var_screeninfo *var,
267                      const struct fb_info *info,
268                      struct neofb_par *par, struct xtimings *timings)
269 {
270         par->MiscOutReg = 0x23;
271
272         if (!(timings->sync & FB_SYNC_HOR_HIGH_ACT))
273                 par->MiscOutReg |= 0x40;
274
275         if (!(timings->sync & FB_SYNC_VERT_HIGH_ACT))
276                 par->MiscOutReg |= 0x80;
277
278         /*
279          * Time Sequencer
280          */
281         par->Sequencer[0] = 0x00;
282         par->Sequencer[1] = 0x01;
283         par->Sequencer[2] = 0x0F;
284         par->Sequencer[3] = 0x00;       /* Font select */
285         par->Sequencer[4] = 0x0E;       /* Misc */
286
287         /*
288          * CRTC Controller
289          */
290         par->CRTC[0] = (timings->HTotal >> 3) - 5;
291         par->CRTC[1] = (timings->HDisplay >> 3) - 1;
292         par->CRTC[2] = (timings->HDisplay >> 3) - 1;
293         par->CRTC[3] = (((timings->HTotal >> 3) - 1) & 0x1F) | 0x80;
294         par->CRTC[4] = (timings->HSyncStart >> 3);
295         par->CRTC[5] = ((((timings->HTotal >> 3) - 1) & 0x20) << 2)
296             | (((timings->HSyncEnd >> 3)) & 0x1F);
297         par->CRTC[6] = (timings->VTotal - 2) & 0xFF;
298         par->CRTC[7] = (((timings->VTotal - 2) & 0x100) >> 8)
299             | (((timings->VDisplay - 1) & 0x100) >> 7)
300             | ((timings->VSyncStart & 0x100) >> 6)
301             | (((timings->VDisplay - 1) & 0x100) >> 5)
302             | 0x10 | (((timings->VTotal - 2) & 0x200) >> 4)
303             | (((timings->VDisplay - 1) & 0x200) >> 3)
304             | ((timings->VSyncStart & 0x200) >> 2);
305         par->CRTC[8] = 0x00;
306         par->CRTC[9] = (((timings->VDisplay - 1) & 0x200) >> 4) | 0x40;
307
308         if (timings->dblscan)
309                 par->CRTC[9] |= 0x80;
310
311         par->CRTC[10] = 0x00;
312         par->CRTC[11] = 0x00;
313         par->CRTC[12] = 0x00;
314         par->CRTC[13] = 0x00;
315         par->CRTC[14] = 0x00;
316         par->CRTC[15] = 0x00;
317         par->CRTC[16] = timings->VSyncStart & 0xFF;
318         par->CRTC[17] = (timings->VSyncEnd & 0x0F) | 0x20;
319         par->CRTC[18] = (timings->VDisplay - 1) & 0xFF;
320         par->CRTC[19] = var->xres_virtual >> 4;
321         par->CRTC[20] = 0x00;
322         par->CRTC[21] = (timings->VDisplay - 1) & 0xFF;
323         par->CRTC[22] = (timings->VTotal - 1) & 0xFF;
324         par->CRTC[23] = 0xC3;
325         par->CRTC[24] = 0xFF;
326
327         /*
328          * are these unnecessary?
329          * vgaHWHBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
330          * vgaHWVBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO);
331          */
332
333         /*
334          * Graphics Display Controller
335          */
336         par->Graphics[0] = 0x00;
337         par->Graphics[1] = 0x00;
338         par->Graphics[2] = 0x00;
339         par->Graphics[3] = 0x00;
340         par->Graphics[4] = 0x00;
341         par->Graphics[5] = 0x40;
342         par->Graphics[6] = 0x05;        /* only map 64k VGA memory !!!! */
343         par->Graphics[7] = 0x0F;
344         par->Graphics[8] = 0xFF;
345
346
347         par->Attribute[0] = 0x00;       /* standard colormap translation */
348         par->Attribute[1] = 0x01;
349         par->Attribute[2] = 0x02;
350         par->Attribute[3] = 0x03;
351         par->Attribute[4] = 0x04;
352         par->Attribute[5] = 0x05;
353         par->Attribute[6] = 0x06;
354         par->Attribute[7] = 0x07;
355         par->Attribute[8] = 0x08;
356         par->Attribute[9] = 0x09;
357         par->Attribute[10] = 0x0A;
358         par->Attribute[11] = 0x0B;
359         par->Attribute[12] = 0x0C;
360         par->Attribute[13] = 0x0D;
361         par->Attribute[14] = 0x0E;
362         par->Attribute[15] = 0x0F;
363         par->Attribute[16] = 0x41;
364         par->Attribute[17] = 0xFF;
365         par->Attribute[18] = 0x0F;
366         par->Attribute[19] = 0x00;
367         par->Attribute[20] = 0x00;
368         return 0;
369 }
370
371 static void vgaHWLock(struct vgastate *state)
372 {
373         /* Protect CRTC[0-7] */
374         vga_wcrt(state->vgabase, 0x11, vga_rcrt(state->vgabase, 0x11) | 0x80);
375 }
376
377 static void vgaHWUnlock(void)
378 {
379         /* Unprotect CRTC[0-7] */
380         vga_wcrt(NULL, 0x11, vga_rcrt(NULL, 0x11) & ~0x80);
381 }
382
383 static void neoLock(struct vgastate *state)
384 {
385         vga_wgfx(state->vgabase, 0x09, 0x00);
386         vgaHWLock(state);
387 }
388
389 static void neoUnlock(void)
390 {
391         vgaHWUnlock();
392         vga_wgfx(NULL, 0x09, 0x26);
393 }
394
395 /*
396  * VGA Palette management
397  */
398 static int paletteEnabled = 0;
399
400 static inline void VGAenablePalette(void)
401 {
402         vga_r(NULL, VGA_IS1_RC);
403         vga_w(NULL, VGA_ATT_W, 0x00);
404         paletteEnabled = 1;
405 }
406
407 static inline void VGAdisablePalette(void)
408 {
409         vga_r(NULL, VGA_IS1_RC);
410         vga_w(NULL, VGA_ATT_W, 0x20);
411         paletteEnabled = 0;
412 }
413
414 static inline void VGAwATTR(u8 index, u8 value)
415 {
416         if (paletteEnabled)
417                 index &= ~0x20;
418         else
419                 index |= 0x20;
420
421         vga_r(NULL, VGA_IS1_RC);
422         vga_wattr(NULL, index, value);
423 }
424
425 static void vgaHWProtect(int on)
426 {
427         unsigned char tmp;
428
429         if (on) {
430                 /*
431                  * Turn off screen and disable sequencer.
432                  */
433                 tmp = vga_rseq(NULL, 0x01);
434                 vga_wseq(NULL, 0x00, 0x01);             /* Synchronous Reset */
435                 vga_wseq(NULL, 0x01, tmp | 0x20);       /* disable the display */
436
437                 VGAenablePalette();
438         } else {
439                 /*
440                  * Reenable sequencer, then turn on screen.
441                  */
442                 tmp = vga_rseq(NULL, 0x01);
443                 vga_wseq(NULL, 0x01, tmp & ~0x20);      /* reenable display */
444                 vga_wseq(NULL, 0x00, 0x03);             /* clear synchronousreset */
445
446                 VGAdisablePalette();
447         }
448 }
449
450 static void vgaHWRestore(const struct fb_info *info,
451                          const struct neofb_par *par)
452 {
453         int i;
454
455         vga_w(NULL, VGA_MIS_W, par->MiscOutReg);
456
457         for (i = 1; i < 5; i++)
458                 vga_wseq(NULL, i, par->Sequencer[i]);
459
460         /* Ensure CRTC registers 0-7 are unlocked by clearing bit 7 or CRTC[17] */
461         vga_wcrt(NULL, 17, par->CRTC[17] & ~0x80);
462
463         for (i = 0; i < 25; i++)
464                 vga_wcrt(NULL, i, par->CRTC[i]);
465
466         for (i = 0; i < 9; i++)
467                 vga_wgfx(NULL, i, par->Graphics[i]);
468
469         VGAenablePalette();
470
471         for (i = 0; i < 21; i++)
472                 VGAwATTR(i, par->Attribute[i]);
473
474         VGAdisablePalette();
475 }
476
477
478 /* -------------------- Hardware specific routines ------------------------- */
479
480 /*
481  * Hardware Acceleration for Neo2200+
482  */
483 static inline int neo2200_sync(struct fb_info *info)
484 {
485         struct neofb_par *par = info->par;
486
487         while (readl(&par->neo2200->bltStat) & 1);
488         return 0;
489 }
490
491 static inline void neo2200_wait_fifo(struct fb_info *info,
492                                      int requested_fifo_space)
493 {
494         //  ndev->neo.waitfifo_calls++;
495         //  ndev->neo.waitfifo_sum += requested_fifo_space;
496
497         /* FIXME: does not work
498            if (neo_fifo_space < requested_fifo_space)
499            {
500            neo_fifo_waitcycles++;
501
502            while (1)
503            {
504            neo_fifo_space = (neo2200->bltStat >> 8);
505            if (neo_fifo_space >= requested_fifo_space)
506            break;
507            }
508            }
509            else
510            {
511            neo_fifo_cache_hits++;
512            }
513
514            neo_fifo_space -= requested_fifo_space;
515          */
516
517         neo2200_sync(info);
518 }
519
520 static inline void neo2200_accel_init(struct fb_info *info,
521                                       struct fb_var_screeninfo *var)
522 {
523         struct neofb_par *par = info->par;
524         Neo2200 __iomem *neo2200 = par->neo2200;
525         u32 bltMod, pitch;
526
527         neo2200_sync(info);
528
529         switch (var->bits_per_pixel) {
530         case 8:
531                 bltMod = NEO_MODE1_DEPTH8;
532                 pitch = var->xres_virtual;
533                 break;
534         case 15:
535         case 16:
536                 bltMod = NEO_MODE1_DEPTH16;
537                 pitch = var->xres_virtual * 2;
538                 break;
539         case 24:
540                 bltMod = NEO_MODE1_DEPTH24;
541                 pitch = var->xres_virtual * 3;
542                 break;
543         default:
544                 printk(KERN_ERR
545                        "neofb: neo2200_accel_init: unexpected bits per pixel!\n");
546                 return;
547         }
548
549         writel(bltMod << 16, &neo2200->bltStat);
550         writel((pitch << 16) | pitch, &neo2200->pitch);
551 }
552
553 /* --------------------------------------------------------------------- */
554
555 static int
556 neofb_open(struct fb_info *info, int user)
557 {
558         struct neofb_par *par = info->par;
559
560         mutex_lock(&par->open_lock);
561         if (!par->ref_count) {
562                 memset(&par->state, 0, sizeof(struct vgastate));
563                 par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS;
564                 save_vga(&par->state);
565         }
566         par->ref_count++;
567         mutex_unlock(&par->open_lock);
568
569         return 0;
570 }
571
572 static int
573 neofb_release(struct fb_info *info, int user)
574 {
575         struct neofb_par *par = info->par;
576
577         mutex_lock(&par->open_lock);
578         if (!par->ref_count) {
579                 mutex_unlock(&par->open_lock);
580                 return -EINVAL;
581         }
582         if (par->ref_count == 1) {
583                 restore_vga(&par->state);
584         }
585         par->ref_count--;
586         mutex_unlock(&par->open_lock);
587
588         return 0;
589 }
590
591 static int
592 neofb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
593 {
594         struct neofb_par *par = info->par;
595         unsigned int pixclock = var->pixclock;
596         struct xtimings timings;
597         int memlen, vramlen;
598         int mode_ok = 0;
599
600         DBG("neofb_check_var");
601
602         if (!pixclock)
603                 pixclock = 10000;       /* 10ns = 100MHz */
604         timings.pixclock = 1000000000 / pixclock;
605         if (timings.pixclock < 1)
606                 timings.pixclock = 1;
607
608         if (timings.pixclock > par->maxClock)
609                 return -EINVAL;
610
611         timings.dblscan = var->vmode & FB_VMODE_DOUBLE;
612         timings.interlaced = var->vmode & FB_VMODE_INTERLACED;
613         timings.HDisplay = var->xres;
614         timings.HSyncStart = timings.HDisplay + var->right_margin;
615         timings.HSyncEnd = timings.HSyncStart + var->hsync_len;
616         timings.HTotal = timings.HSyncEnd + var->left_margin;
617         timings.VDisplay = var->yres;
618         timings.VSyncStart = timings.VDisplay + var->lower_margin;
619         timings.VSyncEnd = timings.VSyncStart + var->vsync_len;
620         timings.VTotal = timings.VSyncEnd + var->upper_margin;
621         timings.sync = var->sync;
622
623         /* Is the mode larger than the LCD panel? */
624         if (par->internal_display &&
625             ((var->xres > par->NeoPanelWidth) ||
626              (var->yres > par->NeoPanelHeight))) {
627                 printk(KERN_INFO
628                        "Mode (%dx%d) larger than the LCD panel (%dx%d)\n",
629                        var->xres, var->yres, par->NeoPanelWidth,
630                        par->NeoPanelHeight);
631                 return -EINVAL;
632         }
633
634         /* Is the mode one of the acceptable sizes? */
635         if (!par->internal_display)
636                 mode_ok = 1;
637         else {
638                 switch (var->xres) {
639                 case 1280:
640                         if (var->yres == 1024)
641                                 mode_ok = 1;
642                         break;
643                 case 1024:
644                         if (var->yres == 768)
645                                 mode_ok = 1;
646                         break;
647                 case 800:
648                         if (var->yres == (par->libretto ? 480 : 600))
649                                 mode_ok = 1;
650                         break;
651                 case 640:
652                         if (var->yres == 480)
653                                 mode_ok = 1;
654                         break;
655                 }
656         }
657
658         if (!mode_ok) {
659                 printk(KERN_INFO
660                        "Mode (%dx%d) won't display properly on LCD\n",
661                        var->xres, var->yres);
662                 return -EINVAL;
663         }
664
665         var->red.msb_right = 0;
666         var->green.msb_right = 0;
667         var->blue.msb_right = 0;
668
669         switch (var->bits_per_pixel) {
670         case 8:         /* PSEUDOCOLOUR, 256 */
671                 var->transp.offset = 0;
672                 var->transp.length = 0;
673                 var->red.offset = 0;
674                 var->red.length = 8;
675                 var->green.offset = 0;
676                 var->green.length = 8;
677                 var->blue.offset = 0;
678                 var->blue.length = 8;
679                 break;
680
681         case 16:                /* DIRECTCOLOUR, 64k */
682                 var->transp.offset = 0;
683                 var->transp.length = 0;
684                 var->red.offset = 11;
685                 var->red.length = 5;
686                 var->green.offset = 5;
687                 var->green.length = 6;
688                 var->blue.offset = 0;
689                 var->blue.length = 5;
690                 break;
691
692         case 24:                /* TRUECOLOUR, 16m */
693                 var->transp.offset = 0;
694                 var->transp.length = 0;
695                 var->red.offset = 16;
696                 var->red.length = 8;
697                 var->green.offset = 8;
698                 var->green.length = 8;
699                 var->blue.offset = 0;
700                 var->blue.length = 8;
701                 break;
702
703 #ifdef NO_32BIT_SUPPORT_YET
704         case 32:                /* TRUECOLOUR, 16m */
705                 var->transp.offset = 24;
706                 var->transp.length = 8;
707                 var->red.offset = 16;
708                 var->red.length = 8;
709                 var->green.offset = 8;
710                 var->green.length = 8;
711                 var->blue.offset = 0;
712                 var->blue.length = 8;
713                 break;
714 #endif
715         default:
716                 printk(KERN_WARNING "neofb: no support for %dbpp\n",
717                        var->bits_per_pixel);
718                 return -EINVAL;
719         }
720
721         vramlen = info->fix.smem_len;
722         if (vramlen > 4 * 1024 * 1024)
723                 vramlen = 4 * 1024 * 1024;
724
725         if (var->yres_virtual < var->yres)
726                 var->yres_virtual = var->yres;
727         if (var->xres_virtual < var->xres)
728                 var->xres_virtual = var->xres;
729
730         memlen = var->xres_virtual * var->bits_per_pixel * var->yres_virtual >> 3;
731
732         if (memlen > vramlen) {
733                 var->yres_virtual =  vramlen * 8 / (var->xres_virtual *
734                                         var->bits_per_pixel);
735                 memlen = var->xres_virtual * var->bits_per_pixel *
736                                 var->yres_virtual / 8;
737         }
738
739         /* we must round yres/xres down, we already rounded y/xres_virtual up
740            if it was possible. We should return -EINVAL, but I disagree */
741         if (var->yres_virtual < var->yres)
742                 var->yres = var->yres_virtual;
743         if (var->xres_virtual < var->xres)
744                 var->xres = var->xres_virtual;
745         if (var->xoffset + var->xres > var->xres_virtual)
746                 var->xoffset = var->xres_virtual - var->xres;
747         if (var->yoffset + var->yres > var->yres_virtual)
748                 var->yoffset = var->yres_virtual - var->yres;
749
750         var->nonstd = 0;
751         var->height = -1;
752         var->width = -1;
753
754         if (var->bits_per_pixel >= 24 || !par->neo2200)
755                 var->accel_flags &= ~FB_ACCELF_TEXT;
756         return 0;
757 }
758
759 static int neofb_set_par(struct fb_info *info)
760 {
761         struct neofb_par *par = info->par;
762         struct xtimings timings;
763         unsigned char temp;
764         int i, clock_hi = 0;
765         int lcd_stretch;
766         int hoffset, voffset;
767
768         DBG("neofb_set_par");
769
770         neoUnlock();
771
772         vgaHWProtect(1);        /* Blank the screen */
773
774         timings.dblscan = info->var.vmode & FB_VMODE_DOUBLE;
775         timings.interlaced = info->var.vmode & FB_VMODE_INTERLACED;
776         timings.HDisplay = info->var.xres;
777         timings.HSyncStart = timings.HDisplay + info->var.right_margin;
778         timings.HSyncEnd = timings.HSyncStart + info->var.hsync_len;
779         timings.HTotal = timings.HSyncEnd + info->var.left_margin;
780         timings.VDisplay = info->var.yres;
781         timings.VSyncStart = timings.VDisplay + info->var.lower_margin;
782         timings.VSyncEnd = timings.VSyncStart + info->var.vsync_len;
783         timings.VTotal = timings.VSyncEnd + info->var.upper_margin;
784         timings.sync = info->var.sync;
785         timings.pixclock = PICOS2KHZ(info->var.pixclock);
786
787         if (timings.pixclock < 1)
788                 timings.pixclock = 1;
789
790         /*
791          * This will allocate the datastructure and initialize all of the
792          * generic VGA registers.
793          */
794
795         if (vgaHWInit(&info->var, info, par, &timings))
796                 return -EINVAL;
797
798         /*
799          * The default value assigned by vgaHW.c is 0x41, but this does
800          * not work for NeoMagic.
801          */
802         par->Attribute[16] = 0x01;
803
804         switch (info->var.bits_per_pixel) {
805         case 8:
806                 par->CRTC[0x13] = info->var.xres_virtual >> 3;
807                 par->ExtCRTOffset = info->var.xres_virtual >> 11;
808                 par->ExtColorModeSelect = 0x11;
809                 break;
810         case 16:
811                 par->CRTC[0x13] = info->var.xres_virtual >> 2;
812                 par->ExtCRTOffset = info->var.xres_virtual >> 10;
813                 par->ExtColorModeSelect = 0x13;
814                 break;
815         case 24:
816                 par->CRTC[0x13] = (info->var.xres_virtual * 3) >> 3;
817                 par->ExtCRTOffset = (info->var.xres_virtual * 3) >> 11;
818                 par->ExtColorModeSelect = 0x14;
819                 break;
820 #ifdef NO_32BIT_SUPPORT_YET
821         case 32:                /* FIXME: guessed values */
822                 par->CRTC[0x13] = info->var.xres_virtual >> 1;
823                 par->ExtCRTOffset = info->var.xres_virtual >> 9;
824                 par->ExtColorModeSelect = 0x15;
825                 break;
826 #endif
827         default:
828                 break;
829         }
830
831         par->ExtCRTDispAddr = 0x10;
832
833         /* Vertical Extension */
834         par->VerticalExt = (((timings.VTotal - 2) & 0x400) >> 10)
835             | (((timings.VDisplay - 1) & 0x400) >> 9)
836             | (((timings.VSyncStart) & 0x400) >> 8)
837             | (((timings.VSyncStart) & 0x400) >> 7);
838
839         /* Fast write bursts on unless disabled. */
840         if (par->pci_burst)
841                 par->SysIfaceCntl1 = 0x30;
842         else
843                 par->SysIfaceCntl1 = 0x00;
844
845         par->SysIfaceCntl2 = 0xc0;      /* VESA Bios sets this to 0x80! */
846
847         /* Initialize: by default, we want display config register to be read */
848         par->PanelDispCntlRegRead = 1;
849
850         /* Enable any user specified display devices. */
851         par->PanelDispCntlReg1 = 0x00;
852         if (par->internal_display)
853                 par->PanelDispCntlReg1 |= 0x02;
854         if (par->external_display)
855                 par->PanelDispCntlReg1 |= 0x01;
856
857         /* If the user did not specify any display devices, then... */
858         if (par->PanelDispCntlReg1 == 0x00) {
859                 /* Default to internal (i.e., LCD) only. */
860                 par->PanelDispCntlReg1 = vga_rgfx(NULL, 0x20) & 0x03;
861         }
862
863         /* If we are using a fixed mode, then tell the chip we are. */
864         switch (info->var.xres) {
865         case 1280:
866                 par->PanelDispCntlReg1 |= 0x60;
867                 break;
868         case 1024:
869                 par->PanelDispCntlReg1 |= 0x40;
870                 break;
871         case 800:
872                 par->PanelDispCntlReg1 |= 0x20;
873                 break;
874         case 640:
875         default:
876                 break;
877         }
878
879         /* Setup shadow register locking. */
880         switch (par->PanelDispCntlReg1 & 0x03) {
881         case 0x01:              /* External CRT only mode: */
882                 par->GeneralLockReg = 0x00;
883                 /* We need to program the VCLK for external display only mode. */
884                 par->ProgramVCLK = 1;
885                 break;
886         case 0x02:              /* Internal LCD only mode: */
887         case 0x03:              /* Simultaneous internal/external (LCD/CRT) mode: */
888                 par->GeneralLockReg = 0x01;
889                 /* Don't program the VCLK when using the LCD. */
890                 par->ProgramVCLK = 0;
891                 break;
892         }
893
894         /*
895          * If the screen is to be stretched, turn on stretching for the
896          * various modes.
897          *
898          * OPTION_LCD_STRETCH means stretching should be turned off!
899          */
900         par->PanelDispCntlReg2 = 0x00;
901         par->PanelDispCntlReg3 = 0x00;
902
903         if (par->lcd_stretch && (par->PanelDispCntlReg1 == 0x02) &&     /* LCD only */
904             (info->var.xres != par->NeoPanelWidth)) {
905                 switch (info->var.xres) {
906                 case 320:       /* Needs testing.  KEM -- 24 May 98 */
907                 case 400:       /* Needs testing.  KEM -- 24 May 98 */
908                 case 640:
909                 case 800:
910                 case 1024:
911                         lcd_stretch = 1;
912                         par->PanelDispCntlReg2 |= 0xC6;
913                         break;
914                 default:
915                         lcd_stretch = 0;
916                         /* No stretching in these modes. */
917                 }
918         } else
919                 lcd_stretch = 0;
920
921         /*
922          * If the screen is to be centerd, turn on the centering for the
923          * various modes.
924          */
925         par->PanelVertCenterReg1 = 0x00;
926         par->PanelVertCenterReg2 = 0x00;
927         par->PanelVertCenterReg3 = 0x00;
928         par->PanelVertCenterReg4 = 0x00;
929         par->PanelVertCenterReg5 = 0x00;
930         par->PanelHorizCenterReg1 = 0x00;
931         par->PanelHorizCenterReg2 = 0x00;
932         par->PanelHorizCenterReg3 = 0x00;
933         par->PanelHorizCenterReg4 = 0x00;
934         par->PanelHorizCenterReg5 = 0x00;
935
936
937         if (par->PanelDispCntlReg1 & 0x02) {
938                 if (info->var.xres == par->NeoPanelWidth) {
939                         /*
940                          * No centering required when the requested display width
941                          * equals the panel width.
942                          */
943                 } else {
944                         par->PanelDispCntlReg2 |= 0x01;
945                         par->PanelDispCntlReg3 |= 0x10;
946
947                         /* Calculate the horizontal and vertical offsets. */
948                         if (!lcd_stretch) {
949                                 hoffset =
950                                     ((par->NeoPanelWidth -
951                                       info->var.xres) >> 4) - 1;
952                                 voffset =
953                                     ((par->NeoPanelHeight -
954                                       info->var.yres) >> 1) - 2;
955                         } else {
956                                 /* Stretched modes cannot be centered. */
957                                 hoffset = 0;
958                                 voffset = 0;
959                         }
960
961                         switch (info->var.xres) {
962                         case 320:       /* Needs testing.  KEM -- 24 May 98 */
963                                 par->PanelHorizCenterReg3 = hoffset;
964                                 par->PanelVertCenterReg2 = voffset;
965                                 break;
966                         case 400:       /* Needs testing.  KEM -- 24 May 98 */
967                                 par->PanelHorizCenterReg4 = hoffset;
968                                 par->PanelVertCenterReg1 = voffset;
969                                 break;
970                         case 640:
971                                 par->PanelHorizCenterReg1 = hoffset;
972                                 par->PanelVertCenterReg3 = voffset;
973                                 break;
974                         case 800:
975                                 par->PanelHorizCenterReg2 = hoffset;
976                                 par->PanelVertCenterReg4 = voffset;
977                                 break;
978                         case 1024:
979                                 par->PanelHorizCenterReg5 = hoffset;
980                                 par->PanelVertCenterReg5 = voffset;
981                                 break;
982                         case 1280:
983                         default:
984                                 /* No centering in these modes. */
985                                 break;
986                         }
987                 }
988         }
989
990         par->biosMode =
991             neoFindMode(info->var.xres, info->var.yres,
992                         info->var.bits_per_pixel);
993
994         /*
995          * Calculate the VCLK that most closely matches the requested dot
996          * clock.
997          */
998         neoCalcVCLK(info, par, timings.pixclock);
999
1000         /* Since we program the clocks ourselves, always use VCLK3. */
1001         par->MiscOutReg |= 0x0C;
1002
1003         /* alread unlocked above */
1004         /* BOGUS  vga_wgfx(NULL, 0x09, 0x26); */
1005
1006         /* don't know what this is, but it's 0 from bootup anyway */
1007         vga_wgfx(NULL, 0x15, 0x00);
1008
1009         /* was set to 0x01 by my bios in text and vesa modes */
1010         vga_wgfx(NULL, 0x0A, par->GeneralLockReg);
1011
1012         /*
1013          * The color mode needs to be set before calling vgaHWRestore
1014          * to ensure the DAC is initialized properly.
1015          *
1016          * NOTE: Make sure we don't change bits make sure we don't change
1017          * any reserved bits.
1018          */
1019         temp = vga_rgfx(NULL, 0x90);
1020         switch (info->fix.accel) {
1021         case FB_ACCEL_NEOMAGIC_NM2070:
1022                 temp &= 0xF0;   /* Save bits 7:4 */
1023                 temp |= (par->ExtColorModeSelect & ~0xF0);
1024                 break;
1025         case FB_ACCEL_NEOMAGIC_NM2090:
1026         case FB_ACCEL_NEOMAGIC_NM2093:
1027         case FB_ACCEL_NEOMAGIC_NM2097:
1028         case FB_ACCEL_NEOMAGIC_NM2160:
1029         case FB_ACCEL_NEOMAGIC_NM2200:
1030         case FB_ACCEL_NEOMAGIC_NM2230:
1031         case FB_ACCEL_NEOMAGIC_NM2360:
1032         case FB_ACCEL_NEOMAGIC_NM2380:
1033                 temp &= 0x70;   /* Save bits 6:4 */
1034                 temp |= (par->ExtColorModeSelect & ~0x70);
1035                 break;
1036         }
1037
1038         vga_wgfx(NULL, 0x90, temp);
1039
1040         /*
1041          * In some rare cases a lockup might occur if we don't delay
1042          * here. (Reported by Miles Lane)
1043          */
1044         //mdelay(200);
1045
1046         /*
1047          * Disable horizontal and vertical graphics and text expansions so
1048          * that vgaHWRestore works properly.
1049          */
1050         temp = vga_rgfx(NULL, 0x25);
1051         temp &= 0x39;
1052         vga_wgfx(NULL, 0x25, temp);
1053
1054         /*
1055          * Sleep for 200ms to make sure that the two operations above have
1056          * had time to take effect.
1057          */
1058         mdelay(200);
1059
1060         /*
1061          * This function handles restoring the generic VGA registers.  */
1062         vgaHWRestore(info, par);
1063
1064         /* linear colormap for non palettized modes */
1065         switch (info->var.bits_per_pixel) {
1066         case 8:
1067                 /* PseudoColor, 256 */
1068                 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
1069                 break;
1070         case 16:
1071                 /* TrueColor, 64k */
1072                 info->fix.visual = FB_VISUAL_TRUECOLOR;
1073
1074                 for (i = 0; i < 64; i++) {
1075                         outb(i, 0x3c8);
1076
1077                         outb(i << 1, 0x3c9);
1078                         outb(i, 0x3c9);
1079                         outb(i << 1, 0x3c9);
1080                 }
1081                 break;
1082         case 24:
1083 #ifdef NO_32BIT_SUPPORT_YET
1084         case 32:
1085 #endif
1086                 /* TrueColor, 16m */
1087                 info->fix.visual = FB_VISUAL_TRUECOLOR;
1088
1089                 for (i = 0; i < 256; i++) {
1090                         outb(i, 0x3c8);
1091
1092                         outb(i, 0x3c9);
1093                         outb(i, 0x3c9);
1094                         outb(i, 0x3c9);
1095                 }
1096                 break;
1097         }
1098
1099         vga_wgfx(NULL, 0x0E, par->ExtCRTDispAddr);
1100         vga_wgfx(NULL, 0x0F, par->ExtCRTOffset);
1101         temp = vga_rgfx(NULL, 0x10);
1102         temp &= 0x0F;           /* Save bits 3:0 */
1103         temp |= (par->SysIfaceCntl1 & ~0x0F);   /* VESA Bios sets bit 1! */
1104         vga_wgfx(NULL, 0x10, temp);
1105
1106         vga_wgfx(NULL, 0x11, par->SysIfaceCntl2);
1107         vga_wgfx(NULL, 0x15, 0 /*par->SingleAddrPage */ );
1108         vga_wgfx(NULL, 0x16, 0 /*par->DualAddrPage */ );
1109
1110         temp = vga_rgfx(NULL, 0x20);
1111         switch (info->fix.accel) {
1112         case FB_ACCEL_NEOMAGIC_NM2070:
1113                 temp &= 0xFC;   /* Save bits 7:2 */
1114                 temp |= (par->PanelDispCntlReg1 & ~0xFC);
1115                 break;
1116         case FB_ACCEL_NEOMAGIC_NM2090:
1117         case FB_ACCEL_NEOMAGIC_NM2093:
1118         case FB_ACCEL_NEOMAGIC_NM2097:
1119         case FB_ACCEL_NEOMAGIC_NM2160:
1120                 temp &= 0xDC;   /* Save bits 7:6,4:2 */
1121                 temp |= (par->PanelDispCntlReg1 & ~0xDC);
1122                 break;
1123         case FB_ACCEL_NEOMAGIC_NM2200:
1124         case FB_ACCEL_NEOMAGIC_NM2230:
1125         case FB_ACCEL_NEOMAGIC_NM2360:
1126         case FB_ACCEL_NEOMAGIC_NM2380:
1127                 temp &= 0x98;   /* Save bits 7,4:3 */
1128                 temp |= (par->PanelDispCntlReg1 & ~0x98);
1129                 break;
1130         }
1131         vga_wgfx(NULL, 0x20, temp);
1132
1133         temp = vga_rgfx(NULL, 0x25);
1134         temp &= 0x38;           /* Save bits 5:3 */
1135         temp |= (par->PanelDispCntlReg2 & ~0x38);
1136         vga_wgfx(NULL, 0x25, temp);
1137
1138         if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1139                 temp = vga_rgfx(NULL, 0x30);
1140                 temp &= 0xEF;   /* Save bits 7:5 and bits 3:0 */
1141                 temp |= (par->PanelDispCntlReg3 & ~0xEF);
1142                 vga_wgfx(NULL, 0x30, temp);
1143         }
1144
1145         vga_wgfx(NULL, 0x28, par->PanelVertCenterReg1);
1146         vga_wgfx(NULL, 0x29, par->PanelVertCenterReg2);
1147         vga_wgfx(NULL, 0x2a, par->PanelVertCenterReg3);
1148
1149         if (info->fix.accel != FB_ACCEL_NEOMAGIC_NM2070) {
1150                 vga_wgfx(NULL, 0x32, par->PanelVertCenterReg4);
1151                 vga_wgfx(NULL, 0x33, par->PanelHorizCenterReg1);
1152                 vga_wgfx(NULL, 0x34, par->PanelHorizCenterReg2);
1153                 vga_wgfx(NULL, 0x35, par->PanelHorizCenterReg3);
1154         }
1155
1156         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2160)
1157                 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1158
1159         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1160             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1161             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1162             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1163                 vga_wgfx(NULL, 0x36, par->PanelHorizCenterReg4);
1164                 vga_wgfx(NULL, 0x37, par->PanelVertCenterReg5);
1165                 vga_wgfx(NULL, 0x38, par->PanelHorizCenterReg5);
1166
1167                 clock_hi = 1;
1168         }
1169
1170         /* Program VCLK3 if needed. */
1171         if (par->ProgramVCLK && ((vga_rgfx(NULL, 0x9B) != par->VCLK3NumeratorLow)
1172                                  || (vga_rgfx(NULL, 0x9F) != par->VCLK3Denominator)
1173                                  || (clock_hi && ((vga_rgfx(NULL, 0x8F) & ~0x0f)
1174                                                   != (par->VCLK3NumeratorHigh &
1175                                                       ~0x0F))))) {
1176                 vga_wgfx(NULL, 0x9B, par->VCLK3NumeratorLow);
1177                 if (clock_hi) {
1178                         temp = vga_rgfx(NULL, 0x8F);
1179                         temp &= 0x0F;   /* Save bits 3:0 */
1180                         temp |= (par->VCLK3NumeratorHigh & ~0x0F);
1181                         vga_wgfx(NULL, 0x8F, temp);
1182                 }
1183                 vga_wgfx(NULL, 0x9F, par->VCLK3Denominator);
1184         }
1185
1186         if (par->biosMode)
1187                 vga_wcrt(NULL, 0x23, par->biosMode);
1188
1189         vga_wgfx(NULL, 0x93, 0xc0);     /* Gives 5x faster framebuffer writes !!! */
1190
1191         /* Program vertical extension register */
1192         if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 ||
1193             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 ||
1194             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 ||
1195             info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) {
1196                 vga_wcrt(NULL, 0x70, par->VerticalExt);
1197         }
1198
1199         vgaHWProtect(0);        /* Turn on screen */
1200
1201         /* Calling this also locks offset registers required in update_start */
1202         neoLock(&par->state);
1203
1204         info->fix.line_length =
1205             info->var.xres_virtual * (info->var.bits_per_pixel >> 3);
1206
1207         switch (info->fix.accel) {
1208                 case FB_ACCEL_NEOMAGIC_NM2200:
1209                 case FB_ACCEL_NEOMAGIC_NM2230: 
1210                 case FB_ACCEL_NEOMAGIC_NM2360: 
1211                 case FB_ACCEL_NEOMAGIC_NM2380: 
1212                         neo2200_accel_init(info, &info->var);
1213                         break;
1214                 default:
1215                         break;
1216         }       
1217         return 0;
1218 }
1219
1220 static void neofb_update_start(struct fb_info *info,
1221                                struct fb_var_screeninfo *var)
1222 {
1223         struct neofb_par *par = info->par;
1224         struct vgastate *state = &par->state;
1225         int oldExtCRTDispAddr;
1226         int Base;
1227
1228         DBG("neofb_update_start");
1229
1230         Base = (var->yoffset * var->xres_virtual + var->xoffset) >> 2;
1231         Base *= (var->bits_per_pixel + 7) / 8;
1232
1233         neoUnlock();
1234
1235         /*
1236          * These are the generic starting address registers.
1237          */
1238         vga_wcrt(state->vgabase, 0x0C, (Base & 0x00FF00) >> 8);
1239         vga_wcrt(state->vgabase, 0x0D, (Base & 0x00FF));
1240
1241         /*
1242          * Make sure we don't clobber some other bits that might already
1243          * have been set. NOTE: NM2200 has a writable bit 3, but it shouldn't
1244          * be needed.
1245          */
1246         oldExtCRTDispAddr = vga_rgfx(NULL, 0x0E);
1247         vga_wgfx(state->vgabase, 0x0E, (((Base >> 16) & 0x0f) | (oldExtCRTDispAddr & 0xf0)));
1248
1249         neoLock(state);
1250 }
1251
1252 /*
1253  *    Pan or Wrap the Display
1254  */
1255 static int neofb_pan_display(struct fb_var_screeninfo *var,
1256                              struct fb_info *info)
1257 {
1258         u_int y_bottom;
1259
1260         y_bottom = var->yoffset;
1261
1262         if (!(var->vmode & FB_VMODE_YWRAP))
1263                 y_bottom += var->yres;
1264
1265         if (var->xoffset > (var->xres_virtual - var->xres))
1266                 return -EINVAL;
1267         if (y_bottom > info->var.yres_virtual)
1268                 return -EINVAL;
1269
1270         neofb_update_start(info, var);
1271
1272         info->var.xoffset = var->xoffset;
1273         info->var.yoffset = var->yoffset;
1274
1275         if (var->vmode & FB_VMODE_YWRAP)
1276                 info->var.vmode |= FB_VMODE_YWRAP;
1277         else
1278                 info->var.vmode &= ~FB_VMODE_YWRAP;
1279         return 0;
1280 }
1281
1282 static int neofb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
1283                            u_int transp, struct fb_info *fb)
1284 {
1285         if (regno >= fb->cmap.len || regno > 255)
1286                 return -EINVAL;
1287
1288         switch (fb->var.bits_per_pixel) {
1289         case 8:
1290                 outb(regno, 0x3c8);
1291
1292                 outb(red >> 10, 0x3c9);
1293                 outb(green >> 10, 0x3c9);
1294                 outb(blue >> 10, 0x3c9);
1295                 break;
1296         case 16:
1297                 ((u32 *) fb->pseudo_palette)[regno] =
1298                                 ((red & 0xf800)) | ((green & 0xfc00) >> 5) |
1299                                 ((blue & 0xf800) >> 11);
1300                 break;
1301         case 24:
1302                 ((u32 *) fb->pseudo_palette)[regno] =
1303                                 ((red & 0xff00) << 8) | ((green & 0xff00)) |
1304                                 ((blue & 0xff00) >> 8);
1305                 break;
1306 #ifdef NO_32BIT_SUPPORT_YET
1307         case 32:
1308                 ((u32 *) fb->pseudo_palette)[regno] =
1309                                 ((transp & 0xff00) << 16) | ((red & 0xff00) << 8) |
1310                                 ((green & 0xff00)) | ((blue & 0xff00) >> 8);
1311                 break;
1312 #endif
1313         default:
1314                 return 1;
1315         }
1316         return 0;
1317 }
1318
1319 /*
1320  *    (Un)Blank the display.
1321  */
1322 static int neofb_blank(int blank_mode, struct fb_info *info)
1323 {
1324         /*
1325          *  Blank the screen if blank_mode != 0, else unblank.
1326          *  Return 0 if blanking succeeded, != 0 if un-/blanking failed due to
1327          *  e.g. a video mode which doesn't support it. Implements VESA suspend
1328          *  and powerdown modes for monitors, and backlight control on LCDs.
1329          *    blank_mode == 0: unblanked (backlight on)
1330          *    blank_mode == 1: blank (backlight on)
1331          *    blank_mode == 2: suspend vsync (backlight off)
1332          *    blank_mode == 3: suspend hsync (backlight off)
1333          *    blank_mode == 4: powerdown (backlight off)
1334          *
1335          *  wms...Enable VESA DPMS compatible powerdown mode
1336          *  run "setterm -powersave powerdown" to take advantage
1337          */
1338         struct neofb_par *par = info->par;
1339         int seqflags, lcdflags, dpmsflags, reg, tmpdisp;
1340
1341         /*
1342          * Read back the register bits related to display configuration. They might
1343          * have been changed underneath the driver via Fn key stroke.
1344          */
1345         neoUnlock();
1346         tmpdisp = vga_rgfx(NULL, 0x20) & 0x03;
1347         neoLock(&par->state);
1348
1349         /* In case we blank the screen, we want to store the possibly new
1350          * configuration in the driver. During un-blank, we re-apply this setting,
1351          * since the LCD bit will be cleared in order to switch off the backlight.
1352          */
1353         if (par->PanelDispCntlRegRead) {
1354                 par->PanelDispCntlReg1 = tmpdisp;
1355         }
1356         par->PanelDispCntlRegRead = !blank_mode;
1357
1358         switch (blank_mode) {
1359         case FB_BLANK_POWERDOWN:        /* powerdown - both sync lines down */
1360                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1361                 lcdflags = 0;                   /* LCD off */
1362                 dpmsflags = NEO_GR01_SUPPRESS_HSYNC |
1363                             NEO_GR01_SUPPRESS_VSYNC;
1364 #ifdef CONFIG_TOSHIBA
1365                 /* Do we still need this ? */
1366                 /* attempt to turn off backlight on toshiba; also turns off external */
1367                 {
1368                         SMMRegisters regs;
1369
1370                         regs.eax = 0xff00; /* HCI_SET */
1371                         regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1372                         regs.ecx = 0x0000; /* HCI_DISABLE */
1373                         tosh_smm(&regs);
1374                 }
1375 #endif
1376                 break;
1377         case FB_BLANK_HSYNC_SUSPEND:            /* hsync off */
1378                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1379                 lcdflags = 0;                   /* LCD off */
1380                 dpmsflags = NEO_GR01_SUPPRESS_HSYNC;
1381                 break;
1382         case FB_BLANK_VSYNC_SUSPEND:            /* vsync off */
1383                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1384                 lcdflags = 0;                   /* LCD off */
1385                 dpmsflags = NEO_GR01_SUPPRESS_VSYNC;
1386                 break;
1387         case FB_BLANK_NORMAL:           /* just blank screen (backlight stays on) */
1388                 seqflags = VGA_SR01_SCREEN_OFF; /* Disable sequencer */
1389                 /*
1390                  * During a blank operation with the LID shut, we might store "LCD off"
1391                  * by mistake. Due to timing issues, the BIOS may switch the lights
1392                  * back on, and we turn it back off once we "unblank".
1393                  *
1394                  * So here is an attempt to implement ">=" - if we are in the process
1395                  * of unblanking, and the LCD bit is unset in the driver but set in the
1396                  * register, we must keep it.
1397                  */
1398                 lcdflags = ((par->PanelDispCntlReg1 | tmpdisp) & 0x02); /* LCD normal */
1399                 dpmsflags = 0x00;       /* no hsync/vsync suppression */
1400                 break;
1401         case FB_BLANK_UNBLANK:          /* unblank */
1402                 seqflags = 0;                   /* Enable sequencer */
1403                 lcdflags = ((par->PanelDispCntlReg1 | tmpdisp) & 0x02); /* LCD normal */
1404                 dpmsflags = 0x00;       /* no hsync/vsync suppression */
1405 #ifdef CONFIG_TOSHIBA
1406                 /* Do we still need this ? */
1407                 /* attempt to re-enable backlight/external on toshiba */
1408                 {
1409                         SMMRegisters regs;
1410
1411                         regs.eax = 0xff00; /* HCI_SET */
1412                         regs.ebx = 0x0002; /* HCI_BACKLIGHT */
1413                         regs.ecx = 0x0001; /* HCI_ENABLE */
1414                         tosh_smm(&regs);
1415                 }
1416 #endif
1417                 break;
1418         default:        /* Anything else we don't understand; return 1 to tell
1419                          * fb_blank we didn't aactually do anything */
1420                 return 1;
1421         }
1422
1423         neoUnlock();
1424         reg = (vga_rseq(NULL, 0x01) & ~0x20) | seqflags;
1425         vga_wseq(NULL, 0x01, reg);
1426         reg = (vga_rgfx(NULL, 0x20) & ~0x02) | lcdflags;
1427         vga_wgfx(NULL, 0x20, reg);
1428         reg = (vga_rgfx(NULL, 0x01) & ~0xF0) | 0x80 | dpmsflags;
1429         vga_wgfx(NULL, 0x01, reg);
1430         neoLock(&par->state);
1431         return 0;
1432 }
1433
1434 static void
1435 neo2200_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1436 {
1437         struct neofb_par *par = info->par;
1438         u_long dst, rop;
1439
1440         dst = rect->dx + rect->dy * info->var.xres_virtual;
1441         rop = rect->rop ? 0x060000 : 0x0c0000;
1442
1443         neo2200_wait_fifo(info, 4);
1444
1445         /* set blt control */
1446         writel(NEO_BC3_FIFO_EN |
1447                NEO_BC0_SRC_IS_FG | NEO_BC3_SKIP_MAPPING |
1448                //               NEO_BC3_DST_XY_ADDR  |
1449                //               NEO_BC3_SRC_XY_ADDR  |
1450                rop, &par->neo2200->bltCntl);
1451
1452         switch (info->var.bits_per_pixel) {
1453         case 8:
1454                 writel(rect->color, &par->neo2200->fgColor);
1455                 break;
1456         case 16:
1457         case 24:
1458                 writel(((u32 *) (info->pseudo_palette))[rect->color],
1459                        &par->neo2200->fgColor);
1460                 break;
1461         }
1462
1463         writel(dst * ((info->var.bits_per_pixel + 7) >> 3),
1464                &par->neo2200->dstStart);
1465         writel((rect->height << 16) | (rect->width & 0xffff),
1466                &par->neo2200->xyExt);
1467 }
1468
1469 static void
1470 neo2200_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1471 {
1472         u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy;
1473         struct neofb_par *par = info->par;
1474         u_long src, dst, bltCntl;
1475
1476         bltCntl = NEO_BC3_FIFO_EN | NEO_BC3_SKIP_MAPPING | 0x0C0000;
1477
1478         if ((dy > sy) || ((dy == sy) && (dx > sx))) {
1479                 /* Start with the lower right corner */
1480                 sy += (area->height - 1);
1481                 dy += (area->height - 1);
1482                 sx += (area->width - 1);
1483                 dx += (area->width - 1);
1484
1485                 bltCntl |= NEO_BC0_X_DEC | NEO_BC0_DST_Y_DEC | NEO_BC0_SRC_Y_DEC;
1486         }
1487
1488         src = sx * (info->var.bits_per_pixel >> 3) + sy*info->fix.line_length;
1489         dst = dx * (info->var.bits_per_pixel >> 3) + dy*info->fix.line_length;
1490
1491         neo2200_wait_fifo(info, 4);
1492
1493         /* set blt control */
1494         writel(bltCntl, &par->neo2200->bltCntl);
1495
1496         writel(src, &par->neo2200->srcStart);
1497         writel(dst, &par->neo2200->dstStart);
1498         writel((area->height << 16) | (area->width & 0xffff),
1499                &par->neo2200->xyExt);
1500 }
1501
1502 static void
1503 neo2200_imageblit(struct fb_info *info, const struct fb_image *image)
1504 {
1505         struct neofb_par *par = info->par;
1506         int s_pitch = (image->width * image->depth + 7) >> 3;
1507         int scan_align = info->pixmap.scan_align - 1;
1508         int buf_align = info->pixmap.buf_align - 1;
1509         int bltCntl_flags, d_pitch, data_len;
1510
1511         // The data is padded for the hardware
1512         d_pitch = (s_pitch + scan_align) & ~scan_align;
1513         data_len = ((d_pitch * image->height) + buf_align) & ~buf_align;
1514
1515         neo2200_sync(info);
1516
1517         if (image->depth == 1) {
1518                 if (info->var.bits_per_pixel == 24 && image->width < 16) {
1519                         /* FIXME. There is a bug with accelerated color-expanded
1520                          * transfers in 24 bit mode if the image being transferred
1521                          * is less than 16 bits wide. This is due to insufficient
1522                          * padding when writing the image. We need to adjust
1523                          * struct fb_pixmap. Not yet done. */
1524                         return cfb_imageblit(info, image);
1525                 }
1526                 bltCntl_flags = NEO_BC0_SRC_MONO;
1527         } else if (image->depth == info->var.bits_per_pixel) {
1528                 bltCntl_flags = 0;
1529         } else {
1530                 /* We don't currently support hardware acceleration if image
1531                  * depth is different from display */
1532                 return cfb_imageblit(info, image);
1533         }
1534
1535         switch (info->var.bits_per_pixel) {
1536         case 8:
1537                 writel(image->fg_color, &par->neo2200->fgColor);
1538                 writel(image->bg_color, &par->neo2200->bgColor);
1539                 break;
1540         case 16:
1541         case 24:
1542                 writel(((u32 *) (info->pseudo_palette))[image->fg_color],
1543                        &par->neo2200->fgColor);
1544                 writel(((u32 *) (info->pseudo_palette))[image->bg_color],
1545                        &par->neo2200->bgColor);
1546                 break;
1547         }
1548
1549         writel(NEO_BC0_SYS_TO_VID |
1550                 NEO_BC3_SKIP_MAPPING | bltCntl_flags |
1551                 // NEO_BC3_DST_XY_ADDR |
1552                 0x0c0000, &par->neo2200->bltCntl);
1553
1554         writel(0, &par->neo2200->srcStart);
1555 //      par->neo2200->dstStart = (image->dy << 16) | (image->dx & 0xffff);
1556         writel(((image->dx & 0xffff) * (info->var.bits_per_pixel >> 3) +
1557                 image->dy * info->fix.line_length), &par->neo2200->dstStart);
1558         writel((image->height << 16) | (image->width & 0xffff),
1559                &par->neo2200->xyExt);
1560
1561         memcpy_toio(par->mmio_vbase + 0x100000, image->data, data_len);
1562 }
1563
1564 static void
1565 neofb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
1566 {
1567         switch (info->fix.accel) {
1568                 case FB_ACCEL_NEOMAGIC_NM2200:
1569                 case FB_ACCEL_NEOMAGIC_NM2230: 
1570                 case FB_ACCEL_NEOMAGIC_NM2360: 
1571                 case FB_ACCEL_NEOMAGIC_NM2380:
1572                         neo2200_fillrect(info, rect);
1573                         break;
1574                 default:
1575                         cfb_fillrect(info, rect);
1576                         break;
1577         }       
1578 }
1579
1580 static void
1581 neofb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
1582 {
1583         switch (info->fix.accel) {
1584                 case FB_ACCEL_NEOMAGIC_NM2200:
1585                 case FB_ACCEL_NEOMAGIC_NM2230: 
1586                 case FB_ACCEL_NEOMAGIC_NM2360: 
1587                 case FB_ACCEL_NEOMAGIC_NM2380: 
1588                         neo2200_copyarea(info, area);
1589                         break;
1590                 default:
1591                         cfb_copyarea(info, area);
1592                         break;
1593         }       
1594 }
1595
1596 static void
1597 neofb_imageblit(struct fb_info *info, const struct fb_image *image)
1598 {
1599         switch (info->fix.accel) {
1600                 case FB_ACCEL_NEOMAGIC_NM2200:
1601                 case FB_ACCEL_NEOMAGIC_NM2230:
1602                 case FB_ACCEL_NEOMAGIC_NM2360:
1603                 case FB_ACCEL_NEOMAGIC_NM2380:
1604                         neo2200_imageblit(info, image);
1605                         break;
1606                 default:
1607                         cfb_imageblit(info, image);
1608                         break;
1609         }
1610 }
1611
1612 static int 
1613 neofb_sync(struct fb_info *info)
1614 {
1615         switch (info->fix.accel) {
1616                 case FB_ACCEL_NEOMAGIC_NM2200:
1617                 case FB_ACCEL_NEOMAGIC_NM2230: 
1618                 case FB_ACCEL_NEOMAGIC_NM2360: 
1619                 case FB_ACCEL_NEOMAGIC_NM2380: 
1620                         neo2200_sync(info);
1621                         break;
1622                 default:
1623                         break;
1624         }
1625         return 0;               
1626 }
1627
1628 /*
1629 static void
1630 neofb_draw_cursor(struct fb_info *info, u8 *dst, u8 *src, unsigned int width)
1631 {
1632         //memset_io(info->sprite.addr, 0xff, 1);
1633 }
1634
1635 static int
1636 neofb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1637 {
1638         struct neofb_par *par = (struct neofb_par *) info->par;
1639
1640         * Disable cursor *
1641         write_le32(NEOREG_CURSCNTL, ~NEO_CURS_ENABLE, par);
1642
1643         if (cursor->set & FB_CUR_SETPOS) {
1644                 u32 x = cursor->image.dx;
1645                 u32 y = cursor->image.dy;
1646
1647                 info->cursor.image.dx = x;
1648                 info->cursor.image.dy = y;
1649                 write_le32(NEOREG_CURSX, x, par);
1650                 write_le32(NEOREG_CURSY, y, par);
1651         }
1652
1653         if (cursor->set & FB_CUR_SETSIZE) {
1654                 info->cursor.image.height = cursor->image.height;
1655                 info->cursor.image.width = cursor->image.width;
1656         }
1657
1658         if (cursor->set & FB_CUR_SETHOT)
1659                 info->cursor.hot = cursor->hot;
1660
1661         if (cursor->set & FB_CUR_SETCMAP) {
1662                 if (cursor->image.depth == 1) {
1663                         u32 fg = cursor->image.fg_color;
1664                         u32 bg = cursor->image.bg_color;
1665
1666                         info->cursor.image.fg_color = fg;
1667                         info->cursor.image.bg_color = bg;
1668
1669                         fg = ((fg & 0xff0000) >> 16) | ((fg & 0xff) << 16) | (fg & 0xff00);
1670                         bg = ((bg & 0xff0000) >> 16) | ((bg & 0xff) << 16) | (bg & 0xff00);
1671                         write_le32(NEOREG_CURSFGCOLOR, fg, par);
1672                         write_le32(NEOREG_CURSBGCOLOR, bg, par);
1673                 }
1674         }
1675
1676         if (cursor->set & FB_CUR_SETSHAPE)
1677                 fb_load_cursor_image(info);
1678
1679         if (info->cursor.enable)
1680                 write_le32(NEOREG_CURSCNTL, NEO_CURS_ENABLE, par);
1681         return 0;
1682 }
1683 */
1684
1685 static struct fb_ops neofb_ops = {
1686         .owner          = THIS_MODULE,
1687         .fb_open        = neofb_open,
1688         .fb_release     = neofb_release,
1689         .fb_check_var   = neofb_check_var,
1690         .fb_set_par     = neofb_set_par,
1691         .fb_setcolreg   = neofb_setcolreg,
1692         .fb_pan_display = neofb_pan_display,
1693         .fb_blank       = neofb_blank,
1694         .fb_sync        = neofb_sync,
1695         .fb_fillrect    = neofb_fillrect,
1696         .fb_copyarea    = neofb_copyarea,
1697         .fb_imageblit   = neofb_imageblit,
1698 };
1699
1700 /* --------------------------------------------------------------------- */
1701
1702 static struct fb_videomode __devinitdata mode800x480 = {
1703         .xres           = 800,
1704         .yres           = 480,
1705         .pixclock       = 25000,
1706         .left_margin    = 88,
1707         .right_margin   = 40,
1708         .upper_margin   = 23,
1709         .lower_margin   = 1,
1710         .hsync_len      = 128,
1711         .vsync_len      = 4,
1712         .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
1713         .vmode          = FB_VMODE_NONINTERLACED
1714 };
1715
1716 static int __devinit neo_map_mmio(struct fb_info *info,
1717                                   struct pci_dev *dev)
1718 {
1719         struct neofb_par *par = info->par;
1720
1721         DBG("neo_map_mmio");
1722
1723         switch (info->fix.accel) {
1724                 case FB_ACCEL_NEOMAGIC_NM2070:
1725                         info->fix.mmio_start = pci_resource_start(dev, 0)+
1726                                 0x100000;
1727                         break;
1728                 case FB_ACCEL_NEOMAGIC_NM2090:
1729                 case FB_ACCEL_NEOMAGIC_NM2093:
1730                         info->fix.mmio_start = pci_resource_start(dev, 0)+
1731                                 0x200000;
1732                         break;
1733                 case FB_ACCEL_NEOMAGIC_NM2160:
1734                 case FB_ACCEL_NEOMAGIC_NM2097:
1735                 case FB_ACCEL_NEOMAGIC_NM2200:
1736                 case FB_ACCEL_NEOMAGIC_NM2230:
1737                 case FB_ACCEL_NEOMAGIC_NM2360:
1738                 case FB_ACCEL_NEOMAGIC_NM2380:
1739                         info->fix.mmio_start = pci_resource_start(dev, 1);
1740                         break;
1741                 default:
1742                         info->fix.mmio_start = pci_resource_start(dev, 0);
1743         }
1744         info->fix.mmio_len = MMIO_SIZE;
1745
1746         if (!request_mem_region
1747             (info->fix.mmio_start, MMIO_SIZE, "memory mapped I/O")) {
1748                 printk("neofb: memory mapped IO in use\n");
1749                 return -EBUSY;
1750         }
1751
1752         par->mmio_vbase = ioremap(info->fix.mmio_start, MMIO_SIZE);
1753         if (!par->mmio_vbase) {
1754                 printk("neofb: unable to map memory mapped IO\n");
1755                 release_mem_region(info->fix.mmio_start,
1756                                    info->fix.mmio_len);
1757                 return -ENOMEM;
1758         } else
1759                 printk(KERN_INFO "neofb: mapped io at %p\n",
1760                        par->mmio_vbase);
1761         return 0;
1762 }
1763
1764 static void neo_unmap_mmio(struct fb_info *info)
1765 {
1766         struct neofb_par *par = info->par;
1767
1768         DBG("neo_unmap_mmio");
1769
1770         iounmap(par->mmio_vbase);
1771         par->mmio_vbase = NULL;
1772
1773         release_mem_region(info->fix.mmio_start,
1774                            info->fix.mmio_len);
1775 }
1776
1777 static int __devinit neo_map_video(struct fb_info *info,
1778                                    struct pci_dev *dev, int video_len)
1779 {
1780         //unsigned long addr;
1781
1782         DBG("neo_map_video");
1783
1784         info->fix.smem_start = pci_resource_start(dev, 0);
1785         info->fix.smem_len = video_len;
1786
1787         if (!request_mem_region(info->fix.smem_start, info->fix.smem_len,
1788                                 "frame buffer")) {
1789                 printk("neofb: frame buffer in use\n");
1790                 return -EBUSY;
1791         }
1792
1793         info->screen_base =
1794             ioremap(info->fix.smem_start, info->fix.smem_len);
1795         if (!info->screen_base) {
1796                 printk("neofb: unable to map screen memory\n");
1797                 release_mem_region(info->fix.smem_start,
1798                                    info->fix.smem_len);
1799                 return -ENOMEM;
1800         } else
1801                 printk(KERN_INFO "neofb: mapped framebuffer at %p\n",
1802                        info->screen_base);
1803
1804 #ifdef CONFIG_MTRR
1805         ((struct neofb_par *)(info->par))->mtrr =
1806                 mtrr_add(info->fix.smem_start, pci_resource_len(dev, 0),
1807                                 MTRR_TYPE_WRCOMB, 1);
1808 #endif
1809
1810         /* Clear framebuffer, it's all white in memory after boot */
1811         memset_io(info->screen_base, 0, info->fix.smem_len);
1812
1813         /* Allocate Cursor drawing pad.
1814         info->fix.smem_len -= PAGE_SIZE;
1815         addr = info->fix.smem_start + info->fix.smem_len;
1816         write_le32(NEOREG_CURSMEMPOS, ((0x000f & (addr >> 10)) << 8) |
1817                                         ((0x0ff0 & (addr >> 10)) >> 4), par);
1818         addr = (unsigned long) info->screen_base + info->fix.smem_len;
1819         info->sprite.addr = (u8 *) addr; */
1820         return 0;
1821 }
1822
1823 static void neo_unmap_video(struct fb_info *info)
1824 {
1825         DBG("neo_unmap_video");
1826
1827 #ifdef CONFIG_MTRR
1828         {
1829                 struct neofb_par *par = info->par;
1830
1831                 mtrr_del(par->mtrr, info->fix.smem_start,
1832                          info->fix.smem_len);
1833         }
1834 #endif
1835         iounmap(info->screen_base);
1836         info->screen_base = NULL;
1837
1838         release_mem_region(info->fix.smem_start,
1839                            info->fix.smem_len);
1840 }
1841
1842 static int __devinit neo_scan_monitor(struct fb_info *info)
1843 {
1844         struct neofb_par *par = info->par;
1845         unsigned char type, display;
1846         int w;
1847
1848         // Eventually we will have i2c support.
1849         info->monspecs.modedb = kmalloc(sizeof(struct fb_videomode), GFP_KERNEL);
1850         if (!info->monspecs.modedb)
1851                 return -ENOMEM;
1852         info->monspecs.modedb_len = 1;
1853
1854         /* Determine the panel type */
1855         vga_wgfx(NULL, 0x09, 0x26);
1856         type = vga_rgfx(NULL, 0x21);
1857         display = vga_rgfx(NULL, 0x20);
1858         if (!par->internal_display && !par->external_display) {
1859                 par->internal_display = display & 2 || !(display & 3) ? 1 : 0;
1860                 par->external_display = display & 1;
1861                 printk (KERN_INFO "Autodetected %s display\n",
1862                         par->internal_display && par->external_display ? "simultaneous" :
1863                         par->internal_display ? "internal" : "external");
1864         }
1865
1866         /* Determine panel width -- used in NeoValidMode. */
1867         w = vga_rgfx(NULL, 0x20);
1868         vga_wgfx(NULL, 0x09, 0x00);
1869         switch ((w & 0x18) >> 3) {
1870         case 0x00:
1871                 // 640x480@60
1872                 par->NeoPanelWidth = 640;
1873                 par->NeoPanelHeight = 480;
1874                 memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
1875                 break;
1876         case 0x01:
1877                 par->NeoPanelWidth = 800;
1878                 if (par->libretto) {
1879                         par->NeoPanelHeight = 480;
1880                         memcpy(info->monspecs.modedb, &mode800x480, sizeof(struct fb_videomode));
1881                 } else {
1882                         // 800x600@60
1883                         par->NeoPanelHeight = 600;
1884                         memcpy(info->monspecs.modedb, &vesa_modes[8], sizeof(struct fb_videomode));
1885                 }
1886                 break;
1887         case 0x02:
1888                 // 1024x768@60
1889                 par->NeoPanelWidth = 1024;
1890                 par->NeoPanelHeight = 768;
1891                 memcpy(info->monspecs.modedb, &vesa_modes[13], sizeof(struct fb_videomode));
1892                 break;
1893         case 0x03:
1894                 /* 1280x1024@60 panel support needs to be added */
1895 #ifdef NOT_DONE
1896                 par->NeoPanelWidth = 1280;
1897                 par->NeoPanelHeight = 1024;
1898                 memcpy(info->monspecs.modedb, &vesa_modes[20], sizeof(struct fb_videomode));
1899                 break;
1900 #else
1901                 printk(KERN_ERR
1902                        "neofb: Only 640x480, 800x600/480 and 1024x768 panels are currently supported\n");
1903                 return -1;
1904 #endif
1905         default:
1906                 // 640x480@60
1907                 par->NeoPanelWidth = 640;
1908                 par->NeoPanelHeight = 480;
1909                 memcpy(info->monspecs.modedb, &vesa_modes[3], sizeof(struct fb_videomode));
1910                 break;
1911         }
1912
1913         printk(KERN_INFO "Panel is a %dx%d %s %s display\n",
1914                par->NeoPanelWidth,
1915                par->NeoPanelHeight,
1916                (type & 0x02) ? "color" : "monochrome",
1917                (type & 0x10) ? "TFT" : "dual scan");
1918         return 0;
1919 }
1920
1921 static int __devinit neo_init_hw(struct fb_info *info)
1922 {
1923         struct neofb_par *par = info->par;
1924         int videoRam = 896;
1925         int maxClock = 65000;
1926         int CursorMem = 1024;
1927         int CursorOff = 0x100;
1928         int linearSize = 1024;
1929         int maxWidth = 1024;
1930         int maxHeight = 1024;
1931
1932         DBG("neo_init_hw");
1933
1934         neoUnlock();
1935
1936 #if 0
1937         printk(KERN_DEBUG "--- Neo extended register dump ---\n");
1938         for (int w = 0; w < 0x85; w++)
1939                 printk(KERN_DEBUG "CR %p: %p\n", (void *) w,
1940                        (void *) vga_rcrt(NULL, w));
1941         for (int w = 0; w < 0xC7; w++)
1942                 printk(KERN_DEBUG "GR %p: %p\n", (void *) w,
1943                        (void *) vga_rgfx(NULL, w));
1944 #endif
1945         switch (info->fix.accel) {
1946         case FB_ACCEL_NEOMAGIC_NM2070:
1947                 videoRam = 896;
1948                 maxClock = 65000;
1949                 CursorMem = 2048;
1950                 CursorOff = 0x100;
1951                 linearSize = 1024;
1952                 maxWidth = 1024;
1953                 maxHeight = 1024;
1954                 break;
1955         case FB_ACCEL_NEOMAGIC_NM2090:
1956         case FB_ACCEL_NEOMAGIC_NM2093:
1957                 videoRam = 1152;
1958                 maxClock = 80000;
1959                 CursorMem = 2048;
1960                 CursorOff = 0x100;
1961                 linearSize = 2048;
1962                 maxWidth = 1024;
1963                 maxHeight = 1024;
1964                 break;
1965         case FB_ACCEL_NEOMAGIC_NM2097:
1966                 videoRam = 1152;
1967                 maxClock = 80000;
1968                 CursorMem = 1024;
1969                 CursorOff = 0x100;
1970                 linearSize = 2048;
1971                 maxWidth = 1024;
1972                 maxHeight = 1024;
1973                 break;
1974         case FB_ACCEL_NEOMAGIC_NM2160:
1975                 videoRam = 2048;
1976                 maxClock = 90000;
1977                 CursorMem = 1024;
1978                 CursorOff = 0x100;
1979                 linearSize = 2048;
1980                 maxWidth = 1024;
1981                 maxHeight = 1024;
1982                 break;
1983         case FB_ACCEL_NEOMAGIC_NM2200:
1984                 videoRam = 2560;
1985                 maxClock = 110000;
1986                 CursorMem = 1024;
1987                 CursorOff = 0x1000;
1988                 linearSize = 4096;
1989                 maxWidth = 1280;
1990                 maxHeight = 1024;       /* ???? */
1991
1992                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
1993                 break;
1994         case FB_ACCEL_NEOMAGIC_NM2230:
1995                 videoRam = 3008;
1996                 maxClock = 110000;
1997                 CursorMem = 1024;
1998                 CursorOff = 0x1000;
1999                 linearSize = 4096;
2000                 maxWidth = 1280;
2001                 maxHeight = 1024;       /* ???? */
2002
2003                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
2004                 break;
2005         case FB_ACCEL_NEOMAGIC_NM2360:
2006                 videoRam = 4096;
2007                 maxClock = 110000;
2008                 CursorMem = 1024;
2009                 CursorOff = 0x1000;
2010                 linearSize = 4096;
2011                 maxWidth = 1280;
2012                 maxHeight = 1024;       /* ???? */
2013
2014                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
2015                 break;
2016         case FB_ACCEL_NEOMAGIC_NM2380:
2017                 videoRam = 6144;
2018                 maxClock = 110000;
2019                 CursorMem = 1024;
2020                 CursorOff = 0x1000;
2021                 linearSize = 8192;
2022                 maxWidth = 1280;
2023                 maxHeight = 1024;       /* ???? */
2024
2025                 par->neo2200 = (Neo2200 __iomem *) par->mmio_vbase;
2026                 break;
2027         }
2028 /*
2029         info->sprite.size = CursorMem;
2030         info->sprite.scan_align = 1;
2031         info->sprite.buf_align = 1;
2032         info->sprite.flags = FB_PIXMAP_IO;
2033         info->sprite.outbuf = neofb_draw_cursor;
2034 */
2035         par->maxClock = maxClock;
2036         par->cursorOff = CursorOff;
2037         return ((videoRam * 1024));
2038 }
2039
2040
2041 static struct fb_info *__devinit neo_alloc_fb_info(struct pci_dev *dev, const struct
2042                                                    pci_device_id *id)
2043 {
2044         struct fb_info *info;
2045         struct neofb_par *par;
2046
2047         info = framebuffer_alloc(sizeof(struct neofb_par), &dev->dev);
2048
2049         if (!info)
2050                 return NULL;
2051
2052         par = info->par;
2053
2054         info->fix.accel = id->driver_data;
2055
2056         mutex_init(&par->open_lock);
2057         par->pci_burst = !nopciburst;
2058         par->lcd_stretch = !nostretch;
2059         par->libretto = libretto;
2060
2061         par->internal_display = internal;
2062         par->external_display = external;
2063         info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
2064
2065         switch (info->fix.accel) {
2066         case FB_ACCEL_NEOMAGIC_NM2070:
2067                 sprintf(info->fix.id, "MagicGraph 128");
2068                 break;
2069         case FB_ACCEL_NEOMAGIC_NM2090:
2070                 sprintf(info->fix.id, "MagicGraph 128V");
2071                 break;
2072         case FB_ACCEL_NEOMAGIC_NM2093:
2073                 sprintf(info->fix.id, "MagicGraph 128ZV");
2074                 break;
2075         case FB_ACCEL_NEOMAGIC_NM2097:
2076                 sprintf(info->fix.id, "MagicGraph 128ZV+");
2077                 break;
2078         case FB_ACCEL_NEOMAGIC_NM2160:
2079                 sprintf(info->fix.id, "MagicGraph 128XD");
2080                 break;
2081         case FB_ACCEL_NEOMAGIC_NM2200:
2082                 sprintf(info->fix.id, "MagicGraph 256AV");
2083                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2084                                FBINFO_HWACCEL_COPYAREA |
2085                                FBINFO_HWACCEL_FILLRECT;
2086                 break;
2087         case FB_ACCEL_NEOMAGIC_NM2230:
2088                 sprintf(info->fix.id, "MagicGraph 256AV+");
2089                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2090                                FBINFO_HWACCEL_COPYAREA |
2091                                FBINFO_HWACCEL_FILLRECT;
2092                 break;
2093         case FB_ACCEL_NEOMAGIC_NM2360:
2094                 sprintf(info->fix.id, "MagicGraph 256ZX");
2095                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2096                                FBINFO_HWACCEL_COPYAREA |
2097                                FBINFO_HWACCEL_FILLRECT;
2098                 break;
2099         case FB_ACCEL_NEOMAGIC_NM2380:
2100                 sprintf(info->fix.id, "MagicGraph 256XL+");
2101                 info->flags |= FBINFO_HWACCEL_IMAGEBLIT |
2102                                FBINFO_HWACCEL_COPYAREA |
2103                                FBINFO_HWACCEL_FILLRECT;
2104                 break;
2105         }
2106
2107         info->fix.type = FB_TYPE_PACKED_PIXELS;
2108         info->fix.type_aux = 0;
2109         info->fix.xpanstep = 0;
2110         info->fix.ypanstep = 4;
2111         info->fix.ywrapstep = 0;
2112         info->fix.accel = id->driver_data;
2113
2114         info->fbops = &neofb_ops;
2115         info->pseudo_palette = par->palette;
2116         return info;
2117 }
2118
2119 static void neo_free_fb_info(struct fb_info *info)
2120 {
2121         if (info) {
2122                 /*
2123                  * Free the colourmap
2124                  */
2125                 fb_dealloc_cmap(&info->cmap);
2126                 framebuffer_release(info);
2127         }
2128 }
2129
2130 /* --------------------------------------------------------------------- */
2131
2132 static int __devinit neofb_probe(struct pci_dev *dev,
2133                                  const struct pci_device_id *id)
2134 {
2135         struct fb_info *info;
2136         u_int h_sync, v_sync;
2137         int video_len, err;
2138
2139         DBG("neofb_probe");
2140
2141         err = pci_enable_device(dev);
2142         if (err)
2143                 return err;
2144
2145         err = -ENOMEM;
2146         info = neo_alloc_fb_info(dev, id);
2147         if (!info)
2148                 return err;
2149
2150         err = neo_map_mmio(info, dev);
2151         if (err)
2152                 goto err_map_mmio;
2153
2154         err = neo_scan_monitor(info);
2155         if (err)
2156                 goto err_scan_monitor;
2157
2158         video_len = neo_init_hw(info);
2159         if (video_len < 0) {
2160                 err = video_len;
2161                 goto err_init_hw;
2162         }
2163
2164         err = neo_map_video(info, dev, video_len);
2165         if (err)
2166                 goto err_init_hw;
2167
2168         if (!fb_find_mode(&info->var, info, mode_option, NULL, 0,
2169                         info->monspecs.modedb, 16)) {
2170                 printk(KERN_ERR "neofb: Unable to find usable video mode.\n");
2171                 goto err_map_video;
2172         }
2173
2174         /*
2175          * Calculate the hsync and vsync frequencies.  Note that
2176          * we split the 1e12 constant up so that we can preserve
2177          * the precision and fit the results into 32-bit registers.
2178          *  (1953125000 * 512 = 1e12)
2179          */
2180         h_sync = 1953125000 / info->var.pixclock;
2181         h_sync =
2182             h_sync * 512 / (info->var.xres + info->var.left_margin +
2183                             info->var.right_margin + info->var.hsync_len);
2184         v_sync =
2185             h_sync / (info->var.yres + info->var.upper_margin +
2186                       info->var.lower_margin + info->var.vsync_len);
2187
2188         printk(KERN_INFO "neofb v" NEOFB_VERSION
2189                ": %dkB VRAM, using %dx%d, %d.%03dkHz, %dHz\n",
2190                info->fix.smem_len >> 10, info->var.xres,
2191                info->var.yres, h_sync / 1000, h_sync % 1000, v_sync);
2192
2193         if (fb_alloc_cmap(&info->cmap, 256, 0) < 0)
2194                 goto err_map_video;
2195
2196         err = register_framebuffer(info);
2197         if (err < 0)
2198                 goto err_reg_fb;
2199
2200         printk(KERN_INFO "fb%d: %s frame buffer device\n",
2201                info->node, info->fix.id);
2202
2203         /*
2204          * Our driver data
2205          */
2206         pci_set_drvdata(dev, info);
2207         return 0;
2208
2209 err_reg_fb:
2210         fb_dealloc_cmap(&info->cmap);
2211 err_map_video:
2212         neo_unmap_video(info);
2213 err_init_hw:
2214         fb_destroy_modedb(info->monspecs.modedb);
2215 err_scan_monitor:
2216         neo_unmap_mmio(info);
2217 err_map_mmio:
2218         neo_free_fb_info(info);
2219         return err;
2220 }
2221
2222 static void __devexit neofb_remove(struct pci_dev *dev)
2223 {
2224         struct fb_info *info = pci_get_drvdata(dev);
2225
2226         DBG("neofb_remove");
2227
2228         if (info) {
2229                 /*
2230                  * If unregister_framebuffer fails, then
2231                  * we will be leaving hooks that could cause
2232                  * oopsen laying around.
2233                  */
2234                 if (unregister_framebuffer(info))
2235                         printk(KERN_WARNING
2236                                "neofb: danger danger!  Oopsen imminent!\n");
2237
2238                 neo_unmap_video(info);
2239                 fb_destroy_modedb(info->monspecs.modedb);
2240                 neo_unmap_mmio(info);
2241                 neo_free_fb_info(info);
2242
2243                 /*
2244                  * Ensure that the driver data is no longer
2245                  * valid.
2246                  */
2247                 pci_set_drvdata(dev, NULL);
2248         }
2249 }
2250
2251 static struct pci_device_id neofb_devices[] = {
2252         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2070,
2253          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2070},
2254
2255         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2090,
2256          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2090},
2257
2258         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2093,
2259          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2093},
2260
2261         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2097,
2262          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2097},
2263
2264         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2160,
2265          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2160},
2266
2267         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2200,
2268          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2200},
2269
2270         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2230,
2271          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2230},
2272
2273         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2360,
2274          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2360},
2275
2276         {PCI_VENDOR_ID_NEOMAGIC, PCI_CHIP_NM2380,
2277          PCI_ANY_ID, PCI_ANY_ID, 0, 0, FB_ACCEL_NEOMAGIC_NM2380},
2278
2279         {0, 0, 0, 0, 0, 0, 0}
2280 };
2281
2282 MODULE_DEVICE_TABLE(pci, neofb_devices);
2283
2284 static struct pci_driver neofb_driver = {
2285         .name =         "neofb",
2286         .id_table =     neofb_devices,
2287         .probe =        neofb_probe,
2288         .remove =       __devexit_p(neofb_remove)
2289 };
2290
2291 /* ************************* init in-kernel code ************************** */
2292
2293 #ifndef MODULE
2294 static int __init neofb_setup(char *options)
2295 {
2296         char *this_opt;
2297
2298         DBG("neofb_setup");
2299
2300         if (!options || !*options)
2301                 return 0;
2302
2303         while ((this_opt = strsep(&options, ",")) != NULL) {
2304                 if (!*this_opt)
2305                         continue;
2306
2307                 if (!strncmp(this_opt, "internal", 8))
2308                         internal = 1;
2309                 else if (!strncmp(this_opt, "external", 8))
2310                         external = 1;
2311                 else if (!strncmp(this_opt, "nostretch", 9))
2312                         nostretch = 1;
2313                 else if (!strncmp(this_opt, "nopciburst", 10))
2314                         nopciburst = 1;
2315                 else if (!strncmp(this_opt, "libretto", 8))
2316                         libretto = 1;
2317                 else
2318                         mode_option = this_opt;
2319         }
2320         return 0;
2321 }
2322 #endif  /*  MODULE  */
2323
2324 static int __init neofb_init(void)
2325 {
2326 #ifndef MODULE
2327         char *option = NULL;
2328
2329         if (fb_get_options("neofb", &option))
2330                 return -ENODEV;
2331         neofb_setup(option);
2332 #endif
2333         return pci_register_driver(&neofb_driver);
2334 }
2335
2336 module_init(neofb_init);
2337
2338 #ifdef MODULE
2339 static void __exit neofb_exit(void)
2340 {
2341         pci_unregister_driver(&neofb_driver);
2342 }
2343
2344 module_exit(neofb_exit);
2345 #endif                          /* MODULE */