2 * Dynamic DMA mapping support.
5 #include <linux/types.h>
7 #include <linux/string.h>
9 #include <linux/module.h>
10 #include <linux/dmar.h>
11 #include <asm/iommu.h>
12 #include <asm/machvec.h>
13 #include <linux/dma-mapping.h>
15 #include <asm/machvec.h>
16 #include <asm/system.h>
20 #include <linux/kernel.h>
21 #include <linux/string.h>
24 #include <asm/iommu.h>
26 dma_addr_t bad_dma_address __read_mostly;
27 EXPORT_SYMBOL(bad_dma_address);
29 static int iommu_sac_force __read_mostly;
31 int no_iommu __read_mostly;
32 #ifdef CONFIG_IOMMU_DEBUG
33 int force_iommu __read_mostly = 1;
35 int force_iommu __read_mostly;
38 /* Set this to 1 if there is a HW IOMMU in the system */
39 int iommu_detected __read_mostly;
41 /* Dummy device used for NULL arguments (normally ISA). Better would
42 be probably a smaller DMA mask, but this is bug-to-bug compatible
44 struct device fallback_dev = {
45 .bus_id = "fallback device",
46 .coherent_dma_mask = DMA_32BIT_MASK,
47 .dma_mask = &fallback_dev.coherent_dma_mask,
50 void __init pci_iommu_alloc(void)
53 * The order of these functions is important for
54 * fall-back/fail-over reasons
63 static int __init pci_iommu_init(void)
71 /* Must execute after PCI subsystem */
72 fs_initcall(pci_iommu_init);
74 void pci_iommu_shutdown(void)
85 struct dma_mapping_ops *dma_ops;
86 EXPORT_SYMBOL(dma_ops);
88 int iommu_dma_supported(struct device *dev, u64 mask)
90 struct dma_mapping_ops *ops = get_dma_ops(dev);
93 if (mask > 0xffffffff && forbid_dac > 0) {
94 dev_info(dev, "Disallowing DAC for device\n");
99 if (ops->dma_supported_op)
100 return ops->dma_supported_op(dev, mask);
102 /* Copied from i386. Doesn't make much sense, because it will
103 only work for pci_alloc_coherent.
104 The caller just has to use GFP_DMA in this case. */
105 if (mask < DMA_24BIT_MASK)
108 /* Tell the device to use SAC when IOMMU force is on. This
109 allows the driver to use cheaper accesses in some cases.
111 Problem with this is that if we overflow the IOMMU area and
112 return DAC as fallback address the device may not handle it
115 As a special case some controllers have a 39bit address
116 mode that is as efficient as 32bit (aic79xx). Don't force
117 SAC for these. Assume all masks <= 40 bits are of this
118 type. Normally this doesn't make any difference, but gives
119 more gentle handling of IOMMU overflow. */
120 if (iommu_sac_force && (mask >= DMA_40BIT_MASK)) {
121 dev_info(dev, "Force SAC with mask %lx\n", mask);
127 EXPORT_SYMBOL(iommu_dma_supported);