2 *************************************************************************
4 * 5F., No.36, Taiyuan St., Jhubei City,
8 * (c) Copyright 2002-2007, Ralink Technology, Inc.
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
25 *************************************************************************
28 #include "rt_config.h"
31 UCHAR TemplateFrame[24] = {0x08/* Data type */,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0xAA,0xBB,0x12,0x34,0x56,0x00,0x11,0x22,0xAA,0xBB,0xCC,0x00,0x00}; // 802.11 MAC Header, Type:Data, Length:24bytes
32 extern RTMP_RF_REGS RF2850RegTable[];
33 extern UCHAR NUM_OF_2850_CHNL;
35 static CHAR CCKRateTable[] = {0, 1, 2, 3, 8, 9, 10, 11, -1}; /* CCK Mode. */
36 static CHAR OFDMRateTable[] = {0, 1, 2, 3, 4, 5, 6, 7, -1}; /* OFDM Mode. */
37 static CHAR HTMIXRateTable[] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, -1}; /* HT Mix Mode. */
40 IN PRTMP_ADAPTER pAd);
43 IN PRTMP_ADAPTER pAd);
45 static VOID RtmpDmaEnable(
49 static VOID BbpSoftReset(
50 IN PRTMP_ADAPTER pAd);
52 static VOID RtmpRfIoWrite(
53 IN PRTMP_ADAPTER pAd);
55 static INT ATESetUpFrame(
59 static INT ATETxPwrHandler(
63 static INT ATECmdHandler(
67 static int CheckMCSValid(
71 static VOID ATEWriteTxWI(
73 IN PTXWI_STRUC pOutTxWI,
76 IN BOOLEAN InsTimestamp,
79 IN BOOLEAN NSeq, // HW new a sequence.
88 IN HTTRANSMIT_SETTING *pTransmit);
91 static VOID SetJapanFilter(
92 IN PRTMP_ADAPTER pAd);
94 /*=========================end of prototype=========================*/
100 WPDMA_GLO_CFG_STRUC GloCfg;
102 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word); // disable DMA
103 if (GloCfg.field.TxDMABusy)
111 static INT RxDmaBusy(
112 IN PRTMP_ADAPTER pAd)
115 WPDMA_GLO_CFG_STRUC GloCfg;
117 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word); // disable DMA
118 if (GloCfg.field.RxDMABusy)
126 static VOID RtmpDmaEnable(
127 IN PRTMP_ADAPTER pAd,
132 WPDMA_GLO_CFG_STRUC GloCfg;
134 value = Enable > 0 ? 1 : 0;
136 // check DMA is in busy mode.
138 while (TxDmaBusy(pAd) || RxDmaBusy(pAd))
145 RTMP_IO_READ32(pAd, WPDMA_GLO_CFG, &GloCfg.word); // disable DMA
146 GloCfg.field.EnableTxDMA = value;
147 GloCfg.field.EnableRxDMA = value;
148 RTMP_IO_WRITE32(pAd, WPDMA_GLO_CFG, GloCfg.word); // abort all TX rings
155 static VOID BbpSoftReset(
156 IN PRTMP_ADAPTER pAd)
160 // Soft reset, set BBP R21 bit0=1->0
161 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R21, &BbpData);
162 BbpData |= 0x00000001; //set bit0=1
163 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R21, BbpData);
165 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R21, &BbpData);
166 BbpData &= ~(0x00000001); //set bit0=0
167 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R21, BbpData);
172 static VOID RtmpRfIoWrite(
173 IN PRTMP_ADAPTER pAd)
175 // Set RF value 1's set R3[bit2] = [0]
176 RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R1);
177 RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R2);
178 RTMP_RF_IO_WRITE32(pAd, (pAd->LatchRfRegs.R3 & (~0x04)));
179 RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R4);
183 // Set RF value 2's set R3[bit2] = [1]
184 RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R1);
185 RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R2);
186 RTMP_RF_IO_WRITE32(pAd, (pAd->LatchRfRegs.R3 | 0x04));
187 RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R4);
191 // Set RF value 3's set R3[bit2] = [0]
192 RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R1);
193 RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R2);
194 RTMP_RF_IO_WRITE32(pAd, (pAd->LatchRfRegs.R3 & (~0x04)));
195 RTMP_RF_IO_WRITE32(pAd, pAd->LatchRfRegs.R4);
200 static int CheckMCSValid(
210 pRateTab = CCKRateTable;
213 pRateTab = OFDMRateTable;
217 pRateTab = HTMIXRateTable;
220 ATEDBGPRINT(RT_DEBUG_ERROR, ("unrecognizable Tx Mode %d\n", Mode));
226 while(pRateTab[i] != -1)
228 if (pRateTab[i] == Mcs)
237 static INT ATETxPwrHandler(
238 IN PRTMP_ADAPTER pAd,
244 BOOLEAN bPowerReduce = FALSE;
246 #ifdef RALINK_28xx_QA
247 if ((pAd->ate.bQATxStart == TRUE) || (pAd->ate.bQARxStart == TRUE))
249 /* When QA is used for Tx, pAd->ate.TxPower0/1 and real tx power
250 ** are not synchronized.
253 pAd->ate.TxPower0 = pAd->LatchRfRegs.xxx;
254 pAd->ate.TxPower1 = pAd->LatchRfRegs.xxx;
259 #endif // RALINK_28xx_QA //
261 TxPower = index == 0 ? pAd->ate.TxPower0 : pAd->ate.TxPower1;
263 if (pAd->ate.Channel <= 14)
268 // R3, R4 can't large than 31 (0x24), 31 ~ 36 used by BBP 94
272 Bbp94 = BBPR94_DEFAULT + (UCHAR)(TxPower - 31);
274 else if (TxPower < 0)
277 // R3, R4 can't less than 0, -1 ~ -6 used by BBP 94
281 Bbp94 = BBPR94_DEFAULT + TxPower;
287 Bbp94 = BBPR94_DEFAULT;
290 ATEDBGPRINT(RT_DEBUG_TRACE, ("%s (TxPower=%d, R=%ld, BBP_R94=%d)\n", __func__, TxPower, R, Bbp94));
297 // R3, R4 can't large than 15 (0x0F)
301 else if (TxPower < 0)
304 // R3, R4 can't less than 0
307 ASSERT((TxPower >= -7));
308 R = (ULONG)(TxPower + 7);
317 ATEDBGPRINT(RT_DEBUG_TRACE, ("%s (TxPower=%d, R=%lu)\n", __func__, TxPower, R));
320 if (pAd->ate.Channel <= 14)
324 R = R << 9; // shift TX power control to correct RF(R3) register bit position
325 R |= (pAd->LatchRfRegs.R3 & 0xffffc1ff);
326 pAd->LatchRfRegs.R3 = R;
330 R = R << 6; // shift TX power control to correct RF(R4) register bit position
331 R |= (pAd->LatchRfRegs.R4 & 0xfffff83f);
332 pAd->LatchRfRegs.R4 = R;
337 if (bPowerReduce == FALSE)
341 R = (R << 10) | (1 << 9); // shift TX power control to correct RF(R3) register bit position
342 R |= (pAd->LatchRfRegs.R3 & 0xffffc1ff);
343 pAd->LatchRfRegs.R3 = R;
347 R = (R << 7) | (1 << 6); // shift TX power control to correct RF(R4) register bit position
348 R |= (pAd->LatchRfRegs.R4 & 0xfffff83f);
349 pAd->LatchRfRegs.R4 = R;
356 R = (R << 10); // shift TX power control to correct RF(R3) register bit position
357 R |= (pAd->LatchRfRegs.R3 & 0xffffc1ff);
359 /* Clear bit 9 of R3 to reduce 7dB. */
360 pAd->LatchRfRegs.R3 = (R & (~(1 << 9)));
364 R = (R << 7); // shift TX power control to correct RF(R4) register bit position
365 R |= (pAd->LatchRfRegs.R4 & 0xfffff83f);
367 /* Clear bit 6 of R4 to reduce 7dB. */
368 pAd->LatchRfRegs.R4 = (R & (~(1 << 6)));
379 static INT ATETxPwrHandler(
380 IN PRTMP_ADAPTER pAd,
387 #ifdef RALINK_28xx_QA
388 if ((pAd->ate.bQATxStart == TRUE) || (pAd->ate.bQARxStart == TRUE))
390 // TODO: how to get current TxPower0/1 from pAd->LatchRfRegs ?
391 /* When QA is used for Tx, pAd->ate.TxPower0/1 and real tx power
392 ** are not synchronized.
395 pAd->ate.TxPower0 = pAd->LatchRfRegs.xxx;
396 pAd->ate.TxPower1 = pAd->LatchRfRegs.xxx;
401 #endif // RALINK_28xx_QA //
403 TxPower = index == 0 ? pAd->ate.TxPower0 : pAd->ate.TxPower1;
408 // R3, R4 can't large than 36 (0x24), 31 ~ 36 used by BBP 94
412 Bbp94 = BBPR94_DEFAULT + (UCHAR)(TxPower - 31);
414 else if (TxPower < 0)
417 // R3, R4 can't less than 0, -1 ~ -6 used by BBP 94
421 Bbp94 = BBPR94_DEFAULT + TxPower;
427 Bbp94 = BBPR94_DEFAULT;
430 ATEDBGPRINT(RT_DEBUG_TRACE, ("%s (TxPower=%d, R3=%ld, BBP_R94=%d)\n", __func__, TxPower, R, Bbp94));
432 if (pAd->ate.Channel <= 14)
436 R = R << 9; // shift TX power control to correct RF(R3) register bit position
437 R |= (pAd->LatchRfRegs.R3 & 0xffffc1ff);
438 pAd->LatchRfRegs.R3 = R;
442 R = R << 6; // shift TX power control to correct RF(R4) register bit position
443 R |= (pAd->LatchRfRegs.R4 & 0xfffff83f);
444 pAd->LatchRfRegs.R4 = R;
451 R = (R << 10) | (1 << 9); // shift TX power control to correct RF(R3) register bit position
452 R |= (pAd->LatchRfRegs.R3 & 0xffffc1ff);
453 pAd->LatchRfRegs.R3 = R;
457 R = (R << 7) | (1 << 6); // shift TX power control to correct RF(R4) register bit position
458 R |= (pAd->LatchRfRegs.R4 & 0xfffff83f);
459 pAd->LatchRfRegs.R4 = R;
470 ==========================================================================
472 Set ATE operation mode to
473 0. ATESTART = Start ATE Mode
474 1. ATESTOP = Stop ATE Mode
475 2. TXCONT = Continuous Transmit
476 3. TXCARR = Transmit Carrier
477 4. TXFRAME = Transmit Frames
478 5. RXFRAME = Receive Frames
479 #ifdef RALINK_28xx_QA
480 6. TXSTOP = Stop Any Type of Transmition
481 7. RXSTOP = Stop Receiving Frames
482 #endif // RALINK_28xx_QA //
484 TRUE if all parameters are OK, FALSE otherwise
485 ==========================================================================
487 static INT ATECmdHandler(
488 IN PRTMP_ADAPTER pAd,
498 PRTMP_TX_RING pTxRing = &pAd->TxRing[QID_AC_BE];
499 NDIS_STATUS Status = NDIS_STATUS_SUCCESS;
504 ATEDBGPRINT(RT_DEBUG_TRACE, ("===> ATECmdHandler()\n"));
506 ATEAsicSwitchChannel(pAd);
507 AsicLockChannel(pAd, pAd->ate.Channel);
511 // read MAC_SYS_CTRL and backup MAC_SYS_CTRL value.
512 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
514 // Default value in BBP R22 is 0x0.
517 // clean bit4 to stop continuous Tx production test.
518 MacData &= 0xFFFFFFEF;
520 if (!strcmp(arg, "ATESTART")) //Enter ATE mode and set Tx/Rx Idle
522 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATE: ATESTART\n"));
524 // check if we have removed the firmware
527 NICEraseFirmware(pAd);
530 atemode = pAd->ate.Mode;
531 pAd->ate.Mode = ATE_START;
532 // pAd->ate.TxDoneCount = pAd->ate.TxCount;
533 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
535 if (atemode & ATE_TXCARR)
537 // No Carrier Test set BBP R22 bit7=0, bit6=0, bit[5~0]=0x0
538 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
539 BbpData &= 0xFFFFFF00; //clear bit7, bit6, bit[5~0]
540 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
542 else if (atemode & ATE_TXCARRSUPP)
544 // No Cont. TX set BBP R22 bit7=0
545 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
546 BbpData &= ~(1 << 7); //set bit7=0
547 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
549 // No Carrier Suppression set BBP R24 bit0=0
550 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R24, &BbpData);
551 BbpData &= 0xFFFFFFFE; //clear bit0
552 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, BbpData);
554 // We should free some resource which was allocated when ATE_TXFRAME , ATE_STOP, and ATE_TXCONT.
555 else if ((atemode & ATE_TXFRAME) || (atemode == ATE_STOP))
557 PRTMP_TX_RING pTxRing = &pAd->TxRing[QID_AC_BE];
559 if (atemode & ATE_TXCONT)
561 // No Cont. TX set BBP R22 bit7=0
562 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
563 BbpData &= ~(1 << 7); //set bit7=0
564 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
567 RtmpDmaEnable(pAd, 0);
568 for (i=0; i<TX_RING_SIZE; i++)
570 PNDIS_PACKET pPacket;
572 #ifndef RT_BIG_ENDIAN
573 pTxD = (PTXD_STRUC)pAd->TxRing[QID_AC_BE].Cell[i].AllocVa;
575 pDestTxD = (PTXD_STRUC)pAd->TxRing[QID_AC_BE].Cell[i].AllocVa;
578 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
581 pPacket = pTxRing->Cell[i].pNdisPacket;
584 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr0, pTxD->SDLen0, PCI_DMA_TODEVICE);
585 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_SUCCESS);
587 //Always assign pNdisPacket as NULL after clear
588 pTxRing->Cell[i].pNdisPacket = NULL;
590 pPacket = pTxRing->Cell[i].pNextNdisPacket;
593 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr1, pTxD->SDLen1, PCI_DMA_TODEVICE);
594 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_SUCCESS);
596 //Always assign pNextNdisPacket as NULL after clear
597 pTxRing->Cell[i].pNextNdisPacket = NULL;
599 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
600 WriteBackToDescriptor((PUCHAR)pDestTxD, (PUCHAR)pTxD, FALSE, TYPE_TXD);
604 RtmpDmaEnable(pAd, 1);
606 // reset Rx statistics.
607 pAd->ate.LastSNR0 = 0;
608 pAd->ate.LastSNR1 = 0;
609 pAd->ate.LastRssi0 = 0;
610 pAd->ate.LastRssi1 = 0;
611 pAd->ate.LastRssi2 = 0;
612 pAd->ate.AvgRssi0 = 0;
613 pAd->ate.AvgRssi1 = 0;
614 pAd->ate.AvgRssi2 = 0;
615 pAd->ate.AvgRssi0X8 = 0;
616 pAd->ate.AvgRssi1X8 = 0;
617 pAd->ate.AvgRssi2X8 = 0;
618 pAd->ate.NumOfAvgRssiSample = 0;
620 #ifdef RALINK_28xx_QA
622 pAd->ate.bQATxStart = FALSE;
623 pAd->ate.bQARxStart = FALSE;
628 pAd->ate.OtherData = 0;
630 pAd->ate.OtherCount = 0;
644 pAd->ate.TxDoneCount = 0;
645 pAd->ate.TxStatus = 0; // task Tx status // 0 --> task is idle, 1 --> task is running
646 #endif // RALINK_28xx_QA //
652 #ifdef CONFIG_STA_SUPPORT
654 // LinkDown() has "AsicDisableSync();" and "RTMP_BBP_IO_R/W8_BY_REG_ID();" inside.
656 // LinkDown(pAd, FALSE);
657 // AsicEnableBssSync(pAd);
659 netif_stop_queue(pAd->net_dev);
662 // If we skip "LinkDown()", we should disable protection
663 // to prevent from sending out RTS or CTS-to-self.
665 ATEDisableAsicProtect(pAd);
666 RTMPStationStop(pAd);
667 #endif // CONFIG_STA_SUPPORT //
670 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
672 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
675 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
677 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
679 else if (!strcmp(arg, "ATESTOP"))
681 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATE: ATESTOP\n"));
683 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
684 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData); // recover the MAC_SYS_CTRL register back.
687 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
688 Value &= (0xfffffff3);
689 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
692 RtmpDmaEnable(pAd, 0);
694 pAd->ate.bFWLoading = TRUE;
695 Status = NICLoadFirmware(pAd);
696 if (Status != NDIS_STATUS_SUCCESS)
698 ATEDBGPRINT(RT_DEBUG_ERROR, ("NICLoadFirmware failed, Status[=0x%08x]\n", Status));
702 pAd->ate.Mode = ATE_STOP;
705 #ifdef CONFIG_STA_SUPPORT
707 // Even the firmware has been loaded,
708 // we still could use ATE_BBP_IO_READ8_BY_REG_ID().
709 // But this is not suggested.
712 #endif // CONFIG_STA_SUPPORT //
714 NICDisableInterrupt(pAd);
716 NICInitializeAdapter(pAd, TRUE);
719 // Reinitialize Rx Ring before Rx DMA is enabled.
720 // The nightmare of >>>RxCoherent<<< was gone !
721 for (index = 0; index < RX_RING_SIZE; index++)
723 pRxD = (PRXD_STRUC) pAd->RxRing.Cell[index].AllocVa;
727 // We should read EEPROM for all cases.
728 NICReadEEPROMParameters(pAd, NULL);
729 NICInitAsicFromEEPROM(pAd);
731 AsicSwitchChannel(pAd, pAd->CommonCfg.Channel, FALSE);
732 AsicLockChannel(pAd, pAd->CommonCfg.Channel);
739 // These steps are only for APAutoSelectChannel().
742 //pAd->bStaFifoTest = TRUE;
743 pAd->int_enable_reg = ((DELAYINTMASK) | (RxINT|TxDataInt|TxMgmtInt)) & ~(0x03);
744 pAd->int_disable_mask = 0;
745 pAd->int_pending = 0;
747 RTMP_IO_WRITE32(pAd, INT_SOURCE_CSR, 0xffffffff); // clear garbage interrupts
748 NICEnableInterrupt(pAd);
751 /*=========================================================================*/
752 /* restore RX_FILTR_CFG */
753 #ifdef CONFIG_STA_SUPPORT
754 /* restore RX_FILTR_CFG due to that QA maybe set it to 0x3 */
755 RTMP_IO_WRITE32(pAd, RX_FILTR_CFG, STANORMAL);
756 #endif // CONFIG_STA_SUPPORT //
757 /*=========================================================================*/
760 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
762 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
764 // Enable Tx, Rx DMA.
765 RtmpDmaEnable(pAd, 1);
768 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
770 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
773 #ifdef CONFIG_STA_SUPPORT
774 RTMPStationStart(pAd);
775 #endif // CONFIG_STA_SUPPORT //
777 netif_start_queue(pAd->net_dev);
779 else if (!strcmp(arg, "TXCARR")) // Tx Carrier
781 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATE: TXCARR\n"));
782 pAd->ate.Mode |= ATE_TXCARR;
784 // QA has done the following steps if it is used.
785 if (pAd->ate.bQATxStart == FALSE)
790 // Carrier Test set BBP R22 bit7=1, bit6=1, bit[5~0]=0x01
791 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
792 BbpData &= 0xFFFFFF00; //clear bit7, bit6, bit[5~0]
793 BbpData |= 0x000000C1; //set bit7=1, bit6=1, bit[5~0]=0x01
794 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
796 // set MAC_SYS_CTRL(0x1004) Continuous Tx Production Test (bit4) = 1
797 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
798 Value = Value | 0x00000010;
799 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
802 else if (!strcmp(arg, "TXCONT")) // Tx Continue
804 if (pAd->ate.bQATxStart == TRUE)
806 /* set MAC_SYS_CTRL(0x1004) bit4(Continuous Tx Production Test)
807 and bit2(MAC TX enable) back to zero. */
808 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
809 MacData &= 0xFFFFFFEB;
810 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
812 // set BBP R22 bit7=0
813 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
814 BbpData &= 0xFFFFFF7F; //set bit7=0
815 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
819 ** Step 1: Send 50 packets first then wait for a moment.
820 ** Step 2: Send more 50 packet then start continue mode.
822 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATE: TXCONT\n"));
823 // Step 1: send 50 packets first.
824 pAd->ate.Mode |= ATE_TXCONT;
825 pAd->ate.TxCount = 50;
826 /* Do it after Tx/Rx DMA is aborted. */
827 // pAd->ate.TxDoneCount = 0;
833 RtmpDmaEnable(pAd, 0);
835 // Fix can't smooth kick
837 RTMP_IO_READ32(pAd, TX_DTX_IDX0 + QID_AC_BE * 0x10, &pTxRing->TxDmaIdx);
838 pTxRing->TxSwFreeIdx = pTxRing->TxDmaIdx;
839 pTxRing->TxCpuIdx = pTxRing->TxDmaIdx;
840 RTMP_IO_WRITE32(pAd, TX_CTX_IDX0 + QID_AC_BE * 0x10, pTxRing->TxCpuIdx);
843 pAd->ate.TxDoneCount = 0;
845 /* Only needed if we have to send some normal frames. */
848 for (i = 0; (i < TX_RING_SIZE-1) && (i < pAd->ate.TxCount); i++)
850 PNDIS_PACKET pPacket;
851 UINT32 TxIdx = pTxRing->TxCpuIdx;
853 #ifndef RT_BIG_ENDIAN
854 pTxD = (PTXD_STRUC)pTxRing->Cell[TxIdx].AllocVa;
856 pDestTxD = (PTXD_STRUC)pTxRing->Cell[TxIdx].AllocVa;
859 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
861 // Clean current cell.
862 pPacket = pTxRing->Cell[TxIdx].pNdisPacket;
865 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr0, pTxD->SDLen0, PCI_DMA_TODEVICE);
866 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_SUCCESS);
868 //Always assign pNdisPacket as NULL after clear
869 pTxRing->Cell[TxIdx].pNdisPacket = NULL;
871 pPacket = pTxRing->Cell[TxIdx].pNextNdisPacket;
874 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr1, pTxD->SDLen1, PCI_DMA_TODEVICE);
875 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_SUCCESS);
877 //Always assign pNextNdisPacket as NULL after clear
878 pTxRing->Cell[TxIdx].pNextNdisPacket = NULL;
881 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
882 WriteBackToDescriptor((PUCHAR)pDestTxD, (PUCHAR)pTxD, FALSE, TYPE_TXD);
885 if (ATESetUpFrame(pAd, TxIdx) != 0)
888 INC_RING_INDEX(pTxRing->TxCpuIdx, TX_RING_SIZE);
891 // Setup frame format.
892 ATESetUpFrame(pAd, pTxRing->TxCpuIdx);
895 RtmpDmaEnable(pAd, 1);
898 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
900 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
903 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
905 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
907 #ifdef RALINK_28xx_QA
908 if (pAd->ate.bQATxStart == TRUE)
910 pAd->ate.TxStatus = 1;
911 //pAd->ate.Repeat = 0;
913 #endif // RALINK_28xx_QA //
916 RTMP_IO_WRITE32(pAd, TX_CTX_IDX0 + QID_AC_BE * RINGREG_DIFF, pAd->TxRing[QID_AC_BE].TxCpuIdx);
921 // Step 2: send more 50 packets then start continue mode.
923 RtmpDmaEnable(pAd, 0);
925 // Cont. TX set BBP R22 bit7=1
926 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
927 BbpData |= 0x00000080; //set bit7=1
928 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
930 pAd->ate.TxCount = 50;
932 // Fix can't smooth kick
934 RTMP_IO_READ32(pAd, TX_DTX_IDX0 + QID_AC_BE * 0x10, &pTxRing->TxDmaIdx);
935 pTxRing->TxSwFreeIdx = pTxRing->TxDmaIdx;
936 pTxRing->TxCpuIdx = pTxRing->TxDmaIdx;
937 RTMP_IO_WRITE32(pAd, TX_CTX_IDX0 + QID_AC_BE * 0x10, pTxRing->TxCpuIdx);
940 pAd->ate.TxDoneCount = 0;
944 for (i = 0; (i < TX_RING_SIZE-1) && (i < pAd->ate.TxCount); i++)
946 PNDIS_PACKET pPacket;
947 UINT32 TxIdx = pTxRing->TxCpuIdx;
949 #ifndef RT_BIG_ENDIAN
950 pTxD = (PTXD_STRUC)pTxRing->Cell[TxIdx].AllocVa;
952 pDestTxD = (PTXD_STRUC)pTxRing->Cell[TxIdx].AllocVa;
955 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
957 // clean current cell.
958 pPacket = pTxRing->Cell[TxIdx].pNdisPacket;
961 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr0, pTxD->SDLen0, PCI_DMA_TODEVICE);
962 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_SUCCESS);
964 //Always assign pNdisPacket as NULL after clear
965 pTxRing->Cell[TxIdx].pNdisPacket = NULL;
967 pPacket = pTxRing->Cell[TxIdx].pNextNdisPacket;
970 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr1, pTxD->SDLen1, PCI_DMA_TODEVICE);
971 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_SUCCESS);
973 //Always assign pNextNdisPacket as NULL after clear
974 pTxRing->Cell[TxIdx].pNextNdisPacket = NULL;
977 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
978 WriteBackToDescriptor((PUCHAR)pDestTxD, (PUCHAR)pTxD, FALSE, TYPE_TXD);
981 if (ATESetUpFrame(pAd, TxIdx) != 0)
984 INC_RING_INDEX(pTxRing->TxCpuIdx, TX_RING_SIZE);
987 ATESetUpFrame(pAd, pTxRing->TxCpuIdx);
990 RtmpDmaEnable(pAd, 1);
993 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
995 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
998 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1000 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1002 #ifdef RALINK_28xx_QA
1003 if (pAd->ate.bQATxStart == TRUE)
1005 pAd->ate.TxStatus = 1;
1006 //pAd->ate.Repeat = 0;
1008 #endif // RALINK_28xx_QA //
1011 RTMP_IO_WRITE32(pAd, TX_CTX_IDX0 + QID_AC_BE * RINGREG_DIFF, pAd->TxRing[QID_AC_BE].TxCpuIdx);
1015 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &MacData);
1016 MacData |= 0x00000010;
1017 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
1019 else if (!strcmp(arg, "TXFRAME")) // Tx Frames
1021 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATE: TXFRAME(Count=%d)\n", pAd->ate.TxCount));
1022 pAd->ate.Mode |= ATE_TXFRAME;
1023 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
1027 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
1029 // Abort Tx, RX DMA.
1030 RtmpDmaEnable(pAd, 0);
1032 // Fix can't smooth kick
1034 RTMP_IO_READ32(pAd, TX_DTX_IDX0 + QID_AC_BE * 0x10, &pTxRing->TxDmaIdx);
1035 pTxRing->TxSwFreeIdx = pTxRing->TxDmaIdx;
1036 pTxRing->TxCpuIdx = pTxRing->TxDmaIdx;
1037 RTMP_IO_WRITE32(pAd, TX_CTX_IDX0 + QID_AC_BE * 0x10, pTxRing->TxCpuIdx);
1040 pAd->ate.TxDoneCount = 0;
1042 SetJapanFilter(pAd);
1044 for (i = 0; (i < TX_RING_SIZE-1) && (i < pAd->ate.TxCount); i++)
1046 PNDIS_PACKET pPacket;
1047 UINT32 TxIdx = pTxRing->TxCpuIdx;
1049 #ifndef RT_BIG_ENDIAN
1050 pTxD = (PTXD_STRUC)pTxRing->Cell[TxIdx].AllocVa;
1052 pDestTxD = (PTXD_STRUC)pTxRing->Cell[TxIdx].AllocVa;
1055 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
1057 // Clean current cell.
1058 pPacket = pTxRing->Cell[TxIdx].pNdisPacket;
1061 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr0, pTxD->SDLen0, PCI_DMA_TODEVICE);
1062 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_SUCCESS);
1064 //Always assign pNdisPacket as NULL after clear
1065 pTxRing->Cell[TxIdx].pNdisPacket = NULL;
1067 pPacket = pTxRing->Cell[TxIdx].pNextNdisPacket;
1070 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr1, pTxD->SDLen1, PCI_DMA_TODEVICE);
1071 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_SUCCESS);
1073 //Always assign pNextNdisPacket as NULL after clear
1074 pTxRing->Cell[TxIdx].pNextNdisPacket = NULL;
1076 #ifdef RT_BIG_ENDIAN
1077 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
1078 WriteBackToDescriptor((PUCHAR)pDestTxD, (PUCHAR)pTxD, FALSE, TYPE_TXD);
1081 if (ATESetUpFrame(pAd, TxIdx) != 0)
1084 INC_RING_INDEX(pTxRing->TxCpuIdx, TX_RING_SIZE);
1088 ATESetUpFrame(pAd, pTxRing->TxCpuIdx);
1090 // Start Tx, Rx DMA.
1091 RtmpDmaEnable(pAd, 1);
1094 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1096 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1097 #ifdef RALINK_28xx_QA
1098 // add this for LoopBack mode
1099 if (pAd->ate.bQARxStart == FALSE)
1102 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1104 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1107 if (pAd->ate.bQATxStart == TRUE)
1109 pAd->ate.TxStatus = 1;
1110 //pAd->ate.Repeat = 0;
1114 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1116 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1117 #endif // RALINK_28xx_QA //
1119 RTMP_IO_READ32(pAd, TX_DTX_IDX0 + QID_AC_BE * RINGREG_DIFF, &pAd->TxRing[QID_AC_BE].TxDmaIdx);
1121 RTMP_IO_WRITE32(pAd, TX_CTX_IDX0 + QID_AC_BE * RINGREG_DIFF, pAd->TxRing[QID_AC_BE].TxCpuIdx);
1123 pAd->RalinkCounters.KickTxCount++;
1125 #ifdef RALINK_28xx_QA
1126 else if (!strcmp(arg, "TXSTOP"))
1128 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATE: TXSTOP\n"));
1129 atemode = pAd->ate.Mode;
1130 pAd->ate.Mode &= ATE_TXSTOP;
1131 pAd->ate.bQATxStart = FALSE;
1132 // pAd->ate.TxDoneCount = pAd->ate.TxCount;
1134 if (atemode & ATE_TXCARR)
1136 // No Carrier Test set BBP R22 bit7=0, bit6=0, bit[5~0]=0x0
1137 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
1138 BbpData &= 0xFFFFFF00; //clear bit7, bit6, bit[5~0]
1139 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
1141 else if (atemode & ATE_TXCARRSUPP)
1143 // No Cont. TX set BBP R22 bit7=0
1144 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
1145 BbpData &= ~(1 << 7); //set bit7=0
1146 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
1148 // No Carrier Suppression set BBP R24 bit0=0
1149 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R24, &BbpData);
1150 BbpData &= 0xFFFFFFFE; //clear bit0
1151 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, BbpData);
1153 // We should free some resource which allocate when ATE_TXFRAME , ATE_STOP, and ATE_TXCONT.
1154 else if ((atemode & ATE_TXFRAME) || (atemode == ATE_STOP))
1157 PRTMP_TX_RING pTxRing = &pAd->TxRing[QID_AC_BE];
1159 if (atemode & ATE_TXCONT)
1161 // No Cont. TX set BBP R22 bit7=0
1162 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R22, &BbpData);
1163 BbpData &= ~(1 << 7); //set bit7=0
1164 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
1167 // Abort Tx, Rx DMA.
1168 RtmpDmaEnable(pAd, 0);
1169 for (i=0; i<TX_RING_SIZE; i++)
1171 PNDIS_PACKET pPacket;
1173 #ifndef RT_BIG_ENDIAN
1174 pTxD = (PTXD_STRUC)pAd->TxRing[QID_AC_BE].Cell[i].AllocVa;
1176 pDestTxD = (PTXD_STRUC)pAd->TxRing[QID_AC_BE].Cell[i].AllocVa;
1179 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
1182 pPacket = pTxRing->Cell[i].pNdisPacket;
1185 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr0, pTxD->SDLen0, PCI_DMA_TODEVICE);
1186 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_SUCCESS);
1188 //Always assign pNdisPacket as NULL after clear
1189 pTxRing->Cell[i].pNdisPacket = NULL;
1191 pPacket = pTxRing->Cell[i].pNextNdisPacket;
1194 PCI_UNMAP_SINGLE(pAd, pTxD->SDPtr1, pTxD->SDLen1, PCI_DMA_TODEVICE);
1195 RELEASE_NDIS_PACKET(pAd, pPacket, NDIS_STATUS_SUCCESS);
1197 //Always assign pNextNdisPacket as NULL after clear
1198 pTxRing->Cell[i].pNextNdisPacket = NULL;
1199 #ifdef RT_BIG_ENDIAN
1200 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
1201 WriteBackToDescriptor((PUCHAR)pDestTxD, (PUCHAR)pTxD, FALSE, TYPE_TXD);
1204 // Enable Tx, Rx DMA
1205 RtmpDmaEnable(pAd, 1);
1210 // pAd->ate.TxDoneCount = 0;
1211 pAd->ate.TxStatus = 0; // task Tx status // 0 --> task is idle, 1 --> task is running
1217 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1219 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1221 else if (!strcmp(arg, "RXSTOP"))
1223 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATE: RXSTOP\n"));
1224 atemode = pAd->ate.Mode;
1225 pAd->ate.Mode &= ATE_RXSTOP;
1226 pAd->ate.bQARxStart = FALSE;
1227 // pAd->ate.TxDoneCount = pAd->ate.TxCount;
1229 if (atemode & ATE_TXCARR)
1233 else if (atemode & ATE_TXCARRSUPP)
1238 // We should free some resource which was allocated when ATE_TXFRAME , ATE_STOP, and ATE_TXCONT.
1239 else if ((atemode & ATE_TXFRAME) || (atemode == ATE_STOP))
1241 if (atemode & ATE_TXCONT)
1248 // pAd->ate.TxDoneCount = 0;
1249 // pAd->ate.TxStatus = 0; // task Tx status // 0 --> task is idle, 1 --> task is running
1255 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1257 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1259 #endif // RALINK_28xx_QA //
1260 else if (!strcmp(arg, "RXFRAME")) // Rx Frames
1262 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATE: RXFRAME\n"));
1264 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R22, BbpData);
1265 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, MacData);
1267 pAd->ate.Mode |= ATE_RXFRAME;
1269 // Disable Tx of MAC block.
1270 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1272 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1274 // Enable Rx of MAC block.
1275 RTMP_IO_READ32(pAd, MAC_SYS_CTRL, &Value);
1277 RTMP_IO_WRITE32(pAd, MAC_SYS_CTRL, Value);
1281 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATE: Invalid arg!\n"));
1284 RTMPusecDelay(5000);
1286 ATEDBGPRINT(RT_DEBUG_TRACE, ("<=== ATECmdHandler()\n"));
1292 /*=======================End of RT2860=======================*/
1295 /*======================Start of RT2870======================*/
1301 IN PRTMP_ADAPTER pAd,
1304 if (ATECmdHandler(pAd, arg))
1306 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_Proc Success\n"));
1313 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_Proc Failed\n"));
1319 ==========================================================================
1321 Set ATE ADDR1=DA for TxFrame(AP : To DS = 0 ; From DS = 1)
1323 Set ATE ADDR3=DA for TxFrame(STA : To DS = 1 ; From DS = 0)
1326 TRUE if all parameters are OK, FALSE otherwise
1327 ==========================================================================
1329 INT Set_ATE_DA_Proc(
1330 IN PRTMP_ADAPTER pAd,
1336 if(strlen(arg) != 17) //Mac address acceptable format 01:02:03:04:05:06 length 17
1339 for (i=0, value = rstrtok(arg, ":"); value; value = rstrtok(NULL, ":"))
1341 if((strlen(value) != 2) || (!isxdigit(*value)) || (!isxdigit(*(value+1))) )
1342 return FALSE; //Invalid
1345 #ifdef CONFIG_STA_SUPPORT
1346 AtoH(value, &pAd->ate.Addr3[i++], 1);
1347 #endif // CONFIG_STA_SUPPORT //
1351 return FALSE; //Invalid
1354 #ifdef CONFIG_STA_SUPPORT
1355 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_DA_Proc (DA = %2X:%2X:%2X:%2X:%2X:%2X)\n", pAd->ate.Addr3[0],
1356 pAd->ate.Addr3[1], pAd->ate.Addr3[2], pAd->ate.Addr3[3], pAd->ate.Addr3[4], pAd->ate.Addr3[5]));
1357 #endif // CONFIG_STA_SUPPORT //
1359 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_DA_Proc Success\n"));
1365 ==========================================================================
1367 Set ATE ADDR3=SA for TxFrame(AP : To DS = 0 ; From DS = 1)
1369 Set ATE ADDR2=SA for TxFrame(STA : To DS = 1 ; From DS = 0)
1372 TRUE if all parameters are OK, FALSE otherwise
1373 ==========================================================================
1375 INT Set_ATE_SA_Proc(
1376 IN PRTMP_ADAPTER pAd,
1382 if(strlen(arg) != 17) //Mac address acceptable format 01:02:03:04:05:06 length 17
1385 for (i=0, value = rstrtok(arg, ":"); value; value = rstrtok(NULL, ":"))
1387 if((strlen(value) != 2) || (!isxdigit(*value)) || (!isxdigit(*(value+1))) )
1388 return FALSE; //Invalid
1391 #ifdef CONFIG_STA_SUPPORT
1392 AtoH(value, &pAd->ate.Addr2[i++], 1);
1393 #endif // CONFIG_STA_SUPPORT //
1397 return FALSE; //Invalid
1400 #ifdef CONFIG_STA_SUPPORT
1401 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_SA_Proc (SA = %2X:%2X:%2X:%2X:%2X:%2X)\n", pAd->ate.Addr2[0],
1402 pAd->ate.Addr2[1], pAd->ate.Addr2[2], pAd->ate.Addr2[3], pAd->ate.Addr2[4], pAd->ate.Addr2[5]));
1403 #endif // CONFIG_STA_SUPPORT //
1405 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_SA_Proc Success\n"));
1411 ==========================================================================
1413 Set ATE ADDR2=BSSID for TxFrame(AP : To DS = 0 ; From DS = 1)
1415 Set ATE ADDR1=BSSID for TxFrame(STA : To DS = 1 ; From DS = 0)
1418 TRUE if all parameters are OK, FALSE otherwise
1419 ==========================================================================
1421 INT Set_ATE_BSSID_Proc(
1422 IN PRTMP_ADAPTER pAd,
1428 if(strlen(arg) != 17) //Mac address acceptable format 01:02:03:04:05:06 length 17
1431 for (i=0, value = rstrtok(arg, ":"); value; value = rstrtok(NULL, ":"))
1433 if((strlen(value) != 2) || (!isxdigit(*value)) || (!isxdigit(*(value+1))) )
1434 return FALSE; //Invalid
1437 #ifdef CONFIG_STA_SUPPORT
1438 AtoH(value, &pAd->ate.Addr1[i++], 1);
1439 #endif // CONFIG_STA_SUPPORT //
1443 return FALSE; //Invalid
1446 #ifdef CONFIG_STA_SUPPORT
1447 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_BSSID_Proc (BSSID = %2X:%2X:%2X:%2X:%2X:%2X)\n", pAd->ate.Addr1[0],
1448 pAd->ate.Addr1[1], pAd->ate.Addr1[2], pAd->ate.Addr1[3], pAd->ate.Addr1[4], pAd->ate.Addr1[5]));
1449 #endif // CONFIG_STA_SUPPORT //
1451 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_BSSID_Proc Success\n"));
1457 ==========================================================================
1462 TRUE if all parameters are OK, FALSE otherwise
1463 ==========================================================================
1465 INT Set_ATE_CHANNEL_Proc(
1466 IN PRTMP_ADAPTER pAd,
1471 channel = simple_strtol(arg, 0, 10);
1473 if ((channel < 1) || (channel > 216))// to allow A band channel : ((channel < 1) || (channel > 14))
1475 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_CHANNEL_Proc::Out of range, it should be in range of 1~14.\n"));
1478 pAd->ate.Channel = channel;
1480 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_CHANNEL_Proc (ATE Channel = %d)\n", pAd->ate.Channel));
1481 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_CHANNEL_Proc Success\n"));
1488 ==========================================================================
1493 TRUE if all parameters are OK, FALSE otherwise
1494 ==========================================================================
1496 INT Set_ATE_TX_POWER0_Proc(
1497 IN PRTMP_ADAPTER pAd,
1502 TxPower = simple_strtol(arg, 0, 10);
1504 if (pAd->ate.Channel <= 14)
1506 if ((TxPower > 31) || (TxPower < 0))
1508 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_POWER0_Proc::Out of range (Value=%d)\n", TxPower));
1514 if ((TxPower > 15) || (TxPower < -7))
1516 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_POWER0_Proc::Out of range (Value=%d)\n", TxPower));
1521 pAd->ate.TxPower0 = TxPower;
1522 ATETxPwrHandler(pAd, 0);
1523 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_POWER0_Proc Success\n"));
1530 ==========================================================================
1535 TRUE if all parameters are OK, FALSE otherwise
1536 ==========================================================================
1538 INT Set_ATE_TX_POWER1_Proc(
1539 IN PRTMP_ADAPTER pAd,
1544 TxPower = simple_strtol(arg, 0, 10);
1546 if (pAd->ate.Channel <= 14)
1548 if ((TxPower > 31) || (TxPower < 0))
1550 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_POWER1_Proc::Out of range (Value=%d)\n", TxPower));
1556 if ((TxPower > 15) || (TxPower < -7))
1558 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_POWER1_Proc::Out of range (Value=%d)\n", TxPower));
1563 pAd->ate.TxPower1 = TxPower;
1564 ATETxPwrHandler(pAd, 1);
1565 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_POWER1_Proc Success\n"));
1572 ==========================================================================
1577 TRUE if all parameters are OK, FALSE otherwise
1578 ==========================================================================
1580 INT Set_ATE_TX_Antenna_Proc(
1581 IN PRTMP_ADAPTER pAd,
1586 value = simple_strtol(arg, 0, 10);
1588 if ((value > 2) || (value < 0))
1590 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_Antenna_Proc::Out of range (Value=%d)\n", value));
1594 pAd->ate.TxAntennaSel = value;
1596 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_Antenna_Proc (Antenna = %d)\n", pAd->ate.TxAntennaSel));
1597 ATEDBGPRINT(RT_DEBUG_TRACE,("Ralink: Set_ATE_TX_Antenna_Proc Success\n"));
1604 ==========================================================================
1609 TRUE if all parameters are OK, FALSE otherwise
1610 ==========================================================================
1612 INT Set_ATE_RX_Antenna_Proc(
1613 IN PRTMP_ADAPTER pAd,
1618 value = simple_strtol(arg, 0, 10);
1620 if ((value > 3) || (value < 0))
1622 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_RX_Antenna_Proc::Out of range (Value=%d)\n", value));
1626 pAd->ate.RxAntennaSel = value;
1628 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_RX_Antenna_Proc (Antenna = %d)\n", pAd->ate.RxAntennaSel));
1629 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_RX_Antenna_Proc Success\n"));
1636 ==========================================================================
1638 Set ATE RF frequence offset
1641 TRUE if all parameters are OK, FALSE otherwise
1642 ==========================================================================
1644 INT Set_ATE_TX_FREQOFFSET_Proc(
1645 IN PRTMP_ADAPTER pAd,
1651 RFFreqOffset = simple_strtol(arg, 0, 10);
1653 if(RFFreqOffset >= 64)
1655 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_FREQOFFSET_Proc::Out of range, it should be in range of 0~63.\n"));
1659 pAd->ate.RFFreqOffset = RFFreqOffset;
1660 R4 = pAd->ate.RFFreqOffset << 15; // shift TX power control to correct RF register bit position
1661 R4 |= (pAd->LatchRfRegs.R4 & ((~0x001f8000)));
1662 pAd->LatchRfRegs.R4 = R4;
1666 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_FREQOFFSET_Proc (RFFreqOffset = %d)\n", pAd->ate.RFFreqOffset));
1667 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_FREQOFFSET_Proc Success\n"));
1674 ==========================================================================
1679 TRUE if all parameters are OK, FALSE otherwise
1680 ==========================================================================
1682 INT Set_ATE_TX_BW_Proc(
1683 IN PRTMP_ADAPTER pAd,
1690 BBPCurrentBW = simple_strtol(arg, 0, 10);
1692 if(BBPCurrentBW == 0)
1693 pAd->ate.TxWI.BW = BW_20;
1695 pAd->ate.TxWI.BW = BW_40;
1697 if(pAd->ate.TxWI.BW == BW_20)
1699 if(pAd->ate.Channel <= 14)
1703 if (pAd->Tx20MPwrCfgGBand[i] != 0xffffffff)
1705 RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, pAd->Tx20MPwrCfgGBand[i]);
1706 RTMPusecDelay(5000);
1714 if (pAd->Tx20MPwrCfgABand[i] != 0xffffffff)
1716 RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, pAd->Tx20MPwrCfgABand[i]);
1717 RTMPusecDelay(5000);
1722 //Set BBP R4 bit[4:3]=0:0
1723 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &value);
1725 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, value);
1729 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, value);
1731 //to improve Rx sensitivity.
1733 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R68, value);
1736 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, value);
1739 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, value);
1742 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, value);
1744 // If Channel=14, Bandwidth=20M and Mode=CCK, Set BBP R4 bit5=1
1745 // (Japan filter coefficients)
1746 // This segment of code will only works when ATETXMODE and ATECHANNEL
1747 // were set to MODE_CCK and 14 respectively before ATETXBW is set to 0.
1748 //=====================================================================
1749 if (pAd->ate.Channel == 14)
1751 int TxMode = pAd->ate.TxWI.PHYMODE;
1752 if (TxMode == MODE_CCK)
1754 // when Channel==14 && Mode==CCK && BandWidth==20M, BBP R4 bit5=1
1755 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &value);
1756 value |= 0x20; //set bit5=1
1757 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, value);
1761 //=====================================================================
1762 // If bandwidth != 40M, RF Reg4 bit 21 = 0.
1763 pAd->LatchRfRegs.R4 &= ~0x00200000;
1766 else if(pAd->ate.TxWI.BW == BW_40)
1768 if(pAd->ate.Channel <= 14)
1772 if (pAd->Tx40MPwrCfgGBand[i] != 0xffffffff)
1774 RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, pAd->Tx40MPwrCfgGBand[i]);
1775 RTMPusecDelay(5000);
1783 if (pAd->Tx40MPwrCfgABand[i] != 0xffffffff)
1785 RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, pAd->Tx40MPwrCfgABand[i]);
1786 RTMPusecDelay(5000);
1789 #ifdef DOT11_N_SUPPORT
1790 if ((pAd->ate.TxWI.PHYMODE >= MODE_HTMIX) && (pAd->ate.TxWI.MCS == 7))
1793 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R67, value);
1795 #endif // DOT11_N_SUPPORT //
1798 //Set BBP R4 bit[4:3]=1:0
1799 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &value);
1802 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, value);
1806 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, value);
1808 //to improve Rx sensitivity.
1810 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R68, value);
1813 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, value);
1816 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, value);
1819 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R73, value);
1821 // If bandwidth = 40M, set RF Reg4 bit 21 = 1.
1822 pAd->LatchRfRegs.R4 |= 0x00200000;
1826 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_BW_Proc (BBPCurrentBW = %d)\n", pAd->ate.TxWI.BW));
1827 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_BW_Proc Success\n"));
1834 ==========================================================================
1836 Set ATE Tx frame length
1839 TRUE if all parameters are OK, FALSE otherwise
1840 ==========================================================================
1842 INT Set_ATE_TX_LENGTH_Proc(
1843 IN PRTMP_ADAPTER pAd,
1846 pAd->ate.TxLength = simple_strtol(arg, 0, 10);
1848 if((pAd->ate.TxLength < 24) || (pAd->ate.TxLength > (MAX_FRAME_SIZE - 34/* == 2312 */)))
1850 pAd->ate.TxLength = (MAX_FRAME_SIZE - 34/* == 2312 */);
1851 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_LENGTH_Proc::Out of range, it should be in range of 24~%d.\n", (MAX_FRAME_SIZE - 34/* == 2312 */)));
1855 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_LENGTH_Proc (TxLength = %d)\n", pAd->ate.TxLength));
1856 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_LENGTH_Proc Success\n"));
1863 ==========================================================================
1865 Set ATE Tx frame count
1868 TRUE if all parameters are OK, FALSE otherwise
1869 ==========================================================================
1871 INT Set_ATE_TX_COUNT_Proc(
1872 IN PRTMP_ADAPTER pAd,
1875 pAd->ate.TxCount = simple_strtol(arg, 0, 10);
1877 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_COUNT_Proc (TxCount = %d)\n", pAd->ate.TxCount));
1878 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_COUNT_Proc Success\n"));
1885 ==========================================================================
1887 Set ATE Tx frame MCS
1890 TRUE if all parameters are OK, FALSE otherwise
1891 ==========================================================================
1893 INT Set_ATE_TX_MCS_Proc(
1894 IN PRTMP_ADAPTER pAd,
1900 MCS = simple_strtol(arg, 0, 10);
1901 result = CheckMCSValid(pAd->ate.TxWI.PHYMODE, MCS);
1905 pAd->ate.TxWI.MCS = (UCHAR)MCS;
1909 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_MCS_Proc::Out of range, refer to rate table.\n"));
1913 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_MCS_Proc (MCS = %d)\n", pAd->ate.TxWI.MCS));
1914 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_MCS_Proc Success\n"));
1921 ==========================================================================
1923 Set ATE Tx frame Mode
1927 3: MODE_HTGREENFIELD
1930 TRUE if all parameters are OK, FALSE otherwise
1931 ==========================================================================
1933 INT Set_ATE_TX_MODE_Proc(
1934 IN PRTMP_ADAPTER pAd,
1937 pAd->ate.TxWI.PHYMODE = simple_strtol(arg, 0, 10);
1939 if(pAd->ate.TxWI.PHYMODE > 3)
1941 pAd->ate.TxWI.PHYMODE = 0;
1942 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_MODE_Proc::Out of range. it should be in range of 0~3\n"));
1943 ATEDBGPRINT(RT_DEBUG_ERROR, ("0: CCK, 1: OFDM, 2: HT_MIX, 3: HT_GREEN_FIELD.\n"));
1947 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_MODE_Proc (TxMode = %d)\n", pAd->ate.TxWI.PHYMODE));
1948 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_MODE_Proc Success\n"));
1955 ==========================================================================
1960 TRUE if all parameters are OK, FALSE otherwise
1961 ==========================================================================
1963 INT Set_ATE_TX_GI_Proc(
1964 IN PRTMP_ADAPTER pAd,
1967 pAd->ate.TxWI.ShortGI = simple_strtol(arg, 0, 10);
1969 if(pAd->ate.TxWI.ShortGI > 1)
1971 pAd->ate.TxWI.ShortGI = 0;
1972 ATEDBGPRINT(RT_DEBUG_ERROR, ("Set_ATE_TX_GI_Proc::Out of range\n"));
1976 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_GI_Proc (GI = %d)\n", pAd->ate.TxWI.ShortGI));
1977 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_GI_Proc Success\n"));
1984 ==========================================================================
1986 ==========================================================================
1988 INT Set_ATE_RX_FER_Proc(
1989 IN PRTMP_ADAPTER pAd,
1992 pAd->ate.bRxFer = simple_strtol(arg, 0, 10);
1994 if (pAd->ate.bRxFer == 1)
1996 pAd->ate.RxCntPerSec = 0;
1997 pAd->ate.RxTotalCnt = 0;
2000 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_RX_FER_Proc (bRxFer = %d)\n", pAd->ate.bRxFer));
2001 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_RX_FER_Proc Success\n"));
2007 INT Set_ATE_Read_RF_Proc(
2008 IN PRTMP_ADAPTER pAd,
2011 ate_print(KERN_EMERG "R1 = %lx\n", pAd->LatchRfRegs.R1);
2012 ate_print(KERN_EMERG "R2 = %lx\n", pAd->LatchRfRegs.R2);
2013 ate_print(KERN_EMERG "R3 = %lx\n", pAd->LatchRfRegs.R3);
2014 ate_print(KERN_EMERG "R4 = %lx\n", pAd->LatchRfRegs.R4);
2019 INT Set_ATE_Write_RF1_Proc(
2020 IN PRTMP_ADAPTER pAd,
2023 UINT32 value = simple_strtol(arg, 0, 16);
2025 pAd->LatchRfRegs.R1 = value;
2031 INT Set_ATE_Write_RF2_Proc(
2032 IN PRTMP_ADAPTER pAd,
2035 UINT32 value = simple_strtol(arg, 0, 16);
2037 pAd->LatchRfRegs.R2 = value;
2043 INT Set_ATE_Write_RF3_Proc(
2044 IN PRTMP_ADAPTER pAd,
2047 UINT32 value = simple_strtol(arg, 0, 16);
2049 pAd->LatchRfRegs.R3 = value;
2055 INT Set_ATE_Write_RF4_Proc(
2056 IN PRTMP_ADAPTER pAd,
2059 UINT32 value = simple_strtol(arg, 0, 16);
2061 pAd->LatchRfRegs.R4 = value;
2068 ==========================================================================
2070 Load and Write EEPROM from a binary file prepared in advance.
2073 TRUE if all parameters are OK, FALSE otherwise
2074 ==========================================================================
2076 INT Set_ATE_Load_E2P_Proc(
2077 IN PRTMP_ADAPTER pAd,
2080 BOOLEAN ret = FALSE;
2081 PUCHAR src = EEPROM_BIN_FILE_NAME;
2083 INT32 retval, orgfsuid, orgfsgid;
2085 USHORT WriteEEPROM[(EEPROM_SIZE/2)];
2086 UINT32 FileLength = 0;
2087 UINT32 value = simple_strtol(arg, 0, 10);
2089 ATEDBGPRINT(RT_DEBUG_ERROR, ("===> %s (value=%d)\n\n", __func__, value));
2093 /* zero the e2p buffer */
2094 NdisZeroMemory((PUCHAR)WriteEEPROM, EEPROM_SIZE);
2096 /* save uid and gid used for filesystem access.
2097 ** set user and group to 0 (root)
2099 orgfsuid = current->fsuid;
2100 orgfsgid = current->fsgid;
2102 current->fsuid = current->fsgid = 0;
2108 /* open the bin file */
2109 srcf = filp_open(src, O_RDONLY, 0);
2113 ate_print("%s - Error %ld opening %s\n", __func__, -PTR_ERR(srcf), src);
2117 /* the object must have a read method */
2118 if ((srcf->f_op == NULL) || (srcf->f_op->read == NULL))
2120 ate_print("%s - %s does not have a read method\n", __func__, src);
2124 /* read the firmware from the file *.bin */
2125 FileLength = srcf->f_op->read(srcf,
2126 (PUCHAR)WriteEEPROM,
2130 if (FileLength != EEPROM_SIZE)
2132 ate_print("%s: error file length (=%d) in e2p.bin\n",
2133 __func__, FileLength);
2138 /* write the content of .bin file to EEPROM */
2139 rt_ee_write_all(pAd, WriteEEPROM);
2145 /* close firmware file */
2152 retval = filp_close(srcf, NULL);
2155 ATEDBGPRINT(RT_DEBUG_ERROR, ("--> Error %d closing %s\n", -retval, src));
2162 current->fsuid = orgfsuid;
2163 current->fsgid = orgfsgid;
2165 ATEDBGPRINT(RT_DEBUG_ERROR, ("<=== %s (ret=%d)\n", __func__, ret));
2171 INT Set_ATE_Read_E2P_Proc(
2172 IN PRTMP_ADAPTER pAd,
2175 USHORT buffer[EEPROM_SIZE/2];
2179 rt_ee_read_all(pAd, (USHORT *)buffer);
2181 for (i = 0; i < (EEPROM_SIZE/2); i++)
2183 ate_print("%4.4x ", *p);
2184 if (((i+1) % 16) == 0)
2191 INT Set_ATE_Show_Proc(
2192 IN PRTMP_ADAPTER pAd,
2195 ate_print("Mode=%d\n", pAd->ate.Mode);
2196 ate_print("TxPower0=%d\n", pAd->ate.TxPower0);
2197 ate_print("TxPower1=%d\n", pAd->ate.TxPower1);
2198 ate_print("TxAntennaSel=%d\n", pAd->ate.TxAntennaSel);
2199 ate_print("RxAntennaSel=%d\n", pAd->ate.RxAntennaSel);
2200 ate_print("BBPCurrentBW=%d\n", pAd->ate.TxWI.BW);
2201 ate_print("GI=%d\n", pAd->ate.TxWI.ShortGI);
2202 ate_print("MCS=%d\n", pAd->ate.TxWI.MCS);
2203 ate_print("TxMode=%d\n", pAd->ate.TxWI.PHYMODE);
2204 ate_print("Addr1=%02x:%02x:%02x:%02x:%02x:%02x\n",
2205 pAd->ate.Addr1[0], pAd->ate.Addr1[1], pAd->ate.Addr1[2], pAd->ate.Addr1[3], pAd->ate.Addr1[4], pAd->ate.Addr1[5]);
2206 ate_print("Addr2=%02x:%02x:%02x:%02x:%02x:%02x\n",
2207 pAd->ate.Addr2[0], pAd->ate.Addr2[1], pAd->ate.Addr2[2], pAd->ate.Addr2[3], pAd->ate.Addr2[4], pAd->ate.Addr2[5]);
2208 ate_print("Addr3=%02x:%02x:%02x:%02x:%02x:%02x\n",
2209 pAd->ate.Addr3[0], pAd->ate.Addr3[1], pAd->ate.Addr3[2], pAd->ate.Addr3[3], pAd->ate.Addr3[4], pAd->ate.Addr3[5]);
2210 ate_print("Channel=%d\n", pAd->ate.Channel);
2211 ate_print("TxLength=%d\n", pAd->ate.TxLength);
2212 ate_print("TxCount=%u\n", pAd->ate.TxCount);
2213 ate_print("RFFreqOffset=%d\n", pAd->ate.RFFreqOffset);
2214 ate_print(KERN_EMERG "Set_ATE_Show_Proc Success\n");
2218 INT Set_ATE_Help_Proc(
2219 IN PRTMP_ADAPTER pAd,
2222 ate_print("ATE=ATESTART, ATESTOP, TXCONT, TXCARR, TXFRAME, RXFRAME\n");
2223 ate_print("ATEDA\n");
2224 ate_print("ATESA\n");
2225 ate_print("ATEBSSID\n");
2226 ate_print("ATECHANNEL, range:0~14(unless A band !)\n");
2227 ate_print("ATETXPOW0, set power level of antenna 1.\n");
2228 ate_print("ATETXPOW1, set power level of antenna 2.\n");
2229 ate_print("ATETXANT, set TX antenna. 0:all, 1:antenna one, 2:antenna two.\n");
2230 ate_print("ATERXANT, set RX antenna.0:all, 1:antenna one, 2:antenna two, 3:antenna three.\n");
2231 ate_print("ATETXFREQOFFSET, set frequency offset, range 0~63\n");
2232 ate_print("ATETXBW, set BandWidth, 0:20MHz, 1:40MHz.\n");
2233 ate_print("ATETXLEN, set Frame length, range 24~%d\n", (MAX_FRAME_SIZE - 34/* == 2312 */));
2234 ate_print("ATETXCNT, set how many frame going to transmit.\n");
2235 ate_print("ATETXMCS, set MCS, reference to rate table.\n");
2236 ate_print("ATETXMODE, set Mode 0:CCK, 1:OFDM, 2:HT-Mix, 3:GreenField, reference to rate table.\n");
2237 ate_print("ATETXGI, set GI interval, 0:Long, 1:Short\n");
2238 ate_print("ATERXFER, 0:disable Rx Frame error rate. 1:enable Rx Frame error rate.\n");
2239 ate_print("ATERRF, show all RF registers.\n");
2240 ate_print("ATEWRF1, set RF1 register.\n");
2241 ate_print("ATEWRF2, set RF2 register.\n");
2242 ate_print("ATEWRF3, set RF3 register.\n");
2243 ate_print("ATEWRF4, set RF4 register.\n");
2244 ate_print("ATELDE2P, load EEPROM from .bin file.\n");
2245 ate_print("ATERE2P, display all EEPROM content.\n");
2246 ate_print("ATESHOW, display all parameters of ATE.\n");
2247 ate_print("ATEHELP, online help.\n");
2253 ==========================================================================
2256 AsicSwitchChannel() dedicated for ATE.
2258 ==========================================================================
2260 VOID ATEAsicSwitchChannel(
2261 IN PRTMP_ADAPTER pAd)
2263 UINT32 R2 = 0, R3 = DEFAULT_RF_TX_POWER, R4 = 0, Value = 0;
2264 CHAR TxPwer = 0, TxPwer2 = 0;
2265 UCHAR index, BbpValue = 0, R66 = 0x30;
2266 RTMP_RF_REGS *RFRegTable;
2269 #ifdef RALINK_28xx_QA
2270 if ((pAd->ate.bQATxStart == TRUE) || (pAd->ate.bQARxStart == TRUE))
2272 if (pAd->ate.Channel != pAd->LatchRfRegs.Channel)
2274 pAd->ate.Channel = pAd->LatchRfRegs.Channel;
2279 #endif // RALINK_28xx_QA //
2280 Channel = pAd->ate.Channel;
2283 AsicAntennaSelect(pAd, Channel);
2285 // fill Tx power value
2286 TxPwer = pAd->ate.TxPower0;
2287 TxPwer2 = pAd->ate.TxPower1;
2289 RFRegTable = RF2850RegTable;
2291 switch (pAd->RfIcType)
2293 /* But only 2850 and 2750 support 5.5GHz band... */
2299 for (index = 0; index < NUM_OF_2850_CHNL; index++)
2301 if (Channel == RFRegTable[index].Channel)
2303 R2 = RFRegTable[index].R2;
2304 if (pAd->Antenna.field.TxPath == 1)
2306 R2 |= 0x4000; // If TXpath is 1, bit 14 = 1;
2309 if (pAd->Antenna.field.RxPath == 2)
2311 switch (pAd->ate.RxAntennaSel)
2315 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
2318 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);
2322 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
2325 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);
2329 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
2331 /* Only enable two Antenna to receive. */
2333 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);
2337 else if (pAd->Antenna.field.RxPath == 1)
2339 R2 |= 0x20040; // write 1 to off RxPath
2342 if (pAd->Antenna.field.TxPath == 2)
2344 if (pAd->ate.TxAntennaSel == 1)
2346 R2 |= 0x4000; // If TX Antenna select is 1 , bit 14 = 1; Disable Ant 2
2347 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BbpValue);
2348 BbpValue &= 0xE7; //11100111B
2349 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BbpValue);
2351 else if (pAd->ate.TxAntennaSel == 2)
2353 R2 |= 0x8000; // If TX Antenna select is 2 , bit 15 = 1; Disable Ant 1
2354 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BbpValue);
2357 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BbpValue);
2361 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R1, &BbpValue);
2364 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R1, BbpValue);
2367 if (pAd->Antenna.field.RxPath == 3)
2369 switch (pAd->ate.RxAntennaSel)
2373 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
2376 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);
2380 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
2383 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);
2387 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
2390 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);
2393 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R3, &BbpValue);
2396 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R3, BbpValue);
2403 // initialize R3, R4
2404 R3 = (RFRegTable[index].R3 & 0xffffc1ff);
2405 R4 = (RFRegTable[index].R4 & (~0x001f87c0)) | (pAd->ate.RFFreqOffset << 15);
2407 // According the Rory's suggestion to solve the middle range issue.
2408 // 5.5G band power range: 0xF9~0X0F, TX0 Reg3 bit9/TX1 Reg4 bit6="0" means the TX power reduce 7dB
2410 if ((TxPwer >= -7) && (TxPwer < 0))
2412 TxPwer = (7+TxPwer);
2413 TxPwer = (TxPwer > 0xF) ? (0xF) : (TxPwer);
2414 R3 |= (TxPwer << 10);
2415 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATEAsicSwitchChannel: TxPwer=%d \n", TxPwer));
2419 TxPwer = (TxPwer > 0xF) ? (0xF) : (TxPwer);
2420 R3 |= (TxPwer << 10) | (1 << 9);
2424 if ((TxPwer2 >= -7) && (TxPwer2 < 0))
2426 TxPwer2 = (7+TxPwer2);
2427 TxPwer2 = (TxPwer2 > 0xF) ? (0xF) : (TxPwer2);
2428 R4 |= (TxPwer2 << 7);
2429 ATEDBGPRINT(RT_DEBUG_TRACE, ("ATEAsicSwitchChannel: TxPwer2=%d \n", TxPwer2));
2433 TxPwer2 = (TxPwer2 > 0xF) ? (0xF) : (TxPwer2);
2434 R4 |= (TxPwer2 << 7) | (1 << 6);
2439 R3 = (RFRegTable[index].R3 & 0xffffc1ff) | (TxPwer << 9); // set TX power0
2440 R4 = (RFRegTable[index].R4 & (~0x001f87c0)) | (pAd->ate.RFFreqOffset << 15) | (TxPwer2 <<6);// Set freq offset & TxPwr1
2443 // Based on BBP current mode before changing RF channel.
2444 if (pAd->ate.TxWI.BW == BW_40)
2450 pAd->LatchRfRegs.Channel = Channel;
2451 pAd->LatchRfRegs.R1 = RFRegTable[index].R1;
2452 pAd->LatchRfRegs.R2 = R2;
2453 pAd->LatchRfRegs.R3 = R3;
2454 pAd->LatchRfRegs.R4 = R4;
2467 // Change BBP setting during switch from a->g, g->a
2470 ULONG TxPinCfg = 0x00050F0A;// 2007.10.09 by Brian : 0x0005050A ==> 0x00050F0A
2472 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, (0x37 - GET_LNA_GAIN(pAd)));
2473 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, (0x37 - GET_LNA_GAIN(pAd)));
2474 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, (0x37 - GET_LNA_GAIN(pAd)));
2476 /* For 1T/2R chip only... */
2477 if (pAd->NicConfig2.field.ExternalLNAForG)
2479 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x62);
2483 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0x84);
2486 // According the Rory's suggestion to solve the middle range issue.
2487 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R86, &BbpValue);
2488 ASSERT((BbpValue == 0x00));
2489 if ((BbpValue != 0x00))
2491 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0x00);
2494 // 5.5GHz band selection PIN, bit1 and bit2 are complement
2495 RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
2498 RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
2500 // Turn off unused PA or LNA when only 1T or 1R.
2501 if (pAd->Antenna.field.TxPath == 1)
2503 TxPinCfg &= 0xFFFFFFF3;
2505 if (pAd->Antenna.field.RxPath == 1)
2507 TxPinCfg &= 0xFFFFF3FF;
2510 RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
2514 ULONG TxPinCfg = 0x00050F05;//2007.10.09 by Brian : 0x00050505 ==> 0x00050F05
2516 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R62, (0x37 - GET_LNA_GAIN(pAd)));
2517 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R63, (0x37 - GET_LNA_GAIN(pAd)));
2518 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R64, (0x37 - GET_LNA_GAIN(pAd)));
2519 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R82, 0xF2);
2521 // According the Rory's suggestion to solve the middle range issue.
2522 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R86, &BbpValue);
2523 ASSERT((BbpValue == 0x00));
2524 if ((BbpValue != 0x00))
2526 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R86, 0x00);
2528 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R91, &BbpValue);
2529 ASSERT((BbpValue == 0x04));
2531 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R92, &BbpValue);
2532 ASSERT((BbpValue == 0x00));
2534 // 5.5GHz band selection PIN, bit1 and bit2 are complement
2535 RTMP_IO_READ32(pAd, TX_BAND_CFG, &Value);
2538 RTMP_IO_WRITE32(pAd, TX_BAND_CFG, Value);
2540 // Turn off unused PA or LNA when only 1T or 1R.
2541 if (pAd->Antenna.field.TxPath == 1)
2543 TxPinCfg &= 0xFFFFFFF3;
2545 if (pAd->Antenna.field.RxPath == 1)
2547 TxPinCfg &= 0xFFFFF3FF;
2550 RTMP_IO_WRITE32(pAd, TX_PIN_CFG, TxPinCfg);
2553 // R66 should be set according to Channel and use 20MHz when scanning
2557 R66 = 0x2E + GET_LNA_GAIN(pAd);
2558 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
2563 if (pAd->ate.TxWI.BW == BW_20)
2565 R66 = (UCHAR)(0x32 + (GET_LNA_GAIN(pAd)*5)/3);
2566 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
2570 R66 = (UCHAR)(0x3A + (GET_LNA_GAIN(pAd)*5)/3);
2571 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, R66);
2576 // On 11A, We should delay and wait RF/BBP to be stable
2577 // and the appropriate time should be 1000 micro seconds
2578 // 2005/06/05 - On 11G, We also need this delay time. Otherwise it's difficult to pass the WHQL.
2580 RTMPusecDelay(1000);
2584 // When 5.5GHz band the LSB of TxPwr will be used to reduced 7dB or not.
2585 ATEDBGPRINT(RT_DEBUG_TRACE, ("SwitchChannel#%d(RF=%d, %dT) to , R1=0x%08lx, R2=0x%08lx, R3=0x%08lx, R4=0x%08lx\n",
2588 pAd->Antenna.field.TxPath,
2589 pAd->LatchRfRegs.R1,
2590 pAd->LatchRfRegs.R2,
2591 pAd->LatchRfRegs.R3,
2592 pAd->LatchRfRegs.R4));
2596 ATEDBGPRINT(RT_DEBUG_TRACE, ("SwitchChannel#%d(RF=%d, Pwr0=%u, Pwr1=%u, %dT) to , R1=0x%08lx, R2=0x%08lx, R3=0x%08lx, R4=0x%08lx\n",
2599 (R3 & 0x00003e00) >> 9,
2600 (R4 & 0x000007c0) >> 6,
2601 pAd->Antenna.field.TxPath,
2602 pAd->LatchRfRegs.R1,
2603 pAd->LatchRfRegs.R2,
2604 pAd->LatchRfRegs.R3,
2605 pAd->LatchRfRegs.R4));
2610 // In fact, no one will call this routine so far !
2613 ==========================================================================
2615 Gives CCK TX rate 2 more dB TX power.
2616 This routine works only in ATE mode.
2618 calculate desired Tx power in RF R3.Tx0~5, should consider -
2619 0. if current radio is a noisy environment (pAd->DrsCounters.fNoisyEnvironment)
2620 1. TxPowerPercentage
2621 2. auto calibration based on TSSI feedback
2622 3. extra 2 db for CCK
2623 4. -10 db upon very-short distance (AvgRSSI >= -40db) to AP
2625 NOTE: Since this routine requires the value of (pAd->DrsCounters.fNoisyEnvironment),
2626 it should be called AFTER MlmeDynamicTxRateSwitching()
2627 ==========================================================================
2629 VOID ATEAsicAdjustTxPower(
2630 IN PRTMP_ADAPTER pAd)
2634 BOOLEAN bAutoTxAgc = FALSE;
2635 UCHAR TssiRef, *pTssiMinusBoundary, *pTssiPlusBoundary, TxAgcStep;
2636 UCHAR BbpR49 = 0, idx;
2637 PCHAR pTxAgcCompensate;
2641 /* no one calls this procedure so far */
2642 if (pAd->ate.TxWI.BW == BW_40)
2644 if (pAd->ate.Channel > 14)
2646 TxPwr[0] = pAd->Tx40MPwrCfgABand[0];
2647 TxPwr[1] = pAd->Tx40MPwrCfgABand[1];
2648 TxPwr[2] = pAd->Tx40MPwrCfgABand[2];
2649 TxPwr[3] = pAd->Tx40MPwrCfgABand[3];
2650 TxPwr[4] = pAd->Tx40MPwrCfgABand[4];
2654 TxPwr[0] = pAd->Tx40MPwrCfgGBand[0];
2655 TxPwr[1] = pAd->Tx40MPwrCfgGBand[1];
2656 TxPwr[2] = pAd->Tx40MPwrCfgGBand[2];
2657 TxPwr[3] = pAd->Tx40MPwrCfgGBand[3];
2658 TxPwr[4] = pAd->Tx40MPwrCfgGBand[4];
2663 if (pAd->ate.Channel > 14)
2665 TxPwr[0] = pAd->Tx20MPwrCfgABand[0];
2666 TxPwr[1] = pAd->Tx20MPwrCfgABand[1];
2667 TxPwr[2] = pAd->Tx20MPwrCfgABand[2];
2668 TxPwr[3] = pAd->Tx20MPwrCfgABand[3];
2669 TxPwr[4] = pAd->Tx20MPwrCfgABand[4];
2673 TxPwr[0] = pAd->Tx20MPwrCfgGBand[0];
2674 TxPwr[1] = pAd->Tx20MPwrCfgGBand[1];
2675 TxPwr[2] = pAd->Tx20MPwrCfgGBand[2];
2676 TxPwr[3] = pAd->Tx20MPwrCfgGBand[3];
2677 TxPwr[4] = pAd->Tx20MPwrCfgGBand[4];
2681 // TX power compensation for temperature variation based on TSSI.
2682 // Do it per 4 seconds.
2683 if (pAd->Mlme.OneSecPeriodicRound % 4 == 0)
2685 if (pAd->ate.Channel <= 14)
2688 bAutoTxAgc = pAd->bAutoTxAgcG;
2689 TssiRef = pAd->TssiRefG;
2690 pTssiMinusBoundary = &pAd->TssiMinusBoundaryG[0];
2691 pTssiPlusBoundary = &pAd->TssiPlusBoundaryG[0];
2692 TxAgcStep = pAd->TxAgcStepG;
2693 pTxAgcCompensate = &pAd->TxAgcCompensateG;
2698 bAutoTxAgc = pAd->bAutoTxAgcA;
2699 TssiRef = pAd->TssiRefA;
2700 pTssiMinusBoundary = &pAd->TssiMinusBoundaryA[0];
2701 pTssiPlusBoundary = &pAd->TssiPlusBoundaryA[0];
2702 TxAgcStep = pAd->TxAgcStepA;
2703 pTxAgcCompensate = &pAd->TxAgcCompensateA;
2708 /* BbpR49 is unsigned char */
2709 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R49, &BbpR49);
2711 /* (p) TssiPlusBoundaryG[0] = 0 = (m) TssiMinusBoundaryG[0] */
2712 /* compensate: +4 +3 +2 +1 0 -1 -2 -3 -4 * steps */
2713 /* step value is defined in pAd->TxAgcStepG for tx power value */
2715 /* [4]+1+[4] p4 p3 p2 p1 o1 m1 m2 m3 m4 */
2716 /* ex: 0x00 0x15 0x25 0x45 0x88 0xA0 0xB5 0xD0 0xF0
2717 above value are examined in mass factory production */
2718 /* [4] [3] [2] [1] [0] [1] [2] [3] [4] */
2720 /* plus is 0x10 ~ 0x40, minus is 0x60 ~ 0x90 */
2721 /* if value is between p1 ~ o1 or o1 ~ s1, no need to adjust tx power */
2722 /* if value is 0x65, tx power will be -= TxAgcStep*(2-1) */
2724 if (BbpR49 > pTssiMinusBoundary[1])
2726 // Reading is larger than the reference value.
2727 // Check for how large we need to decrease the Tx power.
2728 for (idx = 1; idx < 5; idx++)
2730 if (BbpR49 <= pTssiMinusBoundary[idx]) // Found the range
2733 // The index is the step we should decrease, idx = 0 means there is nothing to compensate
2734 // if (R3 > (ULONG) (TxAgcStep * (idx-1)))
2735 *pTxAgcCompensate = -(TxAgcStep * (idx-1));
2737 // *pTxAgcCompensate = -((UCHAR)R3);
2739 DeltaPwr += (*pTxAgcCompensate);
2740 ATEDBGPRINT(RT_DEBUG_TRACE, ("-- Tx Power, BBP R1=%x, TssiRef=%x, TxAgcStep=%x, step = -%d\n",
2741 BbpR49, TssiRef, TxAgcStep, idx-1));
2743 else if (BbpR49 < pTssiPlusBoundary[1])
2745 // Reading is smaller than the reference value
2746 // check for how large we need to increase the Tx power
2747 for (idx = 1; idx < 5; idx++)
2749 if (BbpR49 >= pTssiPlusBoundary[idx]) // Found the range
2752 // The index is the step we should increase, idx = 0 means there is nothing to compensate
2753 *pTxAgcCompensate = TxAgcStep * (idx-1);
2754 DeltaPwr += (*pTxAgcCompensate);
2755 ATEDBGPRINT(RT_DEBUG_TRACE, ("++ Tx Power, BBP R1=%x, TssiRef=%x, TxAgcStep=%x, step = +%d\n",
2756 BbpR49, TssiRef, TxAgcStep, idx-1));
2760 *pTxAgcCompensate = 0;
2761 ATEDBGPRINT(RT_DEBUG_TRACE, (" Tx Power, BBP R1=%x, TssiRef=%x, TxAgcStep=%x, step = +%d\n",
2762 BbpR49, TssiRef, TxAgcStep, 0));
2768 if (pAd->ate.Channel <= 14)
2770 bAutoTxAgc = pAd->bAutoTxAgcG;
2771 pTxAgcCompensate = &pAd->TxAgcCompensateG;
2775 bAutoTxAgc = pAd->bAutoTxAgcA;
2776 pTxAgcCompensate = &pAd->TxAgcCompensateA;
2780 DeltaPwr += (*pTxAgcCompensate);
2783 /* calculate delta power based on the percentage specified from UI */
2784 // E2PROM setting is calibrated for maximum TX power (i.e. 100%)
2785 // We lower TX power here according to the percentage specified from UI
2786 if (pAd->CommonCfg.TxPowerPercentage == 0xffffffff) // AUTO TX POWER control
2788 else if (pAd->CommonCfg.TxPowerPercentage > 90) // 91 ~ 100% & AUTO, treat as 100% in terms of mW
2790 else if (pAd->CommonCfg.TxPowerPercentage > 60) // 61 ~ 90%, treat as 75% in terms of mW
2794 else if (pAd->CommonCfg.TxPowerPercentage > 30) // 31 ~ 60%, treat as 50% in terms of mW
2798 else if (pAd->CommonCfg.TxPowerPercentage > 15) // 16 ~ 30%, treat as 25% in terms of mW
2802 else if (pAd->CommonCfg.TxPowerPercentage > 9) // 10 ~ 15%, treat as 12.5% in terms of mW
2806 else // 0 ~ 9 %, treat as MIN(~3%) in terms of mW
2811 /* reset different new tx power for different TX rate */
2814 if (TxPwr[i] != 0xffffffff)
2818 Value = (CHAR)((TxPwr[i] >> j*4) & 0x0F); /* 0 ~ 15 */
2820 if ((Value + DeltaPwr) < 0)
2822 Value = 0; /* min */
2824 else if ((Value + DeltaPwr) > 0xF)
2826 Value = 0xF; /* max */
2830 Value += DeltaPwr; /* temperature compensation */
2833 /* fill new value to CSR offset */
2834 TxPwr[i] = (TxPwr[i] & ~(0x0000000F << j*4)) | (Value << j*4);
2837 /* write tx power value to CSR */
2838 /* TX_PWR_CFG_0 (8 tx rate) for TX power for OFDM 12M/18M
2839 TX power for OFDM 6M/9M
2840 TX power for CCK5.5M/11M
2841 TX power for CCK1M/2M */
2842 /* TX_PWR_CFG_1 ~ TX_PWR_CFG_4 */
2843 RTMP_IO_WRITE32(pAd, TX_PWR_CFG_0 + i*4, TxPwr[i]);
2852 ========================================================================
2853 Routine Description:
2854 Write TxWI for ATE mode.
2858 ========================================================================
2860 static VOID ATEWriteTxWI(
2861 IN PRTMP_ADAPTER pAd,
2862 IN PTXWI_STRUC pOutTxWI,
2865 IN BOOLEAN InsTimestamp,
2868 IN BOOLEAN NSeq, // HW new a sequence.
2877 IN HTTRANSMIT_SETTING *pTransmit)
2883 // Always use Long preamble before verifiation short preamble functionality works well.
2884 // Todo: remove the following line if short preamble functionality works
2886 OPSTATUS_CLEAR_FLAG(pAd, fOP_STATUS_SHORT_PREAMBLE_INUSED);
2887 NdisZeroMemory(&TxWI, TXWI_SIZE);
2892 pTxWI->CFACK = CFACK;
2893 pTxWI->TS= InsTimestamp;
2894 pTxWI->AMPDU = AMPDU;
2896 pTxWI->txop= Txopmode;
2899 // John tune the performace with Intel Client in 20 MHz performance
2903 pTxWI->BAWinSize = BASize;
2904 pTxWI->WirelessCliID = WCID;
2905 pTxWI->MPDUtotalByteCount = Length;
2906 pTxWI->PacketId = PID;
2908 // If CCK or OFDM, BW must be 20
2909 pTxWI->BW = (pTransmit->field.MODE <= MODE_OFDM) ? (BW_20) : (pTransmit->field.BW);
2910 pTxWI->ShortGI = pTransmit->field.ShortGI;
2911 pTxWI->STBC = pTransmit->field.STBC;
2913 pTxWI->MCS = pTransmit->field.MCS;
2914 pTxWI->PHYMODE = pTransmit->field.MODE;
2915 pTxWI->CFACK = CfAck;
2917 pTxWI->MpduDensity = 0;
2919 pTxWI->PacketId = pTxWI->MCS;
2920 NdisMoveMemory(pOutTxWI, &TxWI, sizeof(TXWI_STRUC));
2926 ========================================================================
2928 Routine Description:
2929 Disable protection for ATE.
2930 ========================================================================
2932 VOID ATEDisableAsicProtect(
2933 IN PRTMP_ADAPTER pAd)
2935 PROT_CFG_STRUC ProtCfg, ProtCfg4;
2941 // Config ASIC RTS threshold register
2942 RTMP_IO_READ32(pAd, TX_RTS_CFG, &MacReg);
2943 MacReg &= 0xFF0000FF;
2944 MacReg |= (pAd->CommonCfg.RtsThreshold << 8);
2945 RTMP_IO_WRITE32(pAd, TX_RTS_CFG, MacReg);
2947 // Initial common protection settings
2948 RTMPZeroMemory(Protect, sizeof(Protect));
2951 ProtCfg.field.TxopAllowGF40 = 1;
2952 ProtCfg.field.TxopAllowGF20 = 1;
2953 ProtCfg.field.TxopAllowMM40 = 1;
2954 ProtCfg.field.TxopAllowMM20 = 1;
2955 ProtCfg.field.TxopAllowOfdm = 1;
2956 ProtCfg.field.TxopAllowCck = 1;
2957 ProtCfg.field.RTSThEn = 1;
2958 ProtCfg.field.ProtectNav = ASIC_SHORTNAV;
2960 // Handle legacy(B/G) protection
2961 ProtCfg.field.ProtectRate = pAd->CommonCfg.RtsRate;
2962 ProtCfg.field.ProtectCtrl = 0;
2963 Protect[0] = ProtCfg.word;
2964 Protect[1] = ProtCfg.word;
2967 // 1.All STAs in the BSS are 20/40 MHz HT
2968 // 2. in ai 20/40MHz BSS
2969 // 3. all STAs are 20MHz in a 20MHz BSS
2970 // Pure HT. no protection.
2974 // PROT_TXOP(25:20) -- 010111
2975 // PROT_NAV(19:18) -- 01 (Short NAV protection)
2976 // PROT_CTRL(17:16) -- 00 (None)
2977 // PROT_RATE(15:0) -- 0x4004 (OFDM 24M)
2978 Protect[2] = 0x01744004;
2982 // PROT_TXOP(25:20) -- 111111
2983 // PROT_NAV(19:18) -- 01 (Short NAV protection)
2984 // PROT_CTRL(17:16) -- 00 (None)
2985 // PROT_RATE(15:0) -- 0x4084 (duplicate OFDM 24M)
2986 Protect[3] = 0x03f44084;
2990 // PROT_TXOP(25:20) -- 010111
2991 // PROT_NAV(19:18) -- 01 (Short NAV protection)
2992 // PROT_CTRL(17:16) -- 00 (None)
2993 // PROT_RATE(15:0) -- 0x4004 (OFDM 24M)
2994 Protect[4] = 0x01744004;
2998 // PROT_TXOP(25:20) -- 111111
2999 // PROT_NAV(19:18) -- 01 (Short NAV protection)
3000 // PROT_CTRL(17:16) -- 00 (None)
3001 // PROT_RATE(15:0) -- 0x4084 (duplicate OFDM 24M)
3002 Protect[5] = 0x03f44084;
3004 pAd->CommonCfg.IOTestParm.bRTSLongProtOn = FALSE;
3006 offset = CCK_PROT_CFG;
3007 for (i = 0;i < 6;i++)
3008 RTMP_IO_WRITE32(pAd, offset + i*4, Protect[i]);
3013 /* There are two ways to convert Rssi */
3016 // The way used with GET_LNA_GAIN().
3018 CHAR ATEConvertToRssi(
3019 IN PRTMP_ADAPTER pAd,
3021 IN UCHAR RssiNumber)
3023 UCHAR RssiOffset, LNAGain;
3025 // Rssi equals to zero should be an invalid value
3029 LNAGain = GET_LNA_GAIN(pAd);
3030 if (pAd->LatchRfRegs.Channel > 14)
3032 if (RssiNumber == 0)
3033 RssiOffset = pAd->ARssiOffset0;
3034 else if (RssiNumber == 1)
3035 RssiOffset = pAd->ARssiOffset1;
3037 RssiOffset = pAd->ARssiOffset2;
3041 if (RssiNumber == 0)
3042 RssiOffset = pAd->BGRssiOffset0;
3043 else if (RssiNumber == 1)
3044 RssiOffset = pAd->BGRssiOffset1;
3046 RssiOffset = pAd->BGRssiOffset2;
3049 return (-12 - RssiOffset - LNAGain - Rssi);
3053 // The way originally used in ATE of rt2860ap.
3055 CHAR ATEConvertToRssi(
3056 IN PRTMP_ADAPTER pAd,
3058 IN UCHAR RssiNumber)
3060 UCHAR RssiOffset, LNAGain;
3062 // Rssi equals to zero should be an invalid value
3066 if (pAd->LatchRfRegs.Channel > 14)
3068 LNAGain = pAd->ALNAGain;
3069 if (RssiNumber == 0)
3070 RssiOffset = pAd->ARssiOffset0;
3071 else if (RssiNumber == 1)
3072 RssiOffset = pAd->ARssiOffset1;
3074 RssiOffset = pAd->ARssiOffset2;
3078 LNAGain = pAd->BLNAGain;
3079 if (RssiNumber == 0)
3080 RssiOffset = pAd->BGRssiOffset0;
3081 else if (RssiNumber == 1)
3082 RssiOffset = pAd->BGRssiOffset1;
3084 RssiOffset = pAd->BGRssiOffset2;
3087 return (-32 - RssiOffset + LNAGain - Rssi);
3089 #endif /* end of #if 1 */
3092 ========================================================================
3094 Routine Description:
3095 Set Japan filter coefficients if needed.
3097 This routine should only be called when
3098 entering TXFRAME mode or TXCONT mode.
3100 ========================================================================
3102 static VOID SetJapanFilter(
3103 IN PRTMP_ADAPTER pAd)
3108 // If Channel=14 and Bandwidth=20M and Mode=CCK, set BBP R4 bit5=1
3109 // (Japan Tx filter coefficients)when (TXFRAME or TXCONT).
3111 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BbpData);
3113 if ((pAd->ate.TxWI.PHYMODE == MODE_CCK) && (pAd->ate.Channel == 14) && (pAd->ate.TxWI.BW == BW_20))
3115 BbpData |= 0x20; // turn on
3116 ATEDBGPRINT(RT_DEBUG_TRACE, ("SetJapanFilter!!!\n"));
3120 BbpData &= 0xdf; // turn off
3121 ATEDBGPRINT(RT_DEBUG_TRACE, ("ClearJapanFilter!!!\n"));
3124 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BbpData);
3128 IN PRTMP_ADAPTER pAd,
3129 IN PRXWI_STRUC pRxWI)
3131 /* There are two ways to collect RSSI. */
3133 //pAd->LastRxRate = (USHORT)((pRxWI->MCS) + (pRxWI->BW <<7) + (pRxWI->ShortGI <<8)+ (pRxWI->PHYMODE <<14)) ;
3134 if (pRxWI->RSSI0 != 0)
3136 pAd->ate.LastRssi0 = ATEConvertToRssi(pAd, (CHAR) pRxWI->RSSI0, RSSI_0);
3137 pAd->ate.AvgRssi0X8 = (pAd->ate.AvgRssi0X8 - pAd->ate.AvgRssi0) + pAd->ate.LastRssi0;
3138 pAd->ate.AvgRssi0 = pAd->ate.AvgRssi0X8 >> 3;
3140 if (pRxWI->RSSI1 != 0)
3142 pAd->ate.LastRssi1 = ATEConvertToRssi(pAd, (CHAR) pRxWI->RSSI1, RSSI_1);
3143 pAd->ate.AvgRssi1X8 = (pAd->ate.AvgRssi1X8 - pAd->ate.AvgRssi1) + pAd->ate.LastRssi1;
3144 pAd->ate.AvgRssi1 = pAd->ate.AvgRssi1X8 >> 3;
3146 if (pRxWI->RSSI2 != 0)
3148 pAd->ate.LastRssi2 = ATEConvertToRssi(pAd, (CHAR) pRxWI->RSSI2, RSSI_2);
3149 pAd->ate.AvgRssi2X8 = (pAd->ate.AvgRssi2X8 - pAd->ate.AvgRssi2) + pAd->ate.LastRssi2;
3150 pAd->ate.AvgRssi2 = pAd->ate.AvgRssi2X8 >> 3;
3153 pAd->ate.LastSNR0 = (CHAR)(pRxWI->SNR0);// CHAR ==> UCHAR ?
3154 pAd->ate.LastSNR1 = (CHAR)(pRxWI->SNR1);// CHAR ==> UCHAR ?
3156 pAd->ate.NumOfAvgRssiSample ++;
3158 pAd->ate.LastSNR0 = (CHAR)(pRxWI->SNR0);
3159 pAd->ate.LastSNR1 = (CHAR)(pRxWI->SNR1);
3160 pAd->ate.RxCntPerSec++;
3161 pAd->ate.LastRssi0 = ATEConvertToRssi(pAd, (CHAR) pRxWI->RSSI0, RSSI_0);
3162 pAd->ate.LastRssi1 = ATEConvertToRssi(pAd, (CHAR) pRxWI->RSSI1, RSSI_1);
3163 pAd->ate.LastRssi2 = ATEConvertToRssi(pAd, (CHAR) pRxWI->RSSI2, RSSI_2);
3164 pAd->ate.AvgRssi0X8 = (pAd->ate.AvgRssi0X8 - pAd->ate.AvgRssi0) + pAd->ate.LastRssi0;
3165 pAd->ate.AvgRssi0 = pAd->ate.AvgRssi0X8 >> 3;
3166 pAd->ate.AvgRssi1X8 = (pAd->ate.AvgRssi1X8 - pAd->ate.AvgRssi1) + pAd->ate.LastRssi1;
3167 pAd->ate.AvgRssi1 = pAd->ate.AvgRssi1X8 >> 3;
3168 pAd->ate.AvgRssi2X8 = (pAd->ate.AvgRssi2X8 - pAd->ate.AvgRssi2) + pAd->ate.LastRssi2;
3169 pAd->ate.AvgRssi2 = pAd->ate.AvgRssi2X8 >> 3;
3170 pAd->ate.NumOfAvgRssiSample ++;
3174 #ifdef CONFIG_STA_SUPPORT
3175 VOID RTMPStationStop(
3176 IN PRTMP_ADAPTER pAd)
3178 // BOOLEAN Cancelled;
3180 ATEDBGPRINT(RT_DEBUG_TRACE, ("==> RTMPStationStop\n"));
3183 RTMPCancelTimer(&pAd->MlmeAux.AssocTimer, &Cancelled);
3184 RTMPCancelTimer(&pAd->MlmeAux.ReassocTimer, &Cancelled);
3185 RTMPCancelTimer(&pAd->MlmeAux.DisassocTimer, &Cancelled);
3186 RTMPCancelTimer(&pAd->MlmeAux.AuthTimer, &Cancelled);
3187 RTMPCancelTimer(&pAd->MlmeAux.BeaconTimer, &Cancelled);
3188 RTMPCancelTimer(&pAd->MlmeAux.ScanTimer, &Cancelled);
3190 // For rx statistics, we need to keep this timer running.
3191 // RTMPCancelTimer(&pAd->Mlme.PeriodicTimer, &Cancelled);
3193 ATEDBGPRINT(RT_DEBUG_TRACE, ("<== RTMPStationStop\n"));
3196 VOID RTMPStationStart(
3197 IN PRTMP_ADAPTER pAd)
3199 ATEDBGPRINT(RT_DEBUG_TRACE, ("==> RTMPStationStart\n"));
3200 epAd->Mlme.CntlMachine.CurrState = CNTL_IDLE;
3202 // We did not cancel this timer when entering ATE mode.
3204 // RTMPSetTimer(&pAd->Mlme.PeriodicTimer, MLME_TASK_EXEC_INTV);
3205 ATEDBGPRINT(RT_DEBUG_TRACE, ("<== RTMPStationStart\n"));
3207 #endif // CONFIG_STA_SUPPORT //
3210 ==========================================================================
3214 This routine should only be used in ATE mode.
3215 ==========================================================================
3217 static INT ATESetUpFrame(
3218 IN PRTMP_ADAPTER pAd,
3223 #ifdef RT_BIG_ENDIAN
3224 PTXD_STRUC pDestTxD;
3227 PNDIS_PACKET pPacket;
3230 NDIS_PHYSICAL_ADDRESS AllocPa;
3231 HTTRANSMIT_SETTING TxHTPhyMode;
3233 PRTMP_TX_RING pTxRing = &pAd->TxRing[QID_AC_BE];
3234 PTXWI_STRUC pTxWI = (PTXWI_STRUC) pTxRing->Cell[TxIdx].DmaBuf.AllocVa;
3235 PUCHAR pDMAHeaderBufVA = (PUCHAR) pTxRing->Cell[TxIdx].DmaBuf.AllocVa;
3237 #ifdef RALINK_28xx_QA
3238 PHEADER_802_11 pHeader80211;
3239 #endif // RALINK_28xx_QA //
3241 if (pAd->ate.bQATxStart == TRUE)
3243 // always use QID_AC_BE and FIFO_EDCA
3246 TxHTPhyMode.field.BW = pAd->ate.TxWI.BW;
3247 TxHTPhyMode.field.ShortGI = pAd->ate.TxWI.ShortGI;
3248 TxHTPhyMode.field.STBC = 0;
3249 TxHTPhyMode.field.MCS = pAd->ate.TxWI.MCS;
3250 TxHTPhyMode.field.MODE = pAd->ate.TxWI.PHYMODE;
3251 ATEWriteTxWI(pAd, pTxWI, pAd->ate.TxWI.FRAG, pAd->ate.TxWI.CFACK, pAd->ate.TxWI.TS, pAd->ate.TxWI.AMPDU, pAd->ate.TxWI.ACK, pAd->ate.TxWI.NSEQ,
3252 pAd->ate.TxWI.BAWinSize, 0, pAd->ate.TxWI.MPDUtotalByteCount, pAd->ate.TxWI.PacketId, 0, 0, pAd->ate.TxWI.txop/*IFS_HTTXOP*/, pAd->ate.TxWI.CFACK/*FALSE*/, &TxHTPhyMode);
3256 TxHTPhyMode.field.BW = pAd->ate.TxWI.BW;
3257 TxHTPhyMode.field.ShortGI = pAd->ate.TxWI.ShortGI;
3258 TxHTPhyMode.field.STBC = 0;
3259 TxHTPhyMode.field.MCS = pAd->ate.TxWI.MCS;
3260 TxHTPhyMode.field.MODE = pAd->ate.TxWI.PHYMODE;
3261 ATEWriteTxWI(pAd, pTxWI, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE,
3262 4, 0, pAd->ate.TxLength, 0, 0, 0, IFS_HTTXOP, FALSE, &TxHTPhyMode);
3265 // fill 802.11 header.
3266 #ifdef RALINK_28xx_QA
3267 if (pAd->ate.bQATxStart == TRUE)
3269 NdisMoveMemory(pDMAHeaderBufVA+TXWI_SIZE, pAd->ate.Header, pAd->ate.HLen);
3272 #endif // RALINK_28xx_QA //
3274 NdisMoveMemory(pDMAHeaderBufVA+TXWI_SIZE, TemplateFrame, LENGTH_802_11);
3275 NdisMoveMemory(pDMAHeaderBufVA+TXWI_SIZE+4, pAd->ate.Addr1, ETH_LENGTH_OF_ADDRESS);
3276 NdisMoveMemory(pDMAHeaderBufVA+TXWI_SIZE+10, pAd->ate.Addr2, ETH_LENGTH_OF_ADDRESS);
3277 NdisMoveMemory(pDMAHeaderBufVA+TXWI_SIZE+16, pAd->ate.Addr3, ETH_LENGTH_OF_ADDRESS);
3280 #ifdef RT_BIG_ENDIAN
3281 RTMPFrameEndianChange(pAd, (((PUCHAR)pDMAHeaderBufVA)+TXWI_SIZE), DIR_READ, FALSE);
3282 #endif // RT_BIG_ENDIAN //
3284 /* alloc buffer for payload */
3285 #ifdef RALINK_28xx_QA
3286 if (pAd->ate.bQATxStart == TRUE)
3288 /* Why not use RTMP_AllocateTxPacketBuffer() instead of RTMP_AllocateRxPacketBuffer()? */
3289 pPacket = RTMP_AllocateRxPacketBuffer(pAd, pAd->ate.DLen + 0x100, FALSE, &AllocVa, &AllocPa);
3292 #endif // RALINK_28xx_QA //
3294 /* Why not use RTMP_AllocateTxPacketBuffer() instead of RTMP_AllocateRxPacketBuffer()? */
3295 pPacket = RTMP_AllocateRxPacketBuffer(pAd, pAd->ate.TxLength, FALSE, &AllocVa, &AllocPa);
3298 if (pPacket == NULL)
3300 pAd->ate.TxCount = 0;
3301 ATEDBGPRINT(RT_DEBUG_TRACE, ("%s fail to alloc packet space.\n", __func__));
3304 pTxRing->Cell[TxIdx].pNextNdisPacket = pPacket;
3306 pDest = (PUCHAR) AllocVa;
3308 #ifdef RALINK_28xx_QA
3309 if (pAd->ate.bQATxStart == TRUE)
3311 RTPKT_TO_OSPKT(pPacket)->len = pAd->ate.DLen;
3314 #endif // RALINK_28xx_QA //
3316 RTPKT_TO_OSPKT(pPacket)->len = pAd->ate.TxLength - LENGTH_802_11;
3319 // Prepare frame payload
3320 #ifdef RALINK_28xx_QA
3321 if (pAd->ate.bQATxStart == TRUE)
3324 if ((pAd->ate.PLen != 0))
3328 for (j = 0; j < pAd->ate.DLen; j+=pAd->ate.PLen)
3330 memcpy(RTPKT_TO_OSPKT(pPacket)->data + j, pAd->ate.Pattern, pAd->ate.PLen);
3335 #endif // RALINK_28xx_QA //
3337 for(j = 0; j < RTPKT_TO_OSPKT(pPacket)->len; j++)
3342 // build Tx Descriptor
3344 #ifndef RT_BIG_ENDIAN
3345 pTxD = (PTXD_STRUC) pTxRing->Cell[TxIdx].AllocVa;
3347 pDestTxD = (PTXD_STRUC)pTxRing->Cell[TxIdx].AllocVa;
3350 #endif // !RT_BIG_ENDIAN //
3352 #ifdef RALINK_28xx_QA
3353 if (pAd->ate.bQATxStart == TRUE)
3356 NdisZeroMemory(pTxD, TXD_SIZE);
3357 RTMPWriteTxDescriptor(pAd, pTxD, FALSE, FIFO_EDCA);
3359 pTxD->SDPtr0 = RTMP_GetPhysicalAddressLow(pTxRing->Cell[TxIdx].DmaBuf.AllocPa);
3360 pTxD->SDLen0 = TXWI_SIZE + pAd->ate.HLen;
3362 pTxD->SDPtr1 = AllocPa;
3363 pTxD->SDLen1 = RTPKT_TO_OSPKT(pPacket)->len;
3366 pDest = (PUCHAR)pTxWI;
3368 pHeader80211 = (PHEADER_802_11)pDest;
3370 // modify sequence number....
3371 if (pAd->ate.TxDoneCount == 0)
3373 pAd->ate.seq = pHeader80211->Sequence;
3376 pHeader80211->Sequence = ++pAd->ate.seq;
3379 #endif // RALINK_28xx_QA //
3381 NdisZeroMemory(pTxD, TXD_SIZE);
3382 RTMPWriteTxDescriptor(pAd, pTxD, FALSE, FIFO_EDCA);
3384 pTxD->SDPtr0 = RTMP_GetPhysicalAddressLow (pTxRing->Cell[TxIdx].DmaBuf.AllocPa);
3385 pTxD->SDLen0 = TXWI_SIZE + LENGTH_802_11;
3387 pTxD->SDPtr1 = AllocPa;
3388 pTxD->SDLen1 = RTPKT_TO_OSPKT(pPacket)->len;
3392 #ifdef RT_BIG_ENDIAN
3393 RTMPWIEndianChange((PUCHAR)pTxWI, TYPE_TXWI);
3394 RTMPFrameEndianChange(pAd, (((PUCHAR)pDMAHeaderBufVA)+TXWI_SIZE), DIR_WRITE, FALSE);
3395 RTMPDescriptorEndianChange((PUCHAR)pTxD, TYPE_TXD);
3396 WriteBackToDescriptor((PUCHAR)pDestTxD, (PUCHAR)pTxD, FALSE, TYPE_TXD);
3397 #endif // RT_BIG_ENDIAN //
3402 /*=======================End of RT2860=======================*/
3405 VOID rt_ee_read_all(PRTMP_ADAPTER pAd, USHORT *Data)
3410 for (i = 0 ; i < EEPROM_SIZE/2 ; )
3412 /* "value" is expecially for some compilers... */
3413 RT28xx_EEPROM_READ16(pAd, i*2, value);
3419 VOID rt_ee_write_all(PRTMP_ADAPTER pAd, USHORT *Data)
3424 for (i = 0 ; i < EEPROM_SIZE/2 ; )
3426 /* "value" is expecially for some compilers... */
3428 RT28xx_EEPROM_WRITE16(pAd, i*2, value);
3432 #ifdef RALINK_28xx_QA
3433 VOID ATE_QA_Statistics(
3434 IN PRTMP_ADAPTER pAd,
3435 IN PRXWI_STRUC pRxWI,
3436 IN PRT28XX_RXD_STRUC pRxD,
3437 IN PHEADER_802_11 pHeader)
3439 // update counter first
3440 if (pHeader != NULL)
3442 if (pHeader->FC.Type == BTYPE_DATA)
3447 pAd->ate.OtherData++;
3449 else if (pHeader->FC.Type == BTYPE_MGMT)
3451 if (pHeader->FC.SubType == SUBTYPE_BEACON)
3454 pAd->ate.OtherCount++;
3456 else if (pHeader->FC.Type == BTYPE_CNTL)
3458 pAd->ate.OtherCount++;
3461 pAd->ate.RSSI0 = pRxWI->RSSI0;
3462 pAd->ate.RSSI1 = pRxWI->RSSI1;
3463 pAd->ate.RSSI2 = pRxWI->RSSI2;
3464 pAd->ate.SNR0 = pRxWI->SNR0;
3465 pAd->ate.SNR1 = pRxWI->SNR1;
3468 /* command id with Cmd Type == 0x0008(for 28xx)/0x0005(for iNIC) */
3469 #define RACFG_CMD_RF_WRITE_ALL 0x0000
3470 #define RACFG_CMD_E2PROM_READ16 0x0001
3471 #define RACFG_CMD_E2PROM_WRITE16 0x0002
3472 #define RACFG_CMD_E2PROM_READ_ALL 0x0003
3473 #define RACFG_CMD_E2PROM_WRITE_ALL 0x0004
3474 #define RACFG_CMD_IO_READ 0x0005
3475 #define RACFG_CMD_IO_WRITE 0x0006
3476 #define RACFG_CMD_IO_READ_BULK 0x0007
3477 #define RACFG_CMD_BBP_READ8 0x0008
3478 #define RACFG_CMD_BBP_WRITE8 0x0009
3479 #define RACFG_CMD_BBP_READ_ALL 0x000a
3480 #define RACFG_CMD_GET_COUNTER 0x000b
3481 #define RACFG_CMD_CLEAR_COUNTER 0x000c
3483 #define RACFG_CMD_RSV1 0x000d
3484 #define RACFG_CMD_RSV2 0x000e
3485 #define RACFG_CMD_RSV3 0x000f
3487 #define RACFG_CMD_TX_START 0x0010
3488 #define RACFG_CMD_GET_TX_STATUS 0x0011
3489 #define RACFG_CMD_TX_STOP 0x0012
3490 #define RACFG_CMD_RX_START 0x0013
3491 #define RACFG_CMD_RX_STOP 0x0014
3492 #define RACFG_CMD_GET_NOISE_LEVEL 0x0015
3494 #define RACFG_CMD_ATE_START 0x0080
3495 #define RACFG_CMD_ATE_STOP 0x0081
3497 #define RACFG_CMD_ATE_START_TX_CARRIER 0x0100
3498 #define RACFG_CMD_ATE_START_TX_CONT 0x0101
3499 #define RACFG_CMD_ATE_START_TX_FRAME 0x0102
3500 #define RACFG_CMD_ATE_SET_BW 0x0103
3501 #define RACFG_CMD_ATE_SET_TX_POWER0 0x0104
3502 #define RACFG_CMD_ATE_SET_TX_POWER1 0x0105
3503 #define RACFG_CMD_ATE_SET_FREQ_OFFSET 0x0106
3504 #define RACFG_CMD_ATE_GET_STATISTICS 0x0107
3505 #define RACFG_CMD_ATE_RESET_COUNTER 0x0108
3506 #define RACFG_CMD_ATE_SEL_TX_ANTENNA 0x0109
3507 #define RACFG_CMD_ATE_SEL_RX_ANTENNA 0x010a
3508 #define RACFG_CMD_ATE_SET_PREAMBLE 0x010b
3509 #define RACFG_CMD_ATE_SET_CHANNEL 0x010c
3510 #define RACFG_CMD_ATE_SET_ADDR1 0x010d
3511 #define RACFG_CMD_ATE_SET_ADDR2 0x010e
3512 #define RACFG_CMD_ATE_SET_ADDR3 0x010f
3513 #define RACFG_CMD_ATE_SET_RATE 0x0110
3514 #define RACFG_CMD_ATE_SET_TX_FRAME_LEN 0x0111
3515 #define RACFG_CMD_ATE_SET_TX_FRAME_COUNT 0x0112
3516 #define RACFG_CMD_ATE_START_RX_FRAME 0x0113
3517 #define RACFG_CMD_ATE_E2PROM_READ_BULK 0x0114
3518 #define RACFG_CMD_ATE_E2PROM_WRITE_BULK 0x0115
3519 #define RACFG_CMD_ATE_IO_WRITE_BULK 0x0116
3520 #define RACFG_CMD_ATE_BBP_READ_BULK 0x0117
3521 #define RACFG_CMD_ATE_BBP_WRITE_BULK 0x0118
3522 #define RACFG_CMD_ATE_RF_READ_BULK 0x0119
3523 #define RACFG_CMD_ATE_RF_WRITE_BULK 0x011a
3527 #define A2Hex(_X, _p) \
3532 while (((*p >= 'a') && (*p <= 'f')) || ((*p >= 'A') && (*p <= 'F')) || ((*p >= '0') && (*p <= '9'))) \
3534 if ((*p >= 'a') && (*p <= 'f')) \
3535 _X = _X * 16 + *p - 87; \
3536 else if ((*p >= 'A') && (*p <= 'F')) \
3537 _X = _X * 16 + *p - 55; \
3538 else if ((*p >= '0') && (*p <= '9')) \
3539 _X = _X * 16 + *p - 48; \
3545 static VOID memcpy_exl(PRTMP_ADAPTER pAd, UCHAR *dst, UCHAR *src, ULONG len);
3546 static VOID memcpy_exs(PRTMP_ADAPTER pAd, UCHAR *dst, UCHAR *src, ULONG len);
3547 static VOID RTMP_IO_READ_BULK(PRTMP_ADAPTER pAd, UCHAR *dst, UCHAR *src, UINT32 len);
3549 #define LEN_OF_ARG 16
3552 IN PRTMP_ADAPTER pAdapter,
3553 IN struct iwreq *wrq)
3555 unsigned short Command_Id;
3556 struct ate_racfghdr *pRaCfg;
3557 INT Status = NDIS_STATUS_SUCCESS;
3561 if((pRaCfg = kmalloc(sizeof(struct ate_racfghdr), GFP_KERNEL)) == NULL)
3567 NdisZeroMemory(pRaCfg, sizeof(struct ate_racfghdr));
3569 if (copy_from_user((PUCHAR)pRaCfg, wrq->u.data.pointer, wrq->u.data.length))
3577 Command_Id = ntohs(pRaCfg->command_id);
3579 ATEDBGPRINT(RT_DEBUG_TRACE,("\n%s: Command_Id = 0x%04x !\n", __func__, Command_Id));
3583 // We will get this command when QA starts.
3584 case RACFG_CMD_ATE_START:
3586 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_START\n"));
3588 // prepare feedback as soon as we can to avoid QA timeout.
3589 pRaCfg->length = htons(2);
3590 pRaCfg->status = htons(0);
3592 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
3593 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
3594 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
3596 ATEDBGPRINT(RT_DEBUG_TRACE, ("wrq->u.data.length = %d\n", wrq->u.data.length));
3598 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
3600 ATEDBGPRINT(RT_DEBUG_TRACE, ("copy_to_user() fail in case RACFG_CMD_ATE_START\n"));
3605 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_START is done !\n"));
3607 Set_ATE_Proc(pAdapter, "ATESTART");
3611 // We will get this command either QA is closed or ated is killed by user.
3612 case RACFG_CMD_ATE_STOP:
3616 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_STOP\n"));
3618 // Distinguish this command came from QA(via ated)
3619 // or ate daemon according to the existence of pid in payload.
3620 // No need to prepare feedback if this cmd came directly from ate daemon.
3621 pRaCfg->length = ntohs(pRaCfg->length);
3623 if (pRaCfg->length == sizeof(pAdapter->ate.AtePid))
3625 // This command came from QA.
3626 // Get the pid of ATE daemon.
3627 memcpy((UCHAR *)&pAdapter->ate.AtePid,
3628 (&pRaCfg->data[0]) - 2/* == &(pRaCfg->status) */,
3629 sizeof(pAdapter->ate.AtePid));
3631 // prepare feedback as soon as we can to avoid QA timeout.
3632 pRaCfg->length = htons(2);
3633 pRaCfg->status = htons(0);
3635 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
3636 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
3637 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
3639 ATEDBGPRINT(RT_DEBUG_TRACE, ("wrq->u.data.length = %d\n", wrq->u.data.length));
3641 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
3643 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_STOP\n"));
3648 // kill ATE daemon when leaving ATE mode.
3649 // We must kill ATE daemon first before setting ATESTOP,
3650 // or Microsoft will report sth. wrong.
3651 ret = KILL_THREAD_PID(pAdapter->ate.AtePid, SIGTERM, 1);
3654 ATEDBGPRINT(RT_DEBUG_ERROR, ("%s: unable to signal thread\n", pAdapter->net_dev->name));
3658 // AP might have in ATE_STOP mode due to cmd from QA.
3659 if (ATE_ON(pAdapter))
3661 // Someone has killed ate daemon while QA GUI is still open.
3662 Set_ATE_Proc(pAdapter, "ATESTOP");
3663 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_AP_START is done !\n"));
3668 case RACFG_CMD_RF_WRITE_ALL:
3670 UINT32 R1, R2, R3, R4;
3673 memcpy(&R1, pRaCfg->data-2, 4);
3674 memcpy(&R2, pRaCfg->data+2, 4);
3675 memcpy(&R3, pRaCfg->data+6, 4);
3676 memcpy(&R4, pRaCfg->data+10, 4);
3677 memcpy(&channel, pRaCfg->data+14, 2);
3679 pAdapter->LatchRfRegs.R1 = ntohl(R1);
3680 pAdapter->LatchRfRegs.R2 = ntohl(R2);
3681 pAdapter->LatchRfRegs.R3 = ntohl(R3);
3682 pAdapter->LatchRfRegs.R4 = ntohl(R4);
3683 pAdapter->LatchRfRegs.Channel = ntohs(channel);
3685 RTMP_RF_IO_WRITE32(pAdapter, pAdapter->LatchRfRegs.R1);
3686 RTMP_RF_IO_WRITE32(pAdapter, pAdapter->LatchRfRegs.R2);
3687 RTMP_RF_IO_WRITE32(pAdapter, pAdapter->LatchRfRegs.R3);
3688 RTMP_RF_IO_WRITE32(pAdapter, pAdapter->LatchRfRegs.R4);
3691 pRaCfg->length = htons(2);
3692 pRaCfg->status = htons(0);
3694 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
3695 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
3696 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
3698 ATEDBGPRINT(RT_DEBUG_TRACE, ("wrq->u.data.length = %d\n", wrq->u.data.length));
3699 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
3701 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_RF_WRITE_ALL\n"));
3706 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_RF_WRITE_ALL is done !\n"));
3711 case RACFG_CMD_E2PROM_READ16:
3713 USHORT offset, value, tmp;
3715 offset = ntohs(pRaCfg->status);
3716 /* "tmp" is expecially for some compilers... */
3717 RT28xx_EEPROM_READ16(pAdapter, offset, tmp);
3719 value = htons(value);
3721 ATEDBGPRINT(RT_DEBUG_TRACE,("EEPROM Read offset = 0x%04x, value = 0x%04x\n", offset, value));
3724 pRaCfg->length = htons(4);
3725 pRaCfg->status = htons(0);
3726 memcpy(pRaCfg->data, &value, 2);
3728 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
3729 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
3730 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
3732 ATEDBGPRINT(RT_DEBUG_TRACE, ("sizeof(struct ate_racfghdr) = %d\n", sizeof(struct ate_racfghdr)));
3733 ATEDBGPRINT(RT_DEBUG_TRACE, ("wrq->u.data.length = %d\n", wrq->u.data.length));
3735 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
3737 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_E2PROM_READ16\n"));
3742 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_E2PROM_READ16 is done !\n"));
3747 case RACFG_CMD_E2PROM_WRITE16:
3749 USHORT offset, value;
3751 offset = ntohs(pRaCfg->status);
3752 memcpy(&value, pRaCfg->data, 2);
3753 value = ntohs(value);
3754 RT28xx_EEPROM_WRITE16(pAdapter, offset, value);
3757 pRaCfg->length = htons(2);
3758 pRaCfg->status = htons(0);
3759 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
3760 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
3761 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
3763 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
3765 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_E2PROM_WRITE16\n"));
3770 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_E2PROM_WRITE16 is done !\n"));
3775 case RACFG_CMD_E2PROM_READ_ALL:
3777 USHORT buffer[EEPROM_SIZE/2];
3779 rt_ee_read_all(pAdapter,(USHORT *)buffer);
3780 memcpy_exs(pAdapter, pRaCfg->data, (UCHAR *)buffer, EEPROM_SIZE);
3783 pRaCfg->length = htons(2+EEPROM_SIZE);
3784 pRaCfg->status = htons(0);
3785 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
3786 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
3787 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
3789 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
3791 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_E2PROM_READ_ALL\n"));
3796 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_E2PROM_READ_ALL is done !\n"));
3801 case RACFG_CMD_E2PROM_WRITE_ALL:
3803 USHORT buffer[EEPROM_SIZE/2];
3805 NdisZeroMemory((UCHAR *)buffer, EEPROM_SIZE);
3806 memcpy_exs(pAdapter, (UCHAR *)buffer, (UCHAR *)&pRaCfg->status, EEPROM_SIZE);
3807 rt_ee_write_all(pAdapter,(USHORT *)buffer);
3810 pRaCfg->length = htons(2);
3811 pRaCfg->status = htons(0);
3812 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
3813 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
3814 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
3816 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
3818 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_E2PROM_WRITE_ALL\n"));
3823 ATEDBGPRINT(RT_DEBUG_ERROR, ("RACFG_CMD_E2PROM_WRITE_ALL is done !\n"));
3829 case RACFG_CMD_IO_READ:
3834 memcpy(&offset, &pRaCfg->status, 4);
3835 offset = ntohl(offset);
3837 // We do not need the base address.
3838 // So just extract the offset out.
3839 offset &= 0x0000FFFF;
3840 RTMP_IO_READ32(pAdapter, offset, &value);
3841 value = htonl(value);
3844 pRaCfg->length = htons(6);
3845 pRaCfg->status = htons(0);
3846 memcpy(pRaCfg->data, &value, 4);
3848 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
3849 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
3850 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
3852 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
3854 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_IO_READ\n"));
3859 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_IO_READ is done !\n"));
3864 case RACFG_CMD_IO_WRITE:
3866 UINT32 offset, value;
3868 memcpy(&offset, pRaCfg->data-2, 4);
3869 memcpy(&value, pRaCfg->data+2, 4);
3871 offset = ntohl(offset);
3873 // We do not need the base address.
3874 // So just extract out the offset.
3875 offset &= 0x0000FFFF;
3876 value = ntohl(value);
3877 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_IO_WRITE: offset = %x, value = %x\n", offset, value));
3878 RTMP_IO_WRITE32(pAdapter, offset, value);
3881 pRaCfg->length = htons(2);
3882 pRaCfg->status = htons(0);
3883 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
3884 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
3885 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
3887 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
3889 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_IO_WRITE\n"));
3894 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_IO_WRITE is done !\n"));
3899 case RACFG_CMD_IO_READ_BULK:
3904 memcpy(&offset, &pRaCfg->status, 4);
3905 offset = ntohl(offset);
3907 // We do not need the base address.
3908 // So just extract the offset.
3909 offset &= 0x0000FFFF;
3910 memcpy(&len, pRaCfg->data+2, 2);
3915 ATEDBGPRINT(RT_DEBUG_TRACE,("len is too large, make it smaller\n"));
3916 pRaCfg->length = htons(2);
3917 pRaCfg->status = htons(1);
3921 RTMP_IO_READ_BULK(pAdapter, pRaCfg->data, (UCHAR *)offset, len*4);// unit in four bytes
3924 pRaCfg->length = htons(2+len*4);// unit in four bytes
3925 pRaCfg->status = htons(0);
3926 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
3927 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
3928 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
3930 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
3932 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_IO_READ_BULK\n"));
3937 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_IO_READ_BULK is done !\n"));
3942 case RACFG_CMD_BBP_READ8:
3948 offset = ntohs(pRaCfg->status);
3950 if (ATE_ON(pAdapter))
3952 ATE_BBP_IO_READ8_BY_REG_ID(pAdapter, offset, &value);
3956 RTMP_BBP_IO_READ8_BY_REG_ID(pAdapter, offset, &value);
3959 pRaCfg->length = htons(3);
3960 pRaCfg->status = htons(0);
3961 pRaCfg->data[0] = value;
3963 ATEDBGPRINT(RT_DEBUG_TRACE,("BBP value = %x\n", value));
3965 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
3966 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
3967 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
3969 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
3971 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_BBP_READ8\n"));
3976 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_BBP_READ8 is done !\n"));
3980 case RACFG_CMD_BBP_WRITE8:
3985 offset = ntohs(pRaCfg->status);
3986 memcpy(&value, pRaCfg->data, 1);
3988 if (ATE_ON(pAdapter))
3990 ATE_BBP_IO_WRITE8_BY_REG_ID(pAdapter, offset, value);
3994 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAdapter, offset, value);
3997 if ((offset == BBP_R1) || (offset == BBP_R3))
3999 SyncTxRxConfig(pAdapter, offset, value);
4003 pRaCfg->length = htons(2);
4004 pRaCfg->status = htons(0);
4005 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4006 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4007 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4009 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4011 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_BBP_WRITE8\n"));
4016 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_BBP_WRITE8 is done !\n"));
4021 case RACFG_CMD_BBP_READ_ALL:
4025 for (j = 0; j < 137; j++)
4027 pRaCfg->data[j] = 0;
4029 if (ATE_ON(pAdapter))
4031 ATE_BBP_IO_READ8_BY_REG_ID(pAdapter, j, &pRaCfg->data[j]);
4035 RTMP_BBP_IO_READ8_BY_REG_ID(pAdapter, j, &pRaCfg->data[j]);
4040 pRaCfg->length = htons(2+137);
4041 pRaCfg->status = htons(0);
4043 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4044 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4045 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4047 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4049 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_BBP_READ_ALL\n"));
4054 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_BBP_READ_ALL is done !\n"));
4060 case RACFG_CMD_ATE_E2PROM_READ_BULK:
4064 USHORT buffer[EEPROM_SIZE/2];
4066 offset = ntohs(pRaCfg->status);
4067 memcpy(&len, pRaCfg->data, 2);
4070 rt_ee_read_all(pAdapter,(USHORT *)buffer);
4071 if (offset + len <= EEPROM_SIZE)
4072 memcpy_exs(pAdapter, pRaCfg->data, (UCHAR *)buffer+offset, len);
4074 ATEDBGPRINT(RT_DEBUG_ERROR, ("exceed EEPROM size\n"));
4077 pRaCfg->length = htons(2+len);
4078 pRaCfg->status = htons(0);
4079 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4080 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4081 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4083 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4085 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_E2PROM_READ_BULK\n"));
4090 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_E2PROM_READ_BULK is done !\n"));
4096 case RACFG_CMD_ATE_E2PROM_WRITE_BULK:
4100 USHORT buffer[EEPROM_SIZE/2];
4102 offset = ntohs(pRaCfg->status);
4103 memcpy(&len, pRaCfg->data, 2);
4106 rt_ee_read_all(pAdapter,(USHORT *)buffer);
4107 memcpy_exs(pAdapter, (UCHAR *)buffer + offset, (UCHAR *)pRaCfg->data + 2, len);
4108 rt_ee_write_all(pAdapter,(USHORT *)buffer);
4111 pRaCfg->length = htons(2);
4112 pRaCfg->status = htons(0);
4113 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4114 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4115 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4116 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4118 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_E2PROM_WRITE_BULK\n"));
4123 ATEDBGPRINT(RT_DEBUG_ERROR, ("RACFG_CMD_ATE_E2PROM_WRITE_BULK is done !\n"));
4129 case RACFG_CMD_ATE_IO_WRITE_BULK:
4131 UINT32 offset, i, value;
4134 memcpy(&offset, &pRaCfg->status, 4);
4135 offset = ntohl(offset);
4136 memcpy(&len, pRaCfg->data+2, 2);
4139 for (i = 0; i < len; i += 4)
4141 memcpy_exl(pAdapter, (UCHAR *)&value, pRaCfg->data+4+i, 4);
4142 printk("Write %x %x\n", offset + i, value);
4143 RTMP_IO_WRITE32(pAdapter, (offset +i) & 0xffff, value);
4147 pRaCfg->length = htons(2);
4148 pRaCfg->status = htons(0);
4149 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4150 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4151 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4152 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4154 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_IO_WRITE_BULK\n"));
4159 ATEDBGPRINT(RT_DEBUG_ERROR, ("RACFG_CMD_ATE_IO_WRITE_BULK is done !\n"));
4165 case RACFG_CMD_ATE_BBP_READ_BULK:
4171 offset = ntohs(pRaCfg->status);
4172 memcpy(&len, pRaCfg->data, 2);
4176 for (j = offset; j < (offset+len); j++)
4178 pRaCfg->data[j - offset] = 0;
4180 if (pAdapter->ate.Mode == ATE_STOP)
4182 RTMP_BBP_IO_READ8_BY_REG_ID(pAdapter, j, &pRaCfg->data[j - offset]);
4186 ATE_BBP_IO_READ8_BY_REG_ID(pAdapter, j, &pRaCfg->data[j - offset]);
4191 pRaCfg->length = htons(2+len);
4192 pRaCfg->status = htons(0);
4193 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4194 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4195 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4197 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4199 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_BBP_READ_BULK\n"));
4204 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_BBP_READ_BULK is done !\n"));
4210 case RACFG_CMD_ATE_BBP_WRITE_BULK:
4217 offset = ntohs(pRaCfg->status);
4218 memcpy(&len, pRaCfg->data, 2);
4221 for (j = offset; j < (offset+len); j++)
4223 value = pRaCfg->data + 2 + (j - offset);
4224 if (pAdapter->ate.Mode == ATE_STOP)
4226 RTMP_BBP_IO_WRITE8_BY_REG_ID(pAdapter, j, *value);
4230 ATE_BBP_IO_WRITE8_BY_REG_ID(pAdapter, j, *value);
4235 pRaCfg->length = htons(2);
4236 pRaCfg->status = htons(0);
4237 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4238 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4239 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4241 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4243 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_BBP_WRITE_BULK\n"));
4248 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_BBP_WRITE_BULK is done !\n"));
4253 #ifdef CONFIG_RALINK_RT3052
4254 case RACFG_CMD_ATE_RF_READ_BULK:
4260 offset = ntohs(pRaCfg->status);
4261 memcpy(&len, pRaCfg->data, 2);
4264 for (j = offset; j < (offset+len); j++)
4266 pRaCfg->data[j - offset] = 0;
4267 RT30xxReadRFRegister(pAdapter, j, &pRaCfg->data[j - offset]);
4271 pRaCfg->length = htons(2+len);
4272 pRaCfg->status = htons(0);
4273 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4274 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4275 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4277 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4279 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_RF_READ_BULK\n"));
4284 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_RF_READ_BULK is done !\n"));
4290 case RACFG_CMD_ATE_RF_WRITE_BULK:
4297 offset = ntohs(pRaCfg->status);
4298 memcpy(&len, pRaCfg->data, 2);
4301 for (j = offset; j < (offset+len); j++)
4303 value = pRaCfg->data + 2 + (j - offset);
4304 RT30xxWriteRFRegister(pAdapter, j, *value);
4308 pRaCfg->length = htons(2);
4309 pRaCfg->status = htons(0);
4310 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4311 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4312 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4314 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4316 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_RF_WRITE_BULK\n"));
4321 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_RF_WRITE_BULK is done !\n"));
4329 case RACFG_CMD_GET_NOISE_LEVEL:
4332 INT32 buffer[3][10];/* 3 : RxPath ; 10 : no. of per rssi samples */
4334 channel = (ntohs(pRaCfg->status) & 0x00FF);
4335 CalNoiseLevel(pAdapter, channel, buffer);
4336 memcpy_exl(pAdapter, (UCHAR *)pRaCfg->data, (UCHAR *)&(buffer[0][0]), (sizeof(INT32)*3*10));
4339 pRaCfg->length = htons(2 + (sizeof(INT32)*3*10));
4340 pRaCfg->status = htons(0);
4341 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4342 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4343 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4345 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4347 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_GET_NOISE_LEVEL\n"));
4352 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_GET_NOISE_LEVEL is done !\n"));
4357 case RACFG_CMD_GET_COUNTER:
4359 memcpy_exl(pAdapter, &pRaCfg->data[0], (UCHAR *)&pAdapter->ate.U2M, 4);
4360 memcpy_exl(pAdapter, &pRaCfg->data[4], (UCHAR *)&pAdapter->ate.OtherData, 4);
4361 memcpy_exl(pAdapter, &pRaCfg->data[8], (UCHAR *)&pAdapter->ate.Beacon, 4);
4362 memcpy_exl(pAdapter, &pRaCfg->data[12], (UCHAR *)&pAdapter->ate.OtherCount, 4);
4363 memcpy_exl(pAdapter, &pRaCfg->data[16], (UCHAR *)&pAdapter->ate.TxAc0, 4);
4364 memcpy_exl(pAdapter, &pRaCfg->data[20], (UCHAR *)&pAdapter->ate.TxAc1, 4);
4365 memcpy_exl(pAdapter, &pRaCfg->data[24], (UCHAR *)&pAdapter->ate.TxAc2, 4);
4366 memcpy_exl(pAdapter, &pRaCfg->data[28], (UCHAR *)&pAdapter->ate.TxAc3, 4);
4367 memcpy_exl(pAdapter, &pRaCfg->data[32], (UCHAR *)&pAdapter->ate.TxHCCA, 4);
4368 memcpy_exl(pAdapter, &pRaCfg->data[36], (UCHAR *)&pAdapter->ate.TxMgmt, 4);
4369 memcpy_exl(pAdapter, &pRaCfg->data[40], (UCHAR *)&pAdapter->ate.RSSI0, 4);
4370 memcpy_exl(pAdapter, &pRaCfg->data[44], (UCHAR *)&pAdapter->ate.RSSI1, 4);
4371 memcpy_exl(pAdapter, &pRaCfg->data[48], (UCHAR *)&pAdapter->ate.RSSI2, 4);
4372 memcpy_exl(pAdapter, &pRaCfg->data[52], (UCHAR *)&pAdapter->ate.SNR0, 4);
4373 memcpy_exl(pAdapter, &pRaCfg->data[56], (UCHAR *)&pAdapter->ate.SNR1, 4);
4375 pRaCfg->length = htons(2+60);
4376 pRaCfg->status = htons(0);
4377 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4378 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4379 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4381 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4383 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_GET_COUNTER\n"));
4388 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_GET_COUNTER is done !\n"));
4393 case RACFG_CMD_CLEAR_COUNTER:
4395 pAdapter->ate.U2M = 0;
4396 pAdapter->ate.OtherData = 0;
4397 pAdapter->ate.Beacon = 0;
4398 pAdapter->ate.OtherCount = 0;
4399 pAdapter->ate.TxAc0 = 0;
4400 pAdapter->ate.TxAc1 = 0;
4401 pAdapter->ate.TxAc2 = 0;
4402 pAdapter->ate.TxAc3 = 0;
4403 pAdapter->ate.TxHCCA = 0;
4404 pAdapter->ate.TxMgmt = 0;
4405 pAdapter->ate.TxDoneCount = 0;
4407 pRaCfg->length = htons(2);
4408 pRaCfg->status = htons(0);
4410 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4411 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4412 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4414 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4416 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_CLEAR_COUNTER\n"));
4421 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_CLEAR_COUNTER is done !\n"));
4427 case RACFG_CMD_TX_START:
4431 UCHAR Bbp22Value = 0, Bbp24Value = 0;
4433 if ((pAdapter->ate.TxStatus != 0) && (pAdapter->ate.Mode & ATE_TXFRAME))
4435 ATEDBGPRINT(RT_DEBUG_TRACE,("Ate Tx is already running, to run next Tx, you must stop it first\n"));
4437 goto TX_START_ERROR;
4439 else if ((pAdapter->ate.TxStatus != 0) && !(pAdapter->ate.Mode & ATE_TXFRAME))
4443 while ((i++ < 10) && (pAdapter->ate.TxStatus != 0))
4445 RTMPusecDelay(5000);
4449 pAdapter->ate.TxStatus = 0;
4450 pAdapter->ate.TxDoneCount = 0;
4451 //pAdapter->ate.Repeat = 0;
4452 pAdapter->ate.bQATxStart = FALSE;
4455 // If pRaCfg->length == 0, this "RACFG_CMD_TX_START" is for Carrier test or Carrier Suppression.
4456 if (ntohs(pRaCfg->length) != 0)
4460 NdisMoveMemory(&pAdapter->ate.TxWI, pRaCfg->data + 2, 16);
4461 #ifdef RT_BIG_ENDIAN
4462 RTMPWIEndianChange((PUCHAR)&pAdapter->ate.TxWI, TYPE_TXWI);
4463 #endif // RT_BIG_ENDIAN //
4465 NdisMoveMemory(&pAdapter->ate.TxCount, pRaCfg->data + 18, 4);
4466 pAdapter->ate.TxCount = ntohl(pAdapter->ate.TxCount);
4468 p = (USHORT *)(&pRaCfg->data[22]);
4469 //p = pRaCfg->data + 22;
4470 // always use QID_AC_BE
4471 pAdapter->ate.QID = 0;
4472 p = (USHORT *)(&pRaCfg->data[24]);
4473 //p = pRaCfg->data + 24;
4474 pAdapter->ate.HLen = ntohs(*p);
4476 if (pAdapter->ate.HLen > 32)
4478 ATEDBGPRINT(RT_DEBUG_ERROR,("pAdapter->ate.HLen > 32\n"));
4480 goto TX_START_ERROR;
4483 NdisMoveMemory(&pAdapter->ate.Header, pRaCfg->data + 26, pAdapter->ate.HLen);
4486 pAdapter->ate.PLen = ntohs(pRaCfg->length) - (pAdapter->ate.HLen + 28);
4488 if (pAdapter->ate.PLen > 32)
4490 ATEDBGPRINT(RT_DEBUG_ERROR,("pAdapter->ate.PLen > 32\n"));
4492 goto TX_START_ERROR;
4495 NdisMoveMemory(&pAdapter->ate.Pattern, pRaCfg->data + 26 + pAdapter->ate.HLen, pAdapter->ate.PLen);
4496 pAdapter->ate.DLen = pAdapter->ate.TxWI.MPDUtotalByteCount - pAdapter->ate.HLen;
4499 ATE_BBP_IO_READ8_BY_REG_ID(pAdapter, BBP_R22, &Bbp22Value);
4505 if (pAdapter->ate.TxCount == 0)
4507 pAdapter->ate.TxCount = 0xFFFFFFFF;
4509 ATEDBGPRINT(RT_DEBUG_TRACE,("START TXFRAME\n"));
4510 pAdapter->ate.bQATxStart = TRUE;
4511 Set_ATE_Proc(pAdapter, "TXFRAME");
4515 case BBP22_TXCONT_OR_CARRSUPP:
4517 ATEDBGPRINT(RT_DEBUG_TRACE,("BBP22_TXCONT_OR_CARRSUPP\n"));
4518 ATE_BBP_IO_READ8_BY_REG_ID(pAdapter, 24, &Bbp24Value);
4524 ATEDBGPRINT(RT_DEBUG_TRACE,("START TXCONT\n"));
4525 pAdapter->ate.bQATxStart = TRUE;
4526 Set_ATE_Proc(pAdapter, "TXCONT");
4530 case BBP24_CARRSUPP:
4532 ATEDBGPRINT(RT_DEBUG_TRACE,("START TXCARRSUPP\n"));
4533 pAdapter->ate.bQATxStart = TRUE;
4534 pAdapter->ate.Mode |= ATE_TXCARRSUPP;
4540 ATEDBGPRINT(RT_DEBUG_ERROR,("Unknown Start TX subtype !"));
4549 ATEDBGPRINT(RT_DEBUG_TRACE,("START TXCARR\n"));
4550 pAdapter->ate.bQATxStart = TRUE;
4551 Set_ATE_Proc(pAdapter, "TXCARR");
4557 ATEDBGPRINT(RT_DEBUG_ERROR,("Unknown Start TX subtype !"));
4562 if (pAdapter->ate.bQATxStart == TRUE)
4565 pRaCfg->length = htons(2);
4566 pRaCfg->status = htons(0);
4568 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4569 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4570 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4572 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4574 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() was failed in case RACFG_CMD_TX_START\n"));
4579 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_TX_START is done !\n"));
4586 pRaCfg->length = htons(2);
4587 pRaCfg->status = htons(err);
4589 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4590 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4591 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4592 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4594 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_TX_START\n"));
4599 ATEDBGPRINT(RT_DEBUG_TRACE, ("feedback of TX_START_ERROR is done !\n"));
4604 case RACFG_CMD_GET_TX_STATUS:
4609 pRaCfg->length = htons(6);
4610 pRaCfg->status = htons(0);
4611 count = htonl(pAdapter->ate.TxDoneCount);
4612 NdisMoveMemory(pRaCfg->data, &count, 4);
4613 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4614 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4615 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4617 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4619 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_GET_TX_STATUS\n"));
4624 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_GET_TX_STATUS is done !\n"));
4629 case RACFG_CMD_TX_STOP:
4631 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_TX_STOP\n"));
4633 Set_ATE_Proc(pAdapter, "TXSTOP");
4636 pRaCfg->length = htons(2);
4637 pRaCfg->status = htons(0);
4638 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4639 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4640 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4642 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4644 ATEDBGPRINT(RT_DEBUG_TRACE, ("copy_to_user() fail in case RACFG_CMD_TX_STOP\n"));
4649 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_TX_STOP is done !\n"));
4654 case RACFG_CMD_RX_START:
4656 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_RX_START\n"));
4658 pAdapter->ate.bQARxStart = TRUE;
4659 Set_ATE_Proc(pAdapter, "RXFRAME");
4662 pRaCfg->length = htons(2);
4663 pRaCfg->status = htons(0);
4664 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4665 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4666 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4668 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4670 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_RX_START\n"));
4675 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_RX_START is done !\n"));
4680 case RACFG_CMD_RX_STOP:
4682 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_RX_STOP\n"));
4684 Set_ATE_Proc(pAdapter, "RXSTOP");
4687 pRaCfg->length = htons(2);
4688 pRaCfg->status = htons(0);
4689 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4690 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4691 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4693 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4695 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_RX_STOP\n"));
4700 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_RX_STOP is done !\n"));
4705 /* The following cases are for new ATE GUI(not QA). */
4706 /*==================================================*/
4707 case RACFG_CMD_ATE_START_TX_CARRIER:
4709 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_START_TX_CARRIER\n"));
4711 Set_ATE_Proc(pAdapter, "TXCARR");
4713 pRaCfg->length = htons(2);
4714 pRaCfg->status = htons(0);
4716 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4717 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4718 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4720 ATEDBGPRINT(RT_DEBUG_TRACE, ("wrq->u.data.length = %d\n", wrq->u.data.length));
4722 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4724 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_START_TX_CARRIER\n"));
4729 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_START_TX_CARRIER is done !\n"));
4734 case RACFG_CMD_ATE_START_TX_CONT:
4736 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_START_TX_CONT\n"));
4738 Set_ATE_Proc(pAdapter, "TXCONT");
4740 pRaCfg->length = htons(2);
4741 pRaCfg->status = htons(0);
4743 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4744 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4745 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4747 ATEDBGPRINT(RT_DEBUG_TRACE, ("wrq->u.data.length = %d\n", wrq->u.data.length));
4749 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4751 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_START_TX_CONT\n"));
4756 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_START_TX_CONT is done !\n"));
4761 case RACFG_CMD_ATE_START_TX_FRAME:
4763 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_START_TX_FRAME\n"));
4765 Set_ATE_Proc(pAdapter, "TXFRAME");
4767 pRaCfg->length = htons(2);
4768 pRaCfg->status = htons(0);
4770 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4771 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4772 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4774 ATEDBGPRINT(RT_DEBUG_TRACE, ("wrq->u.data.length = %d\n", wrq->u.data.length));
4776 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4778 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_START_TX_FRAME\n"));
4783 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_START_TX_FRAME is done !\n"));
4788 case RACFG_CMD_ATE_SET_BW:
4791 UCHAR str[LEN_OF_ARG];
4793 NdisZeroMemory(str, LEN_OF_ARG);
4795 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_BW\n"));
4797 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
4798 value = ntohs(value);
4799 sprintf((PCHAR)str, "%d", value);
4801 Set_ATE_TX_BW_Proc(pAdapter, str);
4804 pRaCfg->length = htons(2);
4805 pRaCfg->status = htons(0);
4806 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4807 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4808 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4810 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4812 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_BW\n"));
4817 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_BW is done !\n"));
4822 case RACFG_CMD_ATE_SET_TX_POWER0:
4825 UCHAR str[LEN_OF_ARG];
4827 NdisZeroMemory(str, LEN_OF_ARG);
4829 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_TX_POWER0\n"));
4831 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
4832 value = ntohs(value);
4833 sprintf((PCHAR)str, "%d", value);
4834 Set_ATE_TX_POWER0_Proc(pAdapter, str);
4837 pRaCfg->length = htons(2);
4838 pRaCfg->status = htons(0);
4839 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4840 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4841 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4843 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4845 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_TX_POWER0\n"));
4850 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_TX_POWER0 is done !\n"));
4855 case RACFG_CMD_ATE_SET_TX_POWER1:
4858 UCHAR str[LEN_OF_ARG];
4860 NdisZeroMemory(str, LEN_OF_ARG);
4862 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_TX_POWER1\n"));
4864 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
4865 value = ntohs(value);
4866 sprintf((PCHAR)str, "%d", value);
4867 Set_ATE_TX_POWER1_Proc(pAdapter, str);
4870 pRaCfg->length = htons(2);
4871 pRaCfg->status = htons(0);
4872 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4873 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4874 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4876 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4878 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_TX_POWER1\n"));
4883 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_TX_POWER1 is done !\n"));
4888 case RACFG_CMD_ATE_SET_FREQ_OFFSET:
4891 UCHAR str[LEN_OF_ARG];
4893 NdisZeroMemory(str, LEN_OF_ARG);
4895 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_FREQ_OFFSET\n"));
4897 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
4898 value = ntohs(value);
4899 sprintf((PCHAR)str, "%d", value);
4900 Set_ATE_TX_FREQOFFSET_Proc(pAdapter, str);
4903 pRaCfg->length = htons(2);
4904 pRaCfg->status = htons(0);
4905 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4906 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4907 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4909 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4911 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_FREQ_OFFSET\n"));
4916 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_FREQ_OFFSET is done !\n"));
4921 case RACFG_CMD_ATE_GET_STATISTICS:
4923 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_GET_STATISTICS\n"));
4925 memcpy_exl(pAdapter, &pRaCfg->data[0], (UCHAR *)&pAdapter->ate.TxDoneCount, 4);
4926 memcpy_exl(pAdapter, &pRaCfg->data[4], (UCHAR *)&pAdapter->WlanCounters.RetryCount.u.LowPart, 4);
4927 memcpy_exl(pAdapter, &pRaCfg->data[8], (UCHAR *)&pAdapter->WlanCounters.FailedCount.u.LowPart, 4);
4928 memcpy_exl(pAdapter, &pRaCfg->data[12], (UCHAR *)&pAdapter->WlanCounters.RTSSuccessCount.u.LowPart, 4);
4929 memcpy_exl(pAdapter, &pRaCfg->data[16], (UCHAR *)&pAdapter->WlanCounters.RTSFailureCount.u.LowPart, 4);
4930 memcpy_exl(pAdapter, &pRaCfg->data[20], (UCHAR *)&pAdapter->WlanCounters.ReceivedFragmentCount.QuadPart, 4);
4931 memcpy_exl(pAdapter, &pRaCfg->data[24], (UCHAR *)&pAdapter->WlanCounters.FCSErrorCount.u.LowPart, 4);
4932 memcpy_exl(pAdapter, &pRaCfg->data[28], (UCHAR *)&pAdapter->Counters8023.RxNoBuffer, 4);
4933 memcpy_exl(pAdapter, &pRaCfg->data[32], (UCHAR *)&pAdapter->WlanCounters.FrameDuplicateCount.u.LowPart, 4);
4934 memcpy_exl(pAdapter, &pRaCfg->data[36], (UCHAR *)&pAdapter->RalinkCounters.OneSecFalseCCACnt, 4);
4936 if (pAdapter->ate.RxAntennaSel == 0)
4942 RSSI0 = (INT32)(pAdapter->ate.LastRssi0 - pAdapter->BbpRssiToDbmDelta);
4943 RSSI1 = (INT32)(pAdapter->ate.LastRssi1 - pAdapter->BbpRssiToDbmDelta);
4944 RSSI2 = (INT32)(pAdapter->ate.LastRssi2 - pAdapter->BbpRssiToDbmDelta);
4945 memcpy_exl(pAdapter, &pRaCfg->data[40], (UCHAR *)&RSSI0, 4);
4946 memcpy_exl(pAdapter, &pRaCfg->data[44], (UCHAR *)&RSSI1, 4);
4947 memcpy_exl(pAdapter, &pRaCfg->data[48], (UCHAR *)&RSSI2, 4);
4948 pRaCfg->length = htons(2+52);
4954 RSSI0 = (INT32)(pAdapter->ate.LastRssi0 - pAdapter->BbpRssiToDbmDelta);
4955 memcpy_exl(pAdapter, &pRaCfg->data[40], (UCHAR *)&RSSI0, 4);
4956 pRaCfg->length = htons(2+44);
4958 pRaCfg->status = htons(0);
4959 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4960 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4961 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4963 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4965 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_GET_STATISTICS\n"));
4970 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_GET_STATISTICS is done !\n"));
4975 case RACFG_CMD_ATE_RESET_COUNTER:
4978 UCHAR str[LEN_OF_ARG];
4980 NdisZeroMemory(str, LEN_OF_ARG);
4982 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_RESET_COUNTER\n"));
4984 sprintf((PCHAR)str, "%d", value);
4985 Set_ResetStatCounter_Proc(pAdapter, str);
4987 pAdapter->ate.TxDoneCount = 0;
4989 pRaCfg->length = htons(2);
4990 pRaCfg->status = htons(0);
4992 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
4993 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
4994 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
4996 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
4998 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_RESET_COUNTER\n"));
5003 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_RESET_COUNTER is done !\n"));
5009 case RACFG_CMD_ATE_SEL_TX_ANTENNA:
5012 UCHAR str[LEN_OF_ARG];
5014 NdisZeroMemory(str, LEN_OF_ARG);
5016 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SEL_TX_ANTENNA\n"));
5018 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
5019 value = ntohs(value);
5020 sprintf((PCHAR)str, "%d", value);
5021 Set_ATE_TX_Antenna_Proc(pAdapter, str);
5024 pRaCfg->length = htons(2);
5025 pRaCfg->status = htons(0);
5026 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5027 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5028 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5030 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5032 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SEL_TX_ANTENNA\n"));
5037 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SEL_TX_ANTENNA is done !\n"));
5042 case RACFG_CMD_ATE_SEL_RX_ANTENNA:
5045 UCHAR str[LEN_OF_ARG];
5047 NdisZeroMemory(str, LEN_OF_ARG);
5049 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SEL_RX_ANTENNA\n"));
5051 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
5052 value = ntohs(value);
5053 sprintf((PCHAR)str, "%d", value);
5054 Set_ATE_RX_Antenna_Proc(pAdapter, str);
5057 pRaCfg->length = htons(2);
5058 pRaCfg->status = htons(0);
5059 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5060 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5061 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5063 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5065 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SEL_RX_ANTENNA\n"));
5070 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SEL_RX_ANTENNA is done !\n"));
5075 case RACFG_CMD_ATE_SET_PREAMBLE:
5078 UCHAR str[LEN_OF_ARG];
5080 NdisZeroMemory(str, LEN_OF_ARG);
5082 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_PREAMBLE\n"));
5084 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
5085 value = ntohs(value);
5086 sprintf((PCHAR)str, "%d", value);
5087 Set_ATE_TX_MODE_Proc(pAdapter, str);
5090 pRaCfg->length = htons(2);
5091 pRaCfg->status = htons(0);
5092 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5093 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5094 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5096 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5098 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_PREAMBLE\n"));
5103 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_PREAMBLE is done !\n"));
5108 case RACFG_CMD_ATE_SET_CHANNEL:
5111 UCHAR str[LEN_OF_ARG];
5113 NdisZeroMemory(str, LEN_OF_ARG);
5115 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_CHANNEL\n"));
5117 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
5118 value = ntohs(value);
5119 sprintf((PCHAR)str, "%d", value);
5120 Set_ATE_CHANNEL_Proc(pAdapter, str);
5123 pRaCfg->length = htons(2);
5124 pRaCfg->status = htons(0);
5125 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5126 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5127 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5129 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5131 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_CHANNEL\n"));
5136 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_CHANNEL is done !\n"));
5141 case RACFG_CMD_ATE_SET_ADDR1:
5143 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_ADDR1\n"));
5145 // Addr is an array of UCHAR,
5146 // so no need to perform endian swap.
5147 memcpy(pAdapter->ate.Addr1, (PUCHAR)(pRaCfg->data - 2), MAC_ADDR_LEN);
5150 pRaCfg->length = htons(2);
5151 pRaCfg->status = htons(0);
5152 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5153 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5154 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5156 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5158 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_ADDR1\n"));
5163 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_ADDR1 is done !\n (ADDR1 = %2X:%2X:%2X:%2X:%2X:%2X)\n", pAdapter->ate.Addr1[0],
5164 pAdapter->ate.Addr1[1], pAdapter->ate.Addr1[2], pAdapter->ate.Addr1[3], pAdapter->ate.Addr1[4], pAdapter->ate.Addr1[5]));
5169 case RACFG_CMD_ATE_SET_ADDR2:
5171 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_ADDR2\n"));
5173 // Addr is an array of UCHAR,
5174 // so no need to perform endian swap.
5175 memcpy(pAdapter->ate.Addr2, (PUCHAR)(pRaCfg->data - 2), MAC_ADDR_LEN);
5178 pRaCfg->length = htons(2);
5179 pRaCfg->status = htons(0);
5180 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5181 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5182 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5184 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5186 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_ADDR2\n"));
5191 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_ADDR2 is done !\n (ADDR2 = %2X:%2X:%2X:%2X:%2X:%2X)\n", pAdapter->ate.Addr2[0],
5192 pAdapter->ate.Addr2[1], pAdapter->ate.Addr2[2], pAdapter->ate.Addr2[3], pAdapter->ate.Addr2[4], pAdapter->ate.Addr2[5]));
5197 case RACFG_CMD_ATE_SET_ADDR3:
5199 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_ADDR3\n"));
5201 // Addr is an array of UCHAR,
5202 // so no need to perform endian swap.
5203 memcpy(pAdapter->ate.Addr3, (PUCHAR)(pRaCfg->data - 2), MAC_ADDR_LEN);
5206 pRaCfg->length = htons(2);
5207 pRaCfg->status = htons(0);
5208 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5209 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5210 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5212 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5214 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_ADDR3\n"));
5219 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_ADDR3 is done !\n (ADDR3 = %2X:%2X:%2X:%2X:%2X:%2X)\n", pAdapter->ate.Addr3[0],
5220 pAdapter->ate.Addr3[1], pAdapter->ate.Addr3[2], pAdapter->ate.Addr3[3], pAdapter->ate.Addr3[4], pAdapter->ate.Addr3[5]));
5225 case RACFG_CMD_ATE_SET_RATE:
5228 UCHAR str[LEN_OF_ARG];
5230 NdisZeroMemory(str, LEN_OF_ARG);
5232 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_RATE\n"));
5234 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
5235 value = ntohs(value);
5236 sprintf((PCHAR)str, "%d", value);
5237 Set_ATE_TX_MCS_Proc(pAdapter, str);
5240 pRaCfg->length = htons(2);
5241 pRaCfg->status = htons(0);
5242 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5243 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5244 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5246 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5248 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_RATE\n"));
5253 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_RATE is done !\n"));
5258 case RACFG_CMD_ATE_SET_TX_FRAME_LEN:
5261 UCHAR str[LEN_OF_ARG];
5263 NdisZeroMemory(str, LEN_OF_ARG);
5265 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_TX_FRAME_LEN\n"));
5267 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
5268 value = ntohs(value);
5269 sprintf((PCHAR)str, "%d", value);
5270 Set_ATE_TX_LENGTH_Proc(pAdapter, str);
5273 pRaCfg->length = htons(2);
5274 pRaCfg->status = htons(0);
5275 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5276 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5277 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5279 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5281 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_TX_FRAME_LEN\n"));
5286 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_TX_FRAME_LEN is done !\n"));
5291 case RACFG_CMD_ATE_SET_TX_FRAME_COUNT:
5294 UCHAR str[LEN_OF_ARG];
5296 NdisZeroMemory(str, LEN_OF_ARG);
5298 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_ATE_SET_TX_FRAME_COUNT\n"));
5300 memcpy((PUCHAR)&value, (PUCHAR)&(pRaCfg->status), 2);
5301 value = ntohs(value);
5302 /* TX_FRAME_COUNT == 0 means tx infinitely */
5305 /* Use TxCount = 0xFFFFFFFF to approximate the infinity. */
5306 pAdapter->ate.TxCount = 0xFFFFFFFF;
5307 ATEDBGPRINT(RT_DEBUG_TRACE, ("Set_ATE_TX_COUNT_Proc (TxCount = %d)\n", pAdapter->ate.TxCount));
5308 ATEDBGPRINT(RT_DEBUG_TRACE, ("Ralink: Set_ATE_TX_COUNT_Proc Success\n"));
5314 sprintf((PCHAR)str, "%d", value);
5315 Set_ATE_TX_COUNT_Proc(pAdapter, str);
5319 pRaCfg->length = htons(2);
5320 pRaCfg->status = htons(0);
5321 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5322 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5323 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5325 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5327 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_ATE_SET_TX_FRAME_COUNT\n"));
5332 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_ATE_SET_TX_FRAME_COUNT is done !\n"));
5337 case RACFG_CMD_ATE_START_RX_FRAME:
5339 ATEDBGPRINT(RT_DEBUG_TRACE,("RACFG_CMD_RX_START\n"));
5341 Set_ATE_Proc(pAdapter, "RXFRAME");
5344 pRaCfg->length = htons(2);
5345 pRaCfg->status = htons(0);
5346 wrq->u.data.length = sizeof(pRaCfg->magic_no) + sizeof(pRaCfg->command_type)
5347 + sizeof(pRaCfg->command_id) + sizeof(pRaCfg->length)
5348 + sizeof(pRaCfg->sequence) + ntohs(pRaCfg->length);
5350 if (copy_to_user(wrq->u.data.pointer, pRaCfg, wrq->u.data.length))
5352 ATEDBGPRINT(RT_DEBUG_ERROR, ("copy_to_user() fail in case RACFG_CMD_RX_START\n"));
5357 ATEDBGPRINT(RT_DEBUG_TRACE, ("RACFG_CMD_RX_START is done !\n"));
5364 ASSERT(pRaCfg != NULL);
5372 VOID BubbleSort(INT32 n, INT32 a[])
5376 for (k = n-1; k>0; k--)
5378 for (j = 0; j<k; j++)
5390 VOID CalNoiseLevel(PRTMP_ADAPTER pAd, UCHAR channel, INT32 RSSI[3][10])
5392 INT32 RSSI0, RSSI1, RSSI2;
5393 CHAR Rssi0Offset, Rssi1Offset, Rssi2Offset;
5394 UCHAR BbpR50Rssi0 = 0, BbpR51Rssi1 = 0, BbpR52Rssi2 = 0;
5395 UCHAR Org_BBP66value = 0, Org_BBP69value = 0, Org_BBP70value = 0, data = 0;
5396 USHORT LNA_Gain = 0;
5398 UCHAR Org_Channel = pAd->ate.Channel;
5399 USHORT GainValue = 0, OffsetValue = 0;
5401 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R66, &Org_BBP66value);
5402 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R69, &Org_BBP69value);
5403 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R70, &Org_BBP70value);
5405 //**********************************************************************
5406 // Read the value of LNA gain and Rssi offset
5407 //**********************************************************************
5408 RT28xx_EEPROM_READ16(pAd, EEPROM_LNA_OFFSET, GainValue);
5413 LNA_Gain = GainValue & 0x00FF;
5415 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_BG_OFFSET, OffsetValue);
5416 Rssi0Offset = OffsetValue & 0x00FF;
5417 Rssi1Offset = (OffsetValue & 0xFF00) >> 8;
5418 RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_BG_OFFSET + 2)/* 0x48 */, OffsetValue);
5419 Rssi2Offset = OffsetValue & 0x00FF;
5423 LNA_Gain = (GainValue & 0xFF00) >> 8;
5425 RT28xx_EEPROM_READ16(pAd, EEPROM_RSSI_A_OFFSET, OffsetValue);
5426 Rssi0Offset = OffsetValue & 0x00FF;
5427 Rssi1Offset = (OffsetValue & 0xFF00) >> 8;
5428 RT28xx_EEPROM_READ16(pAd, (EEPROM_RSSI_A_OFFSET + 2)/* 0x4C */, OffsetValue);
5429 Rssi2Offset = OffsetValue & 0x00FF;
5431 //**********************************************************************
5433 pAd->ate.Channel = channel;
5434 ATEAsicSwitchChannel(pAd);
5438 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, data);
5440 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, data);
5442 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, data);
5446 pAd->ate.bQARxStart = TRUE;
5447 Set_ATE_Proc(pAd, "RXFRAME");
5451 for (j = 0; j < 10; j++)
5453 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R50, &BbpR50Rssi0);
5454 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R51, &BbpR51Rssi1);
5455 ATE_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R52, &BbpR52Rssi2);
5460 if (BbpR50Rssi0 == 0)
5466 RSSI0 = (INT32)(-12 - BbpR50Rssi0 - LNA_Gain - Rssi0Offset);
5470 if ( pAd->Antenna.field.RxPath >= 2 ) // 2R
5473 if (BbpR51Rssi1 == 0)
5479 RSSI1 = (INT32)(-12 - BbpR51Rssi1 - LNA_Gain - Rssi1Offset);
5484 if ( pAd->Antenna.field.RxPath >= 3 ) // 3R
5487 if (BbpR52Rssi2 == 0)
5490 RSSI2 = (INT32)(-12 - BbpR52Rssi2 - LNA_Gain - Rssi2Offset);
5497 Set_ATE_Proc(pAd, "RXSTOP");
5501 #if 0// Debug Message................
5502 ate_print("\n**********************************************************\n");
5503 ate_print("Noise Level: Channel %d\n", channel);
5504 ate_print("RSSI0 = %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n",
5505 RSSI[0][0], RSSI[0][1], RSSI[0][2],
5506 RSSI[0][3], RSSI[0][4], RSSI[0][5],
5507 RSSI[0][6], RSSI[0][7], RSSI[0][8],
5509 if ( pAd->Antenna.field.RxPath >= 2 ) // 2R
5511 ate_print("RSSI1 = %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n",
5512 RSSI[1][0], RSSI[1][1], RSSI[1][2],
5513 RSSI[1][3], RSSI[1][4], RSSI[1][5],
5514 RSSI[1][6], RSSI[1][7], RSSI[1][8],
5517 if ( pAd->Antenna.field.RxPath >= 3 ) // 3R
5519 ate_print("RSSI2 = %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n",
5520 RSSI[2][0], RSSI[2][1], RSSI[2][2],
5521 RSSI[2][3], RSSI[2][4], RSSI[2][5],
5522 RSSI[2][6], RSSI[2][7], RSSI[2][8],
5526 BubbleSort(10, RSSI[0]); // 1R
5528 if ( pAd->Antenna.field.RxPath >= 2 ) // 2R
5530 BubbleSort(10, RSSI[1]);
5533 if ( pAd->Antenna.field.RxPath >= 3 ) // 3R
5535 BubbleSort(10, RSSI[2]);
5538 #if 0// Debug Message................
5539 ate_print("\nAfter Sorting....Channel %d\n", channel);
5540 ate_print("RSSI0 = %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n",
5541 RSSI[0][0], RSSI[0][1], RSSI[0][2],
5542 RSSI[0][3], RSSI[0][4], RSSI[0][5],
5543 RSSI[0][6], RSSI[0][7], RSSI[0][8],
5545 if ( pAd->Antenna.field.RxPath >= 2 ) // 2R
5547 ate_print("RSSI1 = %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n",
5548 RSSI[1][0], RSSI[1][1], RSSI[1][2],
5549 RSSI[1][3], RSSI[1][4], RSSI[1][5],
5550 RSSI[1][6], RSSI[1][7], RSSI[1][8],
5553 if ( pAd->Antenna.field.RxPath >= 3 ) // 3R
5555 ate_print("RSSI2 = %d, %d, %d, %d, %d, %d, %d, %d, %d, %d\n",
5556 RSSI[2][0], RSSI[2][1], RSSI[2][2],
5557 RSSI[2][3], RSSI[2][4], RSSI[2][5],
5558 RSSI[2][6], RSSI[2][7], RSSI[2][8],
5561 ate_print("**********************************************************\n");
5565 pAd->ate.Channel = Org_Channel;
5566 ATEAsicSwitchChannel(pAd);
5568 // Restore original value
5569 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R66, Org_BBP66value);
5570 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R69, Org_BBP69value);
5571 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R70, Org_BBP70value);
5576 BOOLEAN SyncTxRxConfig(PRTMP_ADAPTER pAd, USHORT offset, UCHAR value)
5578 UCHAR tmp = 0, bbp_data = 0;
5582 ATE_BBP_IO_READ8_BY_REG_ID(pAd, offset, &bbp_data);
5586 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, offset, &bbp_data);
5590 ASSERT(bbp_data == value);
5595 /* Need to sync. tx configuration with legacy ATE. */
5596 tmp = (bbp_data & ((1 << 4) | (1 << 3))/* 0x18 */) >> 3;
5599 /* The BBP R1 bit[4:3] = 2 :: Both DACs will be used by QA. */
5602 pAd->ate.TxAntennaSel = 0;
5604 /* The BBP R1 bit[4:3] = 0 :: DAC 0 will be used by QA. */
5607 pAd->ate.TxAntennaSel = 1;
5609 /* The BBP R1 bit[4:3] = 1 :: DAC 1 will be used by QA. */
5612 pAd->ate.TxAntennaSel = 2;
5615 DBGPRINT(RT_DEBUG_TRACE, ("%s -- Sth. wrong! : return FALSE; \n", __func__));
5618 break;/* case BBP_R1 */
5621 /* Need to sync. rx configuration with legacy ATE. */
5622 tmp = (bbp_data & ((1 << 1) | (1 << 0))/* 0x03 */);
5625 /* The BBP R3 bit[1:0] = 3 :: All ADCs will be used by QA. */
5628 pAd->ate.RxAntennaSel = 0;
5630 /* The BBP R3 bit[1:0] = 0 :: ADC 0 will be used by QA, */
5631 /* unless the BBP R3 bit[4:3] = 2 */
5634 pAd->ate.RxAntennaSel = 1;
5635 tmp = ((bbp_data & ((1 << 4) | (1 << 3))/* 0x03 */) >> 3);
5638 /* Default : All ADCs will be used by QA */
5639 pAd->ate.RxAntennaSel = 0;
5642 /* The BBP R3 bit[1:0] = 1 :: ADC 1 will be used by QA. */
5645 pAd->ate.RxAntennaSel = 2;
5647 /* The BBP R3 bit[1:0] = 2 :: ADC 2 will be used by QA. */
5650 pAd->ate.RxAntennaSel = 3;
5653 DBGPRINT(RT_DEBUG_ERROR, ("%s -- Impossible! : return FALSE; \n", __func__));
5656 break;/* case BBP_R3 */
5659 DBGPRINT(RT_DEBUG_ERROR, ("%s -- Sth. wrong! : return FALSE; \n", __func__));
5666 static VOID memcpy_exl(PRTMP_ADAPTER pAd, UCHAR *dst, UCHAR *src, ULONG len)
5673 pDst = (ULONG *) dst;
5674 pSrc = (ULONG *) src;
5676 for (i = 0 ; i < (len/4); i++)
5678 /* For alignment issue, we need a variable "Value". */
5679 memmove(&Value, pSrc, 4);
5680 Value = htonl(Value);
5681 memmove(pDst, &Value, 4);
5687 /* wish that it will never reach here */
5688 memmove(&Value, pSrc, (len % 4));
5689 Value = htonl(Value);
5690 memmove(pDst, &Value, (len % 4));
5694 static VOID memcpy_exs(PRTMP_ADAPTER pAd, UCHAR *dst, UCHAR *src, ULONG len)
5702 for (i = 0; i < (len/2); i++)
5704 memmove(pDst, pSrc, 2);
5705 *((USHORT *)pDst) = htons(*((USHORT *)pDst));
5712 memmove(pDst, pSrc, 1);
5716 static VOID RTMP_IO_READ_BULK(PRTMP_ADAPTER pAd, UCHAR *dst, UCHAR *src, UINT32 len)
5719 UINT32 *pDst, *pSrc;
5721 pDst = (UINT32 *) dst;
5722 pSrc = (UINT32 *) src;
5724 for (i = 0 ; i < (len/4); i++)
5726 RTMP_IO_READ32(pAd, (ULONG)pSrc, &Value);
5727 Value = htonl(Value);
5728 memmove(pDst, &Value, 4);
5737 /* These work only when RALINK_ATE is defined */
5738 INT Set_TxStart_Proc(
5739 IN PRTMP_ADAPTER pAd,
5742 ULONG value = simple_strtol(arg, 0, 10);
5743 UCHAR buffer[26] = {0x88, 0x02, 0x2c, 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x00, 0x55, 0x44, 0x33, 0x22, 0x11, 0xc0, 0x22, 0x00, 0x00};
5746 if (pAd->ate.TxStatus != 0)
5749 pAd->ate.TxInfo = 0x04000000;
5750 bzero(&pAd->ate.TxWI, sizeof(TXWI_STRUC));
5751 pAd->ate.TxWI.PHYMODE = 0;// MODE_CCK
5752 pAd->ate.TxWI.MPDUtotalByteCount = 1226;
5753 pAd->ate.TxWI.MCS = 3;
5754 //pAd->ate.Mode = ATE_START;
5755 pAd->ate.Mode |= ATE_TXFRAME;
5756 pAd->ate.TxCount = value;
5760 pAd->ate.DLen = 1200;
5761 memcpy(pAd->ate.Header, buffer, 26);
5762 pAd->ate.bQATxStart = TRUE;
5763 //pObj = (POS_COOKIE) pAd->OS_Cookie;
5764 //tasklet_hi_schedule(&pObj->AteTxTask);
5767 #endif /* end of #if 0 */
5769 INT Set_TxStop_Proc(
5770 IN PRTMP_ADAPTER pAd,
5773 ATEDBGPRINT(RT_DEBUG_TRACE,("Set_TxStop_Proc\n"));
5775 if (Set_ATE_Proc(pAd, "TXSTOP"))
5785 INT Set_RxStop_Proc(
5786 IN PRTMP_ADAPTER pAd,
5789 ATEDBGPRINT(RT_DEBUG_TRACE,("Set_RxStop_Proc\n"));
5791 if (Set_ATE_Proc(pAd, "RXSTOP"))
5802 INT Set_EEWrite_Proc(
5803 IN PRTMP_ADAPTER pAd,
5806 USHORT offset = 0, value;
5809 while((*p2 != ':') && (*p2 != '\0'))
5817 A2Hex(value, p2+ 1);
5824 if (offset >= EEPROM_SIZE)
5826 ate_print("Offset can not exceed EEPROM_SIZE( == 0x%04x)\n", EEPROM_SIZE);
5830 RTMP_EEPROM_WRITE16(pAd, offset, value);
5835 INT Set_BBPRead_Proc(
5836 IN PRTMP_ADAPTER pAd,
5839 UCHAR value = 0, offset;
5845 ATE_BBP_IO_READ8_BY_REG_ID(pAd, offset, &value);
5849 RTMP_BBP_IO_READ8_BY_REG_ID(pAd, offset, &value);
5852 ate_print("%x\n", value);
5858 INT Set_BBPWrite_Proc(
5859 IN PRTMP_ADAPTER pAd,
5866 while((*p2 != ':') && (*p2 != '\0'))
5874 A2Hex(value, p2+ 1);
5883 ATE_BBP_IO_WRITE8_BY_REG_ID(pAd, offset, value);
5887 RTNP_BBP_IO_WRITE8_BY_REG_ID(pAd, offset, value);
5893 INT Set_RFWrite_Proc(
5894 IN PRTMP_ADAPTER pAd,
5898 ULONG R1, R2, R3, R4;
5902 while((*p2 != ':') && (*p2 != '\0'))
5912 while((*p3 != ':') && (*p3 != '\0'))
5922 while((*p4 != ':') && (*p4 != '\0'))
5936 RTMP_RF_IO_WRITE32(pAd, R1);
5937 RTMP_RF_IO_WRITE32(pAd, R2);
5938 RTMP_RF_IO_WRITE32(pAd, R3);
5939 RTMP_RF_IO_WRITE32(pAd, R4);
5943 #endif // end of #if 0 //
5944 #endif // RALINK_28xx_QA //
5946 #endif // RALINK_ATE //